edac: Add APM X-Gene SoC EDAC driver
Subsystems (5)
v11 cover edac: Add APM X-Gene SoC EDAC driver
This patch adds support for the APM X-Gene SoC EDAC driver for DT.
v11:
* Update DT binding documnetation with additional memory controller and PMD controller instance number
* Move global MC variables to EDAC top level structure
* Move EDAC support functions to top of file
* Inlined some EDAC support functions
* Remove define of CONFIG_EDAC_DEBUG where it is possible
* Update driver to reflect additional memory controller and PMD controller properties in DT
* Update DT with additional memory controller and PMD instance number
* Drop the stub scrub function for ARM64. You will need an EDAC code update to compile.
v10:
* Move regmap for CSW, MCBA, MCBB, and efuse to top driver node and add accessor support functions
* Change retrieval OF address proerty for subnode to use of_address_to_resource
* Add COMPILE_TEST to Kconfig for EDAC_XGENE
* Update DT binding documentation and DT node accordingly
* Remove DT node naming and number from nodes
v9:
* Update maintainer section
* Update binding documentation to reflect update DT binding
* Restructure the EDAC driver such that its includes subnode for MC, PMD's, and future L3's and SoC.
* Update DT node to reflect update DT binding
* NOTE: Temporary removed L3 and SoC. They will be added back later on.
v8:
* Change ASM_EDAC_H to __ASM_EDAC_H in file edac.h
* Add WARN_ONCE in stub function atomic_scrub
* Update DTS binding documentation (with only memory controller node)
* Temporary remove L1/L2, L3, and SoC driver code and update memory driver code accordingly
v7:
* Update binding documentation for memory controller, PMD, L3, and SoC EDAC
* Change resource for PCP, CSW, MCBA, MCBB, and efuse to syscon type nodes and updae driver accordingly
* Fix clearing L2 RTO register properly
* Fix the MODULE_DEVICE_TABLE for OF
* Update DT accordingly to binding documentation
v6:
* Rebase to 4.0.0-rc3
* Add memory scrub stub function and enable ARM64 EDAC support patch
* Add bit definition defines for L2RTOS registers
* Remove un-necessary clearing of all L1/L2 software generated registers
* Remove wrong notification of LSU un-correctable error
* Change L2 reporting of un-correcable error to correctable error
* Change clearing of the L2C L2RTO registers
* Add support for L2 HW version 1 and version 2 or above
* Add support for L3 HW version 1 and version 2 or above
v5:
* Rebase to 3.17.rc1 (next)
* Update binding documentation for additional SoC node binding resource
* Enable MCU correctable and uncorrectable interrupts if not enabled by firmware
* Enable top level interrupt only after all MCU registered. Otherwise, error interrupt will never get cleared by the corresponding MCU.
* Remove clearing of L1 and L2 errors during initialization time. Otherwise, they will not be captured between firmware booting and error configuration.
* Add capture and clearing SoC register bus errors
* Add register bus resource to SoC DT node
v4:
* Fix PMD l1/l2 error reading address due to wrong variable type
* Fix clearing of software generated and HW errors for l1/l2
v3:
* Update binding documentation for PMD DT node and exampples
* Add binding documentation for SoC DT node
* Change MC, PMD, and L3C driver error injection to use debugfs
* Add missing IRQ for MC correctable error (code and DT)
* Use true/false where appropriate instead 1/0
* Add bit definition for L1 MMUESR register and fully decode this error
* Remove the un-necessary dev variable from xgene_edac_pmd_ctx structure
* Add check for disabled PMD (code and DT)
* Switch to edac_printk instead pr_err
* Some minor comments update
v2:
* Add EDAC entry in MAINTAINERS for APM EDAC driver
* Remove the MC scrub patch
* Remove the word 'Caches' from Kconfig
* Change all MASK defines to use BIT(x)
* Update comment or remove them
* Wrap error injection code around CONFIG_EDAC_DEBUG
* Change function name xgene_edac_mc_hw_init to xgene_edac_mc_irq_ctl
* Change all function XXX_hw_init to XXX_hw_ctl
* Fix typo 'activie'
* Move calling function edac_mc_alloc after resource retrieval
* Check for NULL on platform_get_resource return if reference directly
* Add documentation for struct xgene_edac_pmd_ctx
* Move L1 and L2 check out of function xgene_edac_pmd_check to its own functions
* Use for loop for configure each CPU of an PMD
* Replace /2 by >> 1
* Remove unnecessary comment on edac_device_add_device failure
* Make mem_err_ip static const
* Unwind EDAC register correctly if failed
---
Loc Ho (5):
arm64: Enable EDAC on ARM64
MAINTAINERS: Add entry for APM X-Gene SoC EDAC driver
Documentation: Add documentation for the APM X-Gene SoC EDAC DTS
binding
edac: Add APM X-Gene SoC EDAC driver
arm64: Add APM X-Gene SoC EDAC DTS entries
.../devicetree/bindings/edac/apm-xgene-edac.txt | 78 ++ MAINTAINERS | 7 + arch/arm64/Kconfig | 1 + arch/arm64/boot/dts/apm/apm-storm.dtsi | 83 ++ drivers/edac/Kconfig | 7 + drivers/edac/Makefile | 1 + drivers/edac/xgene_edac.c | 1254 ++++++++++++++++++++ 7 files changed, 1431 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/apm-xgene-edac.txt create mode 100644 drivers/edac/xgene_edac.c
PATCH v11 1/5 arm64: Enable EDAC on ARM64
Select EDAC_SUPPORT for arm64.
--- arch/arm64/Kconfig | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
arch/arm64/Kconfig +1 -0
@@ -22,6 +22,7 @@ config ARM64 select BUILDTIME_EXTABLE_SORT select CLONE_BACKWARDS select COMMON_CLK + select EDAC_SUPPORT select CPU_PM if (SUSPEND || CPU_IDLE) select DCACHE_WORD_ACCESS select GENERIC_ALLOCATOR
Signature · 1 line
1.7.1
PATCH v11 2/5 MAINTAINERS: Add entry for APM X-Gene SoC EDAC driver
This patch adds a MAINTAINERS entry for APM X-Gene SoC EDAC driver.
--- MAINTAINERS | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
MAINTAINERS +7 -0
@@ -3735,6 +3735,13 @@ W: bluesmoke.sourceforge.net S: Maintained F: drivers/edac/sb_edac.c +EDAC-XGENE +APPLIED MICRO (APM) X-GENE SOC EDAC +M: Loc Ho <[email protected]> +S: Supported +F: drivers/edac/xgene_edac.c +F: Documentation/devicetree/bindings/edac/apm-xgene-edac.txt + EDIROL UA-101/UA-1000 DRIVER M: Clemens Ladisch <[email protected]> L: alsa-devel at alsa-project.org (moderated for non-subscribers)
Signature · 1 line
1.7.1
PATCH v11 3/5 Documentation: Add documentation for the APM X-Gene SoC EDAC DTS binding
This patch adds documentation for the APM X-Gene SoC EDAC DTS binding.
--- .../devicetree/bindings/edac/apm-xgene-edac.txt | 78 ++++++++++++++++++++ 1 files changed, 78 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/apm-xgene-edac.txt
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file +78 -0
@@ -0,0 +1,78 @@ +* APM X-Gene SoC EDAC node + +EDAC node is defined to describe on-chip error detection and correction. +The follow error types are supported: + + memory controller - Memory controller + PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache + +The following section describes the EDAC DT node binding. + +Required properties: +- compatible : Shall be "apm,xgene-edac". +- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. +- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. +- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. +- regmap-efuse : Regmap of the PMD efuse resource. +- reg : First resource shall be the CPU bus (PCP) resource. +- interrupts : Interrupt-specifier for MCU, PMD, L3, or SoC error + IRQ(s). + +Required properties for memory controller subnode: +- compatible : Shall be "apm,xgene-edac-mc". +- reg : First resource shall be the memory controller unit + (MCU) resource. +- memory-controller : Instance number of the memory controller. + +Required properties for PMD subnode: +- compatible : Shall be "apm,xgene-edac-pmd". +- reg : First resource shall be the PMD resource. +- pmd-controller : Instance number of the PMD controller. + +Example: + csw: csw at 7e200000 { + compatible = "apm,xgene-csw", "syscon"; + reg = <0x0 0x7e200000 0x0 0x1000>; + }; + + mcba: mcba at 7e700000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e700000 0x0 0x1000>; + }; + + mcbb: mcbb at 7e720000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e720000 0x0 0x1000>; + }; + + efuse: efuse at 1054a000 { + compatible = "apm,xgene-efuse", "syscon"; + reg = <0x0 0x1054a000 0x0 0x20>; + }; + + edac at 78800000 { + compatible = "apm,xgene-edac"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + regmap-efuse = <&efuse>; + reg = <0x0 0x78800000 0x0 0x100>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + + edacmc at 7e800000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x7e800000 0x0 0x1000>; + memory-controller = <0>; + }; + + edacpmd at 7c000000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x7c000000 0x0 0x200000>; + pmd-controller = <0>; + }; + };
Signature · 1 line
1.7.1
PATCH v11 4/5 edac: Add APM X-Gene SoC EDAC driver
This patch adds support for the APM X-Gene SoC EDAC driver.
--- drivers/edac/Kconfig | 7 + drivers/edac/Makefile | 1 + drivers/edac/xgene_edac.c | 1254 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1262 insertions(+), 0 deletions(-) create mode 100644 drivers/edac/xgene_edac.c
drivers/edac/Kconfig +7 -0
@@ -392,4 +392,11 @@ config EDAC_SYNOPSYS Support for error detection and correction on the Synopsys DDR memory controller. +config EDAC_XGENE + tristate "APM X-Gene SoC" + depends on EDAC_MM_EDAC && (ARM64 || COMPILE_TEST) + help + Support for error detection and correction on the + APM X-Gene family of SOCs. + endif # EDAC
drivers/edac/Makefile +1 -0
@@ -68,3 +68,4 @@ obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o obj-$(CONFIG_EDAC_ALTERA_MC) += altera_edac.o obj-$(CONFIG_EDAC_SYNOPSYS) += synopsys_edac.o +obj-$(CONFIG_EDAC_XGENE) += xgene_edac.o
drivers/edac/xgene_edac.c new file +1254 -0
1,254 lines not on this page · raw message
Signature · 1 line
1.7.1
PATCH v11 5/5 arm64: Add APM X-Gene SoC EDAC DTS entries
This patch adds APM X-Gene SoC EDAC DTS entries.
--- arch/arm64/boot/dts/apm/apm-storm.dtsi | 83 ++++++++++++++++++++++++++++++++ 1 files changed, 83 insertions(+), 0 deletions(-)
arch/arm64/boot/dts/apm/apm-storm.dtsi +83 -0
@@ -374,6 +374,89 @@ }; }; + csw: csw at 7e200000 { + compatible = "apm,xgene-csw", "syscon"; + reg = <0x0 0x7e200000 0x0 0x1000>; + }; + + mcba: mcba at 7e700000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e700000 0x0 0x1000>; + }; + + mcbb: mcbb at 7e720000 { + compatible = "apm,xgene-mcb", "syscon"; + reg = <0x0 0x7e720000 0x0 0x1000>; + }; + + efuse: efuse at 1054a000 { + compatible = "apm,xgene-efuse", "syscon"; + reg = <0x0 0x1054a000 0x0 0x20>; + }; + + edac at 78800000 { + compatible = "apm,xgene-edac"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + regmap-efuse = <&efuse>; + reg = <0x0 0x78800000 0x0 0x100>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + + edacmc at 7e800000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x7e800000 0x0 0x1000>; + memory-controller = <0>; + }; + + edacmc at 7e840000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x7e840000 0x0 0x1000>; + memory-controller = <1>; + }; + + edacmc at 7e880000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x7e880000 0x0 0x1000>; + memory-controller = <2>; + }; + + edacmc at 7e8c0000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x7e8c0000 0x0 0x1000>; + memory-controller = <3>; + }; + + edacpmd at 7c000000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x7c000000 0x0 0x200000>; + pmd-controller = <0>; + }; + + edacpmd at 7c200000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x7c200000 0x0 0x200000>; + pmd-controller = <1>; + }; + + edacpmd at 7c400000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x7c400000 0x0 0x200000>; + pmd-controller = <2>; + }; + + edacpmd at 7c600000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x7c600000 0x0 0x200000>; + pmd-controller = <3>; + }; + }; + pcie0: pcie at 1f2b0000 { status = "disabled"; device_type = "pci";
Signature · 1 line
1.7.1
PATCH v11 4/5 edac: Add APM X-Gene SoC EDAC driver
In reply to Loc HoQuoted 31 lines · On Friday 22 May 2015 17:32:59 Loc Ho wrote:
drivers/edac/xgene_edac.c new file +31
-0+static bool xgene_edac_pmd_l2c_version1 (void ) +{ +/* Check all chips with PMD L2C version 1 HW */ +#define REVIDR_MINOR_REV (revidr) ((revidr) & 0x00000007) + +switch (MIDR_VARIANT (read_cpuid_id ())) { +case 0 : +switch (MIDR_REVISION (read_cpuid_id ())) { +case 0 : + +switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { +case 1 : +case 2 : +return true; + }; +break ; +case 1 : +if (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 )) ==1 ) +return true; +break ; + } +break ; +case 1 : +switch (MIDR_REVISION (read_cpuid_id ())) { +case 0 : +switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { +case 1 : +return true; + }; +break ; +case 1 :
drivers/edac/xgene_edac.c line 827
Quoted 10 lines
drivers/edac/xgene_edac.c new file +10
-0+switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { +case 1 : +case 0 : +return true; + }; +break ; + } +break ; + } +
As this is causing build errors on other architectures with COMPILE_TEST now, I'd suggest removing the function completely.
Please use different compatible strings for IP blocks that are different and undetectable, instead of reading the ID of another IP block.
Arnd
Catalin Marinas
maintainerPATCH v11 4/5 edac: Add APM X-Gene SoC EDAC driver
Quoted 46 lines · Arnd Bergmann
Quoted 31 lines · On Friday 22 May 2015 17:32:59 Loc Ho wrote:
drivers/edac/xgene_edac.c new file +31
-0+static bool xgene_edac_pmd_l2c_version1 (void ) +{ +/* Check all chips with PMD L2C version 1 HW */ +#define REVIDR_MINOR_REV (revidr) ((revidr) & 0x00000007) + +switch (MIDR_VARIANT (read_cpuid_id ())) { +case 0 : +switch (MIDR_REVISION (read_cpuid_id ())) { +case 0 : + +switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { +case 1 : +case 2 : +return true; + }; +break ; +case 1 : +if (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 )) ==1 ) +return true; +break ; + } +break ; +case 1 : +switch (MIDR_REVISION (read_cpuid_id ())) { +case 0 : +switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { +case 1 : +return true; + }; +break ; +case 1 :drivers/edac/xgene_edac.c line 827
Quoted 10 lines
drivers/edac/xgene_edac.c new file +10
-0+switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { +case 1 : +case 0 : +return true; + }; +break ; + } +break ; + } +As this is causing build errors on other architectures with
COMPILE_TESTnow, I'd suggest removing the function completely.
Quoted 2 lines
Please use different compatible strings for IP blocks that are different and undetectable, instead of reading the ID of another IP block.
I fully agree, the MIDR_* macros shouldn't be used by anything under drivers/.
Signature · 1 line
Catalin
Mark Rutland
reviewerPATCH v11 4/5 edac: Add APM X-Gene SoC EDAC driver
Quoted 47 lines · Catalin Marinas
Quoted 46 lines · Arnd Bergmann
Quoted 31 lines · On Friday 22 May 2015 17:32:59 Loc Ho wrote:
drivers/edac/xgene_edac.c new file +31
-0+static bool xgene_edac_pmd_l2c_version1 (void ) +{ +/* Check all chips with PMD L2C version 1 HW */ +#define REVIDR_MINOR_REV (revidr) ((revidr) & 0x00000007) + +switch (MIDR_VARIANT (read_cpuid_id ())) { +case 0 : +switch (MIDR_REVISION (read_cpuid_id ())) { +case 0 : + +switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { +case 1 : +case 2 : +return true; + }; +break ; +case 1 : +if (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 )) ==1 ) +return true; +break ; + } +break ; +case 1 : +switch (MIDR_REVISION (read_cpuid_id ())) { +case 0 : +switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { +case 1 : +return true; + }; +break ; +case 1 :drivers/edac/xgene_edac.c line 827
Quoted 10 lines
drivers/edac/xgene_edac.c new file +10
-0+switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { +case 1 : +case 0 : +return true; + }; +break ; + } +break ; + } +As this is causing build errors on other architectures with
COMPILE_TESTnow, I'd suggest removing the function completely.
Quoted 5 lines
Quoted 2 lines
Please use different compatible strings for IP blocks that are different and undetectable, instead of reading the ID of another IP block.
I fully agree, the MIDR_* macros shouldn't be used by anything under
drivers/.
Likewise.
Mark.
PATCH 1/1 edac: xgene: fix cpuid abuse
The new x-gene EDAC driver incorrectly tried to figure out the version of one of its IP blocks by looking at the version of the CPU core, which is only vagely related.
This removes the incorrect code and instead uses the version of the IP block in the compatible string where it belongs.
Found using build testing on x86, which does not provide the arm64 cpuid interface.
---
How about this one? We should make sure this gets fixed before the binding gets set in stone with a kernel release.
Loc, do you know if some of the other blocks might also have versions associated with them? Normally we try to use more specific product names, but in case of APM there don't seem to be any more specific names than X-Gene and X-Gene2 any more.
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +1 -1
@@ -25,7 +25,7 @@ Required properties for memory controller subnode: - memory-controller : Instance number of the memory controller. Required properties for PMD subnode: -- compatible : Shall be "apm,xgene-edac-pmd". +- compatible : Shall be "apm,xgene-edac-pmd" or "apm,xgene-v2-edac-pmd" - reg : First resource shall be the PMD resource. - pmd-controller : Instance number of the PMD controller.
drivers/edac/xgene_edac.c +7 -47
90 lines not on this page · raw message
PATCH 1/1 edac: xgene: fix cpuid abuse
Hi Arnd,
Thanks for the changes, some minor change requested below.
Quoted 13 lines
The new x-gene EDAC driver incorrectly tried to figure out the version of one of its IP blocks by looking at the version of the CPU core, which is only vagely related.
This removes the incorrect code and instead uses the version of the IP block in the compatible string where it belongs.
Found using build testing on x86, which does not provide the arm64 cpuid interface.
Signed-off-by Arnd Bergmann <[email protected]>---
Quoted 8 lines
How about this one? We should make sure this gets fixed before the binding gets set in stone with a kernel release.
Loc, do you know if some of the other blocks might also have versions associated with them? Normally we try to use more specific product names, but in case of APM there don't seem to be any more specific names than X-Gene and X-Gene2 any more.
I already asked the designer. There is no version register in the PMD block.
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt Required properties for memory controller subnode: · line 28
Quoted 10 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +1
-1@@ -25,7 +25,7 @@ Required properties for memory controller subnode: - memory-controller : Instance number of the memory controller. Required properties for PMD subnode: -- compatible : Shall be "apm,xgene-edac-pmd". +- compatible : Shall be "apm,xgene-edac-pmd" or "apm,xgene-v2-edac-pmd"
Can we change to "apm,xgene-edac-pmd-v2". I would like to associate with the PMD instead with the family name. The PMD (processor module) might be re-use in future chip as is such as Gen3, Gen4, and etc.
Quoted 67 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +0
-0- reg : First resource shall be the PMD resource. - pmd-controller : Instance number of the PMD controller.drivers/edac/xgene_edac.c +1
-44@@ -523,6 +523,7 @@ struct xgene_edac_pmd_ctx {struct edac_device_ctl_info *edac_dev;void __iomem *pmd_csr;u32 pmd; +int version; }; static void xgene_edac_pmd_l1_check(struct edac_device_ctl_info *edac_dev,@@ -784,50 +785,6 @@ static void xgene_edac_pmd_cpu_hw_cfg(struct edac_device_ctl_info *edac_dev,writel (0x00000101 , pg_f +MEMERR_CPU_MMUECR_PAGE_OFFSET ); } -static bool xgene_edac_pmd_l2c_version1 (void ) -{ -/* Check all chips with PMD L2C version 1 HW */ -#define REVIDR_MINOR_REV (revidr) ((revidr) & 0x00000007) - -switch (MIDR_VARIANT (read_cpuid_id ())) { -case 0 : -switch (MIDR_REVISION (read_cpuid_id ())) { -case 0 : - -switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { -case 1 : -case 2 : -return true; - }; -break ; -case 1 : -if (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 )) ==1 ) -return true; -break ; - } -break ; -case 1 : -switch (MIDR_REVISION (read_cpuid_id ())) { -case 0 : -switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { -case 1 : -return true; - }; -break ; -case 1 : -switch (REVIDR_MINOR_REV (read_cpuid (REVIDR_EL1 ))) { -case 1 : -case 0 : -return true; - }; -break ; - } -break ; - } - -return false; -} -static void xgene_edac_pmd_hw_cfg (struct edac_device_ctl_info *edac_dev) {struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;
drivers/edac/xgene_edac.c static void xgene_edac_pmd_hw_cfg(struct edac_device_ctl_info *edac_dev) · line 797
Quoted 5 lines
drivers/edac/xgene_edac.c +1
-1@@ -837,7 +794,7 @@ static void xgene_edac_pmd_hw_cfg(struct edac_device_ctl_info *edac_dev)/* Enable PMD memory error - MEMERR_L2C_L2ECR and L2C_L2RTOCR */ writel (0x00000703 , pg_e +MEMERR_L2C_L2ECR_PAGE_OFFSET );/* Configure L2C HW request time out feature if supported */ -if (!xgene_edac_pmd_l2c_version1 ()) +if (ctx->version ==1 )
The correct changes would be ctx->version > 1. So:
if (ctx->version > 1)
Quoted 21 lines
drivers/edac/xgene_edac.c +2
-1writel (0x00000119 , pg_d +CPUX_L2C_L2RTOCR_PAGE_OFFSET ); }@@ -956,7 +913,7 @@ static int xgene_edac_pmd_available(u32 efuse, int pmd)return (efuse & (1 << pmd)) ?0 :1 ; } -static int xgene_edac_pmd_add (struct xgene_edac *edac,struct device_node *np) +static int xgene_edac_pmd_add (struct xgene_edac *edac,struct device_node *np,int version) {struct edac_device_ctl_info *edac_dev;struct xgene_edac_pmd_ctx *ctx;@@ -998,6 +955,7 @@ static int xgene_edac_pmd_add(struct xgene_edac *edac, struct device_node *np) ctx->edac = edac; ctx->edac_dev = edac_dev; ctx->ddev = *edac->dev; + ctx->version = version; edac_dev->dev = &ctx->ddev; edac_dev->ctl_name = ctx->name; edac_dev->dev_name = ctx->name;
drivers/edac/xgene_edac.c static int xgene_edac_probe(struct platform_device *pdev) · line 1131
Quoted 6 lines
drivers/edac/xgene_edac.c +2
-1@@ -1169,7 +1127,9 @@ static int xgene_edac_probe(struct platform_device *pdev)if (of_device_is_compatible (child,"apm,xgene-edac-mc" ))xgene_edac_mc_add (edac, child);if (of_device_is_compatible (child,"apm,xgene-edac-pmd" )) -xgene_edac_pmd_add (edac, child); +xgene_edac_pmd_add (edac, child,1 ); +if (of_device_is_compatible (child,"apm,xgene-v2-edac-pmd" ))
Change to "apm,xgene-edac-pmd-v2"
drivers/edac/xgene_edac.c static int xgene_edac_probe(struct platform_device *pdev) · line 1135
Quoted 4 lines
drivers/edac/xgene_edac.c +1
-0+xgene_edac_pmd_add (edac, child,2 ); }return 0 ;
Again... Thanks for the changes.
-Loc
PATCH 1/1 edac: xgene: fix cpuid abuse
Quoted 20 lines · On Monday 01 June 2015 10:04:51 Loc Ho wrote:
Hi Arnd,
Thanks for the changes, some minor change requested below.
Quoted 16 lines
The new x-gene EDAC driver incorrectly tried to figure out the version of one of its IP blocks by looking at the version of the CPU core, which is only vagely related.
This removes the incorrect code and instead uses the version of the IP block in the compatible string where it belongs.
Found using build testing on x86, which does not provide the arm64 cpuid interface.
Signed-off-by Arnd Bergmann <[email protected]>---
How about this one? We should make sure this gets fixed before the binding gets set in stone with a kernel release.
Quoted 7 lines
Quoted 5 lines
Loc, do you know if some of the other blocks might also have versions associated with them? Normally we try to use more specific product names, but in case of APM there don't seem to be any more specific names than X-Gene and X-Gene2 any more.
I already asked the designer. There is no version register in the PMD block.
Ok.
Quoted 7 lines
Quoted 7 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +0
-0@@ -25,7 +25,7 @@ Required properties for memory controller subnode: - memory-controller : Instance number of the memory controller.
Quoted 7 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt Required properties for memory controller subnode: · line 28
Quoted 3 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +1
-1Required properties for PMD subnode: -- compatible : Shall be "apm,xgene-edac-pmd". +- compatible : Shall be "apm,xgene-edac-pmd" or "apm,xgene-v2-edac-pmd"Can we change to "apm,xgene-edac-pmd-v2". I would like to associate with the PMD instead with the family name. The PMD (processor module) might be re-use in future chip as is such as Gen3, Gen4, and etc.
Makes sense.
Quoted 6 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt Required properties for memory controller subnode: · line 30
Quoted 2 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +2
-0+ xgene_edac_pmd_add(edac, child, 1); + if (of_device_is_compatible(child, "apm,xgene-v2-edac-pmd"))Change to "apm,xgene-edac-pmd-v2"
Quoted 6 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt Required properties for memory controller subnode:
Quoted 4 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt +1
-0+ xgene_edac_pmd_add(edac, child, 2); } return 0;Again... Thanks for the changes.
Can you send a fixed version of the patch?
Arnd
v11 cover edac: Add APM X-Gene SoC EDAC driver
In reply to Loc HoQuoted 1 line · Loc Ho
This patch adds support for the APM X-Gene SoC EDAC driver for DT.
Applied, thanks!
Phew, that was a looong process. But the final result looks nice. So thanks for the perseverance.
All is here, if you want to do testing and other fun before the merge window opens:
git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git#for-next
Cheers!
Signature · 5 lines
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
--v11 cover edac: Add APM X-Gene SoC EDAC driver
Hi,
Quoted 5 lines · Borislav Petkov
Quoted 1 line · Loc Ho
This patch adds support for the APM X-Gene SoC EDAC driver for DT.
Applied, thanks!
Quoted 8 lines
Phew, that was a looong process. But the final result looks nice. So thanks for the perseverance.
All is here, if you want to do testing and other fun before the merge window opens:
git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git#for-next
I pull this and got this error:
/projects/svdc/P4sbSW/lho/xgene2/processor/git.lho/edac-next/drivers/edac/edac_stub.c:19:22:
fatal error: asm/edac.h: No such file or directory
#include <asm/edac.h>
^compilation terminated.
-Loc
Borislav Petkov
maintainerv11 cover edac: Add APM X-Gene SoC EDAC driver
Quoted 7 lines · Loc Ho
I pull this and got this error:
/projects/svdc/P4sbSW/lho/xgene2/processor/git.lho/edac-next/drivers/edac/edac_stub.c:19:22:
fatal error:asm/edac.h: No such file or directory#include <asm/edac.h> ^compilation terminated.
Aah, that arch-specific header is only for the atomic_scrub thing and arm64 doesn't have it.
But that header is actually not really needed in that file.
Does it build when you remove it?
Thanks.
Signature · 5 lines
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
--Borislav Petkov
maintainerPATCH 1/1 EDAC, edac_stub: Drop arch-specific include
Quoted 1 line · Borislav Petkov
Does it build when you remove it?
IOW, this should fix it:
---
From: Borislav Petkov <[email protected]>
Date: Fri, 29 May 2015 22:01:00 +0200
Subject: [PATCH] EDAC, edac_stub: Drop arch-specific include
<asm/edac.h> contains only the arch-specific scrubbing function and is thus not needed in edac_stub.c. Kill it.
--- drivers/edac/edac_stub.c | 1 - 1 file changed, 1 deletion(-)
drivers/edac/edac_stub.c +0 -1
@@ -16,7 +16,6 @@#include <linux/edac.h> #include <linux/atomic.h> #include <linux/device.h> -#include <asm/edac.h> int edac_op_state =EDAC_OPSTATE_INVAL ;EXPORT_SYMBOL_GPL (edac_op_state);
Signature · 8 lines
2.3.5
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
--PATCH 1/1 EDAC, edac_stub: Drop arch-specific include
Hi,
Quoted 4 lines · Borislav Petkov
Quoted 1 line · Borislav Petkov
Does it build when you remove it?
IOW, this should fix it:
Confirmed.
-Loc
Borislav Petkov
maintainerPATCH 1/1 EDAC, edac_stub: Drop arch-specific include
Quoted 7 lines · Loc Ho
Quoted 4 lines · Borislav Petkov
Quoted 1 line · Borislav Petkov
Does it build when you remove it?
IOW, this should fix it:
Confirmed.
Thanks, I'll queue it.
Signature · 5 lines
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
--v11 cover edac: Add APM X-Gene SoC EDAC driver
In reply to Borislav PetkovHi,
Quoted 9 lines · Borislav Petkov
Quoted 7 lines · Loc Ho
I pull this and got this error:
/projects/svdc/P4sbSW/lho/xgene2/processor/git.lho/edac-next/drivers/edac/edac_stub.c:19:22:
fatal error:asm/edac.h: No such file or directory#include <asm/edac.h> ^compilation terminated.
Quoted 6 lines
Aah, that arch-specific header is only for the
atomic_scrubthing and arm64 doesn't have it.But that header is actually not really needed in that file.
Does it build when you remove it?
It should because all I did to fix it was an touch on "arch/arm64/include/asm/edac.h".
-Loc