arm: dts: dra7: arch timer sits in always-on power domain
PATCH 1/1 arm: dts: dra7: arch timer sits in always-on power domain
According to DRA7x TRM section 4.3.5 Realtime Counter (Master Counter), the realtime counter sits in the Wakeup Always-On Power domain. Furthermore, the counter will automatically switch the 32K clock source when MPU goes into standby and automatically switch back to SYS_CLK or ABE_LP when MPU goes out of standby.
--- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/dra7.dtsi +1 -0
@@ -50,6 +50,7 @@ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&gic>; + always-on; }; gic: interrupt-controller at 48211000 {
Signature · 1 line
2.4.4
PATCH 1/1 arm: dts: dra7: arch timer sits in always-on power domain
Quoted 7 lines · Felipe Balbi
According to DRA7x TRM section 4.3.5 Realtime Counter (Master Counter), the realtime counter sits in the Wakeup Always-On Power domain. Furthermore, the counter will automatically switch the 32K clock source when MPU goes into standby and automatically switch back to
SYS_CLKorABE_LPwhen MPU goes out of standby.Signed-off-by Felipe Balbi <[email protected]>
Quoted 24 lines
--- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+)arch/arm/boot/dts/dra7.dtsi +1
-1@@ -50,6 +50,7 @@ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&gic>; + always-on; }; gic: interrupt-controller at 48211000 { --2.4.4
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Signature · 3 lines
--- Regards, Nishanth Menon
PATCH 1/1 arm: dts: dra7: arch timer sits in always-on power domain
Quoted 6 lines · Nishanth Menon
Quoted 5 lines · Felipe Balbi
According to DRA7x TRM section 4.3.5 Realtime Counter (Master Counter), the realtime counter sits in the Wakeup Always-On Power domain. Furthermore, the counter will automatically switch the 32K clock source when MPU goes into standby and automatically switch back to
SYS_CLKorABE_LPwhen MPU goes out of standby.
That's good to hear. Is that the case also for 5432?
Regards,
Tony
PATCH 1/1 arm: dts: dra7: arch timer sits in always-on power domain
Quoted 9 lines · Tony Lindgren
Quoted 6 lines · Nishanth Menon
Quoted 5 lines · Felipe Balbi
According to DRA7x TRM section 4.3.5 Realtime Counter (Master Counter), the realtime counter sits in the Wakeup Always-On Power domain. Furthermore, the counter will automatically switch the 32K clock source when MPU goes into standby and automatically switch back to
SYS_CLKorABE_LPwhen MPU goes out of standby.That's good to hear. Is that the case also for 5432?
Adding into omap-for-v4.2/fixes, if 5432 supports it too it can be patched separately.
Regards,
Tony
PATCH 1/1 arm: dts: dra7: arch timer sits in always-on power domain
In reply to Felipe BalbiQuoted 5 lines · Felipe Balbi
According to DRA7x TRM section 4.3.5 Realtime Counter (Master Counter), the realtime counter sits in the Wakeup Always-On Power domain. Furthermore, the counter will automatically switch the 32K clock source when MPU goes into standby and automatically switch back to
SYS_CLKorABE_LPwhen MPU goes out of standby.
While the counter is in an always-on domain (the architecture mandates this) I don't think that applies to the timers (i.e. the comparators within a CPU), which are almost certainly not in an always-on domain.
I suspect that this is incorrect, and it will be very painful to debug if it is...
Thanks,
Mark.
Quoted 27 lines
Signed-off-by Felipe Balbi <[email protected]>--- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+)arch/arm/boot/dts/dra7.dtsi +1
-0@@ -50,6 +50,7 @@ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&gic>; + always-on; }; gic: interrupt-controller at 48211000 {Signature · 7 lines
2.4.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 1/1 arm: dts: dra7: arch timer sits in always-on power domain
Quoted 7 lines · Mark Rutland
Quoted 5 lines · Felipe Balbi
According to DRA7x TRM section 4.3.5 Realtime Counter (Master Counter), the realtime counter sits in the Wakeup Always-On Power domain. Furthermore, the counter will automatically switch the 32K clock source when MPU goes into standby and automatically switch back to
SYS_CLKorABE_LPwhen MPU goes out of standby.
Quoted 6 lines
While the counter is in an always-on domain (the architecture mandates this) I don't think that applies to the timers (i.e. the comparators within a CPU), which are almost certainly not in an always-on domain.
I suspect that this is incorrect, and it will be very painful to debug if it is...
OK good point. And there would have to be some wake-up line wired to the IO chain or the PMIC in this case if the comparator was always on.
Dropping this patch for now anyways.
Regards,
Tony