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iommu/arm-smmu-v2: Workaround for ThunderX errata#27704

PATCH Superseded Tirumalesh Chalamarla 2 participants 3 messages Mar 4, 2016

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#0 lore raw

PATCH v4 1/1 iommu/arm-smmu-v2: Workaround for ThunderX errata#27704

Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID namespaces; specifically within a given node SMMU0 and SMMU1 share, as does SMMU2 and SMMU3.

This patch make sure ASID and VMID space is unique across cavium SMMUv2.

changes from V3:
- Removed redundent variable.
- Used atomic_t for maintaining running total

changes from V2:
- removed *_base from DT, and replaced with compatible string

changes from V1:
- rebased on top of 16 bit VMID patch
- removed redundent options from DT
- insted of transform, DT now supplies starting ASID/VMID

---
 Documentation/arm64/silicon-errata.txt             |  1 +
 .../devicetree/bindings/iommu/arm,smmu.txt         |  1 +
 drivers/iommu/arm-smmu.c                           | 42 ++++++++++++++++------
 3 files changed, 33 insertions(+), 11 deletions(-)
Documentation/arm64/silicon-errata.txt +1 -0
index 58b71dd..3747a4b 100644
@@ -56,3 +56,4 @@ stable kernels.
 |                |                 |                 |                         |
 | Cavium         | ThunderX ITS    | #22375, #24313  | CAVIUM_ERRATUM_22375    |
 | Cavium         | ThunderX GICv3  | #23154          | CAVIUM_ERRATUM_23154    |
+| Cavium         | ThunderX SMMUv2 | #27704          | N/A		       |
Documentation/devicetree/bindings/iommu/arm,smmu.txt +1 -0
index 7180745..19fe6f2 100644
@@ -16,6 +16,7 @@ conditions.
                         "arm,mmu-400"
                         "arm,mmu-401"
                         "arm,mmu-500"
+                        "cavium,smmu-v2"
 
                   depending on the particular implementation and/or the
                   version of the architecture implemented.
drivers/iommu/arm-smmu.c +31 -11

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#1 lore raw

PATCH v4 1/1 iommu/arm-smmu-v2: Workaround for ThunderX errata#27704

Quoted 18 lines · Tirumalesh Chalamarla

Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID namespaces; specifically within a given node SMMU0 and SMMU1 share, as does SMMU2 and SMMU3.

This patch make sure ASID and VMID space is unique across cavium SMMUv2.

changes from V3:
- Removed redundent variable.
- Used atomic_t for maintaining running total

changes from V2:
- removed *_base from DT, and replaced with compatible string

changes from V1:
- rebased on top of 16 bit VMID patch
- removed redundent options from DT
- insted of transform, DT now supplies starting ASID/VMID

Quoted 7 lines
---
 Documentation/arm64/silicon-errata.txt             |  1 +
 .../devicetree/bindings/iommu/arm,smmu.txt         |  1 +
 drivers/iommu/arm-smmu.c                           | 42 ++++++++++++++++------
 3 files changed, 33 insertions(+), 11 deletions(-)

Hmm, this doesn't seem to apply to my iommu/devel branch. Am I missing some dependency?

Will

#2 lore raw

PATCH v4 1/1 iommu/arm-smmu-v2: Workaround for ThunderX errata#27704

Quoted 27 lines · Will Deacon
Quoted 18 lines · Tirumalesh Chalamarla

Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID namespaces; specifically within a given node SMMU0 and SMMU1 share, as does SMMU2 and SMMU3.

This patch make sure ASID and VMID space is unique across cavium SMMUv2.

changes from V3:
- Removed redundent variable.
- Used atomic_t for maintaining running total

changes from V2:
- removed *_base from DT, and replaced with compatible string

changes from V1:
- rebased on top of 16 bit VMID patch
- removed redundent options from DT
- insted of transform, DT now supplies starting ASID/VMID

Quoted 7 lines
---
  Documentation/arm64/silicon-errata.txt             |  1 +
  .../devicetree/bindings/iommu/arm,smmu.txt         |  1 +
  drivers/iommu/arm-smmu.c                           | 42 ++++++++++++++++------
  3 files changed, 33 insertions(+), 11 deletions(-)
Quoted 3 lines

Hmm, this doesn't seem to apply to my iommu/devel branch. Am I missing some dependency?

there should not, i will repost based on that branch.

Quoted 2 lines

Will