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Add TI iodelay driver using #pinctrl-cells

PATCH In review Tony Lindgren 9 participants 21 messages Dec 30, 2016 – Feb 16, 2017 11 messages not in the archive

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#0 lore raw

cover Add TI iodelay driver using #pinctrl-cells

Hi all,

Here's a respin of Nishanth's iodelay driver that I've updated to use #pinctrl-cells and generic pinctrl group and function code.

Gary, note that this one has an iterator function that you may be able to use too, and hopefully we can simplify things further eventually by introducing a generic iterator.

Note that these patches are against the current pinctrl devel branch at commit b61d1546906d ("pinctrl: single: Use generic pinmux helpers for managing functions").

Regards,

Tony

Nishanth Menon (1):
pinctrl: Introduce TI IOdelay configuration driver

Tony Lindgren (1):
pinctrl: core: Make dt_free_map optional

 .../devicetree/bindings/pinctrl/ti,iodelay.txt     |  47 +
 drivers/pinctrl/Kconfig                            |   1 +
 drivers/pinctrl/Makefile                           |   1 +
 drivers/pinctrl/core.c                             |   3 -
 drivers/pinctrl/devicetree.c                       |   3 +-
 drivers/pinctrl/ti/Kconfig                         |  10 +
 drivers/pinctrl/ti/Makefile                        |   1 +
 drivers/pinctrl/ti/pinctrl-ti-iodelay.c            | 945 +++++++++++++++++++++
 8 files changed, 1007 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/ti,iodelay.txt
 create mode 100644 drivers/pinctrl/ti/Kconfig
 create mode 100644 drivers/pinctrl/ti/Makefile
 create mode 100644 drivers/pinctrl/ti/pinctrl-ti-iodelay.c
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#2 lore raw

PATCH 1/2 pinctrl: core: Make dt_free_map optional

If the pin controller driver is using devm_kzalloc, there may not be anything to do for dt_free_map. Let's make it optional to avoid unncessary boilerplate code.

---
 drivers/pinctrl/core.c       | 3 ---
 drivers/pinctrl/devicetree.c | 3 ++-
 2 files changed, 2 insertions(+), 4 deletions(-)
drivers/pinctrl/core.c +0 -3
@@ -1913,9 +1913,6 @@ static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
 	    !ops->get_group_name)
 		return -EINVAL;
 
-	if (ops->dt_node_to_map && !ops->dt_free_map)
-		return -EINVAL;
-
 	return 0;
 }
 
drivers/pinctrl/devicetree.c +2 -1
@@ -42,7 +42,8 @@ static void dt_free_map(struct pinctrl_dev *pctldev,
 {
 	if (pctldev) {
 		const struct pinctrl_ops *ops = pctldev->desc->pctlops;
-		ops->dt_free_map(pctldev, map, num_maps);
+		if (ops->dt_free_map)
+			ops->dt_free_map(pctldev, map, num_maps);
 	} else {
 		/* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */
 		kfree(map);
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#4 lore raw

Re: [PATCH 1/2] pinctrl: core: Make dt_free_map optional

Quoted 5 lines · Tony Lindgren

If the pin controller driver is using devm_kzalloc, there may not be anything to do for dt_free_map. Let's make it optional to avoid unncessary boilerplate code.

Patch applied.

Yours,
Linus Walleij
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#5 lore raw

PATCH 2/2 pinctrl: Introduce TI IOdelay configuration driver

In reply to Tony Lindgren

From: Nishanth Menon <[email protected]>

SoC family such as DRA7 family of processors have, in addition to the regular muxing of pins (as done by pinctrl-single), a separate hardware module called IODelay which is also expected to be configured. The "IODelay" module has it's own register space that is independent of the control module and the padconf register area.

With recent changes to the pinctrl framework, we can now support this hardware with a reasonably minimal driver by using #pinctrl-cells, GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS.

It is advocated strongly in TI's official documentation considering the existing design of the DRA7 family of processors during mux or IODelay reconfiguration, there is a potential for a significant glitch which may cause functional impairment to certain hardware. It is hence recommended to do as little of muxing as absolutely necessary without I/O isolation (which can only be done in initial stages of bootloader).

NOTE: with the system wide I/O isolation scheme present in DRA7 SoC family, it is not reasonable to do stop all I/O operations for every such pad configuration scheme. So, we will let it glitch when used in this mode.

Even with the above limitation, certain functionality such as MMC has mandatory need for IODelay reconfiguration requirements, depending on speed of transfer. In these cases, with careful examination of usecase involved, the expected glitch can be controlled such that it does not impact functionality.

In short, IODelay module support as a padconf driver being introduced here is not expected to do SoC wide I/O Isolation and is meant for a limited subset of IODelay configuration requirements that need to be dynamic and whose glitchy behavior will not cause functionality failure for that interface.

IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared to 0x0 at all times, even when configuring Manual IO Timing Modes. This is done by eliminating the LOCK_BIT=1 setting from Step of the Manual IO timing Mode configuration procedure. This option leaves the CFG_* registers unprotected from unintended writes to the CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured.

This approach is taken to allow for a generic driver to exist in kernel world that has to be used carefully in required usecases.

[[email protected]: updated to use generic pinctrl functions, added
binding documentation, updated comments]

---
 .../devicetree/bindings/pinctrl/ti,iodelay.txt     |  47 +
 drivers/pinctrl/Kconfig                            |   1 +
 drivers/pinctrl/Makefile                           |   1 +
 drivers/pinctrl/ti/Kconfig                         |  10 +
 drivers/pinctrl/ti/Makefile                        |   1 +
 drivers/pinctrl/ti/pinctrl-ti-iodelay.c            | 945 +++++++++++++++++++++
 6 files changed, 1005 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/ti,iodelay.txt
 create mode 100644 drivers/pinctrl/ti/Kconfig
 create mode 100644 drivers/pinctrl/ti/Makefile
 create mode 100644 drivers/pinctrl/ti/pinctrl-ti-iodelay.c
Documentation/devicetree/bindings/pinctrl/ti,iodelay.txt new file +47 -0
new file mode 100644
@@ -0,0 +1,47 @@
+* Pin configuration for TI IODELAY controller
+
+TI dra7 based SoCs such as am57xx have a controller for setting the IO delay
+for each pin. For most part the IO delay values are programmed by the bootloader,
+but some pins need to be configured dynamically by the kernel such as the
+MMC pins.
+
+Required Properties:
+
+  - compatible: Must be "ti,dra7-iodelay"
+  - reg: Base address and length of the memory resource used
+  - #address-cells: Number of address cells
+  - #size-cells: Size of cells
+  - #pinctrl-cells: Number of pinctrl cells, must be 2. See also
+    Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+
+Example
+-------
+
+In the SoC specific dtsi file:
+
+	dra7_iodelay_core: padconf@4844a000 {
+		compatible = "ti,dra7-iodelay";
+		reg = <0x4844a000 0x0d1c>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		#pinctrl-cells = <2>;
+	};
+
+In board-specific file:
+
+&dra7_iodelay_core {
+	mmc2_iodelay_3v3_conf: mmc2_iodelay_3v3_conf {
+		pinctrl-pin-array = <
+		0x18c A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A19_IN */
+		0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)	/* CFG_GPMC_A20_IN */
+		0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A21_IN */
+		0x1bc A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A22_IN */
+		0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)	/* CFG_GPMC_A23_IN */
+		0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)	/* CFG_GPMC_A24_IN */
+		0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_IN */
+		0x1ec A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A26_IN */
+		0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)	/* CFG_GPMC_A27_IN */
+		0x360 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_IN */
+		>;
+	};
+};
drivers/pinctrl/Kconfig +1 -0
@@ -300,6 +300,7 @@ source "drivers/pinctrl/spear/Kconfig"
 source "drivers/pinctrl/stm32/Kconfig"
 source "drivers/pinctrl/sunxi/Kconfig"
 source "drivers/pinctrl/tegra/Kconfig"
+source "drivers/pinctrl/ti/Kconfig"
 source "drivers/pinctrl/uniphier/Kconfig"
 source "drivers/pinctrl/vt8500/Kconfig"
 source "drivers/pinctrl/mediatek/Kconfig"
drivers/pinctrl/Makefile +1 -0
@@ -53,6 +53,7 @@ obj-$(CONFIG_PINCTRL_SH_PFC)	+= sh-pfc/
 obj-$(CONFIG_PINCTRL_SPEAR)	+= spear/
 obj-$(CONFIG_PINCTRL_STM32)	+= stm32/
 obj-$(CONFIG_PINCTRL_SUNXI)	+= sunxi/
+obj-y				+= ti/
 obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
 obj-$(CONFIG_ARCH_VT8500)	+= vt8500/
 obj-$(CONFIG_PINCTRL_MTK)	+= mediatek/
drivers/pinctrl/ti/Kconfig new file +10 -0
new file mode 100644
@@ -0,0 +1,10 @@
+config PINCTRL_TI_IODELAY
+	tristate "TI IODelay Module pinconf driver"
+	depends on OF
+	select GENERIC_PINCTRL_GROUPS
+	select GENERIC_PINMUX_FUNCTIONS
+	select GENERIC_PINCONF
+	select REGMAP_MMIO
+	help
+	  Say Y here to support Texas Instruments' IO delay pinconf driver.
+	  IO delay module is used for the DRA7 SoC family.
drivers/pinctrl/ti/Makefile new file +1 -0
new file mode 100644
@@ -0,0 +1 @@
+obj-$(CONFIG_PINCTRL_TI_IODELAY)	+= pinctrl-ti-iodelay.o
drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +945 -0

945 lines not on this page · raw message

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#6 lore raw

PATCH 1/1 ARM: dts: Add dra7 iodelay configuration and use it for MMC

Add dra7 iodelay configuration and use it for MMC.

---
 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 21 ++++++++++++++++++++-
 arch/arm/boot/dts/dra7.dtsi                     |  8 ++++++++
 include/dt-bindings/pinctrl/dra.h               |  4 ++++
 3 files changed, 32 insertions(+), 1 deletion(-)

---

And ere are the related dts changes.

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +20 -1
@@ -190,6 +190,25 @@
 		>;
 	};
 };
+
+&dra7_iodelay_core
+{
+	mmc2_iodelay_3v3_conf: mmc2_iodelay_3v3_conf {
+		pinctrl-pin-array = <
+			0x18c A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A19_IN */
+			0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)	/* CFG_GPMC_A20_IN */
+			0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A21_IN */
+			0x1bc A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A22_IN */
+			0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)	/* CFG_GPMC_A23_IN */
+			0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)	/* CFG_GPMC_A24_IN */
+			0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_IN */
+			0x1ec A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A26_IN */
+			0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)	/* CFG_GPMC_A27_IN */
+			0x360 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_IN */
+		>;
+	};
+};
+
 &i2c1 {
 	status = "okay";
 	clock-frequency = <400000>;
@@ -452,7 +471,7 @@
 	status = "okay";
 
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc2_pins_default>;
+	pinctrl-0 = <&mmc2_pins_default &mmc2_iodelay_3v3_conf>;
 
 	vmmc-supply = <&vdd_3v3>;
 	bus-width = <8>;
arch/arm/boot/dts/dra7.dtsi +8 -0
@@ -401,6 +401,14 @@
 			reg = <0x40d00000 0x100>;
 		};
 
+		dra7_iodelay_core: padconf@4844a000 {
+			compatible = "ti,dra7-iodelay";
+			reg = <0x4844a000 0x0d1c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#pinctrl-cells = <2>;
+		};
+
 		sdma: dma-controller@4a056000 {
 			compatible = "ti,omap4430-sdma";
 			reg = <0x4a056000 0x1000>;
include/dt-bindings/pinctrl/dra.h +4 -0
@@ -73,5 +73,9 @@
  */
 #define DRA7XX_CORE_IOPAD(pa, val)	(((pa) & 0xffff) - 0x3400) (val)
 
+/* DRA7 IODELAY configuration parameters */
+#define A_DELAY_PS(val)		((val) & 0xffff)
+#define G_DELAY_PS(val)		((val) & 0xffff)
+
 #endif
 
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#8 lore raw

Re: [PATCH] ARM: dts: Add dra7 iodelay configuration and use it for MMC

Quoted 3 lines · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

Pls take this through the OMAP tree to ARM SoC.

Yours,
Linus Walleij
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#9 lore raw

Re: [PATCH] ARM: dts: Add dra7 iodelay configuration and use it for MMC

In reply to Tony Lindgren

Nishanth,

Quoted 1 line · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

I just noticed that this patch should probably be:

From: Nishanth Menon <[email protected]>

I think I just added the description to the patch.

Can you please confirm and reply with your Signed-off-by if that's the case?

Regards,

Tony

Quoted 85 lines
---
 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 21 ++++++++++++++++++++-
 arch/arm/boot/dts/dra7.dtsi                     |  8 ++++++++
 include/dt-bindings/pinctrl/dra.h               |  4 ++++
 3 files changed, 32 insertions(+), 1 deletion(-)

---

And ere are the related dts changes.

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +20 -1
@@ -190,6 +190,25 @@
 		>;
 	};
 };
+
+&dra7_iodelay_core
+{
+	mmc2_iodelay_3v3_conf: mmc2_iodelay_3v3_conf {
+		pinctrl-pin-array = <
+			0x18c A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A19_IN */
+			0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)	/* CFG_GPMC_A20_IN */
+			0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A21_IN */
+			0x1bc A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A22_IN */
+			0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)	/* CFG_GPMC_A23_IN */
+			0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)	/* CFG_GPMC_A24_IN */
+			0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_IN */
+			0x1ec A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A26_IN */
+			0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)	/* CFG_GPMC_A27_IN */
+			0x360 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_IN */
+		>;
+	};
+};
+
 &i2c1 {
 	status = "okay";
 	clock-frequency = <400000>;
@@ -452,7 +471,7 @@
 	status = "okay";
 
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc2_pins_default>;
+	pinctrl-0 = <&mmc2_pins_default &mmc2_iodelay_3v3_conf>;
 
 	vmmc-supply = <&vdd_3v3>;
 	bus-width = <8>;
arch/arm/boot/dts/dra7.dtsi +8 -0
@@ -401,6 +401,14 @@
 			reg = <0x40d00000 0x100>;
 		};
 
+		dra7_iodelay_core: padconf@4844a000 {
+			compatible = "ti,dra7-iodelay";
+			reg = <0x4844a000 0x0d1c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#pinctrl-cells = <2>;
+		};
+
 		sdma: dma-controller@4a056000 {
 			compatible = "ti,omap4430-sdma";
 			reg = <0x4a056000 0x1000>;
include/dt-bindings/pinctrl/dra.h +4 -0
@@ -73,5 +73,9 @@
  */
 #define DRA7XX_CORE_IOPAD(pa, val)	(((pa) & 0xffff) - 0x3400) (val)
 
+/* DRA7 IODELAY configuration parameters */
+#define A_DELAY_PS(val)		((val) & 0xffff)
+#define G_DELAY_PS(val)		((val) & 0xffff)
+
 #endif
 
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#11 lore raw

Re: [PATCH] ARM: dts: Add dra7 iodelay configuration and use it for MMC

Quoted 5 lines · Tony Lindgren

Nishanth,

Quoted 1 line · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

Quoted 9 lines

I just noticed that this patch should probably be:

From: Nishanth Menon <[email protected]>

I think I just added the description to the patch.

Can you please confirm and reply with your Signed-off-by if that's the case?

Though I had introduced the node [ http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/34661cbccc679bb8d91768bc78495e94e6d40f1f ], the x15 values were first introduced by Kishon.

http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/1463b1e8facb7180f5679b373411b3fbeb1608fd

personally, From or not really does'nt matter as long as we can get the solution in.

So, as long as it helps..

Quoted 87 lines
Quoted 87 lines
---
 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 21 ++++++++++++++++++++-
 arch/arm/boot/dts/dra7.dtsi                     |  8 ++++++++
 include/dt-bindings/pinctrl/dra.h               |  4 ++++
 3 files changed, 32 insertions(+), 1 deletion(-)

---

And ere are the related dts changes.

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +20 -1
@@ -190,6 +190,25 @@
 		>;
 	};
 };
+
+&dra7_iodelay_core
+{
+	mmc2_iodelay_3v3_conf: mmc2_iodelay_3v3_conf {
+		pinctrl-pin-array = <
+			0x18c A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A19_IN */
+			0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)	/* CFG_GPMC_A20_IN */
+			0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A21_IN */
+			0x1bc A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A22_IN */
+			0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)	/* CFG_GPMC_A23_IN */
+			0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)	/* CFG_GPMC_A24_IN */
+			0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_IN */
+			0x1ec A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A26_IN */
+			0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)	/* CFG_GPMC_A27_IN */
+			0x360 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_IN */
+		>;
+	};
+};
+
 &i2c1 {
 	status = "okay";
 	clock-frequency = <400000>;
@@ -452,7 +471,7 @@
 	status = "okay";
 
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc2_pins_default>;
+	pinctrl-0 = <&mmc2_pins_default &mmc2_iodelay_3v3_conf>;
 
 	vmmc-supply = <&vdd_3v3>;
 	bus-width = <8>;
arch/arm/boot/dts/dra7.dtsi +8 -0
@@ -401,6 +401,14 @@
 			reg = <0x40d00000 0x100>;
 		};
 
+		dra7_iodelay_core: padconf@4844a000 {
+			compatible = "ti,dra7-iodelay";
+			reg = <0x4844a000 0x0d1c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#pinctrl-cells = <2>;
+		};
+
 		sdma: dma-controller@4a056000 {
 			compatible = "ti,omap4430-sdma";
 			reg = <0x4a056000 0x1000>;
include/dt-bindings/pinctrl/dra.h +4 -1
@@ -73,5 +73,9 @@
  */
 #define DRA7XX_CORE_IOPAD(pa, val)	(((pa) & 0xffff) - 0x3400) (val)
 
+/* DRA7 IODELAY configuration parameters */
+#define A_DELAY_PS(val)		((val) & 0xffff)
+#define G_DELAY_PS(val)		((val) & 0xffff)
+
 #endif
 
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Signature · 6 lines
Regards,
Nishanth Menon
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#13 lore raw

Re: [PATCH] ARM: dts: Add dra7 iodelay configuration and use it for MMC

Hi,

Quoted 74 lines · Nishanth Menon
Quoted 5 lines · Tony Lindgren

Nishanth,

Quoted 1 line · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

Quoted 9 lines

I just noticed that this patch should probably be:

From: Nishanth Menon <[email protected]>

I think I just added the description to the patch.

Can you please confirm and reply with your Signed-off-by if that's the case?

Though I had introduced the node [
http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/34661cbccc679bb8d91768bc78495e94e6d40f1f
], the x15 values were first introduced by Kishon.

http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/1463b1e8facb7180f5679b373411b3fbeb1608fd

personally, From or not really does'nt matter as long as we can get the solution in.

So, as long as it helps..

Quoted 45 lines
Quoted 45 lines
---
 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 21 ++++++++++++++++++++-
 arch/arm/boot/dts/dra7.dtsi                     |  8 ++++++++
 include/dt-bindings/pinctrl/dra.h               |  4 ++++
 3 files changed, 32 insertions(+), 1 deletion(-)

---

And ere are the related dts changes.

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +19 -0
@@ -190,6 +190,25 @@
         >;
     };
 };
+
+&dra7_iodelay_core
+{
+    mmc2_iodelay_3v3_conf: mmc2_iodelay_3v3_conf {
+        pinctrl-pin-array = <
+            0x18c A_DELAY_PS(0) G_DELAY_PS(120)    /* CFG_GPMC_A19_IN */
+            0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)    /* CFG_GPMC_A20_IN */
+            0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)    /* CFG_GPMC_A21_IN */
+            0x1bc A_DELAY_PS(0) G_DELAY_PS(120)    /* CFG_GPMC_A22_IN */
+            0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)    /* CFG_GPMC_A23_IN */
+            0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)    /* CFG_GPMC_A24_IN */
+            0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)    /* CFG_GPMC_A25_IN */
+            0x1ec A_DELAY_PS(120) G_DELAY_PS(0)    /* CFG_GPMC_A26_IN */
+            0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)    /* CFG_GPMC_A27_IN */
+            0x360 A_DELAY_PS(0) G_DELAY_PS(0)    /* CFG_GPMC_CS1_IN */
+        >;
+    };
+};
+
 &i2c1 {
     status = "okay";
     clock-frequency = <400000>;
@@ -452,7 +471,7 @@
     status = "okay";
 
Quoted 3 lines
Quoted 3 lines

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi line 474

Quoted 3 lines
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +1 -1
     pinctrl-names = "default";
-    pinctrl-0 = <&mmc2_pins_default>;
+    pinctrl-0 = <&mmc2_pins_default &mmc2_iodelay_3v3_conf>;

I had to remove the iodelay added here based on datasheet (patch [1]).

I also wanted to confirm if "MODE_SELECT" should be added in pinctrl values like [2] for adding manual mode iodelay because that seems to be missing in this patch.

Thanks
Kishon

[1] ->
http://git.ti.com/cgit/cgit.cgi/ti-linux-kernel/ti-linux-kernel.git/commit/?h=ti-linux-4.9.y&id=441f799d2d15a1ed2f0a89024bf3f2fd82816dbd

[2] ->
http://git.ti.com/cgit/cgit.cgi/ti-linux-kernel/ti-linux-kernel.git/commit/?h=ti-linux-4.9.y&id=decd3b433d6485d9176ce069bd66b109fb82fe07

Quoted 35 lines
Quoted 35 lines
Quoted 35 lines
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +0 -0
     vmmc-supply = <&vdd_3v3>;
     bus-width = <8>;
arch/arm/boot/dts/dra7.dtsi +8 -0
@@ -401,6 +401,14 @@
             reg = <0x40d00000 0x100>;
         };
 
+        dra7_iodelay_core: padconf@4844a000 {
+            compatible = "ti,dra7-iodelay";
+            reg = <0x4844a000 0x0d1c>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+            #pinctrl-cells = <2>;
+        };
+
         sdma: dma-controller@4a056000 {
             compatible = "ti,omap4430-sdma";
             reg = <0x4a056000 0x1000>;
include/dt-bindings/pinctrl/dra.h +4 -0
@@ -73,5 +73,9 @@
  */
 #define DRA7XX_CORE_IOPAD(pa, val)    (((pa) & 0xffff) - 0x3400) (val)
 
+/* DRA7 IODELAY configuration parameters */
+#define A_DELAY_PS(val)        ((val) & 0xffff)
+#define G_DELAY_PS(val)        ((val) & 0xffff)
+
 #endif
 
Quoted 8 lines
Quoted 6 lines
Quoted 6 lines
Signature · 5 lines
2.11.0
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#15 lore raw

Re: [PATCH] ARM: dts: Add dra7 iodelay configuration and use it for MMC

Quoted 29 lines · Kishon Vijay Abraham I
Quoted 28 lines · Nishanth Menon
Quoted 5 lines · Tony Lindgren

Nishanth,

Quoted 1 line · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

Quoted 9 lines

I just noticed that this patch should probably be:

From: Nishanth Menon <[email protected]>

I think I just added the description to the patch.

Can you please confirm and reply with your Signed-off-by if that's the case?

Though I had introduced the node [
http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/34661cbccc679bb8d91768bc78495e94e6d40f1f
], the x15 values were first introduced by Kishon.

http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/1463b1e8facb7180f5679b373411b3fbeb1608fd

personally, From or not really does'nt matter as long as we can get the solution in.

So, as long as it helps..

...

Quoted 1 line

I had to remove the iodelay added here based on datasheet (patch [1]).

OK thanks for the info. So we have multiple authors and as Kishon added the working values I suggest we credit the patch for Kishon.

Quoted 3 lines

I also wanted to confirm if "MODE_SELECT" should be added in pinctrl values like [2] for adding manual mode iodelay because that seems to be missing in this patch.

Oh OK. If it's needed then yeah let's update it for that too. Can you please check it? And then send an updated version of this patch with "From" credited to you? Just update the description to say "Based on earlier patches in TI Linux kernel tree done by Nishanth Menon and Kishon Vijay Abraham I".

Regards,

Tony

Quoted 5 lines

[1] ->
http://git.ti.com/cgit/cgit.cgi/ti-linux-kernel/ti-linux-kernel.git/commit/?h=ti-linux-4.9.y&id=441f799d2d15a1ed2f0a89024bf3f2fd82816dbd

[2] ->
http://git.ti.com/cgit/cgit.cgi/ti-linux-kernel/ti-linux-kernel.git/commit/?h=ti-linux-4.9.y&id=decd3b433d6485d9176ce069bd66b109fb82fe07

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#16 lore raw

Re: [PATCH] ARM: dts: Add dra7 iodelay configuration and use it for MMC

Hi,

Quoted 40 lines · Tony Lindgren
Quoted 29 lines · Kishon Vijay Abraham I
Quoted 28 lines · Nishanth Menon
Quoted 5 lines · Tony Lindgren

Nishanth,

Quoted 1 line · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

Quoted 9 lines

I just noticed that this patch should probably be:

From: Nishanth Menon <[email protected]>

I think I just added the description to the patch.

Can you please confirm and reply with your Signed-off-by if that's the case?

Though I had introduced the node [
http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/34661cbccc679bb8d91768bc78495e94e6d40f1f
], the x15 values were first introduced by Kishon.

http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/1463b1e8facb7180f5679b373411b3fbeb1608fd

personally, From or not really does'nt matter as long as we can get the solution in.

So, as long as it helps..

...

Quoted 1 line

I had to remove the iodelay added here based on datasheet (patch [1]).

OK thanks for the info. So we have multiple authors and as Kishon added the working values I suggest we credit the patch for Kishon.

Quoted 3 lines

I also wanted to confirm if "MODE_SELECT" should be added in pinctrl values like [2] for adding manual mode iodelay because that seems to be missing in this patch.

Quoted 5 lines

Oh OK. If it's needed then yeah let's update it for that too. Can you please check it? And then send an updated version of this patch with "From" credited to you? Just update the description to say "Based on earlier patches in TI Linux kernel tree done by Nishanth Menon and Kishon Vijay Abraham I".

Sure, I'll send it along with adding UHS mode support patches.

Thanks
Kishon

A message that is not in the archive (sent off-list or not yet received): 20161230183732.5595-3-tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org

#18 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree…

Hi Nishanth,

[auto build test ERROR on pinctrl/for-next]
[also build test ERROR on v4.10-rc1 next-20161224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Tony-Lindgren/Add-TI-iodelay-driver-using-pinctrl-cells/20161231-024542
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git for-next
config: arm64-allmodconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705

reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm64

All errors (new ones prefixed by >>):

drivers/pinctrl/ti/pinctrl-ti-iodelay.c: In function 'ti_iodelay_get_pingroup':

>> drivers/pinctrl/ti/pinctrl-ti-iodelay.c:383:6: error: implicit declaration of function 'pinctrl_generic_get_group' [-Werror=implicit-function-declaration]
     g = pinctrl_generic_get_group(iod->pctl, selector);
         ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c:383:4: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
     g = pinctrl_generic_get_group(iod->pctl, selector);
       ^
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c:391:10: error: dereferencing pointer to incomplete type 'struct group_desc'
     return g->data;
             ^~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c: In function 'ti_iodelay_dt_node_to_map':
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c:562:10: error: implicit declaration of function 'pinctrl_generic_add_group' [-Werror=implicit-function-declaration]
     error = pinctrl_generic_add_group(iod->pctl, np->name, pins, i, g);
             ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c: At top level:
>> drivers/pinctrl/ti/pinctrl-ti-iodelay.c:729:22: error: 'pinctrl_generic_get_group_count' undeclared here (not in a function)
     .get_groups_count = pinctrl_generic_get_group_count,
                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c:730:20: error: 'pinctrl_generic_get_group_name' undeclared here (not in a function)
     .get_group_name = pinctrl_generic_get_group_name,
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c:731:20: error: 'pinctrl_generic_get_group_pins' undeclared here (not in a function)
     .get_group_pins = pinctrl_generic_get_group_pins,
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c: In function 'ti_iodelay_get_pingroup':
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c:392:1: warning: control reaches end of non-void function [-Wreturn-type]
    }
    ^

cc1: some warnings being treated as errors

vim +/pinctrl_generic_get_group +383 drivers/pinctrl/ti/pinctrl-ti-iodelay.c

377 */
378 static struct ti_iodelay_pingroup *
379 ti_iodelay_get_pingroup(struct ti_iodelay_device *iod, unsigned int selector)
380 {
381 struct group_desc *g;
382

 > 383		g = pinctrl_generic_get_group(iod->pctl, selector);
   384		if (!g) {
   385			dev_err(iod->dev, "%s could not find pingroup %i\n", __func__,
   386				selector);
   387	
   388			return NULL;
   389		}
   390	
 > 391		return g->data;

392 }
393
394 /**

---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation

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#20 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

Hi,

Quoted 5 lines · kbuild test robot

Hi Nishanth,

[auto build test ERROR on pinctrl/for-next]
[also build test ERROR on v4.10-rc1 next-20161224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

This patch is against pinctrl/devel as noted in the cover letter. Next does not yet have the dependencies.

I did note another build error with COMPILE_TEST though if DEBUG_FS is not selected, will send a fix for that.

Regards,

Tony
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#21 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

In reply to a message not in the archive
reproduce:

Hi Nishanth,

[auto build test ERROR on pinctrl/for-next]
[also build test ERROR on v4.10-rc1 next-20161224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Tony-Lindgren/Add-TI-iodelay-driver-using-pinctrl-cells/20161231-024542
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git for-next
config: i386-allyesconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All errors (new ones prefixed by >>):

drivers/pinctrl/ti/pinctrl-ti-iodelay.c: In function 'ti_iodelay_get_pingroup':
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:383:6: error: implicit declaration of function 'pinctrl_generic_get_group' [-Werror=implicit-function-declaration]

     g = pinctrl_generic_get_group(iod->pctl, selector);
         ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c:383:4: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
     g = pinctrl_generic_get_group(iod->pctl, selector);
       ^
>> drivers/pinctrl/ti/pinctrl-ti-iodelay.c:391:10: error: dereferencing pointer to incomplete type 'struct group_desc'
     return g->data;
             ^~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c: In function 'ti_iodelay_dt_node_to_map':
>> drivers/pinctrl/ti/pinctrl-ti-iodelay.c:562:10: error: implicit declaration of function 'pinctrl_generic_add_group' [-Werror=implicit-function-declaration]
     error = pinctrl_generic_add_group(iod->pctl, np->name, pins, i, g);
             ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c: At top level:
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c:729:22: error: 'pinctrl_generic_get_group_count' undeclared here (not in a function)
     .get_groups_count = pinctrl_generic_get_group_count,
                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/ti/pinctrl-ti-iodelay.c:730:20: error: 'pinctrl_generic_get_group_name' undeclared here (not in a function)
     .get_group_name = pinctrl_generic_get_group_name,
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/pinctrl/ti/pinctrl-ti-iodelay.c:731:20: error: 'pinctrl_generic_get_group_pins' undeclared here (not in a function)
     .get_group_pins = pinctrl_generic_get_group_pins,
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c: In function 'ti_iodelay_get_pingroup':
   drivers/pinctrl/ti/pinctrl-ti-iodelay.c:392:1: warning: control reaches end of non-void function [-Wreturn-type]
    }
    ^

cc1: some warnings being treated as errors

vim +391 drivers/pinctrl/ti/pinctrl-ti-iodelay.c

377 */
378 static struct ti_iodelay_pingroup *
379 ti_iodelay_get_pingroup(struct ti_iodelay_device *iod, unsigned int selector)
380 {
381 struct group_desc *g;
382

 > 383		g = pinctrl_generic_get_group(iod->pctl, selector);
   384		if (!g) {
   385			dev_err(iod->dev, "%s could not find pingroup %i\n", __func__,
   386				selector);
   387	
   388			return NULL;
   389		}
   390	
 > 391		return g->data;
   392	}
   393	
   394	/**
   395	 * ti_iodelay_pin_to_offset() - get pin register offset based on the pin index
   396	 * @iod: iodelay driver instance
   397	 * @selector: Pin index
   398	 */
   399	static unsigned int ti_iodelay_pin_to_offset(struct ti_iodelay_device *iod,
   400						     unsigned int selector)
   401	{
   402		const struct ti_iodelay_reg_data *r = iod->reg_data;
   403		unsigned int offset;
   404	
   405		offset = selector * r->regmap_config->reg_stride;
   406		offset *= r->reg_nr_per_pin;
   407		offset += r->reg_start_offset;
   408	
   409		return offset;
   410	}
   411	
   412	/**
   413	 * ti_iodelay_offset_to_pin() - get a pin index based on the register offset
   414	 * @iod: iodelay driver instance
   415	 * @offset: register offset from the base
   416	 */
   417	static int ti_iodelay_offset_to_pin(struct ti_iodelay_device *iod,
   418					    unsigned int offset)
   419	{
   420		const struct ti_iodelay_reg_data *r = iod->reg_data;
   421		unsigned int index;
   422	
   423		if (offset > r->regmap_config->max_register) {
   424			dev_err(iod->dev, "mux offset out of range: 0x%x (0x%x)\n",
   425				offset, r->regmap_config->max_register);
   426			return -EINVAL;
   427		}
   428	
   429		index = (offset - r->reg_start_offset) / r->regmap_config->reg_stride;
   430		index /= r->reg_nr_per_pin;
   431	
   432		return index;
   433	}
   434	
   435	/**
   436	 *
   437	 * @pctldev: Pin controller driver
   438	 * @np: Device node
   439	 * @pinctrl_spec: Parsed arguments from device tree
   440	 * @pins: Array of pins in the pin group
   441	 * @pin_index: Pin index in the pin array
   442	 * @data: Pin controller driver specific data
   443	 *
   444	 */
   445	static int ti_iodelay_node_iterator(struct pinctrl_dev *pctldev,
   446					    struct device_node *np,
   447					    const struct of_phandle_args *pinctrl_spec,
   448					    int *pins, int pin_index, void *data)
   449	{
   450		struct ti_iodelay_device *iod;
   451		struct ti_iodelay_cfg *cfg = data;
   452		const struct ti_iodelay_reg_data *r;
   453		struct pinctrl_pin_desc *pd;
   454		int pin;
   455	
   456		iod = pinctrl_dev_get_drvdata(pctldev);
   457		if (!iod)
   458			return -EINVAL;
   459	
   460		r = iod->reg_data;
   461	
   462		if (pinctrl_spec->args_count < r->reg_nr_per_pin) {
   463			dev_err(iod->dev, "invalid args_count for spec: %i\n",
   464				pinctrl_spec->args_count);
   465	
   466			return -EINVAL;
   467		}
   468	
   469		/* Index plus two value cells */
   470		cfg[pin_index].offset = pinctrl_spec->args[0];
   471		cfg[pin_index].a_delay = pinctrl_spec->args[1] & 0xffff;
   472		cfg[pin_index].g_delay = pinctrl_spec->args[2] & 0xffff;
   473	
   474		pin = ti_iodelay_offset_to_pin(iod, cfg[pin_index].offset);
   475		if (pin < 0) {
   476			dev_err(iod->dev, "could not add functions for %s %ux\n",
   477				np->name, cfg[pin_index].offset);
   478			return -ENODEV;
   479		}
   480		pins[pin_index] = pin;
   481	
   482		pd = &iod->pa[pin];
   483		pd->drv_data = &cfg[pin_index];
   484	
   485		dev_dbg(iod->dev, "%s offset=%x a_delay = %d g_delay = %d\n",
   486			np->name, cfg[pin_index].offset, cfg[pin_index].a_delay,
   487			cfg[pin_index].g_delay);
   488	
   489		return 0;
   490	}
   491	
   492	/**
   493	 * ti_iodelay_dt_node_to_map() - Map a device tree node to appropriate group
   494	 * @pctldev: pinctrl device representing IODelay device
   495	 * @np: Node Pointer (device tree)
   496	 * @map: Pinctrl Map returned back to pinctrl framework
   497	 * @num_maps: Number of maps (1)
   498	 *
   499	 * Maps the device tree description into a group of configuration parameters
   500	 * for iodelay block entry.
   501	 *
   502	 * Return: 0 in case of success, else appropriate error value
   503	 */
   504	static int ti_iodelay_dt_node_to_map(struct pinctrl_dev *pctldev,
   505					     struct device_node *np,
   506					     struct pinctrl_map **map,
   507					     unsigned int *num_maps)
   508	{
   509		struct ti_iodelay_device *iod;
   510		struct ti_iodelay_cfg *cfg;
   511		struct ti_iodelay_pingroup *g;
   512		const char *name = "pinctrl-pin-array";
   513		int rows, *pins, error = -EINVAL, i;
   514	
   515		iod = pinctrl_dev_get_drvdata(pctldev);
   516		if (!iod)
   517			return -EINVAL;
   518	
   519		rows = pinctrl_count_index_with_args(np, name);
   520		if (rows == -EINVAL)
   521			return rows;
   522	
   523		*map = devm_kzalloc(iod->dev, sizeof(**map), GFP_KERNEL);
   524		if (!*map)
   525			return -ENOMEM;
   526		*num_maps = 0;
   527	
   528		g = devm_kzalloc(iod->dev, sizeof(*g), GFP_KERNEL);
   529		if (!g) {
   530			error = -ENOMEM;
   531			goto free_map;
   532		}
   533	
   534		pins = devm_kzalloc(iod->dev, sizeof(*pins) * rows, GFP_KERNEL);
   535		if (!pins)
   536			goto free_group;
   537	
   538		cfg = devm_kzalloc(iod->dev, sizeof(*cfg) * rows, GFP_KERNEL);
   539		if (!cfg) {
   540			error = -ENOMEM;
   541			goto free_pins;
   542		}
   543	
   544		for (i = 0; i < rows; i++) {
   545			struct of_phandle_args pinctrl_spec;
   546	
   547			error = pinctrl_parse_index_with_args(np, name, i,
   548							      &pinctrl_spec);
   549			if (error)
   550				goto free_data;
   551	
   552			error = ti_iodelay_node_iterator(pctldev, np, &pinctrl_spec,
   553							 pins, i, cfg);
   554			if (error)
   555				goto free_data;
   556		}
   557	
   558		g->cfg = cfg;
   559		g->ncfg = i;
   560		g->config = PIN_CONFIG_END;
   561	
 > 562		error = pinctrl_generic_add_group(iod->pctl, np->name, pins, i, g);

563 if (error < 0)
564 goto free_data;
565

---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation

#22 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

In reply to a message not in the archive
Quoted 4 lines · Tony Lindgren
(quoted diff) +4 -0
+static struct pinctrl_ops ti_iodelay_pinctrl_ops = {
+	.get_groups_count = pinctrl_generic_get_group_count,
+	.get_group_name = pinctrl_generic_get_group_name,
+	.get_group_pins = pinctrl_generic_get_group_pins,

Review

Quoted 10 lines
(quoted diff) +10 -0
+	.pin_dbg_show = ti_iodelay_pin_dbg_show,
+	.dt_node_to_map = ti_iodelay_dt_node_to_map,
+};
+
+static struct pinconf_ops ti_iodelay_pinctrl_pinconf_ops = {
+	.pin_config_group_get = ti_iodelay_pinconf_group_get,
+	.pin_config_group_set = ti_iodelay_pinconf_group_set,
+#ifdef CONFIG_DEBUG_FS
+	.pin_config_group_dbg_show = ti_iodelay_pinconf_group_dbg_show,
+#endif

I noticed that .pin_dbg_show above needs ifdef CONFIG_DEBUGFS. Updated patch below.

Regards,

Tony

8< --------------------

Quoted 1 line

From tony Mon Sep 17 00:00:00 2001

From: Nishanth Menon <[email protected]>
Date: Tue, 27 Dec 2016 08:03:43 -0800
Subject: [PATCH] pinctrl: Introduce TI IOdelay configuration driver

SoC family such as DRA7 family of processors have, in addition to the regular muxing of pins (as done by pinctrl-single), a separate hardware module called IODelay which is also expected to be configured. The "IODelay" module has it's own register space that is independent of the control module and the padconf register area.

With recent changes to the pinctrl framework, we can now support this hardware with a reasonably minimal driver by using #pinctrl-cells, GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS.

It is advocated strongly in TI's official documentation considering the existing design of the DRA7 family of processors during mux or IODelay reconfiguration, there is a potential for a significant glitch which may cause functional impairment to certain hardware. It is hence recommended to do as little of muxing as absolutely necessary without I/O isolation (which can only be done in initial stages of bootloader).

NOTE: with the system wide I/O isolation scheme present in DRA7 SoC family, it is not reasonable to do stop all I/O operations for every such pad configuration scheme. So, we will let it glitch when used in this mode.

Even with the above limitation, certain functionality such as MMC has mandatory need for IODelay reconfiguration requirements, depending on speed of transfer. In these cases, with careful examination of usecase involved, the expected glitch can be controlled such that it does not impact functionality.

In short, IODelay module support as a padconf driver being introduced here is not expected to do SoC wide I/O Isolation and is meant for a limited subset of IODelay configuration requirements that need to be dynamic and whose glitchy behavior will not cause functionality failure for that interface.

IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared to 0x0 at all times, even when configuring Manual IO Timing Modes. This is done by eliminating the LOCK_BIT=1 setting from Step of the Manual IO timing Mode configuration procedure. This option leaves the CFG_* registers unprotected from unintended writes to the CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured.

This approach is taken to allow for a generic driver to exist in kernel world that has to be used carefully in required usecases.

[[email protected]: updated to use generic pinctrl functions, added
binding documentation, updated comments]

---
 .../devicetree/bindings/pinctrl/ti,iodelay.txt     |  47 +
 drivers/pinctrl/Kconfig                            |   1 +
 drivers/pinctrl/Makefile                           |   1 +
 drivers/pinctrl/ti/Kconfig                         |  10 +
 drivers/pinctrl/ti/Makefile                        |   1 +
 drivers/pinctrl/ti/pinctrl-ti-iodelay.c            | 947 +++++++++++++++++++++
 6 files changed, 1007 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/ti,iodelay.txt
 create mode 100644 drivers/pinctrl/ti/Kconfig
 create mode 100644 drivers/pinctrl/ti/Makefile
 create mode 100644 drivers/pinctrl/ti/pinctrl-ti-iodelay.c
Documentation/devicetree/bindings/pinctrl/ti,iodelay.txt new file +47 -0
new file mode 100644
@@ -0,0 +1,47 @@
+* Pin configuration for TI IODELAY controller
+
+TI dra7 based SoCs such as am57xx have a controller for setting the IO delay
+for each pin. For most part the IO delay values are programmed by the bootloader,
+but some pins need to be configured dynamically by the kernel such as the
+MMC pins.
+
+Required Properties:
+
+  - compatible: Must be "ti,dra7-iodelay"
+  - reg: Base address and length of the memory resource used
+  - #address-cells: Number of address cells
+  - #size-cells: Size of cells
+  - #pinctrl-cells: Number of pinctrl cells, must be 2. See also
+    Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+
+Example
+-------
+
+In the SoC specific dtsi file:
+
+	dra7_iodelay_core: padconf@4844a000 {
+		compatible = "ti,dra7-iodelay";
+		reg = <0x4844a000 0x0d1c>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		#pinctrl-cells = <2>;
+	};
+
+In board-specific file:
+
+&dra7_iodelay_core {
+	mmc2_iodelay_3v3_conf: mmc2_iodelay_3v3_conf {
+		pinctrl-pin-array = <
+		0x18c A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A19_IN */
+		0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)	/* CFG_GPMC_A20_IN */
+		0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A21_IN */
+		0x1bc A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A22_IN */
+		0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)	/* CFG_GPMC_A23_IN */
+		0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)	/* CFG_GPMC_A24_IN */
+		0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_IN */
+		0x1ec A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A26_IN */
+		0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)	/* CFG_GPMC_A27_IN */
+		0x360 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_IN */
+		>;
+	};
+};
drivers/pinctrl/Kconfig +1 -0
@@ -300,6 +300,7 @@ source "drivers/pinctrl/spear/Kconfig"
 source "drivers/pinctrl/stm32/Kconfig"
 source "drivers/pinctrl/sunxi/Kconfig"
 source "drivers/pinctrl/tegra/Kconfig"
+source "drivers/pinctrl/ti/Kconfig"
 source "drivers/pinctrl/uniphier/Kconfig"
 source "drivers/pinctrl/vt8500/Kconfig"
 source "drivers/pinctrl/mediatek/Kconfig"
drivers/pinctrl/Makefile +1 -0
@@ -53,6 +53,7 @@ obj-$(CONFIG_PINCTRL_SH_PFC)	+= sh-pfc/
 obj-$(CONFIG_PINCTRL_SPEAR)	+= spear/
 obj-$(CONFIG_PINCTRL_STM32)	+= stm32/
 obj-$(CONFIG_PINCTRL_SUNXI)	+= sunxi/
+obj-y				+= ti/
 obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
 obj-$(CONFIG_ARCH_VT8500)	+= vt8500/
 obj-$(CONFIG_PINCTRL_MTK)	+= mediatek/
drivers/pinctrl/ti/Kconfig new file +10 -0
new file mode 100644
@@ -0,0 +1,10 @@
+config PINCTRL_TI_IODELAY
+	tristate "TI IODelay Module pinconf driver"
+	depends on OF
+	select GENERIC_PINCTRL_GROUPS
+	select GENERIC_PINMUX_FUNCTIONS
+	select GENERIC_PINCONF
+	select REGMAP_MMIO
+	help
+	  Say Y here to support Texas Instruments' IO delay pinconf driver.
+	  IO delay module is used for the DRA7 SoC family.
drivers/pinctrl/ti/Makefile new file +1 -0
new file mode 100644
@@ -0,0 +1 @@
+obj-$(CONFIG_PINCTRL_TI_IODELAY)	+= pinctrl-ti-iodelay.o
drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +947 -0

947 lines not on this page · raw message

Signature · 5 lines
2.11.0
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maintainer Acked-by
#23 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

Quoted 74 lines · Tony Lindgren
Quoted 4 lines · Tony Lindgren
drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +4 -0
+static struct pinctrl_ops ti_iodelay_pinctrl_ops = {
+	.get_groups_count = pinctrl_generic_get_group_count,
+	.get_group_name = pinctrl_generic_get_group_name,
+	.get_group_pins = pinctrl_generic_get_group_pins,

drivers/pinctrl/ti/pinctrl-ti-iodelay.c line 743

Quoted 10 lines
drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +10 -0
+	.pin_dbg_show = ti_iodelay_pin_dbg_show,
+	.dt_node_to_map = ti_iodelay_dt_node_to_map,
+};
+
+static struct pinconf_ops ti_iodelay_pinctrl_pinconf_ops = {
+	.pin_config_group_get = ti_iodelay_pinconf_group_get,
+	.pin_config_group_set = ti_iodelay_pinconf_group_set,
+#ifdef CONFIG_DEBUG_FS
+	.pin_config_group_dbg_show = ti_iodelay_pinconf_group_dbg_show,
+#endif

I noticed that .pin_dbg_show above needs ifdef CONFIG_DEBUGFS. Updated patch below.

Regards,

Tony

8< --------------------
From tony Mon Sep 17 00:00:00 2001
From: Nishanth Menon <[email protected]>
Date: Tue, 27 Dec 2016 08:03:43 -0800
Subject: [PATCH] pinctrl: Introduce TI IOdelay configuration driver

SoC family such as DRA7 family of processors have, in addition to the regular muxing of pins (as done by pinctrl-single), a separate hardware module called IODelay which is also expected to be configured. The "IODelay" module has it's own register space that is independent of the control module and the padconf register area.

With recent changes to the pinctrl framework, we can now support this hardware with a reasonably minimal driver by using #pinctrl-cells, GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS.

It is advocated strongly in TI's official documentation considering the existing design of the DRA7 family of processors during mux or IODelay reconfiguration, there is a potential for a significant glitch which may cause functional impairment to certain hardware. It is hence recommended to do as little of muxing as absolutely necessary without I/O isolation (which can only be done in initial stages of bootloader).

NOTE: with the system wide I/O isolation scheme present in DRA7 SoC family, it is not reasonable to do stop all I/O operations for every such pad configuration scheme. So, we will let it glitch when used in this mode.

Even with the above limitation, certain functionality such as MMC has mandatory need for IODelay reconfiguration requirements, depending on speed of transfer. In these cases, with careful examination of usecase involved, the expected glitch can be controlled such that it does not impact functionality.

In short, IODelay module support as a padconf driver being introduced here is not expected to do SoC wide I/O Isolation and is meant for a limited subset of IODelay configuration requirements that need to be dynamic and whose glitchy behavior will not cause functionality failure for that interface.

IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared to 0x0 at all times, even when configuring Manual IO Timing Modes. This is done by eliminating the LOCK_BIT=1 setting from Step of the Manual IO timing Mode configuration procedure. This option leaves the CFG_* registers unprotected from unintended writes to the CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured.

This approach is taken to allow for a generic driver to exist in kernel world that has to be used carefully in required usecases.

Quoted 7 lines

[[email protected]: updated to use generic pinctrl functions, added
binding documentation, updated comments]

---
 .../devicetree/bindings/pinctrl/ti,iodelay.txt     |  47 +
Quoted 10 lines
 drivers/pinctrl/Kconfig                            |   1 +
 drivers/pinctrl/Makefile                           |   1 +
 drivers/pinctrl/ti/Kconfig                         |  10 +
 drivers/pinctrl/ti/Makefile                        |   1 +
 drivers/pinctrl/ti/pinctrl-ti-iodelay.c            | 947 +++++++++++++++++++++
 6 files changed, 1007 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/ti,iodelay.txt
 create mode 100644 drivers/pinctrl/ti/Kconfig
 create mode 100644 drivers/pinctrl/ti/Makefile
 create mode 100644 drivers/pinctrl/ti/pinctrl-ti-iodelay.c
#24 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

In reply to Tony Lindgren

On 01/02/2017 04:12 PM, Tony Lindgren wrote:
[...]
Minor one:

Quoted 1 line

+ * Copyright (C) 2015 Texas Instruments, Inc.

Could you make this:
Copyright (C) 2015-2017 Texas Instruments Incorporated -
http://www.ti.com/

Signature · 2 lines
Regards,
Nishanth Menon

A message that is not in the archive (sent off-list or not yet received): 63a8a1ec-343a-8c96-a0d2-21d81f7ad10e-l0cyMroinI0@public.gmane.org

#26 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

Quoted 6 lines · Nishanth Menon

On 01/02/2017 04:12 PM, Tony Lindgren wrote:
[...]
Minor one:

Quoted 1 line

+ * Copyright (C) 2015 Texas Instruments, Inc.

Could you make this:
Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/

Sure, it's your patch :) Will repost.

Regards,

Tony
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A message that is not in the archive (sent off-list or not yet received): [email protected]

#28 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

Quoted 9 lines · Tony Lindgren
Quoted 6 lines · Nishanth Menon

On 01/02/2017 04:12 PM, Tony Lindgren wrote:
[...]
Minor one:

Quoted 1 line

+ * Copyright (C) 2015 Texas Instruments, Inc.

Could you make this:
Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/

Sure, it's your patch :) Will repost.

Thanks.

I just finished testing it as well and well it still does the job it used to do. thanks for taking this forward.

I did get a few kernel-doc warnings, which i need to look closer at. will comment back today if I see something of use for us to fix up.

Signature · 6 lines
Regards,
Nishanth Menon
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#30 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

On 01/02/2017 04:12 PM, Tony Lindgren wrote:
[...]

I got the following warnings with kernel-doc:

Quoted 8 lines
$ ./scripts/kernel-doc drivers/pinctrl/ti/pinctrl-ti-iodelay.c>/dev/null
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:132: warning: Excess struct/union/enum/typedef member 'name' description in 'ti_iodelay_pingroup'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:132: warning: Excess struct/union/enum/typedef member 'map' description in 'ti_iodelay_pingroup'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:159: warning: Excess struct/union/enum/typedef member 'names' description in 'ti_iodelay_device'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:211: warning: No description found for parameter 'cfg'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:211: warning: Excess function parameter 'val' description in 'ti_iodelay_pinconf_set'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:418: warning: Cannot understand  *
 on line 418 - I thought it was a doc line

Marking them below

Quoted 4 lines
drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +0 -0
new file mode 100644

[...]

Quoted 3 lines

+/**
+ * struct ti_iodelay_pingroup - Structure that describes one group
+ * @name: Name of the group

         ^^--> we should drop this
Quoted 1 line

+ * @map: pinctrl map allocated for the group

         ^^--> we should drop this
Quoted 10 lines

+ * @cfg: configuration array for the pin (from dt)
+ * @ncfg: number of configuration values allocated
+ * @config: pinconf "Config" - currently a dummy value
+ */

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +6 -0
+struct ti_iodelay_pingroup {
+	struct ti_iodelay_cfg *cfg;
+	int ncfg;
+	unsigned long config;
+};
+

drivers/pinctrl/ti/pinctrl-ti-iodelay.c line 143

Quoted 10 lines
drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +10 -0
+/**
+ * struct ti_iodelay_device - Represents information for a iodelay instance
+ * @dev: Device pointer
+ * @phys_base: Physical address base of the iodelay device
+ * @reg_base: Virtual address base of the iodelay device
+ * @regmap: Regmap for this iodelay instance
+ * @pctl: Pinctrl device
+ * @desc: pinctrl descriptor for pctl
+ * @pa: pinctrl pin wise description
+ * @names: names of the pins
         ^^--> we should drop this
Quoted 17 lines

+ * @reg_data: Register definition data for the IODelay instance
+ * @reg_init_conf_values: Initial configuration values.
+ */

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +14 -0
+struct ti_iodelay_device {
+	struct device *dev;
+	unsigned long phys_base;
+	void __iomem *reg_base;
+	struct regmap *regmap;
+
+	struct pinctrl_dev *pctl;
+	struct pinctrl_desc desc;
+	struct pinctrl_pin_desc *pa;
+
+	const struct ti_iodelay_reg_data *reg_data;
+	struct ti_iodelay_reg_values reg_init_conf_values;
+};
+

[...]

Quoted 4 lines

+/**
+ * ti_iodelay_pinconf_set() - Configure the pin configuration
+ * @iod: iodelay device
+ * @val: Configuration value

       ^^ --> should be cfg ?
Quoted 12 lines

+ *
+ * Update the configuration register as per TRM and lockup once done.
+ * *IMPORTANT NOTE* SoC TRM does recommend doing iodelay programmation only
+ * while in Isolation. But, then, isolation also implies that every pin
+ * on the SoC (including DDR) will be isolated out. The only benefit being
+ * a glitchless configuration, However, the intent of this driver is purely
+ * to support a "glitchy" configuration where applicable.
+ *
+ * Return: 0 in case of success, else appropriate error value
+ */

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +2 -0
+static int ti_iodelay_pinconf_set(struct ti_iodelay_device *iod,
+				  struct ti_iodelay_cfg *cfg)

[...]

drivers/pinctrl/ti/pinctrl-ti-iodelay.c line 165

Quoted 3 lines
drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +3 -0
+
+/**
+ *

Could you make this:
* ti_iodelay_node_iterator() - Iterate iodelay node

drivers/pinctrl/ti/pinctrl-ti-iodelay.c line 430

Quoted 12 lines

+ * @pctldev: Pin controller driver
+ * @np: Device node
+ * @pinctrl_spec: Parsed arguments from device tree
+ * @pins: Array of pins in the pin group
+ * @pin_index: Pin index in the pin array
+ * @data: Pin controller driver specific data
+ *
+ */

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +4 -0
+static int ti_iodelay_node_iterator(struct pinctrl_dev *pctldev,
+				    struct device_node *np,
+				    const struct of_phandle_args *pinctrl_spec,
+				    int *pins, int pin_index, void *data)

[...]

Otherwise, the patch looks fine. Thanks for doing this.

Signature · 6 lines
Regards,
Nishanth Menon
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#31 lore raw

Re: [PATCH 2/2] pinctrl: Introduce TI IOdelay configuration driver

Quoted 13 lines · Nishanth Menon

On 01/02/2017 04:12 PM, Tony Lindgren wrote:
[...]

I got the following warnings with kernel-doc:

Quoted 8 lines
$ ./scripts/kernel-doc drivers/pinctrl/ti/pinctrl-ti-iodelay.c>/dev/null
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:132: warning: Excess struct/union/enum/typedef member 'name' description in 'ti_iodelay_pingroup'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:132: warning: Excess struct/union/enum/typedef member 'map' description in 'ti_iodelay_pingroup'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:159: warning: Excess struct/union/enum/typedef member 'names' description in 'ti_iodelay_device'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:211: warning: No description found for parameter 'cfg'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:211: warning: Excess function parameter 'val' description in 'ti_iodelay_pinconf_set'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:418: warning: Cannot understand  *
 on line 418 - I thought it was a doc line
Quoted 1 line

Marking them below

OK thanks will repost v3 shortly.

Regards,

Tony