Add TI iodelay driver using #pinctrl-cells

If the pin controller driver is using devm_kzalloc, there may not be anything to do for dt_free_map. Let's make it optional to avoid unncessary boilerplate code.

Signed-off-by Tony Lindgren <[email protected]>

Add dra7 iodelay configuration and use it for MMC.

Signed-off-by Tony Lindgren <[email protected]>

Add dra7 iodelay configuration and use it for MMC.

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 21 ++++++++++++++++++++-
 arch/arm/boot/dts/dra7.dtsi                     |  8 ++++++++
 include/dt-bindings/pinctrl/dra.h               |  4 ++++
 3 files changed, 32 insertions(+), 1 deletion(-)

---

And ere are the related dts changes.

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +20 -1

@@ -190,6 +190,25 @@
 		>;
 	};
 };
+
+&dra7_iodelay_core
+{
+	mmc2_iodelay_3v3_conf: mmc2_iodelay_3v3_conf {
+		pinctrl-pin-array = <
+			0x18c A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A19_IN */
+			0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)	/* CFG_GPMC_A20_IN */
+			0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A21_IN */
+			0x1bc A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A22_IN */
+			0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)	/* CFG_GPMC_A23_IN */
+			0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)	/* CFG_GPMC_A24_IN */
+			0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_IN */
+			0x1ec A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A26_IN */
+			0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)	/* CFG_GPMC_A27_IN */
+			0x360 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_IN */
+		>;
+	};
+};
+
 &i2c1 {
 	status = "okay";
 	clock-frequency = <400000>;

@@ -452,7 +471,7 @@
 	status = "okay";
 
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc2_pins_default>;
+	pinctrl-0 = <&mmc2_pins_default &mmc2_iodelay_3v3_conf>;
 
 	vmmc-supply = <&vdd_3v3>;
 	bus-width = <8>;

arch/arm/boot/dts/dra7.dtsi +8 -0

@@ -401,6 +401,14 @@
 			reg = <0x40d00000 0x100>;
 		};
 
+		dra7_iodelay_core: padconf@4844a000 {
+			compatible = "ti,dra7-iodelay";
+			reg = <0x4844a000 0x0d1c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#pinctrl-cells = <2>;
+		};
+
 		sdma: dma-controller@4a056000 {
 			compatible = "ti,omap4430-sdma";
 			reg = <0x4a056000 0x1000>;

include/dt-bindings/pinctrl/dra.h +4 -0

@@ -73,5 +73,9 @@
  */
 #define DRA7XX_CORE_IOPAD(pa, val)	(((pa) & 0xffff) - 0x3400) (val)
 
+/* DRA7 IODELAY configuration parameters */
+#define A_DELAY_PS(val)		((val) & 0xffff)
+#define G_DELAY_PS(val)		((val) & 0xffff)
+
 #endif
 

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Nishanth,

Quoted 1 line · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

I just noticed that this patch should probably be:

From: Nishanth Menon <[email protected]>

I think I just added the description to the patch.

Can you please confirm and reply with your Signed-off-by if that's the case?

Quoted 87 lines

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 21 ++++++++++++++++++++-
 arch/arm/boot/dts/dra7.dtsi                     |  8 ++++++++
 include/dt-bindings/pinctrl/dra.h               |  4 ++++
 3 files changed, 32 insertions(+), 1 deletion(-)

---

And ere are the related dts changes.

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +20 -1

@@ -190,6 +190,25 @@
 		>;
 	};
 };
+
+&dra7_iodelay_core
+{
+	mmc2_iodelay_3v3_conf: mmc2_iodelay_3v3_conf {
+		pinctrl-pin-array = <
+			0x18c A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A19_IN */
+			0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)	/* CFG_GPMC_A20_IN */
+			0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A21_IN */
+			0x1bc A_DELAY_PS(0) G_DELAY_PS(120)	/* CFG_GPMC_A22_IN */
+			0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)	/* CFG_GPMC_A23_IN */
+			0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)	/* CFG_GPMC_A24_IN */
+			0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_A25_IN */
+			0x1ec A_DELAY_PS(120) G_DELAY_PS(0)	/* CFG_GPMC_A26_IN */
+			0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)	/* CFG_GPMC_A27_IN */
+			0x360 A_DELAY_PS(0) G_DELAY_PS(0)	/* CFG_GPMC_CS1_IN */
+		>;
+	};
+};
+
 &i2c1 {
 	status = "okay";
 	clock-frequency = <400000>;

@@ -452,7 +471,7 @@
 	status = "okay";
 
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc2_pins_default>;
+	pinctrl-0 = <&mmc2_pins_default &mmc2_iodelay_3v3_conf>;
 
 	vmmc-supply = <&vdd_3v3>;
 	bus-width = <8>;

arch/arm/boot/dts/dra7.dtsi +8 -0

@@ -401,6 +401,14 @@
 			reg = <0x40d00000 0x100>;
 		};
 
+		dra7_iodelay_core: padconf@4844a000 {
+			compatible = "ti,dra7-iodelay";
+			reg = <0x4844a000 0x0d1c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#pinctrl-cells = <2>;
+		};
+
 		sdma: dma-controller@4a056000 {
 			compatible = "ti,omap4430-sdma";
 			reg = <0x4a056000 0x1000>;

include/dt-bindings/pinctrl/dra.h +4 -1

@@ -73,5 +73,9 @@
  */
 #define DRA7XX_CORE_IOPAD(pa, val)	(((pa) & 0xffff) - 0x3400) (val)
 
+/* DRA7 IODELAY configuration parameters */
+#define A_DELAY_PS(val)		((val) & 0xffff)
+#define G_DELAY_PS(val)		((val) & 0xffff)
+
 #endif
 
--

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Quoted 5 lines · Tony Lindgren

Nishanth,

Quoted 1 line · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

Quoted 9 lines

I just noticed that this patch should probably be:

From: Nishanth Menon <[email protected]>

I think I just added the description to the patch.

Can you please confirm and reply with your Signed-off-by if that's the case?

Though I had introduced the node [
http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/34661cbccc679bb8d91768bc78495e94e6d40f1f
], the x15 values were first introduced by Kishon.

http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/1463b1e8facb7180f5679b373411b3fbeb1608fd

personally, From or not really does'nt matter as long as we can get the solution in.

So, as long as it helps..

Signed-off-by Nishanth Menon <[email protected]>

Quoted 45 lines

Quoted 45 lines

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 21 ++++++++++++++++++++-
 arch/arm/boot/dts/dra7.dtsi                     |  8 ++++++++
 include/dt-bindings/pinctrl/dra.h               |  4 ++++
 3 files changed, 32 insertions(+), 1 deletion(-)

---

And ere are the related dts changes.

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +19 -0

@@ -190,6 +190,25 @@
         >;
     };
 };
+
+&dra7_iodelay_core
+{
+    mmc2_iodelay_3v3_conf: mmc2_iodelay_3v3_conf {
+        pinctrl-pin-array = <
+            0x18c A_DELAY_PS(0) G_DELAY_PS(120)    /* CFG_GPMC_A19_IN */
+            0x1a4 A_DELAY_PS(265) G_DELAY_PS(360)    /* CFG_GPMC_A20_IN */
+            0x1b0 A_DELAY_PS(0) G_DELAY_PS(120)    /* CFG_GPMC_A21_IN */
+            0x1bc A_DELAY_PS(0) G_DELAY_PS(120)    /* CFG_GPMC_A22_IN */
+            0x1c8 A_DELAY_PS(287) G_DELAY_PS(420)    /* CFG_GPMC_A23_IN */
+            0x1d4 A_DELAY_PS(144) G_DELAY_PS(240)    /* CFG_GPMC_A24_IN */
+            0x1e0 A_DELAY_PS(0) G_DELAY_PS(0)    /* CFG_GPMC_A25_IN */
+            0x1ec A_DELAY_PS(120) G_DELAY_PS(0)    /* CFG_GPMC_A26_IN */
+            0x1f8 A_DELAY_PS(120) G_DELAY_PS(180)    /* CFG_GPMC_A27_IN */
+            0x360 A_DELAY_PS(0) G_DELAY_PS(0)    /* CFG_GPMC_CS1_IN */
+        >;
+    };
+};
+
 &i2c1 {
     status = "okay";
     clock-frequency = <400000>;

@@ -452,7 +471,7 @@
     status = "okay";
 

Quoted 3 lines

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi line 474

Quoted 3 lines

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +1 -1

     pinctrl-names = "default";
-    pinctrl-0 = <&mmc2_pins_default>;
+    pinctrl-0 = <&mmc2_pins_default &mmc2_iodelay_3v3_conf>;

Quoted 35 lines

Quoted 35 lines

arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +0 -0

     vmmc-supply = <&vdd_3v3>;
     bus-width = <8>;

arch/arm/boot/dts/dra7.dtsi +8 -0

@@ -401,6 +401,14 @@
             reg = <0x40d00000 0x100>;
         };
 
+        dra7_iodelay_core: padconf@4844a000 {
+            compatible = "ti,dra7-iodelay";
+            reg = <0x4844a000 0x0d1c>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+            #pinctrl-cells = <2>;
+        };
+
         sdma: dma-controller@4a056000 {
             compatible = "ti,omap4430-sdma";
             reg = <0x4a056000 0x1000>;

include/dt-bindings/pinctrl/dra.h +4 -0

@@ -73,5 +73,9 @@
  */
 #define DRA7XX_CORE_IOPAD(pa, val)    (((pa) & 0xffff) - 0x3400) (val)
 
+/* DRA7 IODELAY configuration parameters */
+#define A_DELAY_PS(val)        ((val) & 0xffff)
+#define G_DELAY_PS(val)        ((val) & 0xffff)
+
 #endif
 

Quoted 6 lines

Quoted 6 lines

Signature · 5 lines

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Quoted 28 lines · Nishanth Menon

Quoted 5 lines · Tony Lindgren

Nishanth,

Quoted 1 line · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

Quoted 9 lines

I just noticed that this patch should probably be:

From: Nishanth Menon <[email protected]>

I think I just added the description to the patch.

Can you please confirm and reply with your Signed-off-by if that's the case?

Though I had introduced the node [
http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/34661cbccc679bb8d91768bc78495e94e6d40f1f
], the x15 values were first introduced by Kishon.

http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/1463b1e8facb7180f5679b373411b3fbeb1608fd

personally, From or not really does'nt matter as long as we can get the solution in.

So, as long as it helps..

Signed-off-by Nishanth Menon <[email protected]>

I had to remove the iodelay added here based on datasheet (patch [1]).

I also wanted to confirm if "MODE_SELECT" should be added in pinctrl values like [2] for adding manual mode iodelay because that seems to be missing in this patch.

[1] ->
http://git.ti.com/cgit/cgit.cgi/ti-linux-kernel/ti-linux-kernel.git/commit/?h=ti-linux-4.9.y&id=441f799d2d15a1ed2f0a89024bf3f2fd82816dbd

[2] ->
http://git.ti.com/cgit/cgit.cgi/ti-linux-kernel/ti-linux-kernel.git/commit/?h=ti-linux-4.9.y&id=decd3b433d6485d9176ce069bd66b109fb82fe07

Quoted 29 lines · Kishon Vijay Abraham I

Quoted 28 lines · Nishanth Menon

Quoted 5 lines · Tony Lindgren

Nishanth,

Quoted 1 line · Tony Lindgren

Add dra7 iodelay configuration and use it for MMC.

Quoted 9 lines

I just noticed that this patch should probably be:

From: Nishanth Menon <[email protected]>

I think I just added the description to the patch.

Can you please confirm and reply with your Signed-off-by if that's the case?

Though I had introduced the node [
http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/34661cbccc679bb8d91768bc78495e94e6d40f1f
], the x15 values were first introduced by Kishon.

http://git.ti.com/ti-linux-kernel/ti-linux-kernel/commit/1463b1e8facb7180f5679b373411b3fbeb1608fd

personally, From or not really does'nt matter as long as we can get the solution in.

So, as long as it helps..

Signed-off-by Nishanth Menon <[email protected]>

...

Quoted 1 line

I had to remove the iodelay added here based on datasheet (patch [1]).

OK thanks for the info. So we have multiple authors and as Kishon added the working values I suggest we credit the patch for Kishon.

Quoted 3 lines

I also wanted to confirm if "MODE_SELECT" should be added in pinctrl values like [2] for adding manual mode iodelay because that seems to be missing in this patch.

Oh OK. If it's needed then yeah let's update it for that too. Can you please check it? And then send an updated version of this patch with "From" credited to you? Just update the description to say "Based on earlier patches in TI Linux kernel tree done by Nishanth Menon and Kishon Vijay Abraham I".

Hi Nishanth,

[auto build test ERROR on pinctrl/for-next]
[also build test ERROR on v4.10-rc1 next-20161224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

(quoted diff) +4 -0

+static struct pinctrl_ops ti_iodelay_pinctrl_ops = {
+	.get_groups_count = pinctrl_generic_get_group_count,
+	.get_group_name = pinctrl_generic_get_group_name,
+	.get_group_pins = pinctrl_generic_get_group_pins,

From tony Mon Sep 17 00:00:00 2001

Quoted 4 lines · Tony Lindgren

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +4 -0

+static struct pinctrl_ops ti_iodelay_pinctrl_ops = {
+	.get_groups_count = pinctrl_generic_get_group_count,
+	.get_group_name = pinctrl_generic_get_group_name,
+	.get_group_pins = pinctrl_generic_get_group_pins,

drivers/pinctrl/ti/pinctrl-ti-iodelay.c line 743

Quoted 10 lines

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +10 -0

+	.pin_dbg_show = ti_iodelay_pin_dbg_show,
+	.dt_node_to_map = ti_iodelay_dt_node_to_map,
+};
+
+static struct pinconf_ops ti_iodelay_pinctrl_pinconf_ops = {
+	.pin_config_group_get = ti_iodelay_pinconf_group_get,
+	.pin_config_group_set = ti_iodelay_pinconf_group_set,
+#ifdef CONFIG_DEBUG_FS
+	.pin_config_group_dbg_show = ti_iodelay_pinconf_group_dbg_show,
+#endif

I noticed that .pin_dbg_show above needs ifdef CONFIG_DEBUGFS. Updated patch below.

Regards,

Tony

8< --------------------
From tony Mon Sep 17 00:00:00 2001
From: Nishanth Menon <[email protected]>
Date: Tue, 27 Dec 2016 08:03:43 -0800
Subject: [PATCH] pinctrl: Introduce TI IOdelay configuration driver

SoC family such as DRA7 family of processors have, in addition to the regular muxing of pins (as done by pinctrl-single), a separate hardware module called IODelay which is also expected to be configured. The "IODelay" module has it's own register space that is independent of the control module and the padconf register area.

With recent changes to the pinctrl framework, we can now support this hardware with a reasonably minimal driver by using #pinctrl-cells, GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS.

It is advocated strongly in TI's official documentation considering the existing design of the DRA7 family of processors during mux or IODelay reconfiguration, there is a potential for a significant glitch which may cause functional impairment to certain hardware. It is hence recommended to do as little of muxing as absolutely necessary without I/O isolation (which can only be done in initial stages of bootloader).

NOTE: with the system wide I/O isolation scheme present in DRA7 SoC family, it is not reasonable to do stop all I/O operations for every such pad configuration scheme. So, we will let it glitch when used in this mode.

Even with the above limitation, certain functionality such as MMC has mandatory need for IODelay reconfiguration requirements, depending on speed of transfer. In these cases, with careful examination of usecase involved, the expected glitch can be controlled such that it does not impact functionality.

In short, IODelay module support as a padconf driver being introduced here is not expected to do SoC wide I/O Isolation and is meant for a limited subset of IODelay configuration requirements that need to be dynamic and whose glitchy behavior will not cause functionality failure for that interface.

IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared to 0x0 at all times, even when configuring Manual IO Timing Modes. This is done by eliminating the LOCK_BIT=1 setting from Step of the Manual IO timing Mode configuration procedure. This option leaves the CFG_* registers unprotected from unintended writes to the CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured.

This approach is taken to allow for a generic driver to exist in kernel world that has to be used carefully in required usecases.

Signed-off-by Nishanth Menon <[email protected]>

Signed-off-by Lokesh Vutla <[email protected]>

[[email protected]: updated to use generic pinctrl functions, added
binding documentation, updated comments]

Signed-off-by Tony Lindgren <[email protected]>

---
 .../devicetree/bindings/pinctrl/ti,iodelay.txt     |  47 +

 drivers/pinctrl/Kconfig                            |   1 +
 drivers/pinctrl/Makefile                           |   1 +
 drivers/pinctrl/ti/Kconfig                         |  10 +
 drivers/pinctrl/ti/Makefile                        |   1 +
 drivers/pinctrl/ti/pinctrl-ti-iodelay.c            | 947 +++++++++++++++++++++
 6 files changed, 1007 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/ti,iodelay.txt
 create mode 100644 drivers/pinctrl/ti/Kconfig
 create mode 100644 drivers/pinctrl/ti/Makefile
 create mode 100644 drivers/pinctrl/ti/pinctrl-ti-iodelay.c

+ * Copyright (C) 2015 Texas Instruments, Inc.

On 01/02/2017 04:12 PM, Tony Lindgren wrote:
[...]
Minor one:

Quoted 1 line

+ * Copyright (C) 2015 Texas Instruments, Inc.

Could you make this:
Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/

Quoted 6 lines · Nishanth Menon

On 01/02/2017 04:12 PM, Tony Lindgren wrote:
[...]
Minor one:

Quoted 1 line

+ * Copyright (C) 2015 Texas Instruments, Inc.

Could you make this:
Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/

Sure, it's your patch :) Will repost.

$ ./scripts/kernel-doc drivers/pinctrl/ti/pinctrl-ti-iodelay.c>/dev/null
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:132: warning: Excess struct/union/enum/typedef member 'name' description in 'ti_iodelay_pingroup'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:132: warning: Excess struct/union/enum/typedef member 'map' description in 'ti_iodelay_pingroup'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:159: warning: Excess struct/union/enum/typedef member 'names' description in 'ti_iodelay_device'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:211: warning: No description found for parameter 'cfg'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:211: warning: Excess function parameter 'val' description in 'ti_iodelay_pinconf_set'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:418: warning: Cannot understand  *
 on line 418 - I thought it was a doc line

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +0 -0

new file mode 100644

+/**
+ * struct ti_iodelay_pingroup - Structure that describes one group
+ * @name: Name of the group

+ * @map: pinctrl map allocated for the group

+ * @cfg: configuration array for the pin (from dt)
+ * @ncfg: number of configuration values allocated
+ * @config: pinconf "Config" - currently a dummy value
+ */

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +6 -0

+struct ti_iodelay_pingroup {
+	struct ti_iodelay_cfg *cfg;
+	int ncfg;
+	unsigned long config;
+};
+

+ * @reg_data: Register definition data for the IODelay instance
+ * @reg_init_conf_values: Initial configuration values.
+ */

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +14 -0

+struct ti_iodelay_device {
+	struct device *dev;
+	unsigned long phys_base;
+	void __iomem *reg_base;
+	struct regmap *regmap;
+
+	struct pinctrl_dev *pctl;
+	struct pinctrl_desc desc;
+	struct pinctrl_pin_desc *pa;
+
+	const struct ti_iodelay_reg_data *reg_data;
+	struct ti_iodelay_reg_values reg_init_conf_values;
+};
+

+/**
+ * ti_iodelay_pinconf_set() - Configure the pin configuration
+ * @iod: iodelay device
+ * @val: Configuration value

+ *
+ * Update the configuration register as per TRM and lockup once done.
+ * *IMPORTANT NOTE* SoC TRM does recommend doing iodelay programmation only
+ * while in Isolation. But, then, isolation also implies that every pin
+ * on the SoC (including DDR) will be isolated out. The only benefit being
+ * a glitchless configuration, However, the intent of this driver is purely
+ * to support a "glitchy" configuration where applicable.
+ *
+ * Return: 0 in case of success, else appropriate error value
+ */

drivers/pinctrl/ti/pinctrl-ti-iodelay.c new file +2 -0

+static int ti_iodelay_pinconf_set(struct ti_iodelay_device *iod,
+				  struct ti_iodelay_cfg *cfg)

On 01/02/2017 04:12 PM, Tony Lindgren wrote:
[...]

I got the following warnings with kernel-doc:

Quoted 8 lines

$ ./scripts/kernel-doc drivers/pinctrl/ti/pinctrl-ti-iodelay.c>/dev/null
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:132: warning: Excess struct/union/enum/typedef member 'name' description in 'ti_iodelay_pingroup'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:132: warning: Excess struct/union/enum/typedef member 'map' description in 'ti_iodelay_pingroup'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:159: warning: Excess struct/union/enum/typedef member 'names' description in 'ti_iodelay_device'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:211: warning: No description found for parameter 'cfg'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:211: warning: Excess function parameter 'val' description in 'ti_iodelay_pinconf_set'
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:418: warning: Cannot understand  *
 on line 418 - I thought it was a doc line

Marking them below