Mark conventional/PCIe/hybrid PCI devices using interface names
v2 cover Mark conventional/PCIe/hybrid PCI devices using interface names
Changes v1 -> v2:
* Use "Conventional PCI" instead of "legacy PCI"
* Suggested-by: Alex Williamson <[email protected]>
* Mark base-xhci as hybrid too
* Reported-by: Marcel Apfelbaum <[email protected]>
* Mark pcie-pci-bridge as PCI Express only
* New Conventional PCI devices: sungem, sunhme
v1 was a reimplementation of one portion of an old RFC:
Subject: [RFC v2 00/20] qmp: Report bus information on
'query-machines'
This series marks each PCI device type as Conventional PCI, PCI Express, or "hybrid". It uses two new QOM interface names to do
that: INTERFACE_CONVENTIONAL_PCI_DEVICE ("conventional-pci-device") and INTERFACE_PCIE_DEVICE ("pci-express-device"). Conventional PCI devices will implement only the former; PCIe-only devices will implement only the latter; hybrid devices will implement both interfaces.
With this, management software will then be able to use qom-list-types to find out which PCI devices are conventional/express/hybrid.
In the future, the new interface names can be used in the bus/slot querying commands, to indicate which types of devices are accepted on each slot.
The last patch in the series adds an assertion to the PCI device class code, to ensure we won't forget to add the corresponding interface names to new PCI device classes.
Eduardo Habkost (5):
pci: conventional-pci-device and pci-express-device interfaces
pci: Add interface names to hybrid PCI devices
pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices
pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
pci: Validate interfaces on base_class_init
include/hw/pci/pci.h | 6 ++++++ hw/acpi/piix4.c | 1 + hw/audio/ac97.c | 4 ++++ hw/audio/es1370.c | 4 ++++ hw/audio/intel-hda.c | 4 ++++ hw/block/nvme.c | 4 ++++ hw/char/serial-pci.c | 12 ++++++++++++ hw/display/cirrus_vga.c | 4 ++++ hw/display/qxl.c | 4 ++++ hw/display/sm501.c | 4 ++++ hw/display/vga-pci.c | 4 ++++ hw/display/vmware_vga.c | 4 ++++ hw/i2c/smbus_ich9.c | 4 ++++ hw/i386/amd_iommu.c | 4 ++++ hw/i386/kvm/pci-assign.c | 4 ++++ hw/i386/pc_piix.c | 4 ++++ hw/i386/xen/xen_platform.c | 4 ++++ hw/i386/xen/xen_pvdevice.c | 4 ++++ hw/ide/ich.c | 4 ++++ hw/ide/pci.c | 4 ++++ hw/ipack/tpci200.c | 4 ++++ hw/isa/i82378.c | 4 ++++ hw/isa/lpc_ich9.c | 1 + hw/isa/piix4.c | 4 ++++ hw/isa/vt82c686.c | 16 ++++++++++++++++ hw/mips/gt64xxx_pci.c | 4 ++++ hw/misc/edu.c | 5 +++++ hw/misc/ivshmem.c | 4 ++++ hw/misc/macio/macio.c | 4 ++++ hw/misc/pci-testdev.c | 4 ++++ hw/net/e1000.c | 4 ++++ hw/net/e1000e.c | 4 ++++ hw/net/eepro100.c | 4 ++++ hw/net/ne2000.c | 4 ++++ hw/net/pcnet-pci.c | 4 ++++ hw/net/rocker/rocker.c | 4 ++++ hw/net/rtl8139.c | 4 ++++ hw/net/sungem.c | 4 ++++ hw/net/sunhme.c | 4 ++++ hw/net/vmxnet3.c | 5 +++++ hw/pci-bridge/dec.c | 8 ++++++++ hw/pci-bridge/i82801b11.c | 4 ++++ hw/pci-bridge/pci_bridge_dev.c | 1 + hw/pci-bridge/pci_expander_bridge.c | 8 ++++++++ hw/pci-bridge/pcie_pci_bridge.c | 1 + hw/pci-bridge/pcie_root_port.c | 4 ++++ hw/pci-bridge/xio3130_downstream.c | 4 ++++ hw/pci-bridge/xio3130_upstream.c | 4 ++++ hw/pci-host/apb.c | 8 ++++++++ hw/pci-host/bonito.c | 4 ++++ hw/pci-host/gpex.c | 4 ++++ hw/pci-host/grackle.c | 4 ++++ hw/pci-host/piix.c | 8 ++++++++ hw/pci-host/ppce500.c | 4 ++++ hw/pci-host/prep.c | 4 ++++ hw/pci-host/q35.c | 4 ++++ hw/pci-host/uninorth.c | 16 ++++++++++++++++ hw/pci-host/versatile.c | 4 ++++ hw/pci-host/xilinx-pcie.c | 4 ++++ hw/pci/pci.c | 24 ++++++++++++++++++++++++ hw/ppc/ppc4xx_pci.c | 4 ++++ hw/scsi/esp-pci.c | 4 ++++ hw/scsi/lsi53c895a.c | 4 ++++ hw/scsi/megasas.c | 10 ++++++++++ hw/scsi/mptsas.c | 4 ++++ hw/scsi/vmw_pvscsi.c | 2 ++ hw/sd/sdhci.c | 4 ++++ hw/sh4/sh_pci.c | 4 ++++ hw/sparc64/sun4u.c | 4 ++++ hw/usb/hcd-ehci-pci.c | 4 ++++ hw/usb/hcd-ohci.c | 4 ++++ hw/usb/hcd-uhci.c | 4 ++++ hw/usb/hcd-xhci.c | 5 +++++ hw/vfio/pci-quirks.c | 4 ++++ hw/vfio/pci.c | 5 +++++ hw/virtio/virtio-pci.c | 5 +++++ hw/watchdog/wdt_i6300esb.c | 4 ++++ hw/xen/xen_pt.c | 4 ++++ 78 files changed, 379 insertions(+)
Signature · 1 line
2.13.5
PATCH v2 1/5 pci: conventional-pci-device and pci-express-device interfaces
Those two interfaces will be used to indicate which device types support Conventional PCI or PCI Express buses. Management software will be able to use the qom-list-types QMP command to query that information.
Signed-off-by Eduardo Habkost <[email protected]>
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
--- include/hw/pci/pci.h | 6 ++++++ hw/pci/pci.c | 12 ++++++++++++ 2 files changed, 18 insertions(+)
include/hw/pci/pci.h +6 -0
@@ -198,6 +198,12 @@ enum {#define PCI_DEVICE_GET_CLASS (obj) \ OBJECT_GET_CLASS(PCIDeviceClass, (obj), TYPE_PCI_DEVICE) +/* Implemented by devices that can be plugged on PCI Express buses */ +#define INTERFACE_PCIE_DEVICE "pci-express-device" + +/* Implemented by devices that can be plugged on Conventional PCI buses */ +#define INTERFACE_CONVENTIONAL_PCI_DEVICE "conventional-pci-device" + typedef struct PCIINTxRoute { enum { PCI_INTX_ENABLED,
hw/pci/pci.c +12 -0
@@ -170,6 +170,16 @@ static const TypeInfo pci_bus_info = { .class_init = pci_bus_class_init, }; +static const TypeInfo pcie_interface_info = { + .name =INTERFACE_PCIE_DEVICE , + .parent =TYPE_INTERFACE , +}; + +static const TypeInfo conventional_pci_interface_info = { + .name =INTERFACE_CONVENTIONAL_PCI_DEVICE , + .parent =TYPE_INTERFACE , +}; +static const TypeInfo pcie_bus_info = { .name =TYPE_PCIE_BUS , .parent =TYPE_PCI_BUS ,
@@ -2667,6 +2677,8 @@ static void pci_register_types(void) {type_register_static (&pci_bus_info);type_register_static (&pcie_bus_info); +type_register_static (&conventional_pci_interface_info); +type_register_static (&pcie_interface_info);type_register_static (&pci_device_type_info); }
Signature · 1 line
2.13.5
Re: [Qemu-devel] [PATCH v2 1/5] pci: conventional-pci-device and pci-express-device interfaces
Quoted 6 lines · Eduardo Habkost
Those two interfaces will be used to indicate which device types support Conventional PCI or PCI Express buses. Management software will be able to use the qom-list-types QMP command to query that information.
Signed-off-by Eduardo Habkost <[email protected]>
Reviewed-by David Gibson <[email protected]>
Quoted 56 lines
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>--- include/hw/pci/pci.h | 6 ++++++ hw/pci/pci.c | 12 ++++++++++++ 2 files changed, 18 insertions(+)include/hw/pci/pci.h +6
-0@@ -198,6 +198,12 @@ enum {#define PCI_DEVICE_GET_CLASS (obj) \ OBJECT_GET_CLASS(PCIDeviceClass, (obj), TYPE_PCI_DEVICE) +/* Implemented by devices that can be plugged on PCI Express buses */ +#define INTERFACE_PCIE_DEVICE "pci-express-device" + +/* Implemented by devices that can be plugged on Conventional PCI buses */ +#define INTERFACE_CONVENTIONAL_PCI_DEVICE "conventional-pci-device" + typedef struct PCIINTxRoute { enum { PCI_INTX_ENABLED,hw/pci/pci.c +12
-0@@ -170,6 +170,16 @@ static const TypeInfo pci_bus_info = { .class_init = pci_bus_class_init, }; +static const TypeInfo pcie_interface_info = { + .name =INTERFACE_PCIE_DEVICE , + .parent =TYPE_INTERFACE , +}; + +static const TypeInfo conventional_pci_interface_info = { + .name =INTERFACE_CONVENTIONAL_PCI_DEVICE , + .parent =TYPE_INTERFACE , +}; +static const TypeInfo pcie_bus_info = { .name =TYPE_PCIE_BUS , .parent =TYPE_PCI_BUS ,@@ -2667,6 +2677,8 @@ static void pci_register_types(void) {type_register_static (&pci_bus_info);type_register_static (&pcie_bus_info); +type_register_static (&conventional_pci_interface_info); +type_register_static (&pcie_interface_info);type_register_static (&pci_device_type_info); }
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Re: [Qemu-devel] [PATCH v2 1/5] pci: conventional-pci-device and pci-express-device interfaces
In reply to Eduardo HabkostQuoted 55 lines · Eduardo Habkost
Those two interfaces will be used to indicate which device types support Conventional PCI or PCI Express buses. Management software will be able to use the qom-list-types QMP command to query that information.
Signed-off-by Eduardo Habkost <[email protected]>---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>--- include/hw/pci/pci.h | 6 ++++++ hw/pci/pci.c | 12 ++++++++++++ 2 files changed, 18 insertions(+)include/hw/pci/pci.h +6
-0@@ -198,6 +198,12 @@ enum {#define PCI_DEVICE_GET_CLASS (obj) \ OBJECT_GET_CLASS(PCIDeviceClass, (obj), TYPE_PCI_DEVICE) +/* Implemented by devices that can be plugged on PCI Express buses */ +#define INTERFACE_PCIE_DEVICE "pci-express-device" + +/* Implemented by devices that can be plugged on Conventional PCI buses */ +#define INTERFACE_CONVENTIONAL_PCI_DEVICE "conventional-pci-device" + typedef struct PCIINTxRoute { enum { PCI_INTX_ENABLED,hw/pci/pci.c +10
-0@@ -170,6 +170,16 @@ static const TypeInfo pci_bus_info = { .class_init = pci_bus_class_init, }; +static const TypeInfo pcie_interface_info = { + .name =INTERFACE_PCIE_DEVICE , + .parent =TYPE_INTERFACE , +}; + +static const TypeInfo conventional_pci_interface_info = { + .name =INTERFACE_CONVENTIONAL_PCI_DEVICE , + .parent =TYPE_INTERFACE , +}; +static const TypeInfo pcie_bus_info = { .name =TYPE_PCIE_BUS , .parent =TYPE_PCI_BUS ,
hw/pci/pci.c static void pci_register_types(void) · line 2684
Quoted 8 lines
hw/pci/pci.c +2
-0@@ -2667,6 +2677,8 @@ static void pci_register_types(void) {type_register_static (&pci_bus_info);type_register_static (&pcie_bus_info); +type_register_static (&conventional_pci_interface_info); +type_register_static (&pcie_interface_info);type_register_static (&pci_device_type_info); }
Reviewed-by Marcel Apfelbaum <[email protected]>
Thanks,
Marcel
PATCH v2 2/5 pci: Add interface names to hybrid PCI devices
In reply to Eduardo HabkostThe following devices support both PCI Express and Conventional PCI, by including special code to handle the QEMU_PCI_CAP_EXPRESS flag and/or conditional pcie_endpoint_cap_init() calls:
* vfio-pci (is_express=1, but legacy PCI handled by vfio_populate_device())
* vmxnet3 (is_express=0, but PCIe handled by vmxnet3_realize())
* pvscsi (is_express=0, but PCIe handled by pvscsi_realize())
* virtio-pci (is_express=0, but PCIe handled by virtio_pci_dc_realize(), and additional legacy PCI code at virtio_pci_realize())
* base-xhci (is_express=1, but pcie_endpoint_cap_init() call is conditional on pci_bus_is_express(dev->bus)
* Note that xhci does not clear QEMU_PCI_CAP_EXPRESS like the other hybrid devices
Cc Dmitry Fleytman <[email protected]>
Cc Jason Wang <[email protected]>
Cc Paolo Bonzini <[email protected]>
Cc Gerd Hoffmann <[email protected]>
Cc Alex Williamson <[email protected]>
Cc "Michael S. Tsirkin" <[email protected]>
Signed-off-by Eduardo Habkost <[email protected]>
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Mark base-xhci as hybrid too
--- hw/net/vmxnet3.c | 5 +++++ hw/scsi/vmw_pvscsi.c | 2 ++ hw/usb/hcd-xhci.c | 5 +++++ hw/vfio/pci.c | 5 +++++ hw/virtio/virtio-pci.c | 5 +++++ 5 files changed, 22 insertions(+)
hw/net/vmxnet3.c +5 -0
@@ -2651,6 +2651,11 @@ static const TypeInfo vmxnet3_info = { .instance_size = sizeof(VMXNET3State), .class_init = vmxnet3_class_init, .instance_init = vmxnet3_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void vmxnet3_register_types (void )
hw/scsi/vmw_pvscsi.c +2 -0
@@ -1300,6 +1300,8 @@ static const TypeInfo pvscsi_info = { .class_init = pvscsi_class_init, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };
hw/usb/hcd-xhci.c +5 -0
@@ -3670,6 +3670,11 @@ static const TypeInfo xhci_info = { .instance_size = sizeof(XHCIState), .class_init = xhci_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void qemu_xhci_class_init (ObjectClass *klass,void *data)
hw/vfio/pci.c +5 -0
@@ -3023,6 +3023,11 @@ static const TypeInfo vfio_pci_dev_info = { .class_init = vfio_pci_dev_class_init, .instance_init = vfio_instance_init, .instance_finalize = vfio_instance_finalize, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void register_vfio_pci_dev_type (void )
hw/virtio/virtio-pci.c +5 -0
@@ -1958,6 +1958,11 @@ static const TypeInfo virtio_pci_info = { .class_init = virtio_pci_class_init, .class_size = sizeof(VirtioPCIClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };/* virtio-blk-pci */
Signature · 1 line
2.13.5
Re: [Qemu-devel] [PATCH v2 2/5] pci: Add interface names to hybrid PCI devices
Quoted 6 lines · Eduardo Habkost
The following devices support both PCI Express and Conventional PCI, by including special code to handle the
QEMU_PCI_CAP_EXPRESSflag and/or conditionalpcie_endpoint_cap_init()calls:* vfio-pci (is_express=1, but legacy PCI handled by
vfio_populate_device())
In the case of VFIO, won't this depend on the capabilities of the device on the host?
Quoted 10 lines
* vmxnet3 (is_express=0, but PCIe handled by
vmxnet3_realize())
* pvscsi (is_express=0, but PCIe handled bypvscsi_realize())
* virtio-pci (is_express=0, but PCIe handled byvirtio_pci_dc_realize(), and additional legacy PCI code atvirtio_pci_realize())
* base-xhci (is_express=1, butpcie_endpoint_cap_init()call is conditional onpci_bus_is_express(dev->bus)
* Note that xhci does not clearQEMU_PCI_CAP_EXPRESSlike the other hybrid devices
Quoted 7 lines
Cc Dmitry Fleytman <[email protected]>Cc Jason Wang <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Gerd Hoffmann <[email protected]>Cc Alex Williamson <[email protected]>Cc "Michael S. Tsirkin" <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>
Except for the query above,
Reviewed-by David Gibson <[email protected]>
Quoted 90 lines
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Mark base-xhci as hybrid too--- hw/net/vmxnet3.c | 5 +++++ hw/scsi/vmw_pvscsi.c | 2 ++ hw/usb/hcd-xhci.c | 5 +++++ hw/vfio/pci.c | 5 +++++ hw/virtio/virtio-pci.c | 5 +++++ 5 files changed, 22 insertions(+)hw/net/vmxnet3.c +5
-0@@ -2651,6 +2651,11 @@ static const TypeInfo vmxnet3_info = { .instance_size = sizeof(VMXNET3State), .class_init = vmxnet3_class_init, .instance_init = vmxnet3_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void vmxnet3_register_types (void )hw/scsi/vmw_pvscsi.c +2
-0@@ -1300,6 +1300,8 @@ static const TypeInfo pvscsi_info = { .class_init = pvscsi_class_init, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/usb/hcd-xhci.c +5
-0@@ -3670,6 +3670,11 @@ static const TypeInfo xhci_info = { .instance_size = sizeof(XHCIState), .class_init = xhci_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void qemu_xhci_class_init (ObjectClass *klass,void *data)hw/vfio/pci.c +5
-0@@ -3023,6 +3023,11 @@ static const TypeInfo vfio_pci_dev_info = { .class_init = vfio_pci_dev_class_init, .instance_init = vfio_instance_init, .instance_finalize = vfio_instance_finalize, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void register_vfio_pci_dev_type (void )hw/virtio/virtio-pci.c +5
-0@@ -1958,6 +1958,11 @@ static const TypeInfo virtio_pci_info = { .class_init = virtio_pci_class_init, .class_size = sizeof(VirtioPCIClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };/* virtio-blk-pci */
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Marcel Apfelbaum
Reviewed-byRe: [Qemu-devel] [PATCH v2 2/5] pci: Add interface names to hybrid PCI devices
Quoted 11 lines · David Gibson
Quoted 6 lines · Eduardo Habkost
The following devices support both PCI Express and Conventional PCI, by including special code to handle the
QEMU_PCI_CAP_EXPRESSflag and/or conditionalpcie_endpoint_cap_init()calls:* vfio-pci (is_express=1, but legacy PCI handled by
vfio_populate_device())In the case of VFIO, won't this depend on the capabilities of the device on the host?
Most (almost all?) assigned devices are PCI Express, they will be exposed as PCI/PCI express depending on the slot they are plugged into.
Anyway, the interface only states the device can be PCI or PCI Express, so I think is OK.
Reviewed-by Marcel Apfelbaum <[email protected]>
Thanks,
Marcel
Quoted 113 lines
Quoted 10 lines
* vmxnet3 (is_express=0, but PCIe handled by
vmxnet3_realize())
* pvscsi (is_express=0, but PCIe handled bypvscsi_realize())
* virtio-pci (is_express=0, but PCIe handled byvirtio_pci_dc_realize(), and additional legacy PCI code atvirtio_pci_realize())
* base-xhci (is_express=1, butpcie_endpoint_cap_init()call is conditional onpci_bus_is_express(dev->bus)
* Note that xhci does not clearQEMU_PCI_CAP_EXPRESSlike the other hybrid devicesQuoted 7 lines
Cc Dmitry Fleytman <[email protected]>Cc Jason Wang <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Gerd Hoffmann <[email protected]>Cc Alex Williamson <[email protected]>Cc "Michael S. Tsirkin" <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>Except for the query above,
Reviewed-by David Gibson <[email protected]>Quoted 90 lines
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Mark base-xhci as hybrid too--- hw/net/vmxnet3.c | 5 +++++ hw/scsi/vmw_pvscsi.c | 2 ++ hw/usb/hcd-xhci.c | 5 +++++ hw/vfio/pci.c | 5 +++++ hw/virtio/virtio-pci.c | 5 +++++ 5 files changed, 22 insertions(+)hw/net/vmxnet3.c +5
-0@@ -2651,6 +2651,11 @@ static const TypeInfo vmxnet3_info = { .instance_size = sizeof(VMXNET3State), .class_init = vmxnet3_class_init, .instance_init = vmxnet3_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void vmxnet3_register_types (void )hw/scsi/vmw_pvscsi.c +2
-0@@ -1300,6 +1300,8 @@ static const TypeInfo pvscsi_info = { .class_init = pvscsi_class_init, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/usb/hcd-xhci.c +5
-0@@ -3670,6 +3670,11 @@ static const TypeInfo xhci_info = { .instance_size = sizeof(XHCIState), .class_init = xhci_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void qemu_xhci_class_init (ObjectClass *klass,void *data)hw/vfio/pci.c +5
-0@@ -3023,6 +3023,11 @@ static const TypeInfo vfio_pci_dev_info = { .class_init = vfio_pci_dev_class_init, .instance_init = vfio_instance_init, .instance_finalize = vfio_instance_finalize, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void register_vfio_pci_dev_type (void )hw/virtio/virtio-pci.c +5
-0@@ -1958,6 +1958,11 @@ static const TypeInfo virtio_pci_info = { .class_init = virtio_pci_class_init, .class_size = sizeof(VirtioPCIClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };/* virtio-blk-pci */
Re: [Qemu-devel] [PATCH v2 2/5] pci: Add interface names to hybrid PCI devices
In reply to David GibsonQuoted 10 lines · David Gibson
Quoted 6 lines · Eduardo Habkost
The following devices support both PCI Express and Conventional PCI, by including special code to handle the
QEMU_PCI_CAP_EXPRESSflag and/or conditionalpcie_endpoint_cap_init()calls:* vfio-pci (is_express=1, but legacy PCI handled by
vfio_populate_device())In the case of VFIO, won't this depend on the capabilities of the device on the host?
Yes. But the interface names are static data about the device type, which really supports both cases.
Deciding where exactly a VFIO device can be plugged before running the VM will require additional data about the host, and that can't be provided by QEMU (because it's not running yet).
Quoted 119 lines
Quoted 11 lines
* vmxnet3 (is_express=0, but PCIe handled by
vmxnet3_realize())
* pvscsi (is_express=0, but PCIe handled bypvscsi_realize())
* virtio-pci (is_express=0, but PCIe handled byvirtio_pci_dc_realize(), and additional legacy PCI code atvirtio_pci_realize())
* base-xhci (is_express=1, butpcie_endpoint_cap_init()call is conditional onpci_bus_is_express(dev->bus)
* Note that xhci does not clearQEMU_PCI_CAP_EXPRESSlike the other hybrid devicesQuoted 7 lines
Cc Dmitry Fleytman <[email protected]>Cc Jason Wang <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Gerd Hoffmann <[email protected]>Cc Alex Williamson <[email protected]>Cc "Michael S. Tsirkin" <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>Except for the query above,
Reviewed-by David Gibson <[email protected]>Quoted 90 lines
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Mark base-xhci as hybrid too--- hw/net/vmxnet3.c | 5 +++++ hw/scsi/vmw_pvscsi.c | 2 ++ hw/usb/hcd-xhci.c | 5 +++++ hw/vfio/pci.c | 5 +++++ hw/virtio/virtio-pci.c | 5 +++++ 5 files changed, 22 insertions(+)hw/net/vmxnet3.c +5
-0@@ -2651,6 +2651,11 @@ static const TypeInfo vmxnet3_info = { .instance_size = sizeof(VMXNET3State), .class_init = vmxnet3_class_init, .instance_init = vmxnet3_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void vmxnet3_register_types (void )hw/scsi/vmw_pvscsi.c +2
-0@@ -1300,6 +1300,8 @@ static const TypeInfo pvscsi_info = { .class_init = pvscsi_class_init, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/usb/hcd-xhci.c +5
-0@@ -3670,6 +3670,11 @@ static const TypeInfo xhci_info = { .instance_size = sizeof(XHCIState), .class_init = xhci_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void qemu_xhci_class_init (ObjectClass *klass,void *data)hw/vfio/pci.c +5
-0@@ -3023,6 +3023,11 @@ static const TypeInfo vfio_pci_dev_info = { .class_init = vfio_pci_dev_class_init, .instance_init = vfio_instance_init, .instance_finalize = vfio_instance_finalize, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void register_vfio_pci_dev_type (void )hw/virtio/virtio-pci.c +5
-0@@ -1958,6 +1958,11 @@ static const TypeInfo virtio_pci_info = { .class_init = virtio_pci_class_init, .class_size = sizeof(VirtioPCIClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };/* virtio-blk-pci */ Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Signature · 1 line
Eduardo
Re: [Qemu-devel] [PATCH v2 2/5] pci: Add interface names to hybrid PCI devices
Quoted 6 lines · Eduardo Habkost
Quoted 5 lines · David Gibson
Quoted 4 lines · Eduardo Habkost
The following devices support both PCI Express and Conventional PCI, by including special code to handle the
QEMU_PCI_CAP_EXPRESSflag and/or conditionalpcie_endpoint_cap_init()calls:
Quoted 8 lines
Quoted 5 lines
Quoted 2 lines
* vfio-pci (is_express=1, but legacy PCI handled by
vfio_populate_device())In the case of VFIO, won't this depend on the capabilities of the device on the host?
Yes. But the interface names are static data about the device type, which really supports both cases.
Ok, makes sense.
Quoted 3 lines
Deciding where exactly a VFIO device can be plugged before running the VM will require additional data about the host, and that can't be provided by QEMU (because it's not running yet).
Right, obviously.
Quoted 118 lines
Quoted 115 lines
Quoted 12 lines
* vmxnet3 (is_express=0, but PCIe handled by
vmxnet3_realize())
* pvscsi (is_express=0, but PCIe handled bypvscsi_realize())
* virtio-pci (is_express=0, but PCIe handled byvirtio_pci_dc_realize(), and additional legacy PCI code atvirtio_pci_realize())
* base-xhci (is_express=1, butpcie_endpoint_cap_init()call is conditional onpci_bus_is_express(dev->bus)
* Note that xhci does not clearQEMU_PCI_CAP_EXPRESSlike the other hybrid devicesQuoted 7 lines
Cc Dmitry Fleytman <[email protected]>Cc Jason Wang <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Gerd Hoffmann <[email protected]>Cc Alex Williamson <[email protected]>Cc "Michael S. Tsirkin" <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>Except for the query above,
Reviewed-by David Gibson <[email protected]>Quoted 90 lines
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Mark base-xhci as hybrid too--- hw/net/vmxnet3.c | 5 +++++ hw/scsi/vmw_pvscsi.c | 2 ++ hw/usb/hcd-xhci.c | 5 +++++ hw/vfio/pci.c | 5 +++++ hw/virtio/virtio-pci.c | 5 +++++ 5 files changed, 22 insertions(+)hw/net/vmxnet3.c +5
-0@@ -2651,6 +2651,11 @@ static const TypeInfo vmxnet3_info = { .instance_size = sizeof(VMXNET3State), .class_init = vmxnet3_class_init, .instance_init = vmxnet3_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void vmxnet3_register_types (void )hw/scsi/vmw_pvscsi.c +2
-0@@ -1300,6 +1300,8 @@ static const TypeInfo pvscsi_info = { .class_init = pvscsi_class_init, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/usb/hcd-xhci.c +5
-0@@ -3670,6 +3670,11 @@ static const TypeInfo xhci_info = { .instance_size = sizeof(XHCIState), .class_init = xhci_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void qemu_xhci_class_init (ObjectClass *klass,void *data)hw/vfio/pci.c +5
-0@@ -3023,6 +3023,11 @@ static const TypeInfo vfio_pci_dev_info = { .class_init = vfio_pci_dev_class_init, .instance_init = vfio_instance_init, .instance_finalize = vfio_instance_finalize, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };static void register_vfio_pci_dev_type (void )hw/virtio/virtio-pci.c +5
-0@@ -1958,6 +1958,11 @@ static const TypeInfo virtio_pci_info = { .class_init = virtio_pci_class_init, .class_size = sizeof(VirtioPCIClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + }, };/* virtio-blk-pci */
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
PATCH v2 3/5 pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices
In reply to Eduardo HabkostChange all devices that set is_express=1 to implement INTERFACE_PCIE_DEVICE.
Cc Keith Busch <[email protected]>
Cc Kevin Wolf <[email protected]>
Cc Max Reitz <[email protected]>
Cc Dmitry Fleytman <[email protected]>
Cc Jason Wang <[email protected]>
Cc "Michael S. Tsirkin" <[email protected]>
Cc Marcel Apfelbaum <[email protected]>
Cc Paul Burton <[email protected]>
Cc Paolo Bonzini <[email protected]>
Cc Hannes Reinecke <[email protected]>
Reviewed-by Alistair Francis <[email protected]>
Signed-off-by Eduardo Habkost <[email protected]>
---
Changes v1 -> v2:
* base-xhci is marked as hybrid, now (in another patch)
* Included pcie-pci-bridge
--- hw/block/nvme.c | 4 ++++ hw/net/e1000e.c | 4 ++++ hw/pci-bridge/pcie_pci_bridge.c | 1 + hw/pci-bridge/pcie_root_port.c | 4 ++++ hw/pci-bridge/xio3130_downstream.c | 4 ++++ hw/pci-bridge/xio3130_upstream.c | 4 ++++ hw/pci-host/xilinx-pcie.c | 4 ++++ hw/scsi/megasas.c | 6 ++++++ 8 files changed, 31 insertions(+)
hw/block/nvme.c +4 -0
@@ -1110,6 +1110,10 @@ static const TypeInfo nvme_info = { .instance_size = sizeof(NvmeCtrl), .class_init = nvme_class_init, .instance_init = nvme_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void nvme_register_types (void )
hw/net/e1000e.c +4 -0
@@ -708,6 +708,10 @@ static const TypeInfo e1000e_info = { .instance_size = sizeof(E1000EState), .class_init = e1000e_class_init, .instance_init = e1000e_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void e1000e_register_types (void )
hw/pci-bridge/pcie_pci_bridge.c +1 -0
@@ -180,6 +180,7 @@ static const TypeInfo pcie_pci_bridge_info = { .class_init = pcie_pci_bridge_class_init, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_PCIE_DEVICE }, { }, } };
hw/pci-bridge/pcie_root_port.c +4 -0
@@ -161,6 +161,10 @@ static const TypeInfo rp_info = { .class_init = rp_class_init, .abstract = true, .class_size = sizeof(PCIERootPortClass), + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void rp_register_types (void )
hw/pci-bridge/xio3130_downstream.c +4 -0
@@ -195,6 +195,10 @@ static const TypeInfo xio3130_downstream_info = { .name = "xio3130-downstream", .parent = TYPE_PCIE_SLOT, .class_init = xio3130_downstream_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void xio3130_downstream_register_types (void )
hw/pci-bridge/xio3130_upstream.c +4 -0
@@ -166,6 +166,10 @@ static const TypeInfo xio3130_upstream_info = { .name = "x3130-upstream", .parent = TYPE_PCIE_PORT, .class_init = xio3130_upstream_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void xio3130_upstream_register_types (void )
hw/pci-host/xilinx-pcie.c +4 -0
@@ -317,6 +317,10 @@ static const TypeInfo xilinx_pcie_root_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(XilinxPCIERoot), .class_init = xilinx_pcie_root_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void xilinx_pcie_register (void )
hw/scsi/megasas.c +6 -0
@@ -2451,6 +2451,7 @@ typedef struct MegasasInfo {int osts;const VMStateDescription *vmsd;Property *props; +InterfaceInfo *interfaces; } MegasasInfo;static struct MegasasInfo megasas_devices[] = {
@@ -2480,6 +2481,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = true, .vmsd = &vmstate_megasas_gen2, .props = megasas_properties_gen2, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, } };
@@ -2531,6 +2536,7 @@ static void megasas_register_types(void) type_info.parent =TYPE_MEGASAS_BASE ; type_info.class_data = (void *)info; type_info.class_init = megasas_class_init; + type_info.interfaces = info->interfaces;type_register (&type_info); }
Signature · 1 line
2.13.5
Re: [Qemu-devel] [PATCH v2 3/5] pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices
Quoted 16 lines · Eduardo Habkost
Change all devices that set is_express=1 to implement
INTERFACE_PCIE_DEVICE.Cc Keith Busch <[email protected]>Cc Kevin Wolf <[email protected]>Cc Max Reitz <[email protected]>Cc Dmitry Fleytman <[email protected]>Cc Jason Wang <[email protected]>Cc "Michael S. Tsirkin" <[email protected]>Cc Marcel Apfelbaum <[email protected]>Cc Paul Burton <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Hannes Reinecke <[email protected]>Reviewed-by Alistair Francis <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>
Reviewed-by David Gibson <[email protected]>
Quoted 148 lines
---
Changes v1 -> v2:
* base-xhci is marked as hybrid, now (in another patch)
* Included pcie-pci-bridge--- hw/block/nvme.c | 4 ++++ hw/net/e1000e.c | 4 ++++ hw/pci-bridge/pcie_pci_bridge.c | 1 + hw/pci-bridge/pcie_root_port.c | 4 ++++ hw/pci-bridge/xio3130_downstream.c | 4 ++++ hw/pci-bridge/xio3130_upstream.c | 4 ++++ hw/pci-host/xilinx-pcie.c | 4 ++++ hw/scsi/megasas.c | 6 ++++++ 8 files changed, 31 insertions(+)hw/block/nvme.c +4
-0@@ -1110,6 +1110,10 @@ static const TypeInfo nvme_info = { .instance_size = sizeof(NvmeCtrl), .class_init = nvme_class_init, .instance_init = nvme_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void nvme_register_types (void )hw/net/e1000e.c +4
-0@@ -708,6 +708,10 @@ static const TypeInfo e1000e_info = { .instance_size = sizeof(E1000EState), .class_init = e1000e_class_init, .instance_init = e1000e_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void e1000e_register_types (void )hw/pci-bridge/pcie_pci_bridge.c +1
-0@@ -180,6 +180,7 @@ static const TypeInfo pcie_pci_bridge_info = { .class_init = pcie_pci_bridge_class_init, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_PCIE_DEVICE }, { }, } };hw/pci-bridge/pcie_root_port.c +4
-0@@ -161,6 +161,10 @@ static const TypeInfo rp_info = { .class_init = rp_class_init, .abstract = true, .class_size = sizeof(PCIERootPortClass), + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void rp_register_types (void )hw/pci-bridge/xio3130_downstream.c +4
-0@@ -195,6 +195,10 @@ static const TypeInfo xio3130_downstream_info = { .name = "xio3130-downstream", .parent = TYPE_PCIE_SLOT, .class_init = xio3130_downstream_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void xio3130_downstream_register_types (void )hw/pci-bridge/xio3130_upstream.c +4
-0@@ -166,6 +166,10 @@ static const TypeInfo xio3130_upstream_info = { .name = "x3130-upstream", .parent = TYPE_PCIE_PORT, .class_init = xio3130_upstream_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void xio3130_upstream_register_types (void )hw/pci-host/xilinx-pcie.c +4
-0@@ -317,6 +317,10 @@ static const TypeInfo xilinx_pcie_root_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(XilinxPCIERoot), .class_init = xilinx_pcie_root_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void xilinx_pcie_register (void )hw/scsi/megasas.c +6
-0@@ -2451,6 +2451,7 @@ typedef struct MegasasInfo {int osts;const VMStateDescription *vmsd;Property *props; +InterfaceInfo *interfaces; } MegasasInfo;static struct MegasasInfo megasas_devices[] = {@@ -2480,6 +2481,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = true, .vmsd = &vmstate_megasas_gen2, .props = megasas_properties_gen2, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, } };@@ -2531,6 +2536,7 @@ static void megasas_register_types(void) type_info.parent =TYPE_MEGASAS_BASE ; type_info.class_data = (void *)info; type_info.class_init = megasas_class_init; + type_info.interfaces = info->interfaces;type_register (&type_info); }
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Re: [Qemu-devel] [PATCH v2 3/5] pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices
In reply to Eduardo HabkostQuoted 158 lines · Eduardo Habkost
Change all devices that set is_express=1 to implement
INTERFACE_PCIE_DEVICE.Cc Keith Busch <[email protected]>Cc Kevin Wolf <[email protected]>Cc Max Reitz <[email protected]>Cc Dmitry Fleytman <[email protected]>Cc Jason Wang <[email protected]>Cc "Michael S. Tsirkin" <[email protected]>Cc Marcel Apfelbaum <[email protected]>Cc Paul Burton <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Hannes Reinecke <[email protected]>Reviewed-by Alistair Francis <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>---
Changes v1 -> v2:
* base-xhci is marked as hybrid, now (in another patch)
* Included pcie-pci-bridge--- hw/block/nvme.c | 4 ++++ hw/net/e1000e.c | 4 ++++ hw/pci-bridge/pcie_pci_bridge.c | 1 + hw/pci-bridge/pcie_root_port.c | 4 ++++ hw/pci-bridge/xio3130_downstream.c | 4 ++++ hw/pci-bridge/xio3130_upstream.c | 4 ++++ hw/pci-host/xilinx-pcie.c | 4 ++++ hw/scsi/megasas.c | 6 ++++++ 8 files changed, 31 insertions(+)hw/block/nvme.c +4
-0@@ -1110,6 +1110,10 @@ static const TypeInfo nvme_info = { .instance_size = sizeof(NvmeCtrl), .class_init = nvme_class_init, .instance_init = nvme_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void nvme_register_types (void )hw/net/e1000e.c +4
-0@@ -708,6 +708,10 @@ static const TypeInfo e1000e_info = { .instance_size = sizeof(E1000EState), .class_init = e1000e_class_init, .instance_init = e1000e_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void e1000e_register_types (void )hw/pci-bridge/pcie_pci_bridge.c +1
-0@@ -180,6 +180,7 @@ static const TypeInfo pcie_pci_bridge_info = { .class_init = pcie_pci_bridge_class_init, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_PCIE_DEVICE }, { }, } };hw/pci-bridge/pcie_root_port.c +4
-0@@ -161,6 +161,10 @@ static const TypeInfo rp_info = { .class_init = rp_class_init, .abstract = true, .class_size = sizeof(PCIERootPortClass), + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void rp_register_types (void )hw/pci-bridge/xio3130_downstream.c +4
-0@@ -195,6 +195,10 @@ static const TypeInfo xio3130_downstream_info = { .name = "xio3130-downstream", .parent = TYPE_PCIE_SLOT, .class_init = xio3130_downstream_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void xio3130_downstream_register_types (void )hw/pci-bridge/xio3130_upstream.c +4
-0@@ -166,6 +166,10 @@ static const TypeInfo xio3130_upstream_info = { .name = "x3130-upstream", .parent = TYPE_PCIE_PORT, .class_init = xio3130_upstream_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void xio3130_upstream_register_types (void )hw/pci-host/xilinx-pcie.c +4
-0@@ -317,6 +317,10 @@ static const TypeInfo xilinx_pcie_root_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(XilinxPCIERoot), .class_init = xilinx_pcie_root_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, };static void xilinx_pcie_register (void )hw/scsi/megasas.c +5
-0@@ -2451,6 +2451,7 @@ typedef struct MegasasInfo {int osts;const VMStateDescription *vmsd;Property *props; +InterfaceInfo *interfaces; } MegasasInfo;static struct MegasasInfo megasas_devices[] = {@@ -2480,6 +2481,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = true, .vmsd = &vmstate_megasas_gen2, .props = megasas_properties_gen2, + .interfaces = (InterfaceInfo []) { + {INTERFACE_PCIE_DEVICE }, + { } + }, } };
hw/scsi/megasas.c static void megasas_register_types(void) · line 2542
Quoted 7 lines
hw/scsi/megasas.c +1
-0@@ -2531,6 +2536,7 @@ static void megasas_register_types(void) type_info.parent =TYPE_MEGASAS_BASE ; type_info.class_data = (void *)info; type_info.class_init = megasas_class_init; + type_info.interfaces = info->interfaces;type_register (&type_info); }
Reviewed-by Marcel Apfelbaum <[email protected]>
Thanks,
Marcel
PATCH v2 4/5 pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
In reply to Eduardo HabkostAdd INTERFACE_CONVENTIONAL_PCI_DEVICE to all direct subtypes of TYPE_PCI_DEVICE, except:
1) The ones that already have INTERFACE_PCIE_DEVICE set:
* base-xhci
* e1000e
* nvme
* pvscsi
* vfio-pci
* virtio-pci
* vmxnet3
2) base-pci-bridge
Not all PCI bridges are Conventional PCI devices, so INTERFACE_CONVENTIONAL_PCI_DEVICE is added only to the subtypes that are actually Conventional PCI:
* dec-21154-p2p-bridge
* i82801b11-bridge
* pbm-bridge
* pci-bridge
The direct subtypes of base-pci-bridge not touched by this patch are:
* xilinx-pcie-root: Already marked as PCIe-only.
* pcie-pci-bridge: Already marked as PCIe-only.
* pcie-port: all non-abstract subtypes of pcie-port are already marked as PCIe-only devices.
3) megasas-base
Not all megasas devices are Conventional PCI devices, so the interface names are added to the subclasses registered by megasas_register_types(), according to information in the megasas_devices[] array.
"megasas-gen2" already implements INTERFACE_PCIE_DEVICE, so add INTERFACE_CONVENTIONAL_PCI_DEVICE only to "megasas".
Acked-by Alberto Garcia <[email protected]>
Acked-by John Snow <[email protected]>
Acked-by Anthony PERARD <[email protected]>
Signed-off-by Eduardo Habkost <[email protected]>
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Note about pcie-pci-bridge on commit message.
* New devices: sungem, sunhme
Cc "Michael S. Tsirkin" <[email protected]>
Cc Igor Mammedov <[email protected]>
Cc Gerd Hoffmann <[email protected]>
Cc Paolo Bonzini <[email protected]>
Cc Richard Henderson <[email protected]>
Cc Eduardo Habkost <[email protected]>
Cc Stefano Stabellini <[email protected]>
Cc Anthony Perard <[email protected]>
Cc John Snow <[email protected]>
Cc Alberto Garcia <[email protected]>
Cc Aurelien Jarno <[email protected]>
Cc Yongbok Kim <[email protected]>
Cc Jiri Slaby <[email protected]>
Cc Alexander Graf <[email protected]>
Cc Marcel Apfelbaum <[email protected]>
Cc Jason Wang <[email protected]>
Cc Jiri Pirko <[email protected]>
Cc "Hervé Poussineau" <[email protected]>
Cc Peter Maydell <[email protected]>
Cc David Gibson <[email protected]>
Cc Hannes Reinecke <[email protected]>
Cc Mark Cave-Ayland <[email protected]>
Cc Artyom Tarasenko <[email protected]>
Cc Alex Williamson <[email protected]>
--- hw/acpi/piix4.c | 1 + hw/audio/ac97.c | 4 ++++ hw/audio/es1370.c | 4 ++++ hw/audio/intel-hda.c | 4 ++++ hw/char/serial-pci.c | 12 ++++++++++++ hw/display/cirrus_vga.c | 4 ++++ hw/display/qxl.c | 4 ++++ hw/display/sm501.c | 4 ++++ hw/display/vga-pci.c | 4 ++++ hw/display/vmware_vga.c | 4 ++++ hw/i2c/smbus_ich9.c | 4 ++++ hw/i386/amd_iommu.c | 4 ++++ hw/i386/kvm/pci-assign.c | 4 ++++ hw/i386/pc_piix.c | 4 ++++ hw/i386/xen/xen_platform.c | 4 ++++ hw/i386/xen/xen_pvdevice.c | 4 ++++ hw/ide/ich.c | 4 ++++ hw/ide/pci.c | 4 ++++ hw/ipack/tpci200.c | 4 ++++ hw/isa/i82378.c | 4 ++++ hw/isa/lpc_ich9.c | 1 + hw/isa/piix4.c | 4 ++++ hw/isa/vt82c686.c | 16 ++++++++++++++++ hw/mips/gt64xxx_pci.c | 4 ++++ hw/misc/edu.c | 5 +++++ hw/misc/ivshmem.c | 4 ++++ hw/misc/macio/macio.c | 4 ++++ hw/misc/pci-testdev.c | 4 ++++ hw/net/e1000.c | 4 ++++ hw/net/eepro100.c | 4 ++++ hw/net/ne2000.c | 4 ++++ hw/net/pcnet-pci.c | 4 ++++ hw/net/rocker/rocker.c | 4 ++++ hw/net/rtl8139.c | 4 ++++ hw/net/sungem.c | 4 ++++ hw/net/sunhme.c | 4 ++++ hw/pci-bridge/dec.c | 8 ++++++++ hw/pci-bridge/i82801b11.c | 4 ++++ hw/pci-bridge/pci_bridge_dev.c | 1 + hw/pci-bridge/pci_expander_bridge.c | 8 ++++++++ hw/pci-host/apb.c | 8 ++++++++ hw/pci-host/bonito.c | 4 ++++ hw/pci-host/gpex.c | 4 ++++ hw/pci-host/grackle.c | 4 ++++ hw/pci-host/piix.c | 8 ++++++++ hw/pci-host/ppce500.c | 4 ++++ hw/pci-host/prep.c | 4 ++++ hw/pci-host/q35.c | 4 ++++ hw/pci-host/uninorth.c | 16 ++++++++++++++++ hw/pci-host/versatile.c | 4 ++++ hw/ppc/ppc4xx_pci.c | 4 ++++ hw/scsi/esp-pci.c | 4 ++++ hw/scsi/lsi53c895a.c | 4 ++++ hw/scsi/megasas.c | 4 ++++ hw/scsi/mptsas.c | 4 ++++ hw/sd/sdhci.c | 4 ++++ hw/sh4/sh_pci.c | 4 ++++ hw/sparc64/sun4u.c | 4 ++++ hw/usb/hcd-ehci-pci.c | 4 ++++ hw/usb/hcd-ohci.c | 4 ++++ hw/usb/hcd-uhci.c | 4 ++++ hw/vfio/pci-quirks.c | 4 ++++ hw/watchdog/wdt_i6300esb.c | 4 ++++ hw/xen/xen_pt.c | 4 ++++ 64 files changed, 296 insertions(+)
hw/acpi/piix4.c +1 -0
@@ -718,6 +718,7 @@ static const TypeInfo piix4_pm_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };
hw/audio/ac97.c +4 -0
@@ -1431,6 +1431,10 @@ static const TypeInfo ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (AC97LinkState), .class_init = ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ac97_register_types (void )
hw/audio/es1370.c +4 -0
@@ -1082,6 +1082,10 @@ static const TypeInfo es1370_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (ES1370State), .class_init = es1370_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void es1370_register_types (void )
hw/audio/intel-hda.c +4 -0
@@ -1263,6 +1263,10 @@ static const TypeInfo intel_hda_info = { .instance_size = sizeof(IntelHDAState), .class_init = intel_hda_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo intel_hda_info_ich6 = {
hw/char/serial-pci.c +12 -0
@@ -250,6 +250,10 @@ static const TypeInfo serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCISerialState), .class_init = serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_2x_serial_pci_info = {
@@ -257,6 +261,10 @@ static const TypeInfo multi_2x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_2x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_4x_serial_pci_info = {
@@ -264,6 +272,10 @@ static const TypeInfo multi_4x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_4x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void serial_pci_register_types (void )
hw/display/cirrus_vga.c +4 -0
@@ -3162,6 +3162,10 @@ static const TypeInfo cirrus_vga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCICirrusVGAState), .class_init = cirrus_vga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void cirrus_vga_register_types (void )
hw/display/qxl.c +4 -0
@@ -2430,6 +2430,10 @@ static const TypeInfo qxl_pci_type_info = { .instance_size = sizeof(PCIQXLDevice), .abstract = true, .class_init = qxl_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void qxl_primary_class_init (ObjectClass *klass,void *data)
hw/display/sm501.c +4 -0
@@ -1843,6 +1843,10 @@ static const TypeInfo sm501_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SM501PCIState), .class_init = sm501_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sm501_register_types (void )
hw/display/vga-pci.c +4 -0
@@ -338,6 +338,10 @@ static const TypeInfo vga_pci_type_info = { .instance_size = sizeof(PCIVGAState), .abstract = true, .class_init = vga_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vga_class_init (ObjectClass *klass,void *data)
hw/display/vmware_vga.c +4 -0
@@ -1350,6 +1350,10 @@ static const TypeInfo vmsvga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(struct pci_vmsvga_state_s), .class_init = vmsvga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vmsvga_register_types (void )
hw/i2c/smbus_ich9.c +4 -0
@@ -119,6 +119,10 @@ static const TypeInfo ich9_smb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(ICH9SMBState), .class_init = ich9_smb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich9_smb_register (void )
hw/i386/amd_iommu.c +4 -0
@@ -1227,6 +1227,10 @@ static const TypeInfo amdviPCI = { .name = "AMDVI-PCI", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(AMDVIPCIState), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void amdvi_iommu_memory_region_class_init (ObjectClass *klass,void *data)
hw/i386/kvm/pci-assign.c +4 -0
@@ -1864,6 +1864,10 @@ static const TypeInfo assign_info = { .instance_size = sizeof(AssignedDevice), .class_init = assign_class_init, .instance_init = assigned_dev_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void assign_register_types (void )
hw/i386/pc_piix.c +4 -0
@@ -1055,6 +1055,10 @@ static TypeInfo isa_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = isa_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pt_graphics_register_types (void )
hw/i386/xen/xen_platform.c +4 -0
@@ -517,6 +517,10 @@ static const TypeInfo xen_platform_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIXenPlatformState), .class_init = xen_platform_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_platform_register_types (void )
hw/i386/xen/xen_pvdevice.c +4 -0
@@ -127,6 +127,10 @@ static const TypeInfo xen_pv_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(XenPVDevice), .class_init = xen_pv_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pv_register_types (void )
hw/ide/ich.c +4 -0
@@ -184,6 +184,10 @@ static const TypeInfo ich_ahci_info = { .instance_size = sizeof(AHCIPCIState), .instance_init = pci_ich9_ahci_init, .class_init = ich_ahci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich_ahci_register_types (void )
hw/ide/pci.c +4 -0
@@ -451,6 +451,10 @@ static const TypeInfo pci_ide_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIIDEState), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_ide_register_types (void )
hw/ipack/tpci200.c +4 -0
@@ -646,6 +646,10 @@ static const TypeInfo tpci200_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(TPCI200State), .class_init = tpci200_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void tpci200_register_types (void )
hw/isa/i82378.c +4 -0
@@ -138,6 +138,10 @@ static const TypeInfo i82378_type_info = { .instance_size = sizeof(I82378State), .instance_init = i82378_init, .class_init = i82378_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i82378_register_types (void )
hw/isa/lpc_ich9.c +1 -0
@@ -823,6 +823,7 @@ static const TypeInfo ich9_lpc_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };
hw/isa/piix4.c +4 -0
@@ -132,6 +132,10 @@ static const TypeInfo piix4_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX4State), .class_init = piix4_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix4_register_types (void )
hw/isa/vt82c686.c +16 -0
@@ -301,6 +301,10 @@ static const TypeInfo via_ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686AC97State), .class_init = via_ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_mc97_realize (PCIDevice *dev,Error **errp)
@@ -341,6 +345,10 @@ static const TypeInfo via_mc97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686MC97State), .class_init = via_mc97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* vt82c686 pm init */
@@ -419,6 +427,10 @@ static const TypeInfo via_pm_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686PMState), .class_init = via_pm_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription vmstate_via = {
@@ -502,6 +514,10 @@ static const TypeInfo via_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT82C686BState), .class_init = via_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_register_types (void )
hw/mips/gt64xxx_pci.c +4 -0
@@ -1232,6 +1232,10 @@ static const TypeInfo gt64120_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = gt64120_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gt64120_class_init (ObjectClass *klass,void *data)
hw/misc/edu.c +5 -0
@@ -408,12 +408,17 @@ static void edu_class_init(ObjectClass *class, void *data)static void pci_edu_register_types (void ) { +static InterfaceInfo interfaces[] = { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };static const TypeInfo edu_info = { .name ="edu" , .parent =TYPE_PCI_DEVICE , .instance_size =sizeof (EduState), .instance_init = edu_instance_init, .class_init = edu_class_init, + .interfaces = interfaces, };type_register_static (&edu_info);
hw/misc/ivshmem.c +4 -0
@@ -1010,6 +1010,10 @@ static const TypeInfo ivshmem_common_info = { .instance_size = sizeof(IVShmemState), .abstract = true, .class_init = ivshmem_common_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription ivshmem_plain_vmsd = {
hw/misc/macio/macio.c +4 -0
@@ -415,6 +415,10 @@ static const TypeInfo macio_type_info = { .instance_init = macio_instance_init, .abstract = true, .class_init = macio_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void macio_register_types (void )
hw/misc/pci-testdev.c +4 -0
@@ -326,6 +326,10 @@ static const TypeInfo pci_testdev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCITestDevState), .class_init = pci_testdev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_testdev_register_types (void )
hw/net/e1000.c +4 -0
@@ -1685,6 +1685,10 @@ static const TypeInfo e1000_base_info = { .instance_init = e1000_instance_init, .class_size = sizeof(E1000BaseClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const E1000Info e1000_devices[] = {
hw/net/eepro100.c +4 -0
@@ -2116,6 +2116,10 @@ static void eepro100_register_types(void) type_info.class_init = eepro100_class_init; type_info.instance_size =sizeof (EEPRO100State); type_info.instance_init = eepro100_instance_init; + type_info.interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };type_register (&type_info); }
hw/net/ne2000.c +4 -0
@@ -786,6 +786,10 @@ static const TypeInfo ne2000_info = { .instance_size = sizeof(PCINE2000State), .class_init = ne2000_class_init, .instance_init = ne2000_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ne2000_register_types (void )
hw/net/pcnet-pci.c +4 -0
@@ -365,6 +365,10 @@ static const TypeInfo pcnet_info = { .instance_size = sizeof(PCIPCNetState), .class_init = pcnet_class_init, .instance_init = pcnet_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_pcnet_register_types (void )
hw/net/rocker/rocker.c +4 -0
@@ -1525,6 +1525,10 @@ static const TypeInfo rocker_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(Rocker), .class_init = rocker_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rocker_register_types (void )
hw/net/rtl8139.c +4 -0
@@ -3442,6 +3442,10 @@ static const TypeInfo rtl8139_info = { .instance_size = sizeof(RTL8139State), .class_init = rtl8139_class_init, .instance_init = rtl8139_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rtl8139_register_types (void )
hw/net/sungem.c +4 -0
@@ -1437,6 +1437,10 @@ static const TypeInfo sungem_info = { .instance_size = sizeof(SunGEMState), .class_init = sungem_class_init, .instance_init = sungem_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sungem_register_types (void )
hw/net/sunhme.c +4 -0
@@ -968,6 +968,10 @@ static const TypeInfo sunhme_info = { .class_init = sunhme_class_init, .instance_size = sizeof(SunHMEState), .instance_init = sunhme_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sunhme_register_types (void )
hw/pci-bridge/dec.c +8 -0
@@ -79,6 +79,10 @@ static const TypeInfo dec_21154_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(PCIBridge), .class_init = dec_21154_pci_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };PCIBus *pci_dec_21154_init (PCIBus *parent_bus,int devfn)
@@ -138,6 +142,10 @@ static const TypeInfo dec_21154_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = dec_21154_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_dec_21154_device_class_init (ObjectClass *klass,void *data)
hw/pci-bridge/i82801b11.c +4 -0
@@ -106,6 +106,10 @@ static const TypeInfo i82801b11_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(I82801b11Bridge), .class_init = i82801b11_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void d2pbr_register (void )
hw/pci-bridge/pci_bridge_dev.c +1 -0
@@ -238,6 +238,7 @@ static const TypeInfo pci_bridge_dev_info = { .instance_finalize = pci_bridge_dev_instance_finalize, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };
hw/pci-bridge/pci_expander_bridge.c +8 -0
@@ -316,6 +316,10 @@ static const TypeInfo pxb_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_pcie_dev_realize (PCIDevice *dev,Error **errp)
@@ -350,6 +354,10 @@ static const TypeInfo pxb_pcie_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_pcie_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_register_types (void )
hw/pci-host/apb.c +8 -0
@@ -836,6 +836,10 @@ static const TypeInfo pbm_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = pbm_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_host_class_init (ObjectClass *klass,void *data)
@@ -883,6 +887,10 @@ static const TypeInfo pbm_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .class_init = pbm_pci_bridge_class_init, .instance_size = sizeof(PBMPCIBridge), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_iommu_memory_region_class_init (ObjectClass *klass,void *data)
hw/pci-host/bonito.c +4 -0
@@ -833,6 +833,10 @@ static const TypeInfo bonito_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIBonitoState), .class_init = bonito_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void bonito_pcihost_class_init (ObjectClass *klass,void *data)
hw/pci-host/gpex.c +4 -0
@@ -166,6 +166,10 @@ static const TypeInfo gpex_root_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(GPEXRootState), .class_init = gpex_root_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gpex_register (void )
hw/pci-host/grackle.c +4 -0
@@ -142,6 +142,10 @@ static const TypeInfo grackle_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = grackle_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_grackle_class_init (ObjectClass *klass,void *data)
hw/pci-host/piix.c +8 -0
@@ -694,6 +694,10 @@ static const TypeInfo piix3_pci_type_info = { .instance_size = sizeof(PIIX3State), .abstract = true, .class_init = pci_piix3_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix3_class_init (ObjectClass *klass,void *data)
@@ -748,6 +752,10 @@ static const TypeInfo i440fx_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCII440FXState), .class_init = i440fx_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* IGD Passthrough Host Bridge. */
hw/pci-host/ppce500.c +4 -0
@@ -516,6 +516,10 @@ static const TypeInfo e500_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PPCE500PCIBridgeState), .class_init = e500_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pcihost_properties[] = {
hw/pci-host/prep.c +4 -0
@@ -372,6 +372,10 @@ static const TypeInfo raven_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(RavenPCIState), .class_init = raven_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property raven_pcihost_properties[] = {
hw/pci-host/q35.c +4 -0
@@ -591,6 +591,10 @@ static const TypeInfo mch_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MCHPCIState), .class_init = mch_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void q35_register (void )
hw/pci-host/uninorth.c +16 -0
@@ -374,6 +374,10 @@ static const TypeInfo unin_main_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_main_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void u3_agp_pci_host_class_init (ObjectClass *klass,void *data)
@@ -398,6 +402,10 @@ static const TypeInfo u3_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = u3_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_agp_pci_host_class_init (ObjectClass *klass,void *data)
@@ -422,6 +430,10 @@ static const TypeInfo unin_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_internal_pci_host_class_init (ObjectClass *klass,void *data)
@@ -446,6 +458,10 @@ static const TypeInfo unin_internal_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_internal_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_unin_main_class_init (ObjectClass *klass,void *data)
hw/pci-host/versatile.c +4 -0
@@ -487,6 +487,10 @@ static const TypeInfo versatile_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = versatile_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pci_vpb_properties[] = {
hw/ppc/ppc4xx_pci.c +4 -0
@@ -359,6 +359,10 @@ static const TypeInfo ppc4xx_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = ppc4xx_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ppc4xx_pcihost_class_init (ObjectClass *klass,void *data)
hw/scsi/esp-pci.c +4 -0
@@ -398,6 +398,10 @@ static const TypeInfo esp_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIESPState), .class_init = esp_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; typedef struct {
hw/scsi/lsi53c895a.c +4 -0
@@ -2244,6 +2244,10 @@ static const TypeInfo lsi_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(LSIState), .class_init = lsi_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void lsi53c810_class_init (ObjectClass *klass,void *data)
hw/scsi/megasas.c +4 -0
@@ -2468,6 +2468,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = false, .vmsd = &vmstate_megasas_gen1, .props = megasas_properties_gen1, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, },{ .name = TYPE_MEGASAS_GEN2, .desc = "LSI MegaRAID SAS 2108",
hw/scsi/mptsas.c +4 -0
@@ -1439,6 +1439,10 @@ static const TypeInfo mptsas_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MPTSASState), .class_init = mptsas1068_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void mptsas_register_types (void )
hw/sd/sdhci.c +4 -0
@@ -1315,6 +1315,10 @@ static const TypeInfo sdhci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SDHCIState), .class_init = sdhci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property sdhci_sysbus_properties[] = {
hw/sh4/sh_pci.c +4 -0
@@ -179,6 +179,10 @@ static const TypeInfo sh_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = sh_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sh_pci_device_class_init (ObjectClass *klass,void *data)
hw/sparc64/sun4u.c +4 -0
@@ -275,6 +275,10 @@ static const TypeInfo ebus_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(EbusState), .class_init = ebus_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };#define TYPE_OPENPROM "openprom"
hw/usb/hcd-ehci-pci.c +4 -0
@@ -170,6 +170,10 @@ static const TypeInfo ehci_pci_type_info = { .instance_finalize = usb_ehci_pci_finalize, .abstract = true, .class_init = ehci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ehci_data_class_init (ObjectClass *klass,void *data)
hw/usb/hcd-ohci.c +4 -0
@@ -2139,6 +2139,10 @@ static const TypeInfo ohci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(OHCIPCIState), .class_init = ohci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property ohci_sysbus_properties[] = {
hw/usb/hcd-uhci.c +4 -0
@@ -1323,6 +1323,10 @@ static const TypeInfo uhci_pci_type_info = { .class_size = sizeof(UHCIPCIDeviceClass), .abstract = true, .class_init = uhci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void uhci_data_class_init (ObjectClass *klass,void *data)
hw/vfio/pci-quirks.c +4 -0
@@ -1197,6 +1197,10 @@ static TypeInfo vfio_pci_igd_lpc_bridge_info = { .name = "vfio-pci-igd-lpc-bridge", .parent = TYPE_PCI_DEVICE, .class_init = vfio_pci_igd_lpc_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vfio_pci_igd_register_types (void )
hw/watchdog/wdt_i6300esb.c +4 -0
@@ -463,6 +463,10 @@ static const TypeInfo i6300esb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(I6300State), .class_init = i6300esb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i6300esb_register_types (void )
hw/xen/xen_pt.c +4 -0
@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pci_passthrough_register_types (void )
Signature · 7 lines
2.13.5 _______________________________________________ Xen-devel mailing list [email protected] https://lists.xen.org/xen-devel
Re: [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
Quoted 39 lines · Eduardo Habkost
Add
INTERFACE_CONVENTIONAL_PCI_DEVICEto all direct subtypes ofTYPE_PCI_DEVICE, except:1) The ones that already have
INTERFACE_PCIE_DEVICEset:* base-xhci
* e1000e
* nvme
* pvscsi
* vfio-pci
* virtio-pci
* vmxnet32) base-pci-bridge
Not all PCI bridges are Conventional PCI devices, so
INTERFACE_CONVENTIONAL_PCI_DEVICEis added only to the subtypes that are actually Conventional PCI:* dec-21154-p2p-bridge
* i82801b11-bridge
* pbm-bridge
* pci-bridgeThe direct subtypes of base-pci-bridge not touched by this patch are:
* xilinx-pcie-root: Already marked as PCIe-only.
* pcie-pci-bridge: Already marked as PCIe-only.
* pcie-port: all non-abstract subtypes of pcie-port are already marked as PCIe-only devices.3) megasas-base
Not all megasas devices are Conventional PCI devices, so the interface names are added to the subclasses registered by
megasas_register_types(), according to information in the megasas_devices[] array.
Quoted 7 lines
"megasas-gen2" already implements
INTERFACE_PCIE_DEVICE, so addINTERFACE_CONVENTIONAL_PCI_DEVICEonly to "megasas".Acked-by Alberto Garcia <[email protected]>Acked-by John Snow <[email protected]>Acked-by Anthony PERARD <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>
Reviewed-by David Gibson <[email protected]>
and for the ppc devices
Acked-by David Gibson <[email protected]>
Quoted 1,193 lines
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Note about pcie-pci-bridge on commit message.
* New devices: sungem, sunhmeCc "Michael S. Tsirkin" <[email protected]>Cc Igor Mammedov <[email protected]>Cc Gerd Hoffmann <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Richard Henderson <[email protected]>Cc Eduardo Habkost <[email protected]>Cc Stefano Stabellini <[email protected]>Cc Anthony Perard <[email protected]>Cc John Snow <[email protected]>Cc Alberto Garcia <[email protected]>Cc Aurelien Jarno <[email protected]>Cc Yongbok Kim <[email protected]>Cc Jiri Slaby <[email protected]>Cc Alexander Graf <[email protected]>Cc Marcel Apfelbaum <[email protected]>Cc Jason Wang <[email protected]>Cc Jiri Pirko <[email protected]>Cc "Hervé Poussineau" <[email protected]>Cc Peter Maydell <[email protected]>Cc David Gibson <[email protected]>Cc Hannes Reinecke <[email protected]>Cc Mark Cave-Ayland <[email protected]>Cc Artyom Tarasenko <[email protected]>Cc Alex Williamson <[email protected]>--- hw/acpi/piix4.c | 1 + hw/audio/ac97.c | 4 ++++ hw/audio/es1370.c | 4 ++++ hw/audio/intel-hda.c | 4 ++++ hw/char/serial-pci.c | 12 ++++++++++++ hw/display/cirrus_vga.c | 4 ++++ hw/display/qxl.c | 4 ++++ hw/display/sm501.c | 4 ++++ hw/display/vga-pci.c | 4 ++++ hw/display/vmware_vga.c | 4 ++++ hw/i2c/smbus_ich9.c | 4 ++++ hw/i386/amd_iommu.c | 4 ++++ hw/i386/kvm/pci-assign.c | 4 ++++ hw/i386/pc_piix.c | 4 ++++ hw/i386/xen/xen_platform.c | 4 ++++ hw/i386/xen/xen_pvdevice.c | 4 ++++ hw/ide/ich.c | 4 ++++ hw/ide/pci.c | 4 ++++ hw/ipack/tpci200.c | 4 ++++ hw/isa/i82378.c | 4 ++++ hw/isa/lpc_ich9.c | 1 + hw/isa/piix4.c | 4 ++++ hw/isa/vt82c686.c | 16 ++++++++++++++++ hw/mips/gt64xxx_pci.c | 4 ++++ hw/misc/edu.c | 5 +++++ hw/misc/ivshmem.c | 4 ++++ hw/misc/macio/macio.c | 4 ++++ hw/misc/pci-testdev.c | 4 ++++ hw/net/e1000.c | 4 ++++ hw/net/eepro100.c | 4 ++++ hw/net/ne2000.c | 4 ++++ hw/net/pcnet-pci.c | 4 ++++ hw/net/rocker/rocker.c | 4 ++++ hw/net/rtl8139.c | 4 ++++ hw/net/sungem.c | 4 ++++ hw/net/sunhme.c | 4 ++++ hw/pci-bridge/dec.c | 8 ++++++++ hw/pci-bridge/i82801b11.c | 4 ++++ hw/pci-bridge/pci_bridge_dev.c | 1 + hw/pci-bridge/pci_expander_bridge.c | 8 ++++++++ hw/pci-host/apb.c | 8 ++++++++ hw/pci-host/bonito.c | 4 ++++ hw/pci-host/gpex.c | 4 ++++ hw/pci-host/grackle.c | 4 ++++ hw/pci-host/piix.c | 8 ++++++++ hw/pci-host/ppce500.c | 4 ++++ hw/pci-host/prep.c | 4 ++++ hw/pci-host/q35.c | 4 ++++ hw/pci-host/uninorth.c | 16 ++++++++++++++++ hw/pci-host/versatile.c | 4 ++++ hw/ppc/ppc4xx_pci.c | 4 ++++ hw/scsi/esp-pci.c | 4 ++++ hw/scsi/lsi53c895a.c | 4 ++++ hw/scsi/megasas.c | 4 ++++ hw/scsi/mptsas.c | 4 ++++ hw/sd/sdhci.c | 4 ++++ hw/sh4/sh_pci.c | 4 ++++ hw/sparc64/sun4u.c | 4 ++++ hw/usb/hcd-ehci-pci.c | 4 ++++ hw/usb/hcd-ohci.c | 4 ++++ hw/usb/hcd-uhci.c | 4 ++++ hw/vfio/pci-quirks.c | 4 ++++ hw/watchdog/wdt_i6300esb.c | 4 ++++ hw/xen/xen_pt.c | 4 ++++ 64 files changed, 296 insertions(+)hw/acpi/piix4.c +1
-0@@ -718,6 +718,7 @@ static const TypeInfo piix4_pm_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/audio/ac97.c +4
-0@@ -1431,6 +1431,10 @@ static const TypeInfo ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (AC97LinkState), .class_init = ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ac97_register_types (void )hw/audio/es1370.c +4
-0@@ -1082,6 +1082,10 @@ static const TypeInfo es1370_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (ES1370State), .class_init = es1370_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void es1370_register_types (void )hw/audio/intel-hda.c +4
-0@@ -1263,6 +1263,10 @@ static const TypeInfo intel_hda_info = { .instance_size = sizeof(IntelHDAState), .class_init = intel_hda_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo intel_hda_info_ich6 = {hw/char/serial-pci.c +12
-0@@ -250,6 +250,10 @@ static const TypeInfo serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCISerialState), .class_init = serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_2x_serial_pci_info = {@@ -257,6 +261,10 @@ static const TypeInfo multi_2x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_2x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_4x_serial_pci_info = {@@ -264,6 +272,10 @@ static const TypeInfo multi_4x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_4x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void serial_pci_register_types (void )hw/display/cirrus_vga.c +4
-0@@ -3162,6 +3162,10 @@ static const TypeInfo cirrus_vga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCICirrusVGAState), .class_init = cirrus_vga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void cirrus_vga_register_types (void )hw/display/qxl.c +4
-0@@ -2430,6 +2430,10 @@ static const TypeInfo qxl_pci_type_info = { .instance_size = sizeof(PCIQXLDevice), .abstract = true, .class_init = qxl_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void qxl_primary_class_init (ObjectClass *klass,void *data)hw/display/sm501.c +4
-0@@ -1843,6 +1843,10 @@ static const TypeInfo sm501_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SM501PCIState), .class_init = sm501_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sm501_register_types (void )hw/display/vga-pci.c +4
-0@@ -338,6 +338,10 @@ static const TypeInfo vga_pci_type_info = { .instance_size = sizeof(PCIVGAState), .abstract = true, .class_init = vga_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vga_class_init (ObjectClass *klass,void *data)hw/display/vmware_vga.c +4
-0@@ -1350,6 +1350,10 @@ static const TypeInfo vmsvga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(struct pci_vmsvga_state_s), .class_init = vmsvga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vmsvga_register_types (void )hw/i2c/smbus_ich9.c +4
-0@@ -119,6 +119,10 @@ static const TypeInfo ich9_smb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(ICH9SMBState), .class_init = ich9_smb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich9_smb_register (void )hw/i386/amd_iommu.c +4
-0@@ -1227,6 +1227,10 @@ static const TypeInfo amdviPCI = { .name = "AMDVI-PCI", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(AMDVIPCIState), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void amdvi_iommu_memory_region_class_init (ObjectClass *klass,void *data)hw/i386/kvm/pci-assign.c +4
-0@@ -1864,6 +1864,10 @@ static const TypeInfo assign_info = { .instance_size = sizeof(AssignedDevice), .class_init = assign_class_init, .instance_init = assigned_dev_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void assign_register_types (void )hw/i386/pc_piix.c +4
-0@@ -1055,6 +1055,10 @@ static TypeInfo isa_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = isa_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pt_graphics_register_types (void )hw/i386/xen/xen_platform.c +4
-0@@ -517,6 +517,10 @@ static const TypeInfo xen_platform_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIXenPlatformState), .class_init = xen_platform_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_platform_register_types (void )hw/i386/xen/xen_pvdevice.c +4
-0@@ -127,6 +127,10 @@ static const TypeInfo xen_pv_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(XenPVDevice), .class_init = xen_pv_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pv_register_types (void )hw/ide/ich.c +4
-0@@ -184,6 +184,10 @@ static const TypeInfo ich_ahci_info = { .instance_size = sizeof(AHCIPCIState), .instance_init = pci_ich9_ahci_init, .class_init = ich_ahci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich_ahci_register_types (void )hw/ide/pci.c +4
-0@@ -451,6 +451,10 @@ static const TypeInfo pci_ide_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIIDEState), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_ide_register_types (void )hw/ipack/tpci200.c +4
-0@@ -646,6 +646,10 @@ static const TypeInfo tpci200_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(TPCI200State), .class_init = tpci200_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void tpci200_register_types (void )hw/isa/i82378.c +4
-0@@ -138,6 +138,10 @@ static const TypeInfo i82378_type_info = { .instance_size = sizeof(I82378State), .instance_init = i82378_init, .class_init = i82378_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i82378_register_types (void )hw/isa/lpc_ich9.c +1
-0@@ -823,6 +823,7 @@ static const TypeInfo ich9_lpc_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/isa/piix4.c +4
-0@@ -132,6 +132,10 @@ static const TypeInfo piix4_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX4State), .class_init = piix4_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix4_register_types (void )hw/isa/vt82c686.c +16
-0@@ -301,6 +301,10 @@ static const TypeInfo via_ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686AC97State), .class_init = via_ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_mc97_realize (PCIDevice *dev,Error **errp)@@ -341,6 +345,10 @@ static const TypeInfo via_mc97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686MC97State), .class_init = via_mc97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* vt82c686 pm init */ @@ -419,6 +427,10 @@ static const TypeInfo via_pm_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686PMState), .class_init = via_pm_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription vmstate_via = {@@ -502,6 +514,10 @@ static const TypeInfo via_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT82C686BState), .class_init = via_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_register_types (void )hw/mips/gt64xxx_pci.c +4
-0@@ -1232,6 +1232,10 @@ static const TypeInfo gt64120_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = gt64120_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gt64120_class_init (ObjectClass *klass,void *data)hw/misc/edu.c +5
-0@@ -408,12 +408,17 @@ static void edu_class_init(ObjectClass *class, void *data)static void pci_edu_register_types (void ) { +static InterfaceInfo interfaces[] = { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };static const TypeInfo edu_info = { .name ="edu" , .parent =TYPE_PCI_DEVICE , .instance_size =sizeof (EduState), .instance_init = edu_instance_init, .class_init = edu_class_init, + .interfaces = interfaces, };type_register_static (&edu_info);hw/misc/ivshmem.c +4
-0@@ -1010,6 +1010,10 @@ static const TypeInfo ivshmem_common_info = { .instance_size = sizeof(IVShmemState), .abstract = true, .class_init = ivshmem_common_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription ivshmem_plain_vmsd = {hw/misc/macio/macio.c +4
-0@@ -415,6 +415,10 @@ static const TypeInfo macio_type_info = { .instance_init = macio_instance_init, .abstract = true, .class_init = macio_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void macio_register_types (void )hw/misc/pci-testdev.c +4
-0@@ -326,6 +326,10 @@ static const TypeInfo pci_testdev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCITestDevState), .class_init = pci_testdev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_testdev_register_types (void )hw/net/e1000.c +4
-0@@ -1685,6 +1685,10 @@ static const TypeInfo e1000_base_info = { .instance_init = e1000_instance_init, .class_size = sizeof(E1000BaseClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const E1000Info e1000_devices[] = {hw/net/eepro100.c +4
-0@@ -2116,6 +2116,10 @@ static void eepro100_register_types(void) type_info.class_init = eepro100_class_init; type_info.instance_size =sizeof (EEPRO100State); type_info.instance_init = eepro100_instance_init; + type_info.interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };type_register (&type_info); }hw/net/ne2000.c +4
-0@@ -786,6 +786,10 @@ static const TypeInfo ne2000_info = { .instance_size = sizeof(PCINE2000State), .class_init = ne2000_class_init, .instance_init = ne2000_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ne2000_register_types (void )hw/net/pcnet-pci.c +4
-0@@ -365,6 +365,10 @@ static const TypeInfo pcnet_info = { .instance_size = sizeof(PCIPCNetState), .class_init = pcnet_class_init, .instance_init = pcnet_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_pcnet_register_types (void )hw/net/rocker/rocker.c +4
-0@@ -1525,6 +1525,10 @@ static const TypeInfo rocker_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(Rocker), .class_init = rocker_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rocker_register_types (void )hw/net/rtl8139.c +4
-0@@ -3442,6 +3442,10 @@ static const TypeInfo rtl8139_info = { .instance_size = sizeof(RTL8139State), .class_init = rtl8139_class_init, .instance_init = rtl8139_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rtl8139_register_types (void )hw/net/sungem.c +4
-0@@ -1437,6 +1437,10 @@ static const TypeInfo sungem_info = { .instance_size = sizeof(SunGEMState), .class_init = sungem_class_init, .instance_init = sungem_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sungem_register_types (void )hw/net/sunhme.c +4
-0@@ -968,6 +968,10 @@ static const TypeInfo sunhme_info = { .class_init = sunhme_class_init, .instance_size = sizeof(SunHMEState), .instance_init = sunhme_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sunhme_register_types (void )hw/pci-bridge/dec.c +8
-0@@ -79,6 +79,10 @@ static const TypeInfo dec_21154_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(PCIBridge), .class_init = dec_21154_pci_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };PCIBus *pci_dec_21154_init (PCIBus *parent_bus,int devfn)@@ -138,6 +142,10 @@ static const TypeInfo dec_21154_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = dec_21154_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_dec_21154_device_class_init (ObjectClass *klass,void *data)hw/pci-bridge/i82801b11.c +4
-0@@ -106,6 +106,10 @@ static const TypeInfo i82801b11_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(I82801b11Bridge), .class_init = i82801b11_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void d2pbr_register (void )hw/pci-bridge/pci_bridge_dev.c +1
-0@@ -238,6 +238,7 @@ static const TypeInfo pci_bridge_dev_info = { .instance_finalize = pci_bridge_dev_instance_finalize, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/pci-bridge/pci_expander_bridge.c +8
-0@@ -316,6 +316,10 @@ static const TypeInfo pxb_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_pcie_dev_realize (PCIDevice *dev,Error **errp)@@ -350,6 +354,10 @@ static const TypeInfo pxb_pcie_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_pcie_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_register_types (void )hw/pci-host/apb.c +8
-0@@ -836,6 +836,10 @@ static const TypeInfo pbm_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = pbm_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_host_class_init (ObjectClass *klass,void *data)@@ -883,6 +887,10 @@ static const TypeInfo pbm_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .class_init = pbm_pci_bridge_class_init, .instance_size = sizeof(PBMPCIBridge), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_iommu_memory_region_class_init (ObjectClass *klass,void *data)hw/pci-host/bonito.c +4
-0@@ -833,6 +833,10 @@ static const TypeInfo bonito_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIBonitoState), .class_init = bonito_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void bonito_pcihost_class_init (ObjectClass *klass,void *data)hw/pci-host/gpex.c +4
-0@@ -166,6 +166,10 @@ static const TypeInfo gpex_root_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(GPEXRootState), .class_init = gpex_root_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gpex_register (void )hw/pci-host/grackle.c +4
-0@@ -142,6 +142,10 @@ static const TypeInfo grackle_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = grackle_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_grackle_class_init (ObjectClass *klass,void *data)hw/pci-host/piix.c +8
-0@@ -694,6 +694,10 @@ static const TypeInfo piix3_pci_type_info = { .instance_size = sizeof(PIIX3State), .abstract = true, .class_init = pci_piix3_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix3_class_init (ObjectClass *klass,void *data)@@ -748,6 +752,10 @@ static const TypeInfo i440fx_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCII440FXState), .class_init = i440fx_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* IGD Passthrough Host Bridge. */ hw/pci-host/ppce500.c +4
-0@@ -516,6 +516,10 @@ static const TypeInfo e500_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PPCE500PCIBridgeState), .class_init = e500_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pcihost_properties[] = {hw/pci-host/prep.c +4
-0@@ -372,6 +372,10 @@ static const TypeInfo raven_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(RavenPCIState), .class_init = raven_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property raven_pcihost_properties[] = {hw/pci-host/q35.c +4
-0@@ -591,6 +591,10 @@ static const TypeInfo mch_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MCHPCIState), .class_init = mch_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void q35_register (void )hw/pci-host/uninorth.c +16
-0@@ -374,6 +374,10 @@ static const TypeInfo unin_main_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_main_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void u3_agp_pci_host_class_init (ObjectClass *klass,void *data)@@ -398,6 +402,10 @@ static const TypeInfo u3_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = u3_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_agp_pci_host_class_init (ObjectClass *klass,void *data)@@ -422,6 +430,10 @@ static const TypeInfo unin_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_internal_pci_host_class_init (ObjectClass *klass,void *data)@@ -446,6 +458,10 @@ static const TypeInfo unin_internal_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_internal_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_unin_main_class_init (ObjectClass *klass,void *data)hw/pci-host/versatile.c +4
-0@@ -487,6 +487,10 @@ static const TypeInfo versatile_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = versatile_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pci_vpb_properties[] = {hw/ppc/ppc4xx_pci.c +4
-0@@ -359,6 +359,10 @@ static const TypeInfo ppc4xx_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = ppc4xx_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ppc4xx_pcihost_class_init (ObjectClass *klass,void *data)hw/scsi/esp-pci.c +4
-0@@ -398,6 +398,10 @@ static const TypeInfo esp_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIESPState), .class_init = esp_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; typedef struct {hw/scsi/lsi53c895a.c +4
-0@@ -2244,6 +2244,10 @@ static const TypeInfo lsi_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(LSIState), .class_init = lsi_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void lsi53c810_class_init (ObjectClass *klass,void *data)hw/scsi/megasas.c +4
-0@@ -2468,6 +2468,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = false, .vmsd = &vmstate_megasas_gen1, .props = megasas_properties_gen1, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, },{ .name = TYPE_MEGASAS_GEN2, .desc = "LSI MegaRAID SAS 2108",hw/scsi/mptsas.c +4
-0@@ -1439,6 +1439,10 @@ static const TypeInfo mptsas_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MPTSASState), .class_init = mptsas1068_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void mptsas_register_types (void )hw/sd/sdhci.c +4
-0@@ -1315,6 +1315,10 @@ static const TypeInfo sdhci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SDHCIState), .class_init = sdhci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property sdhci_sysbus_properties[] = {hw/sh4/sh_pci.c +4
-0@@ -179,6 +179,10 @@ static const TypeInfo sh_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = sh_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sh_pci_device_class_init (ObjectClass *klass,void *data)hw/sparc64/sun4u.c +4
-0@@ -275,6 +275,10 @@ static const TypeInfo ebus_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(EbusState), .class_init = ebus_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };#define TYPE_OPENPROM "openprom"hw/usb/hcd-ehci-pci.c +4
-0@@ -170,6 +170,10 @@ static const TypeInfo ehci_pci_type_info = { .instance_finalize = usb_ehci_pci_finalize, .abstract = true, .class_init = ehci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ehci_data_class_init (ObjectClass *klass,void *data)hw/usb/hcd-ohci.c +4
-0@@ -2139,6 +2139,10 @@ static const TypeInfo ohci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(OHCIPCIState), .class_init = ohci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property ohci_sysbus_properties[] = {hw/usb/hcd-uhci.c +4
-0@@ -1323,6 +1323,10 @@ static const TypeInfo uhci_pci_type_info = { .class_size = sizeof(UHCIPCIDeviceClass), .abstract = true, .class_init = uhci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void uhci_data_class_init (ObjectClass *klass,void *data)hw/vfio/pci-quirks.c +4
-0@@ -1197,6 +1197,10 @@ static TypeInfo vfio_pci_igd_lpc_bridge_info = { .name = "vfio-pci-igd-lpc-bridge", .parent = TYPE_PCI_DEVICE, .class_init = vfio_pci_igd_lpc_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vfio_pci_igd_register_types (void )hw/watchdog/wdt_i6300esb.c +4
-0@@ -463,6 +463,10 @@ static const TypeInfo i6300esb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(I6300State), .class_init = i6300esb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i6300esb_register_types (void )hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pci_passthrough_register_types (void )
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
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Re: [Qemu-arm] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
In reply to Eduardo HabkostQuoted 39 lines · Eduardo Habkost
Add
INTERFACE_CONVENTIONAL_PCI_DEVICEto all direct subtypes ofTYPE_PCI_DEVICE, except:1) The ones that already have
INTERFACE_PCIE_DEVICEset:* base-xhci
* e1000e
* nvme
* pvscsi
* vfio-pci
* virtio-pci
* vmxnet32) base-pci-bridge
Not all PCI bridges are Conventional PCI devices, so
INTERFACE_CONVENTIONAL_PCI_DEVICEis added only to the subtypes that are actually Conventional PCI:* dec-21154-p2p-bridge
* i82801b11-bridge
* pbm-bridge
* pci-bridgeThe direct subtypes of base-pci-bridge not touched by this patch are:
* xilinx-pcie-root: Already marked as PCIe-only.
* pcie-pci-bridge: Already marked as PCIe-only.
* pcie-port: all non-abstract subtypes of pcie-port are already marked as PCIe-only devices.3) megasas-base
Not all megasas devices are Conventional PCI devices, so the interface names are added to the subclasses registered by
megasas_register_types(), according to information in the megasas_devices[] array.
Quoted 7 lines
"megasas-gen2" already implements
INTERFACE_PCIE_DEVICE, so addINTERFACE_CONVENTIONAL_PCI_DEVICEonly to "megasas".Acked-by Alberto Garcia <[email protected]>Acked-by John Snow <[email protected]>Acked-by Anthony PERARD <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>
Reviewed-by David Gibson <[email protected]>
and for the ppc devices
Acked-by David Gibson <[email protected]>
Quoted 1,193 lines
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Note about pcie-pci-bridge on commit message.
* New devices: sungem, sunhmeCc "Michael S. Tsirkin" <[email protected]>Cc Igor Mammedov <[email protected]>Cc Gerd Hoffmann <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Richard Henderson <[email protected]>Cc Eduardo Habkost <[email protected]>Cc Stefano Stabellini <[email protected]>Cc Anthony Perard <[email protected]>Cc John Snow <[email protected]>Cc Alberto Garcia <[email protected]>Cc Aurelien Jarno <[email protected]>Cc Yongbok Kim <[email protected]>Cc Jiri Slaby <[email protected]>Cc Alexander Graf <[email protected]>Cc Marcel Apfelbaum <[email protected]>Cc Jason Wang <[email protected]>Cc Jiri Pirko <[email protected]>Cc "Hervé Poussineau" <[email protected]>Cc Peter Maydell <[email protected]>Cc David Gibson <[email protected]>Cc Hannes Reinecke <[email protected]>Cc Mark Cave-Ayland <[email protected]>Cc Artyom Tarasenko <[email protected]>Cc Alex Williamson <[email protected]>--- hw/acpi/piix4.c | 1 + hw/audio/ac97.c | 4 ++++ hw/audio/es1370.c | 4 ++++ hw/audio/intel-hda.c | 4 ++++ hw/char/serial-pci.c | 12 ++++++++++++ hw/display/cirrus_vga.c | 4 ++++ hw/display/qxl.c | 4 ++++ hw/display/sm501.c | 4 ++++ hw/display/vga-pci.c | 4 ++++ hw/display/vmware_vga.c | 4 ++++ hw/i2c/smbus_ich9.c | 4 ++++ hw/i386/amd_iommu.c | 4 ++++ hw/i386/kvm/pci-assign.c | 4 ++++ hw/i386/pc_piix.c | 4 ++++ hw/i386/xen/xen_platform.c | 4 ++++ hw/i386/xen/xen_pvdevice.c | 4 ++++ hw/ide/ich.c | 4 ++++ hw/ide/pci.c | 4 ++++ hw/ipack/tpci200.c | 4 ++++ hw/isa/i82378.c | 4 ++++ hw/isa/lpc_ich9.c | 1 + hw/isa/piix4.c | 4 ++++ hw/isa/vt82c686.c | 16 ++++++++++++++++ hw/mips/gt64xxx_pci.c | 4 ++++ hw/misc/edu.c | 5 +++++ hw/misc/ivshmem.c | 4 ++++ hw/misc/macio/macio.c | 4 ++++ hw/misc/pci-testdev.c | 4 ++++ hw/net/e1000.c | 4 ++++ hw/net/eepro100.c | 4 ++++ hw/net/ne2000.c | 4 ++++ hw/net/pcnet-pci.c | 4 ++++ hw/net/rocker/rocker.c | 4 ++++ hw/net/rtl8139.c | 4 ++++ hw/net/sungem.c | 4 ++++ hw/net/sunhme.c | 4 ++++ hw/pci-bridge/dec.c | 8 ++++++++ hw/pci-bridge/i82801b11.c | 4 ++++ hw/pci-bridge/pci_bridge_dev.c | 1 + hw/pci-bridge/pci_expander_bridge.c | 8 ++++++++ hw/pci-host/apb.c | 8 ++++++++ hw/pci-host/bonito.c | 4 ++++ hw/pci-host/gpex.c | 4 ++++ hw/pci-host/grackle.c | 4 ++++ hw/pci-host/piix.c | 8 ++++++++ hw/pci-host/ppce500.c | 4 ++++ hw/pci-host/prep.c | 4 ++++ hw/pci-host/q35.c | 4 ++++ hw/pci-host/uninorth.c | 16 ++++++++++++++++ hw/pci-host/versatile.c | 4 ++++ hw/ppc/ppc4xx_pci.c | 4 ++++ hw/scsi/esp-pci.c | 4 ++++ hw/scsi/lsi53c895a.c | 4 ++++ hw/scsi/megasas.c | 4 ++++ hw/scsi/mptsas.c | 4 ++++ hw/sd/sdhci.c | 4 ++++ hw/sh4/sh_pci.c | 4 ++++ hw/sparc64/sun4u.c | 4 ++++ hw/usb/hcd-ehci-pci.c | 4 ++++ hw/usb/hcd-ohci.c | 4 ++++ hw/usb/hcd-uhci.c | 4 ++++ hw/vfio/pci-quirks.c | 4 ++++ hw/watchdog/wdt_i6300esb.c | 4 ++++ hw/xen/xen_pt.c | 4 ++++ 64 files changed, 296 insertions(+)hw/acpi/piix4.c +1
-0@@ -718,6 +718,7 @@ static const TypeInfo piix4_pm_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/audio/ac97.c +4
-0@@ -1431,6 +1431,10 @@ static const TypeInfo ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (AC97LinkState), .class_init = ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ac97_register_types (void )hw/audio/es1370.c +4
-0@@ -1082,6 +1082,10 @@ static const TypeInfo es1370_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (ES1370State), .class_init = es1370_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void es1370_register_types (void )hw/audio/intel-hda.c +4
-0@@ -1263,6 +1263,10 @@ static const TypeInfo intel_hda_info = { .instance_size = sizeof(IntelHDAState), .class_init = intel_hda_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo intel_hda_info_ich6 = {hw/char/serial-pci.c +12
-0@@ -250,6 +250,10 @@ static const TypeInfo serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCISerialState), .class_init = serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_2x_serial_pci_info = {@@ -257,6 +261,10 @@ static const TypeInfo multi_2x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_2x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_4x_serial_pci_info = {@@ -264,6 +272,10 @@ static const TypeInfo multi_4x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_4x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void serial_pci_register_types (void )hw/display/cirrus_vga.c +4
-0@@ -3162,6 +3162,10 @@ static const TypeInfo cirrus_vga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCICirrusVGAState), .class_init = cirrus_vga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void cirrus_vga_register_types (void )hw/display/qxl.c +4
-0@@ -2430,6 +2430,10 @@ static const TypeInfo qxl_pci_type_info = { .instance_size = sizeof(PCIQXLDevice), .abstract = true, .class_init = qxl_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void qxl_primary_class_init (ObjectClass *klass,void *data)hw/display/sm501.c +4
-0@@ -1843,6 +1843,10 @@ static const TypeInfo sm501_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SM501PCIState), .class_init = sm501_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sm501_register_types (void )hw/display/vga-pci.c +4
-0@@ -338,6 +338,10 @@ static const TypeInfo vga_pci_type_info = { .instance_size = sizeof(PCIVGAState), .abstract = true, .class_init = vga_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vga_class_init (ObjectClass *klass,void *data)hw/display/vmware_vga.c +4
-0@@ -1350,6 +1350,10 @@ static const TypeInfo vmsvga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(struct pci_vmsvga_state_s), .class_init = vmsvga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vmsvga_register_types (void )hw/i2c/smbus_ich9.c +4
-0@@ -119,6 +119,10 @@ static const TypeInfo ich9_smb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(ICH9SMBState), .class_init = ich9_smb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich9_smb_register (void )hw/i386/amd_iommu.c +4
-0@@ -1227,6 +1227,10 @@ static const TypeInfo amdviPCI = { .name = "AMDVI-PCI", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(AMDVIPCIState), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void amdvi_iommu_memory_region_class_init (ObjectClass *klass,void *data)hw/i386/kvm/pci-assign.c +4
-0@@ -1864,6 +1864,10 @@ static const TypeInfo assign_info = { .instance_size = sizeof(AssignedDevice), .class_init = assign_class_init, .instance_init = assigned_dev_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void assign_register_types (void )hw/i386/pc_piix.c +4
-0@@ -1055,6 +1055,10 @@ static TypeInfo isa_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = isa_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pt_graphics_register_types (void )hw/i386/xen/xen_platform.c +4
-0@@ -517,6 +517,10 @@ static const TypeInfo xen_platform_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIXenPlatformState), .class_init = xen_platform_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_platform_register_types (void )hw/i386/xen/xen_pvdevice.c +4
-0@@ -127,6 +127,10 @@ static const TypeInfo xen_pv_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(XenPVDevice), .class_init = xen_pv_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pv_register_types (void )hw/ide/ich.c +4
-0@@ -184,6 +184,10 @@ static const TypeInfo ich_ahci_info = { .instance_size = sizeof(AHCIPCIState), .instance_init = pci_ich9_ahci_init, .class_init = ich_ahci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich_ahci_register_types (void )hw/ide/pci.c +4
-0@@ -451,6 +451,10 @@ static const TypeInfo pci_ide_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIIDEState), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_ide_register_types (void )hw/ipack/tpci200.c +4
-0@@ -646,6 +646,10 @@ static const TypeInfo tpci200_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(TPCI200State), .class_init = tpci200_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void tpci200_register_types (void )hw/isa/i82378.c +4
-0@@ -138,6 +138,10 @@ static const TypeInfo i82378_type_info = { .instance_size = sizeof(I82378State), .instance_init = i82378_init, .class_init = i82378_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i82378_register_types (void )hw/isa/lpc_ich9.c +1
-0@@ -823,6 +823,7 @@ static const TypeInfo ich9_lpc_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/isa/piix4.c +4
-0@@ -132,6 +132,10 @@ static const TypeInfo piix4_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX4State), .class_init = piix4_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix4_register_types (void )hw/isa/vt82c686.c +16
-0@@ -301,6 +301,10 @@ static const TypeInfo via_ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686AC97State), .class_init = via_ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_mc97_realize (PCIDevice *dev,Error **errp)@@ -341,6 +345,10 @@ static const TypeInfo via_mc97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686MC97State), .class_init = via_mc97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* vt82c686 pm init */ @@ -419,6 +427,10 @@ static const TypeInfo via_pm_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686PMState), .class_init = via_pm_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription vmstate_via = {@@ -502,6 +514,10 @@ static const TypeInfo via_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT82C686BState), .class_init = via_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_register_types (void )hw/mips/gt64xxx_pci.c +4
-0@@ -1232,6 +1232,10 @@ static const TypeInfo gt64120_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = gt64120_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gt64120_class_init (ObjectClass *klass,void *data)hw/misc/edu.c +5
-0@@ -408,12 +408,17 @@ static void edu_class_init(ObjectClass *class, void *data)static void pci_edu_register_types (void ) { +static InterfaceInfo interfaces[] = { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };static const TypeInfo edu_info = { .name ="edu" , .parent =TYPE_PCI_DEVICE , .instance_size =sizeof (EduState), .instance_init = edu_instance_init, .class_init = edu_class_init, + .interfaces = interfaces, };type_register_static (&edu_info);hw/misc/ivshmem.c +4
-0@@ -1010,6 +1010,10 @@ static const TypeInfo ivshmem_common_info = { .instance_size = sizeof(IVShmemState), .abstract = true, .class_init = ivshmem_common_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription ivshmem_plain_vmsd = {hw/misc/macio/macio.c +4
-0@@ -415,6 +415,10 @@ static const TypeInfo macio_type_info = { .instance_init = macio_instance_init, .abstract = true, .class_init = macio_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void macio_register_types (void )hw/misc/pci-testdev.c +4
-0@@ -326,6 +326,10 @@ static const TypeInfo pci_testdev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCITestDevState), .class_init = pci_testdev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_testdev_register_types (void )hw/net/e1000.c +4
-0@@ -1685,6 +1685,10 @@ static const TypeInfo e1000_base_info = { .instance_init = e1000_instance_init, .class_size = sizeof(E1000BaseClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const E1000Info e1000_devices[] = {hw/net/eepro100.c +4
-0@@ -2116,6 +2116,10 @@ static void eepro100_register_types(void) type_info.class_init = eepro100_class_init; type_info.instance_size =sizeof (EEPRO100State); type_info.instance_init = eepro100_instance_init; + type_info.interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };type_register (&type_info); }hw/net/ne2000.c +4
-0@@ -786,6 +786,10 @@ static const TypeInfo ne2000_info = { .instance_size = sizeof(PCINE2000State), .class_init = ne2000_class_init, .instance_init = ne2000_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ne2000_register_types (void )hw/net/pcnet-pci.c +4
-0@@ -365,6 +365,10 @@ static const TypeInfo pcnet_info = { .instance_size = sizeof(PCIPCNetState), .class_init = pcnet_class_init, .instance_init = pcnet_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_pcnet_register_types (void )hw/net/rocker/rocker.c +4
-0@@ -1525,6 +1525,10 @@ static const TypeInfo rocker_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(Rocker), .class_init = rocker_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rocker_register_types (void )hw/net/rtl8139.c +4
-0@@ -3442,6 +3442,10 @@ static const TypeInfo rtl8139_info = { .instance_size = sizeof(RTL8139State), .class_init = rtl8139_class_init, .instance_init = rtl8139_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rtl8139_register_types (void )hw/net/sungem.c +4
-0@@ -1437,6 +1437,10 @@ static const TypeInfo sungem_info = { .instance_size = sizeof(SunGEMState), .class_init = sungem_class_init, .instance_init = sungem_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sungem_register_types (void )hw/net/sunhme.c +4
-0@@ -968,6 +968,10 @@ static const TypeInfo sunhme_info = { .class_init = sunhme_class_init, .instance_size = sizeof(SunHMEState), .instance_init = sunhme_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sunhme_register_types (void )hw/pci-bridge/dec.c +8
-0@@ -79,6 +79,10 @@ static const TypeInfo dec_21154_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(PCIBridge), .class_init = dec_21154_pci_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };PCIBus *pci_dec_21154_init (PCIBus *parent_bus,int devfn)@@ -138,6 +142,10 @@ static const TypeInfo dec_21154_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = dec_21154_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_dec_21154_device_class_init (ObjectClass *klass,void *data)hw/pci-bridge/i82801b11.c +4
-0@@ -106,6 +106,10 @@ static const TypeInfo i82801b11_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(I82801b11Bridge), .class_init = i82801b11_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void d2pbr_register (void )hw/pci-bridge/pci_bridge_dev.c +1
-0@@ -238,6 +238,7 @@ static const TypeInfo pci_bridge_dev_info = { .instance_finalize = pci_bridge_dev_instance_finalize, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/pci-bridge/pci_expander_bridge.c +8
-0@@ -316,6 +316,10 @@ static const TypeInfo pxb_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_pcie_dev_realize (PCIDevice *dev,Error **errp)@@ -350,6 +354,10 @@ static const TypeInfo pxb_pcie_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_pcie_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_register_types (void )hw/pci-host/apb.c +8
-0@@ -836,6 +836,10 @@ static const TypeInfo pbm_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = pbm_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_host_class_init (ObjectClass *klass,void *data)@@ -883,6 +887,10 @@ static const TypeInfo pbm_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .class_init = pbm_pci_bridge_class_init, .instance_size = sizeof(PBMPCIBridge), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_iommu_memory_region_class_init (ObjectClass *klass,void *data)hw/pci-host/bonito.c +4
-0@@ -833,6 +833,10 @@ static const TypeInfo bonito_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIBonitoState), .class_init = bonito_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void bonito_pcihost_class_init (ObjectClass *klass,void *data)hw/pci-host/gpex.c +4
-0@@ -166,6 +166,10 @@ static const TypeInfo gpex_root_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(GPEXRootState), .class_init = gpex_root_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gpex_register (void )hw/pci-host/grackle.c +4
-0@@ -142,6 +142,10 @@ static const TypeInfo grackle_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = grackle_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_grackle_class_init (ObjectClass *klass,void *data)hw/pci-host/piix.c +8
-0@@ -694,6 +694,10 @@ static const TypeInfo piix3_pci_type_info = { .instance_size = sizeof(PIIX3State), .abstract = true, .class_init = pci_piix3_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix3_class_init (ObjectClass *klass,void *data)@@ -748,6 +752,10 @@ static const TypeInfo i440fx_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCII440FXState), .class_init = i440fx_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* IGD Passthrough Host Bridge. */ hw/pci-host/ppce500.c +4
-0@@ -516,6 +516,10 @@ static const TypeInfo e500_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PPCE500PCIBridgeState), .class_init = e500_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pcihost_properties[] = {hw/pci-host/prep.c +4
-0@@ -372,6 +372,10 @@ static const TypeInfo raven_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(RavenPCIState), .class_init = raven_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property raven_pcihost_properties[] = {hw/pci-host/q35.c +4
-0@@ -591,6 +591,10 @@ static const TypeInfo mch_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MCHPCIState), .class_init = mch_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void q35_register (void )hw/pci-host/uninorth.c +16
-0@@ -374,6 +374,10 @@ static const TypeInfo unin_main_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_main_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void u3_agp_pci_host_class_init (ObjectClass *klass,void *data)@@ -398,6 +402,10 @@ static const TypeInfo u3_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = u3_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_agp_pci_host_class_init (ObjectClass *klass,void *data)@@ -422,6 +430,10 @@ static const TypeInfo unin_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_internal_pci_host_class_init (ObjectClass *klass,void *data)@@ -446,6 +458,10 @@ static const TypeInfo unin_internal_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_internal_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_unin_main_class_init (ObjectClass *klass,void *data)hw/pci-host/versatile.c +4
-0@@ -487,6 +487,10 @@ static const TypeInfo versatile_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = versatile_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pci_vpb_properties[] = {hw/ppc/ppc4xx_pci.c +4
-0@@ -359,6 +359,10 @@ static const TypeInfo ppc4xx_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = ppc4xx_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ppc4xx_pcihost_class_init (ObjectClass *klass,void *data)hw/scsi/esp-pci.c +4
-0@@ -398,6 +398,10 @@ static const TypeInfo esp_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIESPState), .class_init = esp_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; typedef struct {hw/scsi/lsi53c895a.c +4
-0@@ -2244,6 +2244,10 @@ static const TypeInfo lsi_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(LSIState), .class_init = lsi_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void lsi53c810_class_init (ObjectClass *klass,void *data)hw/scsi/megasas.c +4
-0@@ -2468,6 +2468,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = false, .vmsd = &vmstate_megasas_gen1, .props = megasas_properties_gen1, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, },{ .name = TYPE_MEGASAS_GEN2, .desc = "LSI MegaRAID SAS 2108",hw/scsi/mptsas.c +4
-0@@ -1439,6 +1439,10 @@ static const TypeInfo mptsas_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MPTSASState), .class_init = mptsas1068_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void mptsas_register_types (void )hw/sd/sdhci.c +4
-0@@ -1315,6 +1315,10 @@ static const TypeInfo sdhci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SDHCIState), .class_init = sdhci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property sdhci_sysbus_properties[] = {hw/sh4/sh_pci.c +4
-0@@ -179,6 +179,10 @@ static const TypeInfo sh_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = sh_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sh_pci_device_class_init (ObjectClass *klass,void *data)hw/sparc64/sun4u.c +4
-0@@ -275,6 +275,10 @@ static const TypeInfo ebus_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(EbusState), .class_init = ebus_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };#define TYPE_OPENPROM "openprom"hw/usb/hcd-ehci-pci.c +4
-0@@ -170,6 +170,10 @@ static const TypeInfo ehci_pci_type_info = { .instance_finalize = usb_ehci_pci_finalize, .abstract = true, .class_init = ehci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ehci_data_class_init (ObjectClass *klass,void *data)hw/usb/hcd-ohci.c +4
-0@@ -2139,6 +2139,10 @@ static const TypeInfo ohci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(OHCIPCIState), .class_init = ohci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property ohci_sysbus_properties[] = {hw/usb/hcd-uhci.c +4
-0@@ -1323,6 +1323,10 @@ static const TypeInfo uhci_pci_type_info = { .class_size = sizeof(UHCIPCIDeviceClass), .abstract = true, .class_init = uhci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void uhci_data_class_init (ObjectClass *klass,void *data)hw/vfio/pci-quirks.c +4
-0@@ -1197,6 +1197,10 @@ static TypeInfo vfio_pci_igd_lpc_bridge_info = { .name = "vfio-pci-igd-lpc-bridge", .parent = TYPE_PCI_DEVICE, .class_init = vfio_pci_igd_lpc_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vfio_pci_igd_register_types (void )hw/watchdog/wdt_i6300esb.c +4
-0@@ -463,6 +463,10 @@ static const TypeInfo i6300esb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(I6300State), .class_init = i6300esb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i6300esb_register_types (void )hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pci_passthrough_register_types (void )
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Re: [Qemu-devel] [Xen-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
In reply to Eduardo Habkosthw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };
Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
Jan
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[email protected]
https://lists.xen.org/xen-devel
Re: [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
Quoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Signature · 6 lines
Eduardo _______________________________________________ Xen-devel mailing list [email protected] https://lists.xen.org/xen-devel
Re: [Qemu-arm] [Xen-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
In reply to Jan BeulichQuoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Signature · 1 line
Eduardo
xen-pci-passthrough PCI Express support? (Re: [Qemu-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices)
Quoted 19 lines · Eduardo Habkost
Quoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
Quoted 7 lines
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Can anybody confirm if PCI Express devices are really supported by xen-pci-passthrough?
I suggest we add only INTERFACE_CONVENTIONAL_PCI_DEVICE to the class info until we confirm that.
(In other words, apply this patch as-is, and add INTERFACE_PCIE_DEVICE later as a follow-up patch if appropriate.)
Signature · 6 lines
Eduardo _______________________________________________ Xen-devel mailing list [email protected] https://lists.xen.org/xen-devel
[Qemu-arm] xen-pci-passthrough PCI Express support? (Re: [Qemu-devel] [Xen-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices)
In reply to Eduardo HabkostQuoted 19 lines · Eduardo Habkost
Quoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
Quoted 7 lines
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Can anybody confirm if PCI Express devices are really supported by xen-pci-passthrough?
I suggest we add only INTERFACE_CONVENTIONAL_PCI_DEVICE to the class info until we confirm that.
(In other words, apply this patch as-is, and add INTERFACE_PCIE_DEVICE later as a follow-up patch if appropriate.)
Signature · 1 line
Eduardo
Re: xen-pci-passthrough PCI Express support? (Re: [Qemu-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices)
Quoted 28 lines · Eduardo Habkost
Quoted 19 lines · Eduardo Habkost
Quoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
Quoted 7 lines
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Quoted 8 lines
Can anybody confirm if PCI Express devices are really supported by xen-pci-passthrough?
I suggest we add only
INTERFACE_CONVENTIONAL_PCI_DEVICEto the class info until we confirm that.(In other words, apply this patch as-is, and add
INTERFACE_PCIE_DEVICElater as a follow-up patch if appropriate.)
Yes, xen-pci-passthrough can expose PCI Express devices to the guest. I don't think the old xen-pci-passthrough code does anything special to mark it as such internally in QEMU, but it can deal with the PCI Express Capabilities and expose/emulate them for the guest's benefit.
_______________________________________________
Xen-devel mailing list
[email protected]
https://lists.xen.org/xen-devel
Re: [Qemu-devel] xen-pci-passthrough PCI Express support? (Re: [Xen-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices)
In reply to Eduardo HabkostQuoted 28 lines · Eduardo Habkost
Quoted 19 lines · Eduardo Habkost
Quoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
Quoted 7 lines
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Quoted 8 lines
Can anybody confirm if PCI Express devices are really supported by xen-pci-passthrough?
I suggest we add only
INTERFACE_CONVENTIONAL_PCI_DEVICEto the class info until we confirm that.(In other words, apply this patch as-is, and add
INTERFACE_PCIE_DEVICElater as a follow-up patch if appropriate.)
Yes, xen-pci-passthrough can expose PCI Express devices to the guest. I don't think the old xen-pci-passthrough code does anything special to mark it as such internally in QEMU, but it can deal with the PCI Express Capabilities and expose/emulate them for the guest's benefit.
xen-pci-passthrough PCI Express support? (Re: [Qemu-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices)
In reply to Eduardo HabkostQuoted 26 lines
Quoted 1 line
Quoted 1 line · On 03.10.17 at 02:12, <[email protected]> wrote:
Quoted 24 lines · Eduardo Habkost
Quoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
Quoted 5 lines
Quoted 2 lines
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Can anybody confirm if PCI Express devices are really supported by xen-pci-passthrough?
I think I've clearly said they're supported, with some limitations.
Jan
_______________________________________________
Xen-devel mailing list
[email protected]
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[Qemu-arm] xen-pci-passthrough PCI Express support? (Re: [Qemu-devel] [Xen-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices)
In reply to Eduardo HabkostQuoted 26 lines
Quoted 1 line
Quoted 1 line · On 03.10.17 at 02:12, <[email protected]> wrote:
Quoted 24 lines · Eduardo Habkost
Quoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
Quoted 5 lines
Quoted 2 lines
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Can anybody confirm if PCI Express devices are really supported by xen-pci-passthrough?
I think I've clearly said they're supported, with some limitations.
Jan
Re: xen-pci-passthrough PCI Express support? (Re: [Qemu-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices)
Quoted 26 lines · Jan Beulich
Quoted 26 lines
Quoted 1 line
Quoted 1 line · On 03.10.17 at 02:12, <[email protected]> wrote:
Quoted 24 lines · Eduardo Habkost
Quoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
Quoted 7 lines
Quoted 5 lines
Quoted 2 lines
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Can anybody confirm if PCI Express devices are really supported by xen-pci-passthrough?
I think I've clearly said they're supported, with some limitations.
Sorry, thanks. I thought the possible missing PCIe functionality could mean the device couldn't appear as PCI Express to the guest.
I will submit a follow-up patch adding INTERFACE_PCIE_DEVICE to xen-pci-passthrough.
Signature · 6 lines
Eduardo _______________________________________________ Xen-devel mailing list [email protected] https://lists.xen.org/xen-devel
Re: [Qemu-arm] xen-pci-passthrough PCI Express support? (Re: [Qemu-devel] [Xen-devel] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices)
In reply to Jan BeulichQuoted 26 lines · Jan Beulich
Quoted 26 lines
Quoted 1 line
Quoted 1 line · On 03.10.17 at 02:12, <[email protected]> wrote:
Quoted 24 lines · Eduardo Habkost
Quoted 17 lines · Jan Beulich
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 971
Quoted 12 lines
Quoted 1 line
Quoted 1 line · On 27.09.17 at 21:56, <[email protected]> wrote:
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };Passed through devices can be both PCI and PCIe, so following the description of the patch I don't think these can be statically given either property. Granted quite a bit of PCIe specific functionality may be missing in the Xen code ...
This is just static data about what the device type supports, not about what a given device instance really is. Deciding if the device is PCIe or Conventional at runtime is out of the scope of this series.
Quoted 7 lines
Quoted 5 lines
Quoted 2 lines
That said, if passed through PCI Express devices are really supported, it looks like this should be marked as hybrid.
Can anybody confirm if PCI Express devices are really supported by xen-pci-passthrough?
I think I've clearly said they're supported, with some limitations.
Sorry, thanks. I thought the possible missing PCIe functionality could mean the device couldn't appear as PCI Express to the guest.
I will submit a follow-up patch adding INTERFACE_PCIE_DEVICE to xen-pci-passthrough.
Signature · 1 line
Eduardo
PATCH 1/1 xen/pt: Mark TYPE_XEN_PT_DEVICE as hybrid
xen-pt doesn't set the is_express field, but is supposed to be able to handle PCI Express devices too. Mark it as hybrid.
Suggested-by Jan Beulich <[email protected]>
Signed-off-by Eduardo Habkost <[email protected]>
--- hw/xen/xen_pt.c | 1 + 1 file changed, 1 insertion(+)
hw/xen/xen_pt.c +1 -0
@@ -966,6 +966,7 @@ static const TypeInfo xen_pci_passthrough_info = { .class_init = xen_pci_passthrough_class_init, .interfaces = (InterfaceInfo []) { {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + {INTERFACE_PCIE_DEVICE }, { }, }, };
Signature · 7 lines
2.13.6 _______________________________________________ Xen-devel mailing list [email protected] https://lists.xen.org/xen-devel
PATCH 1/1 xen/pt: Mark TYPE_XEN_PT_DEVICE as hybrid
In reply to Eduardo Habkostxen-pt doesn't set the is_express field, but is supposed to be able to handle PCI Express devices too. Mark it as hybrid.
Suggested-by Jan Beulich <[email protected]>
Signed-off-by Eduardo Habkost <[email protected]>
--- hw/xen/xen_pt.c | 1 + 1 file changed, 1 insertion(+)
hw/xen/xen_pt.c +1 -0
@@ -966,6 +966,7 @@ static const TypeInfo xen_pci_passthrough_info = { .class_init = xen_pci_passthrough_class_init, .interfaces = (InterfaceInfo []) { {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + {INTERFACE_PCIE_DEVICE }, { }, }, };
Signature · 1 line
2.13.6
Re: [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
In reply to Eduardo HabkostQuoted 1,230 lines · Eduardo Habkost
Add
INTERFACE_CONVENTIONAL_PCI_DEVICEto all direct subtypes ofTYPE_PCI_DEVICE, except:1) The ones that already have
INTERFACE_PCIE_DEVICEset:* base-xhci
* e1000e
* nvme
* pvscsi
* vfio-pci
* virtio-pci
* vmxnet32) base-pci-bridge
Not all PCI bridges are Conventional PCI devices, so
INTERFACE_CONVENTIONAL_PCI_DEVICEis added only to the subtypes that are actually Conventional PCI:* dec-21154-p2p-bridge
* i82801b11-bridge
* pbm-bridge
* pci-bridgeThe direct subtypes of base-pci-bridge not touched by this patch are:
* xilinx-pcie-root: Already marked as PCIe-only.
* pcie-pci-bridge: Already marked as PCIe-only.
* pcie-port: all non-abstract subtypes of pcie-port are already marked as PCIe-only devices.3) megasas-base
Not all megasas devices are Conventional PCI devices, so the interface names are added to the subclasses registered by
megasas_register_types(), according to information in the megasas_devices[] array."megasas-gen2" already implements
INTERFACE_PCIE_DEVICE, so addINTERFACE_CONVENTIONAL_PCI_DEVICEonly to "megasas".Acked-by Alberto Garcia <[email protected]>Acked-by John Snow <[email protected]>Acked-by Anthony PERARD <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Note about pcie-pci-bridge on commit message.
* New devices: sungem, sunhmeCc "Michael S. Tsirkin" <[email protected]>Cc Igor Mammedov <[email protected]>Cc Gerd Hoffmann <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Richard Henderson <[email protected]>Cc Eduardo Habkost <[email protected]>Cc Stefano Stabellini <[email protected]>Cc Anthony Perard <[email protected]>Cc John Snow <[email protected]>Cc Alberto Garcia <[email protected]>Cc Aurelien Jarno <[email protected]>Cc Yongbok Kim <[email protected]>Cc Jiri Slaby <[email protected]>Cc Alexander Graf <[email protected]>Cc Marcel Apfelbaum <[email protected]>Cc Jason Wang <[email protected]>Cc Jiri Pirko <[email protected]>Cc "Hervé Poussineau" <[email protected]>Cc Peter Maydell <[email protected]>Cc David Gibson <[email protected]>Cc Hannes Reinecke <[email protected]>Cc Mark Cave-Ayland <[email protected]>Cc Artyom Tarasenko <[email protected]>Cc Alex Williamson <[email protected]>--- hw/acpi/piix4.c | 1 + hw/audio/ac97.c | 4 ++++ hw/audio/es1370.c | 4 ++++ hw/audio/intel-hda.c | 4 ++++ hw/char/serial-pci.c | 12 ++++++++++++ hw/display/cirrus_vga.c | 4 ++++ hw/display/qxl.c | 4 ++++ hw/display/sm501.c | 4 ++++ hw/display/vga-pci.c | 4 ++++ hw/display/vmware_vga.c | 4 ++++ hw/i2c/smbus_ich9.c | 4 ++++ hw/i386/amd_iommu.c | 4 ++++ hw/i386/kvm/pci-assign.c | 4 ++++ hw/i386/pc_piix.c | 4 ++++ hw/i386/xen/xen_platform.c | 4 ++++ hw/i386/xen/xen_pvdevice.c | 4 ++++ hw/ide/ich.c | 4 ++++ hw/ide/pci.c | 4 ++++ hw/ipack/tpci200.c | 4 ++++ hw/isa/i82378.c | 4 ++++ hw/isa/lpc_ich9.c | 1 + hw/isa/piix4.c | 4 ++++ hw/isa/vt82c686.c | 16 ++++++++++++++++ hw/mips/gt64xxx_pci.c | 4 ++++ hw/misc/edu.c | 5 +++++ hw/misc/ivshmem.c | 4 ++++ hw/misc/macio/macio.c | 4 ++++ hw/misc/pci-testdev.c | 4 ++++ hw/net/e1000.c | 4 ++++ hw/net/eepro100.c | 4 ++++ hw/net/ne2000.c | 4 ++++ hw/net/pcnet-pci.c | 4 ++++ hw/net/rocker/rocker.c | 4 ++++ hw/net/rtl8139.c | 4 ++++ hw/net/sungem.c | 4 ++++ hw/net/sunhme.c | 4 ++++ hw/pci-bridge/dec.c | 8 ++++++++ hw/pci-bridge/i82801b11.c | 4 ++++ hw/pci-bridge/pci_bridge_dev.c | 1 + hw/pci-bridge/pci_expander_bridge.c | 8 ++++++++ hw/pci-host/apb.c | 8 ++++++++ hw/pci-host/bonito.c | 4 ++++ hw/pci-host/gpex.c | 4 ++++ hw/pci-host/grackle.c | 4 ++++ hw/pci-host/piix.c | 8 ++++++++ hw/pci-host/ppce500.c | 4 ++++ hw/pci-host/prep.c | 4 ++++ hw/pci-host/q35.c | 4 ++++ hw/pci-host/uninorth.c | 16 ++++++++++++++++ hw/pci-host/versatile.c | 4 ++++ hw/ppc/ppc4xx_pci.c | 4 ++++ hw/scsi/esp-pci.c | 4 ++++ hw/scsi/lsi53c895a.c | 4 ++++ hw/scsi/megasas.c | 4 ++++ hw/scsi/mptsas.c | 4 ++++ hw/sd/sdhci.c | 4 ++++ hw/sh4/sh_pci.c | 4 ++++ hw/sparc64/sun4u.c | 4 ++++ hw/usb/hcd-ehci-pci.c | 4 ++++ hw/usb/hcd-ohci.c | 4 ++++ hw/usb/hcd-uhci.c | 4 ++++ hw/vfio/pci-quirks.c | 4 ++++ hw/watchdog/wdt_i6300esb.c | 4 ++++ hw/xen/xen_pt.c | 4 ++++ 64 files changed, 296 insertions(+)hw/acpi/piix4.c +1
-0@@ -718,6 +718,7 @@ static const TypeInfo piix4_pm_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/audio/ac97.c +4
-0@@ -1431,6 +1431,10 @@ static const TypeInfo ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (AC97LinkState), .class_init = ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ac97_register_types (void )hw/audio/es1370.c +4
-0@@ -1082,6 +1082,10 @@ static const TypeInfo es1370_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (ES1370State), .class_init = es1370_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void es1370_register_types (void )hw/audio/intel-hda.c +4
-0@@ -1263,6 +1263,10 @@ static const TypeInfo intel_hda_info = { .instance_size = sizeof(IntelHDAState), .class_init = intel_hda_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo intel_hda_info_ich6 = {hw/char/serial-pci.c +12
-0@@ -250,6 +250,10 @@ static const TypeInfo serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCISerialState), .class_init = serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_2x_serial_pci_info = {@@ -257,6 +261,10 @@ static const TypeInfo multi_2x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_2x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_4x_serial_pci_info = {@@ -264,6 +272,10 @@ static const TypeInfo multi_4x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_4x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void serial_pci_register_types (void )hw/display/cirrus_vga.c +4
-0@@ -3162,6 +3162,10 @@ static const TypeInfo cirrus_vga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCICirrusVGAState), .class_init = cirrus_vga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void cirrus_vga_register_types (void )hw/display/qxl.c +4
-0@@ -2430,6 +2430,10 @@ static const TypeInfo qxl_pci_type_info = { .instance_size = sizeof(PCIQXLDevice), .abstract = true, .class_init = qxl_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void qxl_primary_class_init (ObjectClass *klass,void *data)hw/display/sm501.c +4
-0@@ -1843,6 +1843,10 @@ static const TypeInfo sm501_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SM501PCIState), .class_init = sm501_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sm501_register_types (void )hw/display/vga-pci.c +4
-0@@ -338,6 +338,10 @@ static const TypeInfo vga_pci_type_info = { .instance_size = sizeof(PCIVGAState), .abstract = true, .class_init = vga_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vga_class_init (ObjectClass *klass,void *data)hw/display/vmware_vga.c +4
-0@@ -1350,6 +1350,10 @@ static const TypeInfo vmsvga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(struct pci_vmsvga_state_s), .class_init = vmsvga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vmsvga_register_types (void )hw/i2c/smbus_ich9.c +4
-0@@ -119,6 +119,10 @@ static const TypeInfo ich9_smb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(ICH9SMBState), .class_init = ich9_smb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich9_smb_register (void )hw/i386/amd_iommu.c +4
-0@@ -1227,6 +1227,10 @@ static const TypeInfo amdviPCI = { .name = "AMDVI-PCI", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(AMDVIPCIState), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void amdvi_iommu_memory_region_class_init (ObjectClass *klass,void *data)hw/i386/kvm/pci-assign.c +4
-0@@ -1864,6 +1864,10 @@ static const TypeInfo assign_info = { .instance_size = sizeof(AssignedDevice), .class_init = assign_class_init, .instance_init = assigned_dev_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void assign_register_types (void )hw/i386/pc_piix.c +4
-0@@ -1055,6 +1055,10 @@ static TypeInfo isa_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = isa_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pt_graphics_register_types (void )hw/i386/xen/xen_platform.c +4
-0@@ -517,6 +517,10 @@ static const TypeInfo xen_platform_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIXenPlatformState), .class_init = xen_platform_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_platform_register_types (void )hw/i386/xen/xen_pvdevice.c +4
-0@@ -127,6 +127,10 @@ static const TypeInfo xen_pv_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(XenPVDevice), .class_init = xen_pv_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pv_register_types (void )hw/ide/ich.c +4
-0@@ -184,6 +184,10 @@ static const TypeInfo ich_ahci_info = { .instance_size = sizeof(AHCIPCIState), .instance_init = pci_ich9_ahci_init, .class_init = ich_ahci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich_ahci_register_types (void )hw/ide/pci.c +4
-0@@ -451,6 +451,10 @@ static const TypeInfo pci_ide_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIIDEState), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_ide_register_types (void )hw/ipack/tpci200.c +4
-0@@ -646,6 +646,10 @@ static const TypeInfo tpci200_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(TPCI200State), .class_init = tpci200_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void tpci200_register_types (void )hw/isa/i82378.c +4
-0@@ -138,6 +138,10 @@ static const TypeInfo i82378_type_info = { .instance_size = sizeof(I82378State), .instance_init = i82378_init, .class_init = i82378_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i82378_register_types (void )hw/isa/lpc_ich9.c +1
-0@@ -823,6 +823,7 @@ static const TypeInfo ich9_lpc_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/isa/piix4.c +4
-0@@ -132,6 +132,10 @@ static const TypeInfo piix4_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX4State), .class_init = piix4_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix4_register_types (void )hw/isa/vt82c686.c +16
-0@@ -301,6 +301,10 @@ static const TypeInfo via_ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686AC97State), .class_init = via_ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_mc97_realize (PCIDevice *dev,Error **errp)@@ -341,6 +345,10 @@ static const TypeInfo via_mc97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686MC97State), .class_init = via_mc97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* vt82c686 pm init */ @@ -419,6 +427,10 @@ static const TypeInfo via_pm_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686PMState), .class_init = via_pm_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription vmstate_via = {@@ -502,6 +514,10 @@ static const TypeInfo via_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT82C686BState), .class_init = via_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_register_types (void )hw/mips/gt64xxx_pci.c +4
-0@@ -1232,6 +1232,10 @@ static const TypeInfo gt64120_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = gt64120_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gt64120_class_init (ObjectClass *klass,void *data)hw/misc/edu.c +5
-0@@ -408,12 +408,17 @@ static void edu_class_init(ObjectClass *class, void *data)static void pci_edu_register_types (void ) { +static InterfaceInfo interfaces[] = { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };static const TypeInfo edu_info = { .name ="edu" , .parent =TYPE_PCI_DEVICE , .instance_size =sizeof (EduState), .instance_init = edu_instance_init, .class_init = edu_class_init, + .interfaces = interfaces, };type_register_static (&edu_info);hw/misc/ivshmem.c +4
-0@@ -1010,6 +1010,10 @@ static const TypeInfo ivshmem_common_info = { .instance_size = sizeof(IVShmemState), .abstract = true, .class_init = ivshmem_common_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription ivshmem_plain_vmsd = {hw/misc/macio/macio.c +4
-0@@ -415,6 +415,10 @@ static const TypeInfo macio_type_info = { .instance_init = macio_instance_init, .abstract = true, .class_init = macio_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void macio_register_types (void )hw/misc/pci-testdev.c +4
-0@@ -326,6 +326,10 @@ static const TypeInfo pci_testdev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCITestDevState), .class_init = pci_testdev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_testdev_register_types (void )hw/net/e1000.c +4
-0@@ -1685,6 +1685,10 @@ static const TypeInfo e1000_base_info = { .instance_init = e1000_instance_init, .class_size = sizeof(E1000BaseClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const E1000Info e1000_devices[] = {hw/net/eepro100.c +4
-0@@ -2116,6 +2116,10 @@ static void eepro100_register_types(void) type_info.class_init = eepro100_class_init; type_info.instance_size =sizeof (EEPRO100State); type_info.instance_init = eepro100_instance_init; + type_info.interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };type_register (&type_info); }hw/net/ne2000.c +4
-0@@ -786,6 +786,10 @@ static const TypeInfo ne2000_info = { .instance_size = sizeof(PCINE2000State), .class_init = ne2000_class_init, .instance_init = ne2000_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ne2000_register_types (void )hw/net/pcnet-pci.c +4
-0@@ -365,6 +365,10 @@ static const TypeInfo pcnet_info = { .instance_size = sizeof(PCIPCNetState), .class_init = pcnet_class_init, .instance_init = pcnet_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_pcnet_register_types (void )hw/net/rocker/rocker.c +4
-0@@ -1525,6 +1525,10 @@ static const TypeInfo rocker_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(Rocker), .class_init = rocker_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rocker_register_types (void )hw/net/rtl8139.c +4
-0@@ -3442,6 +3442,10 @@ static const TypeInfo rtl8139_info = { .instance_size = sizeof(RTL8139State), .class_init = rtl8139_class_init, .instance_init = rtl8139_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rtl8139_register_types (void )hw/net/sungem.c +4
-0@@ -1437,6 +1437,10 @@ static const TypeInfo sungem_info = { .instance_size = sizeof(SunGEMState), .class_init = sungem_class_init, .instance_init = sungem_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sungem_register_types (void )hw/net/sunhme.c +4
-0@@ -968,6 +968,10 @@ static const TypeInfo sunhme_info = { .class_init = sunhme_class_init, .instance_size = sizeof(SunHMEState), .instance_init = sunhme_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sunhme_register_types (void )hw/pci-bridge/dec.c +8
-0@@ -79,6 +79,10 @@ static const TypeInfo dec_21154_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(PCIBridge), .class_init = dec_21154_pci_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };PCIBus *pci_dec_21154_init (PCIBus *parent_bus,int devfn)@@ -138,6 +142,10 @@ static const TypeInfo dec_21154_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = dec_21154_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_dec_21154_device_class_init (ObjectClass *klass,void *data)hw/pci-bridge/i82801b11.c +4
-0@@ -106,6 +106,10 @@ static const TypeInfo i82801b11_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(I82801b11Bridge), .class_init = i82801b11_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void d2pbr_register (void )hw/pci-bridge/pci_bridge_dev.c +1
-0@@ -238,6 +238,7 @@ static const TypeInfo pci_bridge_dev_info = { .instance_finalize = pci_bridge_dev_instance_finalize, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/pci-bridge/pci_expander_bridge.c +8
-0@@ -316,6 +316,10 @@ static const TypeInfo pxb_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_pcie_dev_realize (PCIDevice *dev,Error **errp)@@ -350,6 +354,10 @@ static const TypeInfo pxb_pcie_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_pcie_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_register_types (void )hw/pci-host/apb.c +8
-0@@ -836,6 +836,10 @@ static const TypeInfo pbm_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = pbm_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_host_class_init (ObjectClass *klass,void *data)@@ -883,6 +887,10 @@ static const TypeInfo pbm_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .class_init = pbm_pci_bridge_class_init, .instance_size = sizeof(PBMPCIBridge), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_iommu_memory_region_class_init (ObjectClass *klass,void *data)hw/pci-host/bonito.c +4
-0@@ -833,6 +833,10 @@ static const TypeInfo bonito_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIBonitoState), .class_init = bonito_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void bonito_pcihost_class_init (ObjectClass *klass,void *data)hw/pci-host/gpex.c +4
-0@@ -166,6 +166,10 @@ static const TypeInfo gpex_root_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(GPEXRootState), .class_init = gpex_root_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gpex_register (void )hw/pci-host/grackle.c +4
-0@@ -142,6 +142,10 @@ static const TypeInfo grackle_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = grackle_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_grackle_class_init (ObjectClass *klass,void *data)hw/pci-host/piix.c +8
-0@@ -694,6 +694,10 @@ static const TypeInfo piix3_pci_type_info = { .instance_size = sizeof(PIIX3State), .abstract = true, .class_init = pci_piix3_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix3_class_init (ObjectClass *klass,void *data)@@ -748,6 +752,10 @@ static const TypeInfo i440fx_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCII440FXState), .class_init = i440fx_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* IGD Passthrough Host Bridge. */ hw/pci-host/ppce500.c +4
-0@@ -516,6 +516,10 @@ static const TypeInfo e500_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PPCE500PCIBridgeState), .class_init = e500_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pcihost_properties[] = {hw/pci-host/prep.c +4
-0@@ -372,6 +372,10 @@ static const TypeInfo raven_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(RavenPCIState), .class_init = raven_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property raven_pcihost_properties[] = {hw/pci-host/q35.c +4
-0@@ -591,6 +591,10 @@ static const TypeInfo mch_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MCHPCIState), .class_init = mch_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void q35_register (void )hw/pci-host/uninorth.c +16
-0@@ -374,6 +374,10 @@ static const TypeInfo unin_main_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_main_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void u3_agp_pci_host_class_init (ObjectClass *klass,void *data)@@ -398,6 +402,10 @@ static const TypeInfo u3_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = u3_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_agp_pci_host_class_init (ObjectClass *klass,void *data)@@ -422,6 +430,10 @@ static const TypeInfo unin_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_internal_pci_host_class_init (ObjectClass *klass,void *data)@@ -446,6 +458,10 @@ static const TypeInfo unin_internal_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_internal_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_unin_main_class_init (ObjectClass *klass,void *data)hw/pci-host/versatile.c +4
-0@@ -487,6 +487,10 @@ static const TypeInfo versatile_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = versatile_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pci_vpb_properties[] = {hw/ppc/ppc4xx_pci.c +4
-0@@ -359,6 +359,10 @@ static const TypeInfo ppc4xx_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = ppc4xx_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ppc4xx_pcihost_class_init (ObjectClass *klass,void *data)hw/scsi/esp-pci.c +4
-0@@ -398,6 +398,10 @@ static const TypeInfo esp_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIESPState), .class_init = esp_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; typedef struct {hw/scsi/lsi53c895a.c +4
-0@@ -2244,6 +2244,10 @@ static const TypeInfo lsi_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(LSIState), .class_init = lsi_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void lsi53c810_class_init (ObjectClass *klass,void *data)hw/scsi/megasas.c +4
-0@@ -2468,6 +2468,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = false, .vmsd = &vmstate_megasas_gen1, .props = megasas_properties_gen1, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, },{ .name = TYPE_MEGASAS_GEN2, .desc = "LSI MegaRAID SAS 2108",hw/scsi/mptsas.c +4
-0@@ -1439,6 +1439,10 @@ static const TypeInfo mptsas_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MPTSASState), .class_init = mptsas1068_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void mptsas_register_types (void )hw/sd/sdhci.c +4
-0@@ -1315,6 +1315,10 @@ static const TypeInfo sdhci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SDHCIState), .class_init = sdhci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property sdhci_sysbus_properties[] = {hw/sh4/sh_pci.c +4
-0@@ -179,6 +179,10 @@ static const TypeInfo sh_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = sh_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sh_pci_device_class_init (ObjectClass *klass,void *data)hw/sparc64/sun4u.c +4
-0@@ -275,6 +275,10 @@ static const TypeInfo ebus_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(EbusState), .class_init = ebus_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };#define TYPE_OPENPROM "openprom"hw/usb/hcd-ehci-pci.c +4
-0@@ -170,6 +170,10 @@ static const TypeInfo ehci_pci_type_info = { .instance_finalize = usb_ehci_pci_finalize, .abstract = true, .class_init = ehci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ehci_data_class_init (ObjectClass *klass,void *data)hw/usb/hcd-ohci.c +4
-0@@ -2139,6 +2139,10 @@ static const TypeInfo ohci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(OHCIPCIState), .class_init = ohci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property ohci_sysbus_properties[] = {hw/usb/hcd-uhci.c +4
-0@@ -1323,6 +1323,10 @@ static const TypeInfo uhci_pci_type_info = { .class_size = sizeof(UHCIPCIDeviceClass), .abstract = true, .class_init = uhci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void uhci_data_class_init (ObjectClass *klass,void *data)hw/vfio/pci-quirks.c +4
-0@@ -1197,6 +1197,10 @@ static TypeInfo vfio_pci_igd_lpc_bridge_info = { .name = "vfio-pci-igd-lpc-bridge", .parent = TYPE_PCI_DEVICE, .class_init = vfio_pci_igd_lpc_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vfio_pci_igd_register_types (void )hw/watchdog/wdt_i6300esb.c +4
-0@@ -463,6 +463,10 @@ static const TypeInfo i6300esb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(I6300State), .class_init = i6300esb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i6300esb_register_types (void )hw/xen/xen_pt.c +0
-0
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 973
Quoted 10 lines
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pci_passthrough_register_types (void )
For the PCI/x86 code:
Reviewed-by Marcel Apfelbaum <[email protected]>
Thanks,
Marcel
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Re: [Qemu-arm] [PATCH v2 4/5] pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devices
In reply to Eduardo HabkostQuoted 1,230 lines · Eduardo Habkost
Add
INTERFACE_CONVENTIONAL_PCI_DEVICEto all direct subtypes ofTYPE_PCI_DEVICE, except:1) The ones that already have
INTERFACE_PCIE_DEVICEset:* base-xhci
* e1000e
* nvme
* pvscsi
* vfio-pci
* virtio-pci
* vmxnet32) base-pci-bridge
Not all PCI bridges are Conventional PCI devices, so
INTERFACE_CONVENTIONAL_PCI_DEVICEis added only to the subtypes that are actually Conventional PCI:* dec-21154-p2p-bridge
* i82801b11-bridge
* pbm-bridge
* pci-bridgeThe direct subtypes of base-pci-bridge not touched by this patch are:
* xilinx-pcie-root: Already marked as PCIe-only.
* pcie-pci-bridge: Already marked as PCIe-only.
* pcie-port: all non-abstract subtypes of pcie-port are already marked as PCIe-only devices.3) megasas-base
Not all megasas devices are Conventional PCI devices, so the interface names are added to the subclasses registered by
megasas_register_types(), according to information in the megasas_devices[] array."megasas-gen2" already implements
INTERFACE_PCIE_DEVICE, so addINTERFACE_CONVENTIONAL_PCI_DEVICEonly to "megasas".Acked-by Alberto Garcia <[email protected]>Acked-by John Snow <[email protected]>Acked-by Anthony PERARD <[email protected]>Signed-off-by Eduardo Habkost <[email protected]>---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
* Note about pcie-pci-bridge on commit message.
* New devices: sungem, sunhmeCc "Michael S. Tsirkin" <[email protected]>Cc Igor Mammedov <[email protected]>Cc Gerd Hoffmann <[email protected]>Cc Paolo Bonzini <[email protected]>Cc Richard Henderson <[email protected]>Cc Eduardo Habkost <[email protected]>Cc Stefano Stabellini <[email protected]>Cc Anthony Perard <[email protected]>Cc John Snow <[email protected]>Cc Alberto Garcia <[email protected]>Cc Aurelien Jarno <[email protected]>Cc Yongbok Kim <[email protected]>Cc Jiri Slaby <[email protected]>Cc Alexander Graf <[email protected]>Cc Marcel Apfelbaum <[email protected]>Cc Jason Wang <[email protected]>Cc Jiri Pirko <[email protected]>Cc "Hervé Poussineau" <[email protected]>Cc Peter Maydell <[email protected]>Cc David Gibson <[email protected]>Cc Hannes Reinecke <[email protected]>Cc Mark Cave-Ayland <[email protected]>Cc Artyom Tarasenko <[email protected]>Cc Alex Williamson <[email protected]>--- hw/acpi/piix4.c | 1 + hw/audio/ac97.c | 4 ++++ hw/audio/es1370.c | 4 ++++ hw/audio/intel-hda.c | 4 ++++ hw/char/serial-pci.c | 12 ++++++++++++ hw/display/cirrus_vga.c | 4 ++++ hw/display/qxl.c | 4 ++++ hw/display/sm501.c | 4 ++++ hw/display/vga-pci.c | 4 ++++ hw/display/vmware_vga.c | 4 ++++ hw/i2c/smbus_ich9.c | 4 ++++ hw/i386/amd_iommu.c | 4 ++++ hw/i386/kvm/pci-assign.c | 4 ++++ hw/i386/pc_piix.c | 4 ++++ hw/i386/xen/xen_platform.c | 4 ++++ hw/i386/xen/xen_pvdevice.c | 4 ++++ hw/ide/ich.c | 4 ++++ hw/ide/pci.c | 4 ++++ hw/ipack/tpci200.c | 4 ++++ hw/isa/i82378.c | 4 ++++ hw/isa/lpc_ich9.c | 1 + hw/isa/piix4.c | 4 ++++ hw/isa/vt82c686.c | 16 ++++++++++++++++ hw/mips/gt64xxx_pci.c | 4 ++++ hw/misc/edu.c | 5 +++++ hw/misc/ivshmem.c | 4 ++++ hw/misc/macio/macio.c | 4 ++++ hw/misc/pci-testdev.c | 4 ++++ hw/net/e1000.c | 4 ++++ hw/net/eepro100.c | 4 ++++ hw/net/ne2000.c | 4 ++++ hw/net/pcnet-pci.c | 4 ++++ hw/net/rocker/rocker.c | 4 ++++ hw/net/rtl8139.c | 4 ++++ hw/net/sungem.c | 4 ++++ hw/net/sunhme.c | 4 ++++ hw/pci-bridge/dec.c | 8 ++++++++ hw/pci-bridge/i82801b11.c | 4 ++++ hw/pci-bridge/pci_bridge_dev.c | 1 + hw/pci-bridge/pci_expander_bridge.c | 8 ++++++++ hw/pci-host/apb.c | 8 ++++++++ hw/pci-host/bonito.c | 4 ++++ hw/pci-host/gpex.c | 4 ++++ hw/pci-host/grackle.c | 4 ++++ hw/pci-host/piix.c | 8 ++++++++ hw/pci-host/ppce500.c | 4 ++++ hw/pci-host/prep.c | 4 ++++ hw/pci-host/q35.c | 4 ++++ hw/pci-host/uninorth.c | 16 ++++++++++++++++ hw/pci-host/versatile.c | 4 ++++ hw/ppc/ppc4xx_pci.c | 4 ++++ hw/scsi/esp-pci.c | 4 ++++ hw/scsi/lsi53c895a.c | 4 ++++ hw/scsi/megasas.c | 4 ++++ hw/scsi/mptsas.c | 4 ++++ hw/sd/sdhci.c | 4 ++++ hw/sh4/sh_pci.c | 4 ++++ hw/sparc64/sun4u.c | 4 ++++ hw/usb/hcd-ehci-pci.c | 4 ++++ hw/usb/hcd-ohci.c | 4 ++++ hw/usb/hcd-uhci.c | 4 ++++ hw/vfio/pci-quirks.c | 4 ++++ hw/watchdog/wdt_i6300esb.c | 4 ++++ hw/xen/xen_pt.c | 4 ++++ 64 files changed, 296 insertions(+)hw/acpi/piix4.c +1
-0@@ -718,6 +718,7 @@ static const TypeInfo piix4_pm_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/audio/ac97.c +4
-0@@ -1431,6 +1431,10 @@ static const TypeInfo ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (AC97LinkState), .class_init = ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ac97_register_types (void )hw/audio/es1370.c +4
-0@@ -1082,6 +1082,10 @@ static const TypeInfo es1370_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (ES1370State), .class_init = es1370_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void es1370_register_types (void )hw/audio/intel-hda.c +4
-0@@ -1263,6 +1263,10 @@ static const TypeInfo intel_hda_info = { .instance_size = sizeof(IntelHDAState), .class_init = intel_hda_class_init, .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo intel_hda_info_ich6 = {hw/char/serial-pci.c +12
-0@@ -250,6 +250,10 @@ static const TypeInfo serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCISerialState), .class_init = serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_2x_serial_pci_info = {@@ -257,6 +261,10 @@ static const TypeInfo multi_2x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_2x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const TypeInfo multi_4x_serial_pci_info = {@@ -264,6 +272,10 @@ static const TypeInfo multi_4x_serial_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), .class_init = multi_4x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void serial_pci_register_types (void )hw/display/cirrus_vga.c +4
-0@@ -3162,6 +3162,10 @@ static const TypeInfo cirrus_vga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCICirrusVGAState), .class_init = cirrus_vga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void cirrus_vga_register_types (void )hw/display/qxl.c +4
-0@@ -2430,6 +2430,10 @@ static const TypeInfo qxl_pci_type_info = { .instance_size = sizeof(PCIQXLDevice), .abstract = true, .class_init = qxl_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void qxl_primary_class_init (ObjectClass *klass,void *data)hw/display/sm501.c +4
-0@@ -1843,6 +1843,10 @@ static const TypeInfo sm501_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SM501PCIState), .class_init = sm501_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sm501_register_types (void )hw/display/vga-pci.c +4
-0@@ -338,6 +338,10 @@ static const TypeInfo vga_pci_type_info = { .instance_size = sizeof(PCIVGAState), .abstract = true, .class_init = vga_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vga_class_init (ObjectClass *klass,void *data)hw/display/vmware_vga.c +4
-0@@ -1350,6 +1350,10 @@ static const TypeInfo vmsvga_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(struct pci_vmsvga_state_s), .class_init = vmsvga_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vmsvga_register_types (void )hw/i2c/smbus_ich9.c +4
-0@@ -119,6 +119,10 @@ static const TypeInfo ich9_smb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(ICH9SMBState), .class_init = ich9_smb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich9_smb_register (void )hw/i386/amd_iommu.c +4
-0@@ -1227,6 +1227,10 @@ static const TypeInfo amdviPCI = { .name = "AMDVI-PCI", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(AMDVIPCIState), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void amdvi_iommu_memory_region_class_init (ObjectClass *klass,void *data)hw/i386/kvm/pci-assign.c +4
-0@@ -1864,6 +1864,10 @@ static const TypeInfo assign_info = { .instance_size = sizeof(AssignedDevice), .class_init = assign_class_init, .instance_init = assigned_dev_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void assign_register_types (void )hw/i386/pc_piix.c +4
-0@@ -1055,6 +1055,10 @@ static TypeInfo isa_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = isa_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pt_graphics_register_types (void )hw/i386/xen/xen_platform.c +4
-0@@ -517,6 +517,10 @@ static const TypeInfo xen_platform_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIXenPlatformState), .class_init = xen_platform_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_platform_register_types (void )hw/i386/xen/xen_pvdevice.c +4
-0@@ -127,6 +127,10 @@ static const TypeInfo xen_pv_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(XenPVDevice), .class_init = xen_pv_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pv_register_types (void )hw/ide/ich.c +4
-0@@ -184,6 +184,10 @@ static const TypeInfo ich_ahci_info = { .instance_size = sizeof(AHCIPCIState), .instance_init = pci_ich9_ahci_init, .class_init = ich_ahci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ich_ahci_register_types (void )hw/ide/pci.c +4
-0@@ -451,6 +451,10 @@ static const TypeInfo pci_ide_type_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIIDEState), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_ide_register_types (void )hw/ipack/tpci200.c +4
-0@@ -646,6 +646,10 @@ static const TypeInfo tpci200_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(TPCI200State), .class_init = tpci200_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void tpci200_register_types (void )hw/isa/i82378.c +4
-0@@ -138,6 +138,10 @@ static const TypeInfo i82378_type_info = { .instance_size = sizeof(I82378State), .instance_init = i82378_init, .class_init = i82378_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i82378_register_types (void )hw/isa/lpc_ich9.c +1
-0@@ -823,6 +823,7 @@ static const TypeInfo ich9_lpc_info = { .interfaces = (InterfaceInfo[]) { {TYPE_HOTPLUG_HANDLER }, {TYPE_ACPI_DEVICE_IF }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/isa/piix4.c +4
-0@@ -132,6 +132,10 @@ static const TypeInfo piix4_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PIIX4State), .class_init = piix4_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix4_register_types (void )hw/isa/vt82c686.c +16
-0@@ -301,6 +301,10 @@ static const TypeInfo via_ac97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686AC97State), .class_init = via_ac97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_mc97_realize (PCIDevice *dev,Error **errp)@@ -341,6 +345,10 @@ static const TypeInfo via_mc97_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686MC97State), .class_init = via_mc97_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* vt82c686 pm init */ @@ -419,6 +427,10 @@ static const TypeInfo via_pm_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT686PMState), .class_init = via_pm_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription vmstate_via = {@@ -502,6 +514,10 @@ static const TypeInfo via_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(VT82C686BState), .class_init = via_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vt82c686b_register_types (void )hw/mips/gt64xxx_pci.c +4
-0@@ -1232,6 +1232,10 @@ static const TypeInfo gt64120_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = gt64120_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gt64120_class_init (ObjectClass *klass,void *data)hw/misc/edu.c +5
-0@@ -408,12 +408,17 @@ static void edu_class_init(ObjectClass *class, void *data)static void pci_edu_register_types (void ) { +static InterfaceInfo interfaces[] = { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };static const TypeInfo edu_info = { .name ="edu" , .parent =TYPE_PCI_DEVICE , .instance_size =sizeof (EduState), .instance_init = edu_instance_init, .class_init = edu_class_init, + .interfaces = interfaces, };type_register_static (&edu_info);hw/misc/ivshmem.c +4
-0@@ -1010,6 +1010,10 @@ static const TypeInfo ivshmem_common_info = { .instance_size = sizeof(IVShmemState), .abstract = true, .class_init = ivshmem_common_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const VMStateDescription ivshmem_plain_vmsd = {hw/misc/macio/macio.c +4
-0@@ -415,6 +415,10 @@ static const TypeInfo macio_type_info = { .instance_init = macio_instance_init, .abstract = true, .class_init = macio_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void macio_register_types (void )hw/misc/pci-testdev.c +4
-0@@ -326,6 +326,10 @@ static const TypeInfo pci_testdev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCITestDevState), .class_init = pci_testdev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_testdev_register_types (void )hw/net/e1000.c +4
-0@@ -1685,6 +1685,10 @@ static const TypeInfo e1000_base_info = { .instance_init = e1000_instance_init, .class_size = sizeof(E1000BaseClass), .abstract = true, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static const E1000Info e1000_devices[] = {hw/net/eepro100.c +4
-0@@ -2116,6 +2116,10 @@ static void eepro100_register_types(void) type_info.class_init = eepro100_class_init; type_info.instance_size =sizeof (EEPRO100State); type_info.instance_init = eepro100_instance_init; + type_info.interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + };type_register (&type_info); }hw/net/ne2000.c +4
-0@@ -786,6 +786,10 @@ static const TypeInfo ne2000_info = { .instance_size = sizeof(PCINE2000State), .class_init = ne2000_class_init, .instance_init = ne2000_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ne2000_register_types (void )hw/net/pcnet-pci.c +4
-0@@ -365,6 +365,10 @@ static const TypeInfo pcnet_info = { .instance_size = sizeof(PCIPCNetState), .class_init = pcnet_class_init, .instance_init = pcnet_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_pcnet_register_types (void )hw/net/rocker/rocker.c +4
-0@@ -1525,6 +1525,10 @@ static const TypeInfo rocker_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(Rocker), .class_init = rocker_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rocker_register_types (void )hw/net/rtl8139.c +4
-0@@ -3442,6 +3442,10 @@ static const TypeInfo rtl8139_info = { .instance_size = sizeof(RTL8139State), .class_init = rtl8139_class_init, .instance_init = rtl8139_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void rtl8139_register_types (void )hw/net/sungem.c +4
-0@@ -1437,6 +1437,10 @@ static const TypeInfo sungem_info = { .instance_size = sizeof(SunGEMState), .class_init = sungem_class_init, .instance_init = sungem_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sungem_register_types (void )hw/net/sunhme.c +4
-0@@ -968,6 +968,10 @@ static const TypeInfo sunhme_info = { .class_init = sunhme_class_init, .instance_size = sizeof(SunHMEState), .instance_init = sunhme_instance_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { } + } };static void sunhme_register_types (void )hw/pci-bridge/dec.c +8
-0@@ -79,6 +79,10 @@ static const TypeInfo dec_21154_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(PCIBridge), .class_init = dec_21154_pci_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };PCIBus *pci_dec_21154_init (PCIBus *parent_bus,int devfn)@@ -138,6 +142,10 @@ static const TypeInfo dec_21154_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = dec_21154_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_dec_21154_device_class_init (ObjectClass *klass,void *data)hw/pci-bridge/i82801b11.c +4
-0@@ -106,6 +106,10 @@ static const TypeInfo i82801b11_bridge_info = { .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(I82801b11Bridge), .class_init = i82801b11_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void d2pbr_register (void )hw/pci-bridge/pci_bridge_dev.c +1
-0@@ -238,6 +238,7 @@ static const TypeInfo pci_bridge_dev_info = { .instance_finalize = pci_bridge_dev_instance_finalize, .interfaces = (InterfaceInfo []) { {TYPE_HOTPLUG_HANDLER }, + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, { } } };hw/pci-bridge/pci_expander_bridge.c +8
-0@@ -316,6 +316,10 @@ static const TypeInfo pxb_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_pcie_dev_realize (PCIDevice *dev,Error **errp)@@ -350,6 +354,10 @@ static const TypeInfo pxb_pcie_dev_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PXBDev), .class_init = pxb_pcie_dev_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pxb_register_types (void )hw/pci-host/apb.c +8
-0@@ -836,6 +836,10 @@ static const TypeInfo pbm_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = pbm_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_host_class_init (ObjectClass *klass,void *data)@@ -883,6 +887,10 @@ static const TypeInfo pbm_pci_bridge_info = { .parent = TYPE_PCI_BRIDGE, .class_init = pbm_pci_bridge_class_init, .instance_size = sizeof(PBMPCIBridge), + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pbm_iommu_memory_region_class_init (ObjectClass *klass,void *data)hw/pci-host/bonito.c +4
-0@@ -833,6 +833,10 @@ static const TypeInfo bonito_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIBonitoState), .class_init = bonito_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void bonito_pcihost_class_init (ObjectClass *klass,void *data)hw/pci-host/gpex.c +4
-0@@ -166,6 +166,10 @@ static const TypeInfo gpex_root_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(GPEXRootState), .class_init = gpex_root_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void gpex_register (void )hw/pci-host/grackle.c +4
-0@@ -142,6 +142,10 @@ static const TypeInfo grackle_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = grackle_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_grackle_class_init (ObjectClass *klass,void *data)hw/pci-host/piix.c +8
-0@@ -694,6 +694,10 @@ static const TypeInfo piix3_pci_type_info = { .instance_size = sizeof(PIIX3State), .abstract = true, .class_init = pci_piix3_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void piix3_class_init (ObjectClass *klass,void *data)@@ -748,6 +752,10 @@ static const TypeInfo i440fx_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCII440FXState), .class_init = i440fx_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };/* IGD Passthrough Host Bridge. */ hw/pci-host/ppce500.c +4
-0@@ -516,6 +516,10 @@ static const TypeInfo e500_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PPCE500PCIBridgeState), .class_init = e500_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pcihost_properties[] = {hw/pci-host/prep.c +4
-0@@ -372,6 +372,10 @@ static const TypeInfo raven_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(RavenPCIState), .class_init = raven_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property raven_pcihost_properties[] = {hw/pci-host/q35.c +4
-0@@ -591,6 +591,10 @@ static const TypeInfo mch_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MCHPCIState), .class_init = mch_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void q35_register (void )hw/pci-host/uninorth.c +16
-0@@ -374,6 +374,10 @@ static const TypeInfo unin_main_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_main_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void u3_agp_pci_host_class_init (ObjectClass *klass,void *data)@@ -398,6 +402,10 @@ static const TypeInfo u3_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = u3_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_agp_pci_host_class_init (ObjectClass *klass,void *data)@@ -422,6 +430,10 @@ static const TypeInfo unin_agp_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_agp_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void unin_internal_pci_host_class_init (ObjectClass *klass,void *data)@@ -446,6 +458,10 @@ static const TypeInfo unin_internal_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = unin_internal_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void pci_unin_main_class_init (ObjectClass *klass,void *data)hw/pci-host/versatile.c +4
-0@@ -487,6 +487,10 @@ static const TypeInfo versatile_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = versatile_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property pci_vpb_properties[] = {hw/ppc/ppc4xx_pci.c +4
-0@@ -359,6 +359,10 @@ static const TypeInfo ppc4xx_host_bridge_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = ppc4xx_host_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ppc4xx_pcihost_class_init (ObjectClass *klass,void *data)hw/scsi/esp-pci.c +4
-0@@ -398,6 +398,10 @@ static const TypeInfo esp_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIESPState), .class_init = esp_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, }; typedef struct {hw/scsi/lsi53c895a.c +4
-0@@ -2244,6 +2244,10 @@ static const TypeInfo lsi_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(LSIState), .class_init = lsi_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void lsi53c810_class_init (ObjectClass *klass,void *data)hw/scsi/megasas.c +4
-0@@ -2468,6 +2468,10 @@ static struct MegasasInfo megasas_devices[] = { .is_express = false, .vmsd = &vmstate_megasas_gen1, .props = megasas_properties_gen1, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, },{ .name = TYPE_MEGASAS_GEN2, .desc = "LSI MegaRAID SAS 2108",hw/scsi/mptsas.c +4
-0@@ -1439,6 +1439,10 @@ static const TypeInfo mptsas_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(MPTSASState), .class_init = mptsas1068_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void mptsas_register_types (void )hw/sd/sdhci.c +4
-0@@ -1315,6 +1315,10 @@ static const TypeInfo sdhci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SDHCIState), .class_init = sdhci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property sdhci_sysbus_properties[] = {hw/sh4/sh_pci.c +4
-0@@ -179,6 +179,10 @@ static const TypeInfo sh_pci_host_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIDevice), .class_init = sh_pci_host_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void sh_pci_device_class_init (ObjectClass *klass,void *data)hw/sparc64/sun4u.c +4
-0@@ -275,6 +275,10 @@ static const TypeInfo ebus_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(EbusState), .class_init = ebus_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };#define TYPE_OPENPROM "openprom"hw/usb/hcd-ehci-pci.c +4
-0@@ -170,6 +170,10 @@ static const TypeInfo ehci_pci_type_info = { .instance_finalize = usb_ehci_pci_finalize, .abstract = true, .class_init = ehci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void ehci_data_class_init (ObjectClass *klass,void *data)hw/usb/hcd-ohci.c +4
-0@@ -2139,6 +2139,10 @@ static const TypeInfo ohci_pci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(OHCIPCIState), .class_init = ohci_pci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static Property ohci_sysbus_properties[] = {hw/usb/hcd-uhci.c +4
-0@@ -1323,6 +1323,10 @@ static const TypeInfo uhci_pci_type_info = { .class_size = sizeof(UHCIPCIDeviceClass), .abstract = true, .class_init = uhci_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void uhci_data_class_init (ObjectClass *klass,void *data)hw/vfio/pci-quirks.c +4
-0@@ -1197,6 +1197,10 @@ static TypeInfo vfio_pci_igd_lpc_bridge_info = { .name = "vfio-pci-igd-lpc-bridge", .parent = TYPE_PCI_DEVICE, .class_init = vfio_pci_igd_lpc_bridge_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void vfio_pci_igd_register_types (void )hw/watchdog/wdt_i6300esb.c +4
-0@@ -463,6 +463,10 @@ static const TypeInfo i6300esb_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(I6300State), .class_init = i6300esb_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void i6300esb_register_types (void )hw/xen/xen_pt.c +0
-0
hw/xen/xen_pt.c static const TypeInfo xen_pci_passthrough_info = { · line 973
Quoted 10 lines
hw/xen/xen_pt.c +4
-0@@ -964,6 +964,10 @@ static const TypeInfo xen_pci_passthrough_info = { .instance_size = sizeof(XenPCIPassthroughState), .instance_finalize = xen_pci_passthrough_finalize, .class_init = xen_pci_passthrough_class_init, + .interfaces = (InterfaceInfo []) { + {INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, };static void xen_pci_passthrough_register_types (void )
For the PCI/x86 code:
Reviewed-by Marcel Apfelbaum <[email protected]>
Thanks,
Marcel
PATCH v2 5/5 pci: Validate interfaces on base_class_init
In reply to Eduardo HabkostMake sure we don't forget to add the Conventional PCI or PCI Express interface names on PCI device classes in the future.
Signed-off-by Eduardo Habkost <[email protected]>
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>
--- hw/pci/pci.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
hw/pci/pci.c +12 -0
@@ -2547,6 +2547,17 @@ static void pci_device_class_init(ObjectClass *klass, void *data) pc->realize = pci_default_realize; } +static void pci_device_class_base_init (ObjectClass *klass,void *data) +{ +if (!object_class_is_abstract (klass)) { +ObjectClass *conventional = +object_class_dynamic_cast (klass,INTERFACE_CONVENTIONAL_PCI_DEVICE ); +ObjectClass *pcie = +object_class_dynamic_cast (klass,INTERFACE_PCIE_DEVICE ); +assert (conventional || pcie); + } +} +AddressSpace *pci_device_iommu_address_space (PCIDevice *dev) {PCIBus *bus =PCI_BUS (dev->bus);
@@ -2671,6 +2682,7 @@ static const TypeInfo pci_device_type_info = { .abstract = true, .class_size = sizeof(PCIDeviceClass), .class_init = pci_device_class_init, + .class_base_init = pci_device_class_base_init, };static void pci_register_types (void )
Signature · 1 line
2.13.5
Re: [Qemu-devel] [PATCH v2 5/5] pci: Validate interfaces on base_class_init
Quoted 4 lines · Eduardo Habkost
Make sure we don't forget to add the Conventional PCI or PCI Express interface names on PCI device classes in the future.
Signed-off-by Eduardo Habkost <[email protected]>
Revieed-by David Gibson <[email protected]>
Quoted 38 lines
---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>--- hw/pci/pci.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)hw/pci/pci.c +12
-0@@ -2547,6 +2547,17 @@ static void pci_device_class_init(ObjectClass *klass, void *data) pc->realize = pci_default_realize; } +static void pci_device_class_base_init (ObjectClass *klass,void *data) +{ +if (!object_class_is_abstract (klass)) { +ObjectClass *conventional = +object_class_dynamic_cast (klass,INTERFACE_CONVENTIONAL_PCI_DEVICE ); +ObjectClass *pcie = +object_class_dynamic_cast (klass,INTERFACE_PCIE_DEVICE ); +assert (conventional || pcie); + } +} +AddressSpace *pci_device_iommu_address_space (PCIDevice *dev) {PCIBus *bus =PCI_BUS (dev->bus);@@ -2671,6 +2682,7 @@ static const TypeInfo pci_device_type_info = { .abstract = true, .class_size = sizeof(PCIDeviceClass), .class_init = pci_device_class_init, + .class_base_init = pci_device_class_base_init, };static void pci_register_types (void )
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Re: [Qemu-devel] [PATCH v2 5/5] pci: Validate interfaces on base_class_init
In reply to Eduardo HabkostQuoted 36 lines · Eduardo Habkost
Make sure we don't forget to add the Conventional PCI or PCI Express interface names on PCI device classes in the future.
Signed-off-by Eduardo Habkost <[email protected]>---
Changes v1 -> v2:
* s/legacy/conventional/
* Suggested-by: Alex Williamson <[email protected]>--- hw/pci/pci.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)hw/pci/pci.c +11
-0@@ -2547,6 +2547,17 @@ static void pci_device_class_init(ObjectClass *klass, void *data) pc->realize = pci_default_realize; } +static void pci_device_class_base_init (ObjectClass *klass,void *data) +{ +if (!object_class_is_abstract (klass)) { +ObjectClass *conventional = +object_class_dynamic_cast (klass,INTERFACE_CONVENTIONAL_PCI_DEVICE ); +ObjectClass *pcie = +object_class_dynamic_cast (klass,INTERFACE_PCIE_DEVICE ); +assert (conventional || pcie); + } +} +AddressSpace *pci_device_iommu_address_space (PCIDevice *dev) {PCIBus *bus =PCI_BUS (dev->bus);
hw/pci/pci.c static const TypeInfo pci_device_type_info = { · line 2688
Quoted 7 lines
hw/pci/pci.c +1
-0@@ -2671,6 +2682,7 @@ static const TypeInfo pci_device_type_info = { .abstract = true, .class_size = sizeof(PCIDeviceClass), .class_init = pci_device_class_init, + .class_base_init = pci_device_class_base_init, };static void pci_register_types (void )
Reviewed-by Marcel Apfelbaum <[email protected]>
Thanks,
Marcel
Quoted 24 lines · Eduardo Habkost
Changes v1 -> v2:
* Use "Conventional PCI" instead of "legacy PCI"
* Suggested-by: Alex Williamson <[email protected]>
* Mark base-xhci as hybrid too
* Reported-by: Marcel Apfelbaum <[email protected]>
* Mark pcie-pci-bridge as PCI Express only
* New Conventional PCI devices: sungem, sunhmev1 was a reimplementation of one portion of an old RFC:
Subject: [RFC v2 00/20] qmp: Report bus information on
'query-machines'This series marks each PCI device type as Conventional PCI, PCI Express, or "hybrid". It uses two new QOM interface names to do
that:INTERFACE_CONVENTIONAL_PCI_DEVICE("conventional-pci-device") andINTERFACE_PCIE_DEVICE("pci-express-device"). Conventional PCI devices will implement only the former; PCIe-only devices will implement only the latter; hybrid devices will implement both interfaces.With this, management software will then be able to use qom-list-types to find out which PCI devices are conventional/express/hybrid.
Quoted 8 lines
In the future, the new interface names can be used in the bus/slot querying commands, to indicate which types of devices are accepted on each slot.
The last patch in the series adds an assertion to the PCI device class code, to ensure we won't forget to add the corresponding interface names to new PCI device classes.
Hi Eduardo,
Now we need to get rid of the "is_express" field, otherwise we have the same information on two places.
Thanks,
Marcel
Quoted 87 lines
Eduardo Habkost (5):
pci: conventional-pci-device and pci-express-device interfaces
pci: Add interface names to hybrid PCI devices
pci: AddINTERFACE_PCIE_DEVICEto all PCIe devices
pci: AddINTERFACE_CONVENTIONAL_PCI_DEVICEto Conventional PCI devices
pci: Validate interfaces onbase_class_initinclude/hw/pci/pci.h | 6 ++++++ hw/acpi/piix4.c | 1 + hw/audio/ac97.c | 4 ++++ hw/audio/es1370.c | 4 ++++ hw/audio/intel-hda.c | 4 ++++ hw/block/nvme.c | 4 ++++ hw/char/serial-pci.c | 12 ++++++++++++ hw/display/cirrus_vga.c | 4 ++++ hw/display/qxl.c | 4 ++++ hw/display/sm501.c | 4 ++++ hw/display/vga-pci.c | 4 ++++ hw/display/vmware_vga.c | 4 ++++ hw/i2c/smbus_ich9.c | 4 ++++ hw/i386/amd_iommu.c | 4 ++++ hw/i386/kvm/pci-assign.c | 4 ++++ hw/i386/pc_piix.c | 4 ++++ hw/i386/xen/xen_platform.c | 4 ++++ hw/i386/xen/xen_pvdevice.c | 4 ++++ hw/ide/ich.c | 4 ++++ hw/ide/pci.c | 4 ++++ hw/ipack/tpci200.c | 4 ++++ hw/isa/i82378.c | 4 ++++ hw/isa/lpc_ich9.c | 1 + hw/isa/piix4.c | 4 ++++ hw/isa/vt82c686.c | 16 ++++++++++++++++ hw/mips/gt64xxx_pci.c | 4 ++++ hw/misc/edu.c | 5 +++++ hw/misc/ivshmem.c | 4 ++++ hw/misc/macio/macio.c | 4 ++++ hw/misc/pci-testdev.c | 4 ++++ hw/net/e1000.c | 4 ++++ hw/net/e1000e.c | 4 ++++ hw/net/eepro100.c | 4 ++++ hw/net/ne2000.c | 4 ++++ hw/net/pcnet-pci.c | 4 ++++ hw/net/rocker/rocker.c | 4 ++++ hw/net/rtl8139.c | 4 ++++ hw/net/sungem.c | 4 ++++ hw/net/sunhme.c | 4 ++++ hw/net/vmxnet3.c | 5 +++++ hw/pci-bridge/dec.c | 8 ++++++++ hw/pci-bridge/i82801b11.c | 4 ++++ hw/pci-bridge/pci_bridge_dev.c | 1 + hw/pci-bridge/pci_expander_bridge.c | 8 ++++++++ hw/pci-bridge/pcie_pci_bridge.c | 1 + hw/pci-bridge/pcie_root_port.c | 4 ++++ hw/pci-bridge/xio3130_downstream.c | 4 ++++ hw/pci-bridge/xio3130_upstream.c | 4 ++++ hw/pci-host/apb.c | 8 ++++++++ hw/pci-host/bonito.c | 4 ++++ hw/pci-host/gpex.c | 4 ++++ hw/pci-host/grackle.c | 4 ++++ hw/pci-host/piix.c | 8 ++++++++ hw/pci-host/ppce500.c | 4 ++++ hw/pci-host/prep.c | 4 ++++ hw/pci-host/q35.c | 4 ++++ hw/pci-host/uninorth.c | 16 ++++++++++++++++ hw/pci-host/versatile.c | 4 ++++ hw/pci-host/xilinx-pcie.c | 4 ++++ hw/pci/pci.c | 24 ++++++++++++++++++++++++ hw/ppc/ppc4xx_pci.c | 4 ++++ hw/scsi/esp-pci.c | 4 ++++ hw/scsi/lsi53c895a.c | 4 ++++ hw/scsi/megasas.c | 10 ++++++++++ hw/scsi/mptsas.c | 4 ++++ hw/scsi/vmw_pvscsi.c | 2 ++ hw/sd/sdhci.c | 4 ++++ hw/sh4/sh_pci.c | 4 ++++ hw/sparc64/sun4u.c | 4 ++++ hw/usb/hcd-ehci-pci.c | 4 ++++ hw/usb/hcd-ohci.c | 4 ++++ hw/usb/hcd-uhci.c | 4 ++++ hw/usb/hcd-xhci.c | 5 +++++ hw/vfio/pci-quirks.c | 4 ++++ hw/vfio/pci.c | 5 +++++ hw/virtio/virtio-pci.c | 5 +++++ hw/watchdog/wdt_i6300esb.c | 4 ++++ hw/xen/xen_pt.c | 4 ++++ 78 files changed, 379 insertions(+)
Quoted 34 lines · Marcel Apfelbaum
Quoted 24 lines · Eduardo Habkost
Changes v1 -> v2:
* Use "Conventional PCI" instead of "legacy PCI"
* Suggested-by: Alex Williamson <[email protected]>
* Mark base-xhci as hybrid too
* Reported-by: Marcel Apfelbaum <[email protected]>
* Mark pcie-pci-bridge as PCI Express only
* New Conventional PCI devices: sungem, sunhmev1 was a reimplementation of one portion of an old RFC:
Subject: [RFC v2 00/20] qmp: Report bus information on
'query-machines'This series marks each PCI device type as Conventional PCI, PCI Express, or "hybrid". It uses two new QOM interface names to do
that:INTERFACE_CONVENTIONAL_PCI_DEVICE("conventional-pci-device") andINTERFACE_PCIE_DEVICE("pci-express-device"). Conventional PCI devices will implement only the former; PCIe-only devices will implement only the latter; hybrid devices will implement both interfaces.With this, management software will then be able to use qom-list-types to find out which PCI devices are conventional/express/hybrid.
Quoted 8 lines
In the future, the new interface names can be used in the bus/slot querying commands, to indicate which types of devices are accepted on each slot.
The last patch in the series adds an assertion to the PCI device class code, to ensure we won't forget to add the corresponding interface names to new PCI device classes.
Quoted 4 lines
Hi Eduardo,
Now we need to get rid of the "
is_express" field, otherwise we have the same information on two places.
Agreed, it's on my TODO-list. is_express is completely inconsistent on hybrid devices (some of them have is_express=0, some of them have is_express=1).
Signature · 1 line
Eduardo