mtd: spi-nor: add support for ISSI is25lp128
Subsystems (2)
PATCH v2 1/1 mtd: spi-nor: add support for ISSI is25lp128
Add support for ISSI is25lp128 spi nor flash.
--- drivers/mtd/spi-nor/spi-nor.c | 1 + 1 file changed, 1 insertion(+)
drivers/mtd/spi-nor/spi-nor.c +1 -0
@@ -1005,6 +1005,7 @@ static const struct flash_info spi_nor_ids[] = {/* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SECT_4K) }, + { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256, SECT_4K) },/* Macronix */ { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1, SECT_4K) },
Signature · 1 line
2.15.0
Hi Angelo,
Quoted 12 lines · Angelo Dureghello
Add support for ISSI is25lp128 spi nor flash.
Signed-off-by Angelo Dureghello <[email protected]>--- drivers/mtd/spi-nor/spi-nor.c | 1 + 1 file changed, 1 insertion(+)drivers/mtd/spi-nor/spi-nor.c +0
-0
drivers/mtd/spi-nor/spi-nor.c static const struct flash_info spi_nor_ids[] = { · line 1008
Quoted 4 lines
drivers/mtd/spi-nor/spi-nor.c +1
-0@@ -1005,6 +1005,7 @@ static const struct flash_info spi_nor_ids[] = {/* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SECT_4K) }, + { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256, SECT_4K) },
I've checked both datasheets for is25cd512 and is25lp128 because I was surprised to see different manufacturer IDs in the JEDEC IDs: I suspected some mistake in one of the two entries above.
Then I found this old discussion on patchwork:
https://patchwork.ozlabs.org/patch/581017/
I looked closer at the is25cd512 datasheet and actually I confirmed that it is stated that the manufacturer ID is received as the 2nd data byte after the 9Fh op code. So both entries are correct and this is not a bug of the is25cd512 memory part: it is documented so it is a feature, right?
Anyway, I plan to add another patch on top of yours just to add a comment otherwise it might not be the last time that someone is puzzled with this quirk.
Then back to your patch, is25lp128's datasheet states that this memory parts support the Fast Read 1-1-2 (Dual Output), the Fast Read 1-4-4 (Quad I/O) but strangely not the Fast Read 1-1-4 (Quad Output). Also I see that the Read SFDP (5Ah) op code is supported too.
So could you please add the SPI_NOR_DUAL_READ flag but _not_ the SPI_NOR_QUAD_READ flag in your new entry for is25lp128 ?
Indeed, currently at least one of the two SPI_NOR_{DUAL|QUAD}_READ flags is needed to enabled the parsing of SFDP tables and I would like this parsing to be enabled for this memory part since its datasheet claims that SFDP is supported. Right now, this is the only mean to allow using SPI 1-4-4 with SPI controllers that support this SPI protocol too.
Best regards,
Cyrille
Quoted 4 lines
drivers/mtd/spi-nor/spi-nor.c +0
-0/* Macronix */ { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1, SECT_4K) },
Hi Cyrille,
Quoted 24 lines · Cyrille Pitchen
Hi Angelo,
Quoted 12 lines · Angelo Dureghello
Add support for ISSI is25lp128 spi nor flash.
Signed-off-by Angelo Dureghello <[email protected]>--- drivers/mtd/spi-nor/spi-nor.c | 1 + 1 file changed, 1 insertion(+)drivers/mtd/spi-nor/spi-nor.c +0
-0drivers/mtd/spi-nor/spi-nor.c static const struct flash_info spi_nor_ids[] = { · line 1008
Quoted 4 lines
drivers/mtd/spi-nor/spi-nor.c +1
-0@@ -1005,6 +1005,7 @@ static const struct flash_info spi_nor_ids[] = {/* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SECT_4K) }, + { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256, SECT_4K) },I've checked both datasheets for is25cd512 and is25lp128 because I was surprised to see different manufacturer IDs in the JEDEC IDs: I suspected some mistake in one of the two entries above.
Quoted 8 lines
Then I found this old discussion on patchwork:
https://patchwork.ozlabs.org/patch/581017/I looked closer at the is25cd512 datasheet and actually I confirmed that it is stated that the manufacturer ID is received as the 2nd data byte after the 9Fh op code. So both entries are correct and this is not a bug of the is25cd512 memory part: it is documented so it is a feature, right?
Yes. I believe the reason for this is that is25cd512 was originally a PMC-Sierra device so a different silicon design approach from ISSI. ISSI bought PMC so i am supposing ISSI maintained the jedec id "way" as it was for convenience and for back-compatibility.
Quoted 4 lines
Anyway, I plan to add another patch on top of yours just to add a comment otherwise it might not be the last time that someone is puzzled with this quirk.
Sure, fine.
Quoted 7 lines
Then back to your patch, is25lp128's datasheet states that this memory parts support the Fast Read 1-1-2 (Dual Output), the Fast Read 1-4-4 (Quad I/O) but strangely not the Fast Read 1-1-4 (Quad Output). Also I see that the Read SFDP (5Ah) op code is supported too.
So could you please add theSPI_NOR_DUAL_READflag but _not_ theSPI_NOR_QUAD_READflag in your new entry for is25lp128 ?
Quoted 6 lines
Indeed, currently at least one of the two SPI_NOR_{DUAL|QUAD}_READ flags is needed to enabled the parsing of SFDP tables and I would like this parsing to be enabled for this memory part since its datasheet claims that SFDP is supported. Right now, this is the only mean to allow using SPI 1-4-4 with SPI controllers that support this SPI protocol too.
Sure. Will send in short a v3 patch with SPI_NOR_DUAL_READ. I cannot test quad mode right now, since my hardware here (the mainlined arch/m68k/coldfire/stmark2 board) is wired as simple spi. But i believe the flag cannot harm in anyway until someone can test it.
Quoted 4 lines
Best regards,
Cyrille
Thanks,
Best regards,
Angelo Dureghello
Quoted 5 lines
Quoted 4 lines
drivers/mtd/spi-nor/spi-nor.c +0
-0/* Macronix */ { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1, SECT_4K) },