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ARM: dts: introduce Compulab IoT Gateway

PATCH In review [email protected] 2 participants 13 messages Dec 5, 2017 – Dec 10, 2017

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Device tree bindings Arm i.MX and Layerscape Arm and arm64 SoC sub-architectures (common parts)
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[email protected]

author
#0 lore raw

cover ARM: dts: introduce Compulab IoT Gateway

From: Tyler Baker <[email protected]>

The Compulab IoT Gateway is based on an NXP i.MX7D, dual core Cortex-A7 clocking at 1GHz. It supports up to 2GB of DDR3, and 32GB of eMMC flash. Onboard, there are two gigabit ethernet controllers, 4 x USB2, RS485, and CAN.

It uses the same SoM as the cl-som-imx7, but includes a baseboard with additional I/O.

Compulab has provided patches for this platform based on v4.1. I've used these patches as reference to get things working on tip.

Changes for v1 (Requested by Fabio)
* Squashed the dts build into the initial patch
* Dropped the phy refclk patch from this series, submitting to PCI list
* Removed fsl,spi-num-chipselects property
* Removed LCD and DVI nodes, will follow up with a later series
* s/fsl,uart-has-rtscts/uart-has-rtscts/g
* Fixed regulator usage inside of simple-bus

The entire series is based on v4.15-rc2.

Tyler Baker (6):
ARM: dts: imx7d-sbc-iot: add initial iot gateway dts
ARM: dts: imx7d-cl-som: add nodes for usbh, and usbotg2
ARM: dts: imx7s: add dma support
ARM: dts: imx7s: add node and supplies for vdd1p2
ARM: dts: imx7d-sbc-iot: enable PCIe peripheral
ARM: dts: imx7s: add usb hsic phy domain

 arch/arm/boot/dts/Makefile               |   1 +
 arch/arm/boot/dts/imx7d-cl-som-imx7.dts  |  34 +++++--
 arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts | 169 +++++++++++++++++++++++++++++++
 arch/arm/boot/dts/imx7s.dtsi             |  29 +++++-
 4 files changed, 225 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts
Signature · 1 line
2.9.3
author
#1 lore raw

PATCH 1/6 ARM: dts: imx7d-sbc-iot: add initial iot gateway dts

From: Tyler Baker <[email protected]>

The Compulab IoT Gateway is based on an NXP i.MX7D, dual core Cortex-A7 clocking at 1GHz. It supports up to 2GB of DDR3, and 32GB of eMMC flash. Onboard, there are two gigabit ethernet controllers, 4 x USB2, RS485, and CAN.

This platform is based on the imx7d-cl-som-imx7 module but includes a baseboard with additional peripherals which is what this device tree is meant to describe.

This work has been derrived from the Compulab Linux sources based on v4.1.

Signed-off-by Tyler Baker <[email protected]>
Signed-off-by Ilya Ledvich <[email protected]>
---
 arch/arm/boot/dts/Makefile               |   1 +
 arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts | 156 +++++++++++++++++++++++++++++++
 2 files changed, 157 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts
arch/arm/boot/dts/Makefile +1 -0
index d0381e9..0334137 100644
@@ -515,6 +515,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
 	imx7d-nitrogen7.dtb \
 	imx7d-pico.dtb \
 	imx7d-sbc-imx7.dtb \
+	imx7d-sbc-iot-imx7.dtb \
 	imx7d-sdb.dtb \
 	imx7d-sdb-sht11.dtb \
 	imx7s-colibri-eval-v3.dtb \
arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts new file +156 -0

156 lines not on this page · raw message

Signature · 1 line
2.9.3
reviewer
#2 lore raw

Re: [PATCH v1 1/6] ARM: dts: imx7d-sbc-iot: add initial iot gateway dts

arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts line 154

Quoted 6 lines · On Tue, Dec 5, 2017 at 8:27 PM, <[email protected]> wrote:

+&usdhc1 {

arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts new file +5 -0
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+       enable-sdio-wakeup;

This is a deprecated property.

Please use wakeup-source as stated in
Documentation/devicetree/bindings/mmc/mmc.txt

author
#3 lore raw

PATCH 2/6 ARM: dts: imx7d-cl-som: add nodes for usbh, and usbotg2

In reply to [email protected]

From: Tyler Baker <[email protected]>

Add device tree nodes for the USB hub, and USB OTG. i2c2 on this platform supports low state retention power state so lets use it.

Signed-off-by Tyler Baker <[email protected]>
---
 arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 34 ++++++++++++++++++++++++++-------
 1 file changed, 27 insertions(+), 7 deletions(-)
arch/arm/boot/dts/imx7d-cl-som-imx7.dts +27 -7
index ae45af1..49bd371 100644
@@ -30,6 +30,16 @@
 		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
 	};
+
+	reg_usbh_nreset: regulator-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb_host_nreset";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pca9555 6 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+	};
 };
 
 &cpu0 {

@@ -199,6 +209,16 @@
 	status = "okay";
 };
 
+&usbotg2 {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usbh {
+	vbus-supply = <&reg_usbh_nreset>;
+	status = "okay";
+};
+
 &usdhc3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc3>;

@@ -247,13 +267,6 @@
 		>;
 	};
 
-	pinctrl_i2c2: i2c2grp {
-		fsl,pins = <
-			MX7D_PAD_I2C2_SDA__I2C2_SDA		0x4000007f
-			MX7D_PAD_I2C2_SCL__I2C2_SCL		0x4000007f
-		>;
-	};
-
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
 			MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79

@@ -284,4 +297,11 @@
 			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x14 /* OTG PWREN */
 		>;
 	};
+
+	pinctrl_i2c2: i2c2grp {
+		fsl,pins = <
+			MX7D_PAD_LPSR_GPIO1_IO07__I2C2_SDA		0x4000000f
+			MX7D_PAD_LPSR_GPIO1_IO06__I2C2_SCL		0x4000000f
+		>;
+	};
 };
Signature · 1 line
2.9.3
reviewer
#4 lore raw

Re: [PATCH v1 2/6] ARM: dts: imx7d-cl-som: add nodes for usbh, and usbotg2

Quoted 4 lines · On Tue, Dec 5, 2017 at 8:27 PM, <[email protected]> wrote:

From: Tyler Baker <[email protected]>

Add device tree nodes for the USB hub, and USB OTG. i2c2 on this platform supports low state retention power state so lets use it.

Looks like the I2C2 fix should be a separate patch.

author
#5 lore raw

PATCH 3/6 ARM: dts: imx7s: add dma support

In reply to [email protected]

From: Tyler Baker <[email protected]>

Enable dma on all SPI interfaces.

Signed-off-by Tyler Baker <[email protected]>
---
 arch/arm/boot/dts/imx7s.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/boot/dts/imx7s.dtsi +6 -0
index 82ad26e..7b85659 100644
@@ -700,6 +700,8 @@
 				clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
 					<&clks IMX7D_ECSPI1_ROOT_CLK>;
 				clock-names = "ipg", "per";
+				dmas = <&sdma 0 7 1>, <&sdma 1 7 2>;
+				dma-names = "rx", "tx";
 				status = "disabled";
 			};
 

@@ -712,6 +714,8 @@
 				clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
 					<&clks IMX7D_ECSPI2_ROOT_CLK>;
 				clock-names = "ipg", "per";
+				dmas = <&sdma 2 7 1>, <&sdma 3 7 2>;
+				dma-names = "rx", "tx";
 				status = "disabled";
 			};
 

@@ -724,6 +728,8 @@
 				clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
 					<&clks IMX7D_ECSPI3_ROOT_CLK>;
 				clock-names = "ipg", "per";
+				dmas = <&sdma 4 7 1>, <&sdma 5 7 2>;
+				dma-names = "rx", "tx";
 				status = "disabled";
 			};
Signature · 1 line
2.9.3
author
#7 lore raw

PATCH 4/6 ARM: dts: imx7s: add node and supplies for vdd1p2

In reply to [email protected]

From: Tyler Baker <[email protected]>

Add the regulator nodes and supplies for vdd1p2. This regulator is used to power the GPC and USB HSIC PHY.

Signed-off-by Tyler Baker <[email protected]>
---
 arch/arm/boot/dts/imx7s.dtsi | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)
arch/arm/boot/dts/imx7s.dtsi +16 -1
index 7b85659..151ab34 100644
@@ -522,6 +522,20 @@
 					anatop-max-voltage = <1200000>;
 					anatop-enable-bit = <0>;
 				};
+
+				reg_1p2: regulator-vdd1p2 at 220 {
+					compatible = "fsl,anatop-regulator";
+					regulator-name = "vdd1p2";
+					regulator-min-microvolt = <1100000>;
+					regulator-max-microvolt = <1300000>;
+					anatop-reg-offset = <0x220>;
+					anatop-vol-bit-shift = <8>;
+					anatop-vol-bit-width = <5>;
+					anatop-min-bit-val = <8>;
+					anatop-min-voltage = <1100000>;
+					anatop-max-voltage = <1300000>;
+					anatop-enable-bit = <0>;
+				};
 			};
 
 			snvs: snvs at 30370000 {

@@ -578,7 +592,7 @@
 				#interrupt-cells = <3>;
 				interrupt-parent = <&intc>;
 				#power-domain-cells = <1>;
-
+				vcc-supply = <&reg_1p2>;
 				pgc {
 					#address-cells = <1>;
 					#size-cells = <0>;

@@ -961,6 +975,7 @@
 				compatible = "usb-nop-xceiv";
 				clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
 				clock-names = "main_clk";
+				vcc-supply = <&reg_1p2>;
 			};
 
 			usdhc1: usdhc at 30b40000 {
Signature · 1 line
2.9.3
reviewer
#8 lore raw

Re: [PATCH v1 4/6] ARM: dts: imx7s: add node and supplies for vdd1p2

Quoted 15 lines · On Tue, Dec 5, 2017 at 8:27 PM, <[email protected]> wrote:

From: Tyler Baker <[email protected]>

Add the regulator nodes and supplies for vdd1p2. This regulator is used to power the GPC and USB HSIC PHY.

Signed-off-by Tyler Baker <[email protected]>
---
 arch/arm/boot/dts/imx7s.dtsi | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)
arch/arm/boot/dts/imx7s.dtsi +0 -0
index 7b85659..151ab34 100644

arch/arm/boot/dts/imx7s.dtsi line 526

Quoted 5 lines
arch/arm/boot/dts/imx7s.dtsi +2 -0
@@ -522,6 +522,20 @@
                                        anatop-max-voltage = <1200000>;
                                        anatop-enable-bit = <0>;
                                };
+
+                               reg_1p2: regulator-vdd1p2 at 220 {

Using a unit address without a corresponding reg would give you a warning with W=1.

Please see the patch I sent with Subject:
ARM: dts: imx7s: Add unit address and reg for the anatop nodes

author
#9 lore raw

PATCH 5/6 ARM: dts: imx7d-sbc-iot: enable PCIe peripheral

In reply to [email protected]

From: Tyler Baker <[email protected]>

Add a PCIe device tree node to enable PCIe support.

Signed-off-by Tyler Baker <[email protected]>
---
 arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx7d-sbc-iot-imx7.dts +13 -0
index 67aa4b7..7f45fa2 100644
@@ -79,6 +79,12 @@
 		>;
 	};
 
+	pinctrl_pcie: pciegrp {
+		fsl,pins = <
+			MX7D_PAD_EPDC_BDR1__GPIO2_IO29		0x34 /* PCIe RST */
+		>;
+	};
+
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			MX7D_PAD_LCD_ENABLE__UART2_DCE_TX	0x79 /* P7-12 */

@@ -119,6 +125,13 @@
 	};
 };
 
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	reset-gpio = <&gpio2 29 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
+
 &uart2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart2>;
Signature · 1 line
2.9.3
author
#11 lore raw

PATCH 6/6 ARM: dts: imx7s: add usb hsic phy domain

In reply to [email protected]

From: Tyler Baker <[email protected]>

The GPCv2 driver should control the MIPI, PCIe,
and USB HSIC PHY regulators. Add the USB HSIC
power domain to the GPC node.

Signed-off-by Tyler Baker <[email protected]>
---
 arch/arm/boot/dts/imx7s.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/boot/dts/imx7s.dtsi +6 -0
index 151ab34..9626a3e 100644
@@ -602,6 +602,12 @@
 						reg = <IMX7_POWER_DOMAIN_PCIE_PHY>;
 						power-supply = <&reg_1p0d>;
 					};
+					pgc_usb_hsic_phy: pgc-usb-hsic-phy-domain {
+						#power-domain-cells = <0>;
+
+						reg = <IMX7_POWER_DOMAIN_USB_HSIC_PHY>;
+						power-supply = <&reg_1p2>;
+					};
 				};
 			};
 		};
Signature · 1 line
2.9.3
reviewer Reviewed-by on v1 6/6
#12 lore raw

Re: [PATCH v1 6/6] ARM: dts: imx7s: add usb hsic phy domain

Quoted 7 lines · On Tue, Dec 5, 2017 at 8:27 PM, <[email protected]> wrote:

From: Tyler Baker <[email protected]>

The GPCv2 driver should control the MIPI, PCIe,
and USB HSIC PHY regulators. Add the USB HSIC
power domain to the GPC node.

Signed-off-by Tyler Baker <[email protected]>

Looks good. I am assuming you tested USB HSIC operation on the mx7 compulab board, right?

Reviewed-by Fabio Estevam <[email protected]>