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PCI: aardvark: misc fixes and improvements

PATCH Superseded Thomas Petazzoni 2 participants 14 messages Apr 6, 2018 – Jun 27, 2018

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Thomas Petazzoni

author
#0 lore raw

v4 cover PCI: aardvark: misc fixes and improvements

Bjorn, Lorenzo,

This patch series brings a number of improvements to the aardvark PCIe.

Changes since v3:

- Introduced advk_pcie_valid_device() late in the series, so that the patch fixing the logic in the PCIe configuration space read/write function does not depend on it. This is needed as we don't want the advk_pcie_valid_device() addition to go to stable.

Changes since v2:

- Rebased on v4.16-rc7

- Dropped the patches disabling L0S and aligning the MPS between RC and EP, since we are working on a different solution, implementing a proper root port. Therefore, this patch series only has the (hopefully) non-controversial changes.

- Add a patch (PATCH 1) that factorizes the logic to decide if the target of a configuration space access is a valid device or not into a advk_pcie_valid_device() helper, and adjust PATCH 2 accordingly.

- Drop unused PCIE_BDF macro in PATCH 3.

Best regards,

Thomas Petazzoni

Evan Wang (2):
PCI: aardvark: Fix PCIe Max Read Request Size setting
PCI: aardvark: Remove PCIe outbound window configuration

Thomas Petazzoni (1):
PCI: aardvark: Introduce an advk_pcie_valid_device() helper

Victor Gu (3):
PCI: aardvark: Fix logic in advk_pcie_{rd,wr}_conf()
PCI: aardvark: Set PIO_ADDR_LS correctly in advk_pcie_rd_conf()
PCI: aardvark: Use ISR1 instead of ISR0 interrupt in legacy irq mode

 drivers/pci/host/pci-aardvark.c | 117 ++++++++++++++--------------------------
 1 file changed, 39 insertions(+), 78 deletions(-)
Signature · 1 line
2.14.3
author
#1 lore raw

PATCH v4 1/6 PCI: aardvark: Fix logic in advk_pcie_{rd,wr}_conf()

From: Victor Gu <[email protected]>

The PCI configuration space read/write functions were special casing the situation where PCI_SLOT(devfn) != 0, and returned PCIBIOS_DEVICE_NOT_FOUND in this case.

However, while this is what is intended for the root bus, it is not intended for the child busses, as it prevents discovering devices with PCI_SLOT(x) != 0. Therefore, we return PCIBIOS_DEVICE_NOT_FOUND only if we're on the root bus.

Fixes 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Cc <[email protected]>
Signed-off-by Victor Gu <[email protected]>
Reviewed-by Wilson Ding <[email protected]>
Reviewed-by Nadav Haklai <[email protected]>
[Thomas: tweak commit log.]
Signed-off-by Thomas Petazzoni <[email protected]>

---
Changes since v3:
- Change to no longer depend on the introduction of advk_pcie_valid_device(), which we do not want to push to stable.
Changes since v2:
- The logic has been factorized into a advk_pcie_valid_device() helper in a previous patch, so this patch was adjusted accordingly.

---
 drivers/pci/host/pci-aardvark.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pci/host/pci-aardvark.c +2 -2
index b04d37b3c5de..b72f15c99793 100644
@@ -437,7 +437,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
 	u32 reg;
 	int ret;
 
-	if (PCI_SLOT(devfn) != 0) {
+	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0) {
 		*val = 0xffffffff;
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}

@@ -491,7 +491,7 @@ static int advk_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
 	int offset;
 	int ret;
 
-	if (PCI_SLOT(devfn) != 0)
+	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
 	if (where % size)
Signature · 1 line
2.14.3
author
#2 lore raw

PATCH v4 2/6 PCI: aardvark: Set PIO_ADDR_LS correctly in advk_pcie_rd_conf()

In reply to Thomas Petazzoni

From: Victor Gu <[email protected]>

When setting the PIO_ADDR_LS register during a configuration read, we were properly passing the device number, function number and register number, but not the bus number, causing issues when reading the configuration of PCIe devices.

Fixes 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Cc <[email protected]>
Signed-off-by Victor Gu <[email protected]>
Reviewed-by Wilson Ding <[email protected]>
Reviewed-by Nadav Haklai <[email protected]>
[Thomas: tweak commit log.]
Signed-off-by Thomas Petazzoni <[email protected]>

---
Changes since v2:
- Drop PCIE_BDF() macro, since it's no longer used. Noticed by Bjorn Helgaas.

---
 drivers/pci/host/pci-aardvark.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)
drivers/pci/host/pci-aardvark.c +1 -3
index b72f15c99793..5b8201aaf34d 100644
@@ -172,8 +172,6 @@
 #define PCIE_CONFIG_WR_TYPE0			0xa
 #define PCIE_CONFIG_WR_TYPE1			0xb
 
-/* PCI_BDF shifts 8bit, so we need extra 4bit shift */
-#define PCIE_BDF(dev)				(dev << 4)
 #define PCIE_CONF_BUS(bus)			(((bus) & 0xff) << 20)
 #define PCIE_CONF_DEV(dev)			(((dev) & 0x1f) << 15)
 #define PCIE_CONF_FUNC(fun)			(((fun) & 0x7)	<< 12)

@@ -456,7 +454,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
 	advk_writel(pcie, reg, PIO_CTRL);
 
 	/* Program the address registers */
-	reg = PCIE_BDF(devfn) | PCIE_CONF_REG(where);
+	reg = PCIE_CONF_ADDR(bus->number, devfn, where);
 	advk_writel(pcie, reg, PIO_ADDR_LS);
 	advk_writel(pcie, 0, PIO_ADDR_MS);
Signature · 1 line
2.14.3
author
#3 lore raw

PATCH v4 3/6 PCI: aardvark: Use ISR1 instead of ISR0 interrupt in legacy irq mode

In reply to Thomas Petazzoni

From: Victor Gu <[email protected]>

The Aardvark has two interrupts sets:

- first set is bit[23:16] of PCIe ISR 0 register(RD0074840h)

- second set is bit[11:8] of PCIe ISR 1 register(RD0074848h)

Only one set should be used, while another set should be masked.

The second set, ISR1, is more advanced, the Legacy INT_X status bit is asserted once Assert_INTX message is received, and de-asserted after Deassert_INTX message is received. Therefore, it matches what the driver is currently doing in the ->irq_mask() and ->irq_unmask() functions. The ISR0 requires additional work to deassert the interrupt, which the driver doesn't do currently.

This commit resolves a number of issues with legacy interrupts.

This is part of fixing bug
https://bugzilla.kernel.org/show_bug.cgi?id=196339, this commit was reported as the user to be important to get a Intel 7260 mini-PCIe WiFi card working.

Fixes 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Cc <[email protected]>
Signed-off-by Victor Gu <[email protected]>
Reviewed-by Evan Wang <[email protected]>
Reviewed-by Nadav Haklai <[email protected]>
[Thomas: tweak commit log.]
Signed-off-by Thomas Petazzoni <[email protected]>
---
 drivers/pci/host/pci-aardvark.c | 41 ++++++++++++++++++++++++-----------------
 1 file changed, 24 insertions(+), 17 deletions(-)
drivers/pci/host/pci-aardvark.c +24 -17
index 5b8201aaf34d..7a0ddb709052 100644
@@ -100,7 +100,8 @@
 #define PCIE_ISR1_MASK_REG			(CONTROL_BASE_ADDR + 0x4C)
 #define     PCIE_ISR1_POWER_STATE_CHANGE	BIT(4)
 #define     PCIE_ISR1_FLUSH			BIT(5)
-#define     PCIE_ISR1_ALL_MASK			GENMASK(5, 4)
+#define     PCIE_ISR1_INTX_ASSERT(val)		BIT(8 + (val))
+#define     PCIE_ISR1_ALL_MASK			GENMASK(11, 4)
 #define PCIE_MSI_ADDR_LOW_REG			(CONTROL_BASE_ADDR + 0x50)
 #define PCIE_MSI_ADDR_HIGH_REG			(CONTROL_BASE_ADDR + 0x54)
 #define PCIE_MSI_STATUS_REG			(CONTROL_BASE_ADDR + 0x58)

@@ -607,9 +608,9 @@ static void advk_pcie_irq_mask(struct irq_data *d)
 	irq_hw_number_t hwirq = irqd_to_hwirq(d);
 	u32 mask;
 
-	mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);
-	mask |= PCIE_ISR0_INTX_ASSERT(hwirq);
-	advk_writel(pcie, mask, PCIE_ISR0_MASK_REG);
+	mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
+	mask |= PCIE_ISR1_INTX_ASSERT(hwirq);
+	advk_writel(pcie, mask, PCIE_ISR1_MASK_REG);
 }
 
 static void advk_pcie_irq_unmask(struct irq_data *d)

@@ -618,9 +619,9 @@ static void advk_pcie_irq_unmask(struct irq_data *d)
 	irq_hw_number_t hwirq = irqd_to_hwirq(d);
 	u32 mask;
 
-	mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);
-	mask &= ~PCIE_ISR0_INTX_ASSERT(hwirq);
-	advk_writel(pcie, mask, PCIE_ISR0_MASK_REG);
+	mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
+	mask &= ~PCIE_ISR1_INTX_ASSERT(hwirq);
+	advk_writel(pcie, mask, PCIE_ISR1_MASK_REG);
 }
 
 static int advk_pcie_irq_map(struct irq_domain *h,

@@ -763,29 +764,35 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie)
 
 static void advk_pcie_handle_int(struct advk_pcie *pcie)
 {
-	u32 val, mask, status;
+	u32 isr0_val, isr0_mask, isr0_status;
+	u32 isr1_val, isr1_mask, isr1_status;
 	int i, virq;
 
-	val = advk_readl(pcie, PCIE_ISR0_REG);
-	mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);
-	status = val & ((~mask) & PCIE_ISR0_ALL_MASK);
+	isr0_val = advk_readl(pcie, PCIE_ISR0_REG);
+	isr0_mask = advk_readl(pcie, PCIE_ISR0_MASK_REG);
+	isr0_status = isr0_val & ((~isr0_mask) & PCIE_ISR0_ALL_MASK);
 
-	if (!status) {
-		advk_writel(pcie, val, PCIE_ISR0_REG);
+	isr1_val = advk_readl(pcie, PCIE_ISR1_REG);
+	isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
+	isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK);
+
+	if (!isr0_status && !isr1_status) {
+		advk_writel(pcie, isr0_val, PCIE_ISR0_REG);
+		advk_writel(pcie, isr1_val, PCIE_ISR1_REG);
 		return;
 	}
 
 	/* Process MSI interrupts */
-	if (status & PCIE_ISR0_MSI_INT_PENDING)
+	if (isr0_status & PCIE_ISR0_MSI_INT_PENDING)
 		advk_pcie_handle_msi(pcie);
 
 	/* Process legacy interrupts */
 	for (i = 0; i < PCI_NUM_INTX; i++) {
-		if (!(status & PCIE_ISR0_INTX_ASSERT(i)))
+		if (!(isr1_status & PCIE_ISR1_INTX_ASSERT(i)))
 			continue;
 
-		advk_writel(pcie, PCIE_ISR0_INTX_ASSERT(i),
-			    PCIE_ISR0_REG);
+		advk_writel(pcie, PCIE_ISR1_INTX_ASSERT(i),
+			    PCIE_ISR1_REG);
 
 		virq = irq_find_mapping(pcie->irq_domain, i);
 		generic_handle_irq(virq);
Signature · 1 line
2.14.3
author
#4 lore raw

PATCH v4 4/6 PCI: aardvark: Fix PCIe Max Read Request Size setting

In reply to Thomas Petazzoni

From: Evan Wang <[email protected]>

There is an obvious typo issue in the definition of the PCIe maximum read request size: a bit shift is directly used as a value, while it should be used to shift the correct value.

Fixes 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Cc <[email protected]>
Signed-off-by Evan Wang <[email protected]>
Reviewed-by Victor Gu <[email protected]>
Reviewed-by Nadav Haklai <[email protected]>
[Thomas: tweak commit log.]
Signed-off-by Thomas Petazzoni <[email protected]>
---
 drivers/pci/host/pci-aardvark.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
drivers/pci/host/pci-aardvark.c +3 -1
index 7a0ddb709052..9abf549631b4 100644
@@ -29,6 +29,7 @@
 #define     PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT	5
 #define     PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE		(0 << 11)
 #define     PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT	12
+#define     PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ		0x2
 #define PCIE_CORE_LINK_CTRL_STAT_REG				0xd0
 #define     PCIE_CORE_LINK_L0S_ENTRY				BIT(0)
 #define     PCIE_CORE_LINK_TRAINING				BIT(5)

@@ -295,7 +296,8 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
 	reg = PCIE_CORE_DEV_CTRL_STATS_RELAX_ORDER_DISABLE |
 		(7 << PCIE_CORE_DEV_CTRL_STATS_MAX_PAYLOAD_SZ_SHIFT) |
 		PCIE_CORE_DEV_CTRL_STATS_SNOOP_DISABLE |
-		PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT;
+		(PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SZ <<
+		 PCIE_CORE_DEV_CTRL_STATS_MAX_RD_REQ_SIZE_SHIFT);
 	advk_writel(pcie, reg, PCIE_CORE_DEV_CTRL_STATS_REG);
 
 	/* Program PCIe Control 2 to disable strict ordering */
Signature · 1 line
2.14.3
author
#5 lore raw

PATCH v4 5/6 PCI: aardvark: Introduce an advk_pcie_valid_device() helper

In reply to Thomas Petazzoni

In other to mimic other PCIe host controller drivers, introduce an advk_pcie_valid_device() helper, used in the configuration read/write functions.

Signed-off-by Thomas Petazzoni <[email protected]>

---
Changes since v4:
- Move later into the series, so that it doesn't need to be pushed as a fix for stable.
Changes since v3:
- Make the new helper return a bool instead of int
Changes since v2:
- New patch

---
 drivers/pci/host/pci-aardvark.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)
drivers/pci/host/pci-aardvark.c +11 -2
index 9abf549631b4..69c4fd50947e 100644
@@ -431,6 +431,15 @@ static int advk_pcie_wait_pio(struct advk_pcie *pcie)
 	return -ETIMEDOUT;
 }
 
+static bool advk_pcie_valid_device(struct advk_pcie *pcie, struct pci_bus *bus,
+				  int devfn)
+{
+	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0)
+		return false;
+
+	return true;
+}
+
 static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
 			     int where, int size, u32 *val)
 {

@@ -438,7 +447,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
 	u32 reg;
 	int ret;
 
-	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0) {
+	if (!advk_pcie_valid_device(pcie, bus, devfn)) {
 		*val = 0xffffffff;
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}

@@ -492,7 +501,7 @@ static int advk_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
 	int offset;
 	int ret;
 
-	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0)
+	if (!advk_pcie_valid_device(pcie, bus, devfn))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
 	if (where % size)
Signature · 1 line
2.14.3
#6 lore raw

PATCH v4 5/6 PCI: aardvark: Introduce an advk_pcie_valid_device() helper

Quoted 13 lines · Thomas Petazzoni

In other to mimic other PCIe host controller drivers, introduce an advk_pcie_valid_device() helper, used in the configuration read/write functions.

Signed-off-by Thomas Petazzoni <[email protected]>

---
Changes since v4:
- Move later into the series, so that it doesn't need to be pushed as a fix for stable.
Changes since v3:
- Make the new helper return a bool instead of int
Changes since v2:
- New patch

Quoted 3 lines
---
 drivers/pci/host/pci-aardvark.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

Hi Thomas,

please rebase patch 5 (this patch) and 6 and resend, I will apply them straight away, sorry for the delay.

Thanks,
Lorenzo

Quoted 41 lines
drivers/pci/host/pci-aardvark.c +11 -2
index 9abf549631b4..69c4fd50947e 100644
@@ -431,6 +431,15 @@ static int advk_pcie_wait_pio(struct advk_pcie *pcie)
 	return -ETIMEDOUT;
 }
 
+static bool advk_pcie_valid_device(struct advk_pcie *pcie, struct pci_bus *bus,
+				  int devfn)
+{
+	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0)
+		return false;
+
+	return true;
+}
+
 static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
 			     int where, int size, u32 *val)
 {

@@ -438,7 +447,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
 	u32 reg;
 	int ret;
 
-	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0) {
+	if (!advk_pcie_valid_device(pcie, bus, devfn)) {
 		*val = 0xffffffff;
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}

@@ -492,7 +501,7 @@ static int advk_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
 	int offset;
 	int ret;
 
-	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0)
+	if (!advk_pcie_valid_device(pcie, bus, devfn))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
 	if (where % size)
Signature · 1 line
2.14.3
#7 lore raw

PATCH v4 5/6 PCI: aardvark: Introduce an advk_pcie_valid_device() helper

Quoted 18 lines · Lorenzo Pieralisi
Quoted 13 lines · Thomas Petazzoni

In other to mimic other PCIe host controller drivers, introduce an advk_pcie_valid_device() helper, used in the configuration read/write functions.

Signed-off-by Thomas Petazzoni <[email protected]>

---
Changes since v4:
- Move later into the series, so that it doesn't need to be pushed as a fix for stable.
Changes since v3:
- Make the new helper return a bool instead of int
Changes since v2:
- New patch

Quoted 3 lines
---
 drivers/pci/host/pci-aardvark.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)
Quoted 4 lines

Hi Thomas,

please rebase patch 5 (this patch) and 6 and resend, I will apply them straight away, sorry for the delay.

Never mind, I handled the host->controller dir move myself, applied both to pci/aardvark for v4.19, thanks.

Lorenzo

Quoted 44 lines

Thanks,
Lorenzo

Quoted 41 lines
drivers/pci/host/pci-aardvark.c +11 -2
index 9abf549631b4..69c4fd50947e 100644
@@ -431,6 +431,15 @@ static int advk_pcie_wait_pio(struct advk_pcie *pcie)
 	return -ETIMEDOUT;
 }
 
+static bool advk_pcie_valid_device(struct advk_pcie *pcie, struct pci_bus *bus,
+				  int devfn)
+{
+	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0)
+		return false;
+
+	return true;
+}
+
 static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
 			     int where, int size, u32 *val)
 {

@@ -438,7 +447,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
 	u32 reg;
 	int ret;
 
-	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0) {
+	if (!advk_pcie_valid_device(pcie, bus, devfn)) {
 		*val = 0xffffffff;
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}

@@ -492,7 +501,7 @@ static int advk_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
 	int offset;
 	int ret;
 
-	if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0)
+	if (!advk_pcie_valid_device(pcie, bus, devfn))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
 	if (where % size)
Signature · 1 line
2.14.3
author
#8 lore raw

PATCH v4 5/6 PCI: aardvark: Introduce an advk_pcie_valid_device() helper

Hello,

Quoted 5 lines · Lorenzo Pieralisi
Quoted 2 lines

please rebase patch 5 (this patch) and 6 and resend, I will apply them straight away, sorry for the delay.

Never mind, I handled the host->controller dir move myself, applied both to pci/aardvark for v4.19, thanks.

Great, thanks for doing this. I'm working on other Aardvark patches, so I'll make sure to rebase on top of the latest changes.

Thanks,

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
author
#9 lore raw

PATCH v4 6/6 PCI: aardvark: Remove PCIe outbound window configuration

In reply to Thomas Petazzoni

From: Evan Wang <[email protected]>

Outbound window is used to translate CPU space addresses to PCIe space addresses when the CPU initiates PCIe transactions.

According to the suggestion of the HW designers, the recommended solution is to use the default outbound parameters, even though the current outbound window setting does not cause any known functional issue.

This patch doesn't address any known functional issue, but aligns to HW design guidelines, and removes code that isn't needed.

Signed-off-by Evan Wang <[email protected]>
Reviewed-by Victor Gu <[email protected]>
Reviewed-by Nadav Haklai <[email protected]>
[Thomas: tweak commit log.]
Signed-off-by Thomas Petazzoni <[email protected]>
---
 drivers/pci/host/pci-aardvark.c | 55 -----------------------------------------
 1 file changed, 55 deletions(-)
drivers/pci/host/pci-aardvark.c +0 -55
index 69c4fd50947e..702160c4ae09 100644
@@ -109,24 +109,6 @@
 #define PCIE_MSI_MASK_REG			(CONTROL_BASE_ADDR + 0x5C)
 #define PCIE_MSI_PAYLOAD_REG			(CONTROL_BASE_ADDR + 0x9C)
 
-/* PCIe window configuration */
-#define OB_WIN_BASE_ADDR			0x4c00
-#define OB_WIN_BLOCK_SIZE			0x20
-#define OB_WIN_REG_ADDR(win, offset)		(OB_WIN_BASE_ADDR + \
-						 OB_WIN_BLOCK_SIZE * (win) + \
-						 (offset))
-#define OB_WIN_MATCH_LS(win)			OB_WIN_REG_ADDR(win, 0x00)
-#define OB_WIN_MATCH_MS(win)			OB_WIN_REG_ADDR(win, 0x04)
-#define OB_WIN_REMAP_LS(win)			OB_WIN_REG_ADDR(win, 0x08)
-#define OB_WIN_REMAP_MS(win)			OB_WIN_REG_ADDR(win, 0x0c)
-#define OB_WIN_MASK_LS(win)			OB_WIN_REG_ADDR(win, 0x10)
-#define OB_WIN_MASK_MS(win)			OB_WIN_REG_ADDR(win, 0x14)
-#define OB_WIN_ACTIONS(win)			OB_WIN_REG_ADDR(win, 0x18)
-
-/* PCIe window types */
-#define OB_PCIE_MEM				0x0
-#define OB_PCIE_IO				0x4
-
 /* LMI registers base address and register offsets */
 #define LMI_BASE_ADDR				0x6000
 #define CFG_REG					(LMI_BASE_ADDR + 0x0)

@@ -245,34 +227,9 @@ static int advk_pcie_wait_for_link(struct advk_pcie *pcie)
 	return -ETIMEDOUT;
 }
 
-/*
- * Set PCIe address window register which could be used for memory
- * mapping.
- */
-static void advk_pcie_set_ob_win(struct advk_pcie *pcie,
-				 u32 win_num, u32 match_ms,
-				 u32 match_ls, u32 mask_ms,
-				 u32 mask_ls, u32 remap_ms,
-				 u32 remap_ls, u32 action)
-{
-	advk_writel(pcie, match_ls, OB_WIN_MATCH_LS(win_num));
-	advk_writel(pcie, match_ms, OB_WIN_MATCH_MS(win_num));
-	advk_writel(pcie, mask_ms, OB_WIN_MASK_MS(win_num));
-	advk_writel(pcie, mask_ls, OB_WIN_MASK_LS(win_num));
-	advk_writel(pcie, remap_ms, OB_WIN_REMAP_MS(win_num));
-	advk_writel(pcie, remap_ls, OB_WIN_REMAP_LS(win_num));
-	advk_writel(pcie, action, OB_WIN_ACTIONS(win_num));
-	advk_writel(pcie, match_ls | BIT(0), OB_WIN_MATCH_LS(win_num));
-}
-
 static void advk_pcie_setup_hw(struct advk_pcie *pcie)
 {
 	u32 reg;
-	int i;
-
-	/* Point PCIe unit MBUS decode windows to DRAM space */
-	for (i = 0; i < 8; i++)
-		advk_pcie_set_ob_win(pcie, i, 0, 0, 0, 0, 0, 0, 0);
 
 	/* Set to Direct mode */
 	reg = advk_readl(pcie, CTRL_CONFIG_REG);

@@ -851,12 +808,6 @@ static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie)
 
 		switch (resource_type(res)) {
 		case IORESOURCE_IO:
-			advk_pcie_set_ob_win(pcie, 1,
-					     upper_32_bits(res->start),
-					     lower_32_bits(res->start),
-					     0,	0xF8000000, 0,
-					     lower_32_bits(res->start),
-					     OB_PCIE_IO);
 			err = pci_remap_iospace(res, iobase);
 			if (err) {
 				dev_warn(dev, "error %d: failed to map resource %pR\n",

@@ -865,12 +816,6 @@ static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie)
 			}
 			break;
 		case IORESOURCE_MEM:
-			advk_pcie_set_ob_win(pcie, 0,
-					     upper_32_bits(res->start),
-					     lower_32_bits(res->start),
-					     0x0, 0xF8000000, 0,
-					     lower_32_bits(res->start),
-					     (2 << 20) | OB_PCIE_MEM);
 			res_valid |= !(res->flags & IORESOURCE_PREFETCH);
 			break;
 		case IORESOURCE_BUS:
Signature · 1 line
2.14.3
#10 lore raw

v4 cover PCI: aardvark: misc fixes and improvements

In reply to Thomas Petazzoni
Quoted 4 lines · Thomas Petazzoni

Bjorn, Lorenzo,

This patch series brings a number of improvements to the aardvark PCIe.

Hi Thomas,

it is not just improvements, these look like significant bug fixes too.

Let me know which patches we should prioritize since hopefully they can be sent during v4.17-rc* releases, I will queue the rest for the next merge window.

Thanks,
Lorenzo

Quoted 48 lines

Changes since v3:

- Introduced advk_pcie_valid_device() late in the series, so that the patch fixing the logic in the PCIe configuration space read/write function does not depend on it. This is needed as we don't want the advk_pcie_valid_device() addition to go to stable.

Changes since v2:

- Rebased on v4.16-rc7

- Dropped the patches disabling L0S and aligning the MPS between RC and EP, since we are working on a different solution, implementing a proper root port. Therefore, this patch series only has the (hopefully) non-controversial changes.

- Add a patch (PATCH 1) that factorizes the logic to decide if the target of a configuration space access is a valid device or not into a advk_pcie_valid_device() helper, and adjust PATCH 2 accordingly.

- Drop unused PCIE_BDF macro in PATCH 3.

Best regards,

Thomas Petazzoni

Evan Wang (2):
PCI: aardvark: Fix PCIe Max Read Request Size setting
PCI: aardvark: Remove PCIe outbound window configuration

Thomas Petazzoni (1):
PCI: aardvark: Introduce an advk_pcie_valid_device() helper

Victor Gu (3):
PCI: aardvark: Fix logic in advk_pcie_{rd,wr}_conf()
PCI: aardvark: Set PIO_ADDR_LS correctly in advk_pcie_rd_conf()
PCI: aardvark: Use ISR1 instead of ISR0 interrupt in legacy irq mode

 drivers/pci/host/pci-aardvark.c | 117 ++++++++++++++--------------------------
 1 file changed, 39 insertions(+), 78 deletions(-)
Signature · 1 line
2.14.3
author
#11 lore raw

v4 cover PCI: aardvark: misc fixes and improvements

Hello Lorenzo,

Thanks for your feedback!

Quoted 5 lines · Lorenzo Pieralisi

it is not just improvements, these look like significant bug fixes too.

Let me know which patches we should prioritize since hopefully they can be sent during v4.17-rc* releases, I will queue the rest for the next merge window.

The patches that are bug fixes are marked with a "Fixes:" tag and are Cc'ed to stable.

So, the following patches are fixes:

[PATCH v4 1/6] PCI: aardvark: Fix logic in advk_pcie_{rd,wr}_conf() [PATCH v4 2/6] PCI: aardvark: Set PIO_ADDR_LS correctly in advk_pcie_rd_conf() [PATCH v4 3/6] PCI: aardvark: Use ISR1 instead of ISR0 interrupt in legacy irq mode [PATCH v4 4/6] PCI: aardvark: Fix PCIe Max Read Request Size setting

The following patches are improvements:

[PATCH v4 5/6] PCI: aardvark: Introduce an advk_pcie_valid_device() helper [PATCH v4 6/6] PCI: aardvark: Remove PCIe outbound window configuration

Thanks!

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
#12 lore raw

v4 cover PCI: aardvark: misc fixes and improvements

Quoted 22 lines · Thomas Petazzoni

Hello Lorenzo,

Thanks for your feedback!

Quoted 5 lines · Lorenzo Pieralisi

it is not just improvements, these look like significant bug fixes too.

Let me know which patches we should prioritize since hopefully they can be sent during v4.17-rc* releases, I will queue the rest for the next merge window.

The patches that are bug fixes are marked with a "Fixes:" tag and are Cc'ed to stable.

So, the following patches are fixes:

[PATCH v4 1/6] PCI: aardvark: Fix logic in advk_pcie_{rd,wr}_conf() [PATCH v4 2/6] PCI: aardvark: Set PIO_ADDR_LS correctly in advk_pcie_rd_conf() [PATCH v4 3/6] PCI: aardvark: Use ISR1 instead of ISR0 interrupt in legacy irq mode [PATCH v4 4/6] PCI: aardvark: Fix PCIe Max Read Request Size setting

Quoted 4 lines

The following patches are improvements:

[PATCH v4 5/6] PCI: aardvark: Introduce an advk_pcie_valid_device() helper [PATCH v4 6/6] PCI: aardvark: Remove PCIe outbound window configuration

I added those four patches to my pci/host/fixes branch, please have a look if they meet your expectations and if so I will ask Bjorn to send them if he thinks they are fit for -rc*.

Thanks,
Lorenzo

author
#13 lore raw

v4 cover PCI: aardvark: misc fixes and improvements

Hello,

Quoted 7 lines · Lorenzo Pieralisi
Quoted 7 lines

So, the following patches are fixes:

[PATCH v4 1/6] PCI: aardvark: Fix logic in advk_pcie_{rd,wr}_conf() [PATCH v4 2/6] PCI: aardvark: Set PIO_ADDR_LS correctly in advk_pcie_rd_conf() [PATCH v4 3/6] PCI: aardvark: Use ISR1 instead of ISR0 interrupt in legacy irq mode [PATCH v4 4/6] PCI: aardvark: Fix PCIe Max Read Request Size setting

Quoted 8 lines
Quoted 4 lines

The following patches are improvements:

[PATCH v4 5/6] PCI: aardvark: Introduce an advk_pcie_valid_device() helper [PATCH v4 6/6] PCI: aardvark: Remove PCIe outbound window configuration

I added those four patches to my pci/host/fixes branch, please have a look if they meet your expectations and if so I will ask Bjorn to send them if he thinks they are fit for -rc*.

Looks good to me. Those four patches are indeed the ones that would ideally be sent during the -rc cycle. Thanks a lot!

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com