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dra7: mmc: Update mmc dt node to use sdhci-omap

PATCH Superseded Kishon Vijay Abraham I 3 participants 22 messages Apr 25, 2018 – Apr 27, 2018

Subsystems (3)

v3 of 4 Superseded Latest is v4 →

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#0 lore raw

v3 cover dra7: mmc: Update mmc dt node to use sdhci-omap

Previous version of the patch series was sent here
https://lkml.org/lkml/2018/2/6/250

Most of the patches sent for v2 was merged. Remaining unmerged patches from v2 and a few additional patches are sent here.

This series should be merged only after [1].
[1] -> https://marc.info/?l=linux-kernel&m=152465820531802&w=2

This series:
*) Adds wilink wlan support (Now all MMC instances in DRA7 will use
sdhci-omap)
*) Add a new pinctrl group for clk line without pullup required for
UHS cards to work reliably.
*) Update README to make sure users update .config file from 4.18
kernel.
*) Use sdhci-omap programming model.

In the "Use sdhci-omap programming model" patch, "ti,omap4-hsmmc" compatible is removed. This is because if both "ti,dra7-sdhci" and "ti,omap4-hsmmc" is added and if there is probe deferral in sdhci_omap driver, the device is binding to omap_hsmmc driver.

Once omap_hsmmc and sdhci_omap driver are feature identical, sdhci_omap driver will be made to support omap_hsmmc binding (including "ti,omap4-hsmmc" compatible) and omap_hsmmc driver will be removed. Till then dt nodes with "ti,omap4-hsmmc" compatible will use omap_hsmmc driver and "ti,dra7-sdhci" compatible will use sdhci_omap driver.

Hari Nagalla (2):
ARM: dts: dra72-evm-common: Add wilink8 wlan support
ARM: dts: dra7-evm: Add wilink8 wlan support

Kishon Vijay Abraham I (11):
ARM: dts: dra72-evm-common: Remove mmc specific pinmux
ARM: dts: dra71-evm: Add "vqmmc-supply" property for mmc2
ARM: dts: dra72x-mmc-iodelay: Add a new pinctrl group for clk line
without pullup
ARM: dts: dra74x-mmc-iodelay: Add a new pinctrl group for clk line
without pullup
ARM: dts: dra76x-mmc-iodelay: Add a new pinctrl group for clk line
without pullup
ARM: dts: am57xx-idk: Use pinctrl group from dra7xx-mmc-iodelay.dtsi
to select pulldown
ARM: dts: dra71-evm: Use pinctrl group from dra72x-mmc-iodelay.dtsi to
select pulldown
ARM: dts: dra7-evm: Model EVM_3V6 regulator
ARM: dts: dra7: Use sdhci-omap programming model
ARM: dts: dra7: Add high speed modes capability to MMC1/MMC2 dt node
Documentation: ARM: Add new MMC requirements for DRA7/K2G

Sekhar Nori (1):
ARM: dts: am574x-idk: Add pinmux configuration for MMC

Vishal Mahaveer (1):
ARM: dts: dra76-evm: Add wilink8 wlan support

 Documentation/arm/OMAP/README                 |  4 ++
 arch/arm/boot/dts/am571x-idk.dts              |  2 +-
 arch/arm/boot/dts/am572x-idk.dts              |  2 +-
 arch/arm/boot/dts/am574x-idk.dts              | 19 +++++
 .../boot/dts/am57xx-beagle-x15-common.dtsi    |  4 +-
 arch/arm/boot/dts/am57xx-beagle-x15.dts       |  1 +
 arch/arm/boot/dts/am57xx-idk-common.dtsi      |  3 +-
 arch/arm/boot/dts/dra7-evm-common.dtsi        | 15 ++++
 arch/arm/boot/dts/dra7-evm.dts                | 68 ++++++++++++++++++
 arch/arm/boot/dts/dra7.dtsi                   | 30 ++++----
 arch/arm/boot/dts/dra71-evm.dts               | 16 +----
 arch/arm/boot/dts/dra72-evm-common.dtsi       | 71 +++++++++++--------
 arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi     | 22 ++++++
 arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi     | 11 +++
 arch/arm/boot/dts/dra76-evm.dts               | 34 ++++++++-
 arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi     | 11 +++
 16 files changed, 248 insertions(+), 65 deletions(-)
Signature · 1 line
2.17.0
#1 lore raw

PATCH v3 1/15 ARM: dts: dra72-evm-common: Remove mmc specific pinmux

mmc specific pinmux is selected from dra72x-mmc-iodelay.dtsi, so remove it from dra72-evm-common.dtsi.

---
 arch/arm/boot/dts/dra72-evm-common.dtsi | 27 -------------------------
 1 file changed, 27 deletions(-)
arch/arm/boot/dts/dra72-evm-common.dtsi +0 -27
index e85f560a2f78..8e3b185d864b 100644
@@ -174,33 +174,6 @@
 };
 
 &dra7_pmx_core {
-	mmc1_pins_default: mmc1_pins_default {
-		pinctrl-single,pins = <
-			DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14)	/* mmc1sdcd.gpio219 */
-			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
-			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
-			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
-			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
-			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
-			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
-		>;
-	};
-
-	mmc2_pins_default: mmc2_pins_default {
-		pinctrl-single,pins = <
-			DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
-			DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
-			DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
-			DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
-			DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
-			DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
-			DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
-			DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
-			DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
-			DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
-		>;
-	};
-
 	dcan1_pins_default: dcan1_pins_default {
 		pinctrl-single,pins = <
 			DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
Signature · 1 line
2.17.0
#2 lore raw

PATCH v3 2/15 ARM: dts: dra71-evm: Add "vqmmc-supply" property for mmc2

In reply to Kishon Vijay Abraham I

Add "vqmmc-supply" property for mmc2 to indicate the supply connected to the IO lines.

---
 arch/arm/boot/dts/dra71-evm.dts | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/dra71-evm.dts +1 -0
index ebc4bbae981e..64c57d87ca2f 100644
@@ -204,6 +204,7 @@
 	pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
 	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
 	vmmc-supply = <&evm_1v8_sw>;
+	vqmmc-supply = <&evm_1v8_sw>;
 };
 
 &mac {
Signature · 1 line
2.17.0
#3 lore raw

PATCH v3 3/15 ARM: dts: dra72x-mmc-iodelay: Add a new pinctrl group for clk line without pullup

In reply to Kishon Vijay Abraham I

During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type.

According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms.

In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down.

Add a new pinctrl group for clock line without pullup to be used in boards where mmc1_clk line is not connected to an external pullup.

---
 arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi +11 -0
index 088013c6dc6e..c9351eaf97f0 100644
@@ -51,6 +51,17 @@
 		>;
 	};
 
+	mmc1_pins_default_no_clk_pu: mmc1_pins_default_no_clk_pu {
+		pinctrl-single,pins = <
+			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
+			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+		>;
+	};
+
 	mmc1_pins_sdr12: mmc1_pins_sdr12 {
 		pinctrl-single,pins = <
 			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_clk.clk */
Signature · 1 line
2.17.0
#4 lore raw

PATCH v3 4/15 ARM: dts: dra74x-mmc-iodelay: Add a new pinctrl group for clk line without pullup

In reply to Kishon Vijay Abraham I

During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type.

According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK line low for at least 5ms.

In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down.

Add a new pinctrl group for clock line without pullup to be used in boards where mmc1_clk line is not connected to an external pullup.

---
 arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi +11 -0
index 28ebb4eb884a..30af5a03a852 100644
@@ -49,6 +49,17 @@
 		>;
 	};
 
+	mmc1_pins_default_no_clk_pu: mmc1_pins_default_no_clk_pu {
+		pinctrl-single,pins = <
+			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
+			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+		>;
+	};
+
 	mmc1_pins_sdr12: mmc1_pins_sdr12 {
 		pinctrl-single,pins = <
 			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_clk.clk */
Signature · 1 line
2.17.0
#5 lore raw

Re: [PATCH v3 04/15] ARM: dts: dra74x-mmc-iodelay: Add a new pinctrl group for clk line without pullup

Quoted 11 lines · Kishon Vijay Abraham I
arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi +4 -0
@@ -49,6 +49,17 @@
 		>;
 	};
 
+	mmc1_pins_default_no_clk_pu: mmc1_pins_default_no_clk_pu {
+		pinctrl-single,pins = <
+			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
+			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */

arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi line 65

Quoted 10 lines
arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi +7 -0
+			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+		>;
+	};
+
 	mmc1_pins_sdr12: mmc1_pins_sdr12 {
 		pinctrl-single,pins = <
 			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_clk.clk */

If this data is the same for all of them, why don't you add something like dra7-iodelay.dtsi that can be included as needed?

Regards,

Tony

#6 lore raw

Re: [PATCH v3 04/15] ARM: dts: dra74x-mmc-iodelay: Add a new pinctrl group for clk line without pullup

Hi Tony,

Quoted 17 lines · Tony Lindgren
Quoted 16 lines · Kishon Vijay Abraham I
arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi +10 -0
@@ -49,6 +49,17 @@
 		>;
 	};
 
+	mmc1_pins_default_no_clk_pu: mmc1_pins_default_no_clk_pu {
+		pinctrl-single,pins = <
+			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
+			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+		>;
+	};
Quoted 8 lines

arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi line 65

Quoted 5 lines
arch/arm/boot/dts/dra74x-mmc-iodelay.dtsi +1 -0
+
 	mmc1_pins_sdr12: mmc1_pins_sdr12 {
 		pinctrl-single,pins = <
 			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc1_clk.clk */

If this data is the same for all of them, why don't you add something like dra7-iodelay.dtsi that can be included as needed?

okay, I'll add dra7-mmc-iodelay.dtsi and send a new revision.

Thanks
Kishon

#7 lore raw

PATCH v3 5/15 ARM: dts: dra76x-mmc-iodelay: Add a new pinctrl group for clk line without pullup

In reply to Kishon Vijay Abraham I

During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type.

According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK line low for at least 5ms.

In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down.

Add a new pinctrl group for clock line without pullup to be used in boards where mmc1_clk line is not connected to an external pullup.

---
 arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi +11 -0
index baba7b00eca7..b6327220a88e 100644
@@ -38,6 +38,17 @@
 		>;
 	};
 
+	mmc1_pins_default_no_clk_pu: mmc1_pins_default_no_clk_pu {
+		pinctrl-single,pins = <
+			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
+			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+		>;
+	};
+
 	mmc1_pins_hs: mmc1_pins_hs {
 		pinctrl-single,pins = <
 			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
Signature · 1 line
2.17.0
#8 lore raw

PATCH v3 6/15 ARM: dts: am57xx-idk: Use pinctrl group from dra7xx-mmc-iodelay.dtsi to select pulldown

In reply to Kishon Vijay Abraham I

commit 18aa0f4bca701cb078a6 ("ARM: dts: am57xx-idk: Select pull down for mmc1_clk line in default mode") modified mmc1_pins_default pinctrl group in am57xx-idk-common.dtsi in order to change the CLK line to PIN_INPUT_PULLDOWN. However instead of modifying the pinctrl group, use the new pinctrl group "mmc1_pins_default_no_clk_pu" in dra72x-mmc-iodelay/dra74x-mmc-iodelay added specifically to be used for CLK line without external pull up.

---
 arch/arm/boot/dts/am571x-idk.dts | 2 +-
 arch/arm/boot/dts/am572x-idk.dts | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/am571x-idk.dts +1 -1
index a2555140babc..9d8b9dc31476 100644
@@ -102,7 +102,7 @@
 
 &mmc1 {
 	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
-	pinctrl-0 = <&mmc1_pins_default>;
+	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
 	pinctrl-1 = <&mmc1_pins_hs>;
 	pinctrl-2 = <&mmc1_pins_sdr12>;
 	pinctrl-3 = <&mmc1_pins_sdr25>;
arch/arm/boot/dts/am572x-idk.dts +1 -1
index 3a02ed720957..338dd4c5c825 100644
@@ -20,7 +20,7 @@
 
 &mmc1 {
 	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
-	pinctrl-0 = <&mmc1_pins_default>;
+	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
 	pinctrl-1 = <&mmc1_pins_hs>;
 	pinctrl-2 = <&mmc1_pins_sdr12>;
 	pinctrl-3 = <&mmc1_pins_sdr25>;
Signature · 1 line
2.17.0
#9 lore raw

PATCH v3 7/15 ARM: dts: dra71-evm: Use pinctrl group from dra72x-mmc-iodelay.dtsi to select pulldown

In reply to Kishon Vijay Abraham I

commit 0e43884cca77218d2eccc331396e8 ("ARM: dts: dra71-evm: Select pull down for mmc1_clk line in default mode") modified mmc1_pins_default pinctrl group in dra71-evm.dts to change the CLK line to PIN_INPUT_PULLDOWN. However instead of changing the pinctrl group, use the new pinctrl group "mmc1_pins_default_no_clk_pu" in dra72x-mmc-iodelay added specifically to be used for CLK line without external pull up.

---
 arch/arm/boot/dts/dra71-evm.dts | 15 +--------------
 1 file changed, 1 insertion(+), 14 deletions(-)
arch/arm/boot/dts/dra71-evm.dts +1 -14
index 64c57d87ca2f..8065678b8016 100644
@@ -50,19 +50,6 @@
 	};
 };
 
-&dra7_pmx_core {
-	mmc1_pins_default: mmc1_pins_default {
-		pinctrl-single,pins = <
-			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
-			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
-			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
-			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
-			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
-			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
-		>;
-	};
-};
-
 &i2c1 {
 	status = "okay";
 	clock-frequency = <400000>;
@@ -187,7 +174,7 @@
 
 &mmc1 {
 	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
-	pinctrl-0 = <&mmc1_pins_default>;
+	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
 	pinctrl-1 = <&mmc1_pins_hs>;
 	pinctrl-2 = <&mmc1_pins_sdr12>;
 	pinctrl-3 = <&mmc1_pins_sdr25>;
Signature · 1 line
2.17.0
#10 lore raw

PATCH v3 8/15 ARM: dts: am574x-idk: Add pinmux configuration for MMC

In reply to Kishon Vijay Abraham I

From: Sekhar Nori <[email protected]>

Include dra76x-mmc-iodelay.dtsi which has pinmux and IODelay configuration values for the various MMC modes for am574x SoC and use it in the pinctrl properties of MMC devicetree nodes present in am574x-idk.dts.

---
 arch/arm/boot/dts/am574x-idk.dts | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
arch/arm/boot/dts/am574x-idk.dts +19 -0
index 41e12a382d2f..500235e6d1c6 100644
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "dra76x.dtsi"
+#include "dra76x-mmc-iodelay.dtsi"
 #include "am572x-idk-common.dtsi"
 
 / {
@@ -20,3 +21,21 @@
 		spi-max-frequency = <96000000>;
 	};
 };
+
+&mmc1 {
+	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
+	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
+	pinctrl-1 = <&mmc1_pins_hs>;
+	pinctrl-2 = <&mmc1_pins_default>;
+	pinctrl-3 = <&mmc1_pins_hs>;
+	pinctrl-4 = <&mmc1_pins_sdr50>;
+	pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_conf>;
+	pinctrl-6 = <&mmc1_pins_ddr50 &mmc1_iodelay_sdr104_conf>;
+};
+
+&mmc2 {
+	pinctrl-names = "default", "hs", "ddr_1_8v";
+	pinctrl-0 = <&mmc2_pins_default>;
+	pinctrl-1 = <&mmc2_pins_default>;
+	pinctrl-2 = <&mmc2_pins_default>;
+};
Signature · 1 line
2.17.0
#11 lore raw

PATCH v3 9/15 ARM: dts: dra72-evm-common: Add wilink8 wlan support

In reply to Kishon Vijay Abraham I

From: Hari Nagalla <[email protected]>

Wilink8 module is a combo wireless connectivity card based on Texas Instrument's wl18xx solution.

Add support for the wlan capabilities of this module by muxing the relevant mmc lines, and setting the required device-tree data.

[[email protected]: drop WLAN_EN pinmux. It should be done by bootloader.
Also, some commit message adjustments]

---
 arch/arm/boot/dts/dra72-evm-common.dtsi   | 42 +++++++++++++++++++++++
 arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi | 11 ++++++
 2 files changed, 53 insertions(+)
arch/arm/boot/dts/dra72-evm-common.dtsi +42 -0
index 8e3b185d864b..1e4d36e33a1b 100644
@@ -44,6 +44,16 @@
 		regulator-boot-on;
 	};
 
+	evm_3v6: fixedregulator-evm_3v6 {
+		compatible = "regulator-fixed";
+		regulator-name = "evm_3v6";
+		regulator-min-microvolt = <3600000>;
+		regulator-max-microvolt = <3600000>;
+		vin-supply = <&evm_5v0>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
 	vsys_3v3: fixedregulator-vsys3v3 {
 		/* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
 		/* Output 2 of LM5140QRWGTQ1 on dra71-evm */
@@ -171,6 +181,15 @@
 			clocks = <&atl_clkin2_ck>;
 		};
 	};
+
+	vmmcwl_fixed: fixedregulator-mmcwl {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmcwl_fixed";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
 };
 
 &dra7_pmx_core {
@@ -398,6 +417,29 @@
 	max-frequency = <192000000>;
 };
 
+&mmc4 {
+	status = "okay";
+	vmmc-supply = <&evm_3v6>;
+	vqmmc-supply = <&vmmcwl_fixed>;
+	bus-width = <4>;
+	cap-power-off-card;
+	keep-power-in-suspend;
+	non-removable;
+	pinctrl-names = "default", "hs", "sdr12", "sdr25";
+	pinctrl-0 = <&mmc4_pins_default>;
+	pinctrl-1 = <&mmc4_pins_default>;
+	pinctrl-2 = <&mmc4_pins_default>;
+	pinctrl-3 = <&mmc4_pins_default>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	wlcore: wlcore@2 {
+		compatible = "ti,wl1835";
+		reg = <2>;
+		interrupt-parent = <&gpio5>;
+		interrupts = <7 IRQ_TYPE_EDGE_RISING>;
+	};
+};
+
 &mac {
 	status = "okay";
 };
arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi +11 -0
index c9351eaf97f0..4cf5482fbc33 100644
@@ -213,6 +213,17 @@
 			DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
 		>;
 	};
+
+	mmc4_pins_default: mmc4_pins_default {
+		pinctrl-single,pins = <
+			DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
+			DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
+			DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
+			DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
+			DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
+			DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
+		>;
+	};
 };
 
 &dra7_iodelay_core {
Signature · 1 line
2.17.0
#12 lore raw

Re: [PATCH v3 09/15] ARM: dts: dra72-evm-common: Add wilink8 wlan support

Quoted 67 lines · Kishon Vijay Abraham I

From: Hari Nagalla <[email protected]>

Wilink8 module is a combo wireless connectivity card based on Texas Instrument's wl18xx solution.

Add support for the wlan capabilities of this module by muxing the relevant mmc lines, and setting the required device-tree data.

[[email protected]: drop WLAN_EN pinmux. It should be done by bootloader.
Also, some commit message adjustments]

---
 arch/arm/boot/dts/dra72-evm-common.dtsi   | 42 +++++++++++++++++++++++
 arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi | 11 ++++++
 2 files changed, 53 insertions(+)
arch/arm/boot/dts/dra72-evm-common.dtsi +25 -0
index 8e3b185d864b..1e4d36e33a1b 100644
@@ -44,6 +44,16 @@
                regulator-boot-on;
        };
 
+       evm_3v6: fixedregulator-evm_3v6 {
+               compatible = "regulator-fixed";
+               regulator-name = "evm_3v6";
+               regulator-min-microvolt = <3600000>;
+               regulator-max-microvolt = <3600000>;
+               vin-supply = <&evm_5v0>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
        vsys_3v3: fixedregulator-vsys3v3 {
                /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
                /* Output 2 of LM5140QRWGTQ1 on dra71-evm */
@@ -171,6 +181,15 @@
                        clocks = <&atl_clkin2_ck>;
                };
        };
+
+       vmmcwl_fixed: fixedregulator-mmcwl {
+               compatible = "regulator-fixed";
+               regulator-name = "vmmcwl_fixed";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
 };
 
 &dra7_pmx_core {
@@ -398,6 +417,29 @@
        max-frequency = <192000000>;
 };
 
+&mmc4 {
+       status = "okay";
+       vmmc-supply = <&evm_3v6>;
+       vqmmc-supply = <&vmmcwl_fixed>;
+       bus-width = <4>;
+       cap-power-off-card;

arch/arm/boot/dts/dra72-evm-common.dtsi line 435

Quoted 10 lines
arch/arm/boot/dts/dra72-evm-common.dtsi +10 -0
+       keep-power-in-suspend;
+       non-removable;
+       pinctrl-names = "default", "hs", "sdr12", "sdr25";
+       pinctrl-0 = <&mmc4_pins_default>;
+       pinctrl-1 = <&mmc4_pins_default>;
+       pinctrl-2 = <&mmc4_pins_default>;
+       pinctrl-3 = <&mmc4_pins_default>;
+       #address-cells = <1>;
+       #size-cells = <0>;
+       wlcore: wlcore@2 {

wifi@2

#13 lore raw

PATCH v3 10/15 ARM: dts: dra7-evm: Model EVM_3V6 regulator

In reply to Kishon Vijay Abraham I

On TI's DRA74x EVM, EVM_3V6 is connected is connected to the VBAT line of the wilink card. Model it here so that it can be used while adding wilink8 WLAN support.

---
 arch/arm/boot/dts/dra7-evm.dts | 42 ++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)
arch/arm/boot/dts/dra7-evm.dts +42 -0
index f1425b0f3a54..181289a28ca1 100644
@@ -20,6 +20,16 @@
 		reg = <0x0 0x80000000 0x0 0x60000000>; /* 1536 MB */
 	};
 
+	evm_12v0: fixedregulator-evm_12v0 {
+		/* main supply */
+		compatible = "regulator-fixed";
+		regulator-name = "evm_12v0";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
 	evm_1v8_sw: fixedregulator-evm_1v8 {
 		compatible = "regulator-fixed";
 		regulator-name = "evm_1v8";
@@ -54,6 +64,38 @@
 		regulator-max-microvolt = <1800000>;
 	};
 
+	evm_3v3: fixedregulator-evm3v3 {
+		/* Output of Cntlr A of TPS43351-Q1 on dra7-evm */
+		compatible = "regulator-fixed";
+		regulator-name = "evm_3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&evm_12v0>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	evm_5v0: fixedregulator-evm_5v0 {
+		/* Output of Cntlr B of TPS43351-Q1 on dra7-evm */
+		compatible = "regulator-fixed";
+		regulator-name = "evm_5v0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&evm_12v0>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	evm_3v6: fixedregulator-evm_3v6 {
+		compatible = "regulator-fixed";
+		regulator-name = "evm_3v6";
+		regulator-min-microvolt = <3600000>;
+		regulator-max-microvolt = <3600000>;
+		vin-supply = <&evm_5v0>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
 	extcon_usb2: extcon_usb2 {
 		compatible = "linux,extcon-usb-gpio";
 		id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
Signature · 1 line
2.17.0
#14 lore raw

PATCH v3 11/15 ARM: dts: dra7-evm: Add wilink8 wlan support

In reply to Kishon Vijay Abraham I

From: Hari Nagalla <[email protected]>

The wilink module is a combo wireless connectivity sdio card based on Texas Instrument's wl18xx solution. It is a 4-wire, 1.8V, embedded sdio wlan device with an external irq line and is power-controlled by a gpio-based fixed regulator.

Add pinmux configuration and IODelay values for MMC4. On dra7-evm, MMC4 is used for connecting to wilink module.

IODelay data credits to : Vishal Mahaveer <[email protected]> and Sekhar Nori <[email protected]>

---
 arch/arm/boot/dts/dra7-evm-common.dtsi | 15 +++++++++++++++
 arch/arm/boot/dts/dra7-evm.dts         | 25 +++++++++++++++++++++++++
 2 files changed, 40 insertions(+)
arch/arm/boot/dts/dra7-evm-common.dtsi +15 -0
index 05a7b1a01bc3..3590c40fc112 100644
@@ -260,3 +260,18 @@
 &pcie1_rc {
 	status = "okay";
 };
+
+&mmc4 {
+	bus-width = <4>;
+	cap-power-off-card;
+	keep-power-in-suspend;
+	non-removable;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	wlcore: wlcore@2 {
+		compatible = "ti,wl1835";
+		reg = <2>;
+		interrupt-parent = <&gpio5>;
+		interrupts = <7 IRQ_TYPE_EDGE_RISING>;
+	};
+};
arch/arm/boot/dts/dra7-evm.dts +25 -0
index 181289a28ca1..704947cbef48 100644
@@ -96,6 +96,16 @@
 		regulator-boot-on;
 	};
 
+	vmmcwl_fixed: fixedregulator-mmcwl {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmcwl_fixed";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&gpio5 8 0>;
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
+
 	extcon_usb2: extcon_usb2 {
 		compatible = "linux,extcon-usb-gpio";
 		id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
@@ -376,6 +386,21 @@
 	pinctrl-5 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
 };
 
+&mmc4 {
+	status = "okay";
+	vmmc-supply = <&evm_3v6>;
+	vqmmc-supply = <&vmmcwl_fixed>;
+	pinctrl-names = "default-rev11", "default", "hs-rev11", "hs", "sdr12-rev11", "sdr12", "sdr25-rev11", "sdr25";
+	pinctrl-0 = <&mmc4_pins_default &mmc4_iodelay_ds_rev11_conf>;
+	pinctrl-1 = <&mmc4_pins_default &mmc4_iodelay_ds_rev20_conf>;
+	pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
+	pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
+	pinctrl-4 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
+	pinctrl-5 = <&mmc4_pins_sdr12 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
+	pinctrl-6 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev11_conf>;
+	pinctrl-7 = <&mmc4_pins_sdr25 &mmc4_iodelay_sdr12_hs_sdr25_rev20_conf>;
+};
+
 &cpu0 {
 	vdd-supply = <&smps123_reg>;
 };
Signature · 1 line
2.17.0
#15 lore raw

Re: [PATCH v3 11/15] ARM: dts: dra7-evm: Add wilink8 wlan support

Quoted 31 lines · Kishon Vijay Abraham I

From: Hari Nagalla <[email protected]>

The wilink module is a combo wireless connectivity sdio card based on Texas Instrument's wl18xx solution. It is a 4-wire, 1.8V, embedded sdio wlan device with an external irq line and is power-controlled by a gpio-based fixed regulator.

Add pinmux configuration and IODelay values for MMC4. On dra7-evm, MMC4 is used for connecting to wilink module.

IODelay data credits to : Vishal Mahaveer <[email protected]> and Sekhar Nori <[email protected]>

---
 arch/arm/boot/dts/dra7-evm-common.dtsi | 15 +++++++++++++++
 arch/arm/boot/dts/dra7-evm.dts         | 25 +++++++++++++++++++++++++
 2 files changed, 40 insertions(+)
arch/arm/boot/dts/dra7-evm-common.dtsi +0 -0
index 05a7b1a01bc3..3590c40fc112 100644
@@ -260,3 +260,18 @@
 &pcie1_rc {
        status = "okay";

arch/arm/boot/dts/dra7-evm-common.dtsi line 271

Quoted 10 lines
arch/arm/boot/dts/dra7-evm-common.dtsi +9 -0
 };
+
+&mmc4 {
+       bus-width = <4>;
+       cap-power-off-card;
+       keep-power-in-suspend;
+       non-removable;
+       #address-cells = <1>;
+       #size-cells = <0>;
+       wlcore: wlcore@2 {

wifi@2

#16 lore raw

Re: [PATCH v3 11/15] ARM: dts: dra7-evm: Add wilink8 wlan support

Hi Rob,

Quoted 36 lines · Rob Herring
Quoted 35 lines · Kishon Vijay Abraham I

From: Hari Nagalla <[email protected]>

The wilink module is a combo wireless connectivity sdio card based on Texas Instrument's wl18xx solution. It is a 4-wire, 1.8V, embedded sdio wlan device with an external irq line and is power-controlled by a gpio-based fixed regulator.

Add pinmux configuration and IODelay values for MMC4. On dra7-evm, MMC4 is used for connecting to wilink module.

IODelay data credits to : Vishal Mahaveer <[email protected]> and Sekhar Nori <[email protected]>

---
 arch/arm/boot/dts/dra7-evm-common.dtsi | 15 +++++++++++++++
 arch/arm/boot/dts/dra7-evm.dts         | 25 +++++++++++++++++++++++++
 2 files changed, 40 insertions(+)
arch/arm/boot/dts/dra7-evm-common.dtsi +3 -0
index 05a7b1a01bc3..3590c40fc112 100644
@@ -260,3 +260,18 @@
 &pcie1_rc {
        status = "okay";
 };
+
+&mmc4 {
+       bus-width = <4>;
Quoted 8 lines

arch/arm/boot/dts/dra7-evm-common.dtsi line 271

Quoted 6 lines
arch/arm/boot/dts/dra7-evm-common.dtsi +6 -0
+       cap-power-off-card;
+       keep-power-in-suspend;
+       non-removable;
+       #address-cells = <1>;
+       #size-cells = <0>;
+       wlcore: wlcore@2 {

wifi@2

sure, I'll fix it in the next revision.

Thanks
Kishon

#17 lore raw

PATCH v3 12/15 ARM: dts: dra76-evm: Add wilink8 wlan support

In reply to Kishon Vijay Abraham I

From: Vishal Mahaveer <[email protected]>

Add support for WLAN using wilink8 module. On dra76-evm, MMC4 is used for connecting to wilink8 module.

---
 arch/arm/boot/dts/dra76-evm.dts | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)
arch/arm/boot/dts/dra76-evm.dts +31 -0
index 2deb96405d06..ad154c7b0632 100644
@@ -42,6 +42,16 @@
 		regulator-boot-on;
 	};
 
+	vio_3v6: fixedregulator-vio_3v6 {
+		compatible = "regulator-fixed";
+		regulator-name = "vio_3v6";
+		regulator-min-microvolt = <3600000>;
+		regulator-max-microvolt = <3600000>;
+		vin-supply = <&vsys_5v0>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
 	vsys_3v3: fixedregulator-vsys3v3 {
 		/* Output of Cntlr A of TPS43351-Q1 on dra76-evm */
 		compatible = "regulator-fixed";
@@ -81,6 +91,16 @@
 		vin-supply = <&smps5_reg>;
 	};
 
+	vmmcwl_fixed: fixedregulator-mmcwl {
+		compatible = "regulator-fixed";
+		regulator-name = "vmmcwl_fixed";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&gpio5 8 0>;	/* gpio5_8 */
+		startup-delay-us = <70000>;
+		enable-active-high;
+	};
+
 	vtt_fixed: fixedregulator-vtt {
 		compatible = "regulator-fixed";
 		regulator-name = "vtt_fixed";
@@ -331,6 +351,17 @@
 	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>;
 };
 
+&mmc4 {
+	status = "okay";
+	vmmc-supply = <&vio_3v6>;
+	vqmmc-supply = <&vmmcwl_fixed>;
+	pinctrl-names = "default", "hs", "sdr12", "sdr25";
+	pinctrl-0 = <&mmc4_pins_hs &mmc4_iodelay_default_conf>;
+	pinctrl-1 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
+	pinctrl-2 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
+	pinctrl-3 = <&mmc4_pins_hs &mmc4_iodelay_manual1_conf>;
+};
+
 /* No RTC on this device */
 &rtc {
 	status = "disabled";
Signature · 1 line
2.17.0
#18 lore raw

PATCH v3 13/15 ARM: dts: dra7: Use sdhci-omap programming model

In reply to Kishon Vijay Abraham I

Use sdhci-omap programming model based on the generic sdhci library for programming the eMMC/SD/SDIO controller.

---
 .../boot/dts/am57xx-beagle-x15-common.dtsi    |  4 +--
 arch/arm/boot/dts/am57xx-beagle-x15.dts       |  1 +
 arch/arm/boot/dts/am57xx-idk-common.dtsi      |  3 ++-
 arch/arm/boot/dts/dra7-evm.dts                |  1 +
 arch/arm/boot/dts/dra7.dtsi                   | 27 +++++++------------
 arch/arm/boot/dts/dra72-evm-common.dtsi       |  2 +-
 arch/arm/boot/dts/dra76-evm.dts               |  3 ++-
 7 files changed, 19 insertions(+), 22 deletions(-)
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +2 -2
index 6204a266212a..ad953113cefb 100644
@@ -444,8 +444,8 @@
 	vmmc-supply = <&vdd_3v3>;
 	vqmmc-supply = <&vdd_3v3>;
 	bus-width = <8>;
-	ti,non-removable;
-	cap-mmc-dual-data-rate;
+	non-removable;
+	no-1-8-v;
 };
 
 &sata {
arch/arm/boot/dts/am57xx-beagle-x15.dts +1 -0
index d6689106d2a8..c393de8a2391 100644
@@ -25,6 +25,7 @@
 	pinctrl-1 = <&mmc1_pins_hs>;
 
 	vmmc-supply = <&ldo1_reg>;
+	no-1-8-v;
 };
 
 &mmc2 {
arch/arm/boot/dts/am57xx-idk-common.dtsi +2 -1
index 43cdf523a8a0..605e7ec1b218 100644
@@ -423,8 +423,9 @@
 	vmmc-supply = <&v3_3d>;
 	vqmmc-supply = <&v3_3d>;
 	bus-width = <8>;
-	ti,non-removable;
+	non-removable;
 	max-frequency = <96000000>;
+	no-1-8-v;
 };
 
 &dcan1 {
arch/arm/boot/dts/dra7-evm.dts +1 -0
index 704947cbef48..0894593860d6 100644
@@ -377,6 +377,7 @@
 	vmmc-supply = <&evm_1v8_sw>;
 	vqmmc-supply = <&evm_1v8_sw>;
 	bus-width = <8>;
+	non-removable;
 	pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v";
 	pinctrl-0 = <&mmc2_pins_default>;
 	pinctrl-1 = <&mmc2_pins_hs>;
arch/arm/boot/dts/dra7.dtsi +10 -17
index f4ddd86f2c77..ae2f8dd46328 100644
@@ -1079,14 +1079,10 @@
 		};
 
 		mmc1: mmc@4809c000 {
-			compatible = "ti,omap4-hsmmc";
+			compatible = "ti,dra7-sdhci";
 			reg = <0x4809c000 0x400>;
 			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "mmc1";
-			ti,dual-volt;
-			ti,needs-special-reset;
-			dmas = <&sdma_xbar 61>, <&sdma_xbar 62>;
-			dma-names = "tx", "rx";
 			status = "disabled";
 			pbias-supply = <&pbias_mmc_reg>;
 			max-frequency = <192000000>;
@@ -1100,40 +1096,37 @@
 		};
 
 		mmc2: mmc@480b4000 {
-			compatible = "ti,omap4-hsmmc";
+			compatible = "ti,dra7-sdhci";
 			reg = <0x480b4000 0x400>;
 			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "mmc2";
-			ti,needs-special-reset;
-			dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
-			dma-names = "tx", "rx";
 			status = "disabled";
 			max-frequency = <192000000>;
+			/* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */
+			sdhci-caps-mask = <0x7 0x0>;
 		};
 
 		mmc3: mmc@480ad000 {
-			compatible = "ti,omap4-hsmmc";
+			compatible = "ti,dra7-sdhci";
 			reg = <0x480ad000 0x400>;
 			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "mmc3";
-			ti,needs-special-reset;
-			dmas = <&sdma_xbar 77>, <&sdma_xbar 78>;
-			dma-names = "tx", "rx";
 			status = "disabled";
 			/* Errata i887 limits max-frequency of MMC3 to 64 MHz */
 			max-frequency = <64000000>;
+			/* SDMA is not supported */
+			sdhci-caps-mask = <0x0 0x400000>;
 		};
 
 		mmc4: mmc@480d1000 {
-			compatible = "ti,omap4-hsmmc";
+			compatible = "ti,dra7-sdhci";
 			reg = <0x480d1000 0x400>;
 			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 			ti,hwmods = "mmc4";
-			ti,needs-special-reset;
-			dmas = <&sdma_xbar 57>, <&sdma_xbar 58>;
-			dma-names = "tx", "rx";
 			status = "disabled";
 			max-frequency = <192000000>;
+			/* SDMA is not supported */
+			sdhci-caps-mask = <0x0 0x400000>;
 		};
 
 		mmu0_dsp1: mmu@40d01000 {
arch/arm/boot/dts/dra72-evm-common.dtsi +1 -1
index 1e4d36e33a1b..5a763b1f5883 100644
@@ -413,7 +413,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc2_pins_default>;
 	bus-width = <8>;
-	ti,non-removable;
+	non-removable;
 	max-frequency = <192000000>;
 };
 
arch/arm/boot/dts/dra76-evm.dts +2 -1
index ad154c7b0632..c07f0051844d 100644
@@ -327,7 +327,7 @@
 &mmc1 {
 	status = "okay";
 	vmmc-supply = <&vio_3v3_sd>;
-	vmmc_aux-supply = <&ldo4_reg>;
+	vqmmc-supply = <&ldo4_reg>;
 	bus-width = <4>;
 	/*
 	 * SDCD signal is not being used here - using the fact that GPIO mode
@@ -344,6 +344,7 @@
 	vmmc-supply = <&vio_1v8>;
 	vqmmc-supply = <&vio_1v8>;
 	bus-width = <8>;
+	non-removable;
 	pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
 	pinctrl-0 = <&mmc2_pins_default>;
 	pinctrl-1 = <&mmc2_pins_default>;
Signature · 1 line
2.17.0
#19 lore raw

PATCH v3 14/15 ARM: dts: dra7: Add high speed modes capability to MMC1/MMC2 dt node

In reply to Kishon Vijay Abraham I

While the supported UHS mode can be obtained from CAPA2 register, SD Host Controller Standard Specification doesn't define bits for MMC's HS200 and DDR mode capability. Add properties to indicate MMC HS200 and DDR speed mode capability in dt node.

---
 arch/arm/boot/dts/dra7.dtsi | 3 +++
 1 file changed, 3 insertions(+)
arch/arm/boot/dts/dra7.dtsi +3 -0
index ae2f8dd46328..90f378b28915 100644
@@ -1086,6 +1086,7 @@
 			status = "disabled";
 			pbias-supply = <&pbias_mmc_reg>;
 			max-frequency = <192000000>;
+			mmc-ddr-1_8v;
 		};
 
 		hdqw1w: 1w@480b2000 {
@@ -1104,6 +1105,8 @@
 			max-frequency = <192000000>;
 			/* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */
 			sdhci-caps-mask = <0x7 0x0>;
+			mmc-hs200-1_8v;
+			mmc-ddr-1_8v;
 		};
 
 		mmc3: mmc@480ad000 {
Signature · 1 line
2.17.0
#20 lore raw

PATCH v3 15/15 Documentation: ARM: Add new MMC requirements for DRA7/K2G

In reply to Kishon Vijay Abraham I
Quoted 1 line

From 4.18 kernel, all the MMC controller instances in DRA7

are programmed using sdhci based driver (sdhci-omap.c). Document this new requirement here. Both omap2plus_defconfig and multi_v7_defconfig has CONFIG_MMC_SDHCI_OMAP enabled.

---
 Documentation/arm/OMAP/README | 4 ++++
 1 file changed, 4 insertions(+)
Documentation/arm/OMAP/README +4 -0
index 75645c45d14a..5bf5ac3b3ed4 100644
@@ -5,3 +5,7 @@ KERNEL		NEW DEPENDENCIES
 v4.3+		Update is needed for custom .config files to make sure
 		CONFIG_REGULATOR_PBIAS is enabled for MMC1 to work
 		properly.
+
+v4.18+		Update is needed for custom .config files to make sure
+		CONFIG_MMC_SDHCI_OMAP is enabled for all MMC instances
+		to work in DRA7 based boards.
Signature · 1 line
2.17.0
#21 lore raw

PATCH v4 15/15 Documentation: ARM: Add new MMC requirements for DRA7/K2G

Quoted 1 line

From 4.18 kernel, all the MMC controller instances in DRA7

are programmed using sdhci based driver (sdhci-omap.c). Document this new requirement here. Both omap2plus_defconfig and multi_v7_defconfig has CONFIG_MMC_SDHCI_OMAP enabled.

---
Changes from v3:
Add K2G also in the dependencies description

 Documentation/arm/OMAP/README | 4 ++++
 1 file changed, 4 insertions(+)
Documentation/arm/OMAP/README +4 -0
index 75645c45d14a..5bf5ac3b3ed4 100644
@@ -5,3 +5,7 @@ KERNEL		NEW DEPENDENCIES
 v4.3+		Update is needed for custom .config files to make sure
 		CONFIG_REGULATOR_PBIAS is enabled for MMC1 to work
 		properly.
+
+v4.18+		Update is needed for custom .config files to make sure
+		CONFIG_MMC_SDHCI_OMAP is enabled for all MMC instances
+		to work in DRA7 and K2G based boards.
Signature · 1 line
2.17.0