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travis.yml: Support RISC-V 64-bit

PATCH New Andes 1 participant 1 message May 30, 2018

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PATCH 1/1 travis.yml: Support RISC-V 64-bit

From: Rick Chen <[email protected]>

Fix riscv: ax25-ae350 build fail problem
https://travis-ci.org/trini/u-boot/jobs/385147373

...
Building current source for 1 boards (1 thread, 2 jobs per thread)

     riscv:  +   ax25-ae350

+arch/riscv/cpu/ax25/start.S: Assembler messages:
+arch/riscv/cpu/ax25/start.S:48: Error: unrecognized opcode sd a2,0(t0)' +arch/riscv/cpu/ax25/start.S:112: Error: unrecognized opcode ld t5,0(t0)'
...

After apply the commit
configs: ax25-ae350: Set 64-bit as default configuration

Toolchain shall be also setuped with 64-bit in .travis.yml.

---
 .travis.yml | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
.travis.yml +3 -3
index 937f028..7e90bc9 100644
@@ -87,9 +87,9 @@ before_script:
     fi
   - if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi
   - if [[ "${TOOLCHAIN}" == "riscv" ]]; then
-        wget https://github.com/PkmX/riscv-prebuilt-toolchains/releases/download/20180111/riscv32-unknown-elf-toolchain.tar.gz &&
-        tar -C /tmp -xf riscv32-unknown-elf-toolchain.tar.gz &&
-        echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv32-unknown-elf/bin/riscv32-unknown-elf-" >> ~/.buildman;
+        wget https://github.com/andestech/prebuilt/releases/download/20180530/riscv64-unknown-linux-gnu.tar.gz &&
+        tar -C /tmp -xf riscv64-unknown-linux-gnu.tar.gz &&
+        echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv64-unknown-linux-gnu/bin/riscv64-unknown-linux-gnu-" >> ~/.buildman;
     fi
   - if [[ "${QEMU_TARGET}" != "" ]]; then
        git clone git://git.qemu.org/qemu.git /tmp/qemu;
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