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sunxi: fix eMMC stability issues on A64

PATCH Superseded Vasily Khoruzhick 2 participants 4 messages Jun 2, 2018 – Jun 4, 2018

Subsystems (4)
Arm (32-bit) Arm sub-architectures MMC, SD and SDIO Arm/Allwinner sunXi SoC support

v4 of 5 Superseded Latest is v5 →

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Vasily Khoruzhick

author
#0 lore raw

v4 cover sunxi: fix eMMC stability issues on A64

eMMC seems to require new clocking mode and calibration on A64, otherwise it is pretty unstable on some boards (e.g. Pinebook) with some eMMCs.

v2: - improve comment about calibration for eMMC on A64
- simplify ifdef-s around configuring delays
v3: - fix fallout due to ifdef simplification in v2
v4: - really fix ifdefs this time

Vasily Khoruzhick (2):
sunxi-mmc: use new mode on A64
mmc: sunxi: run calibration on A64

 arch/arm/include/asm/arch-sunxi/mmc.h |  6 +++++-
 arch/arm/mach-sunxi/Kconfig           |  1 +
 drivers/mmc/sunxi_mmc.c               | 13 +++++++++++++
 3 files changed, 19 insertions(+), 1 deletion(-)
Signature · 1 line
2.17.1
author
#1 lore raw

PATCH v4 1/2 sunxi-mmc: use new mode on A64

That is necessary for using automatic calibration on A64 eMMC.

Signed-off-by Vasily khoruzhick <[email protected]>
---
 arch/arm/mach-sunxi/Kconfig | 1 +
 drivers/mmc/sunxi_mmc.c     | 2 ++
 2 files changed, 3 insertions(+)
arch/arm/mach-sunxi/Kconfig +1 -0
index 66fb094ac5..8a35033d1f 100644
@@ -257,6 +257,7 @@ config MACH_SUN50I
 	select SUNXI_GEN_SUN6I
 	select SUN6I_PRCM
 	select SUNXI_HIGH_SRAM
+	select MMC_SUNXI_HAS_NEW_MODE
 	select SUPPORT_SPL
 	select SUNXI_DRAM_DW
 	select SUNXI_DRAM_DW_32BIT
drivers/mmc/sunxi_mmc.c +2 -0
index fe6d82c7b4..34739c98b9 100644
@@ -166,7 +166,9 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
 
 	if (new_mode) {
 #ifdef CONFIG_MMC_SUNXI_HAS_NEW_MODE
+#ifndef CONFIG_MACH_SUN50I
 		val = CCM_MMC_CTRL_MODE_SEL_NEW;
+#endif
 		setbits_le32(&priv->reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW);
 #endif
 	} else {
Signature · 1 line
2.17.1
#2 lore raw

PATCH v4 1/2 sunxi-mmc: use new mode on A64

Hi,

Quoted 25 lines · Vasily Khoruzhick

That is necessary for using automatic calibration on A64 eMMC.

Signed-off-by Vasily khoruzhick <[email protected]>
---
 arch/arm/mach-sunxi/Kconfig | 1 +
 drivers/mmc/sunxi_mmc.c     | 2 ++
 2 files changed, 3 insertions(+)
arch/arm/mach-sunxi/Kconfig +1 -0
index 66fb094ac5..8a35033d1f 100644
@@ -257,6 +257,7 @@ config MACH_SUN50I
 	select SUNXI_GEN_SUN6I
 	select SUN6I_PRCM
 	select SUNXI_HIGH_SRAM
+	select MMC_SUNXI_HAS_NEW_MODE
 	select SUPPORT_SPL
 	select SUNXI_DRAM_DW
 	select SUNXI_DRAM_DW_32BIT
drivers/mmc/sunxi_mmc.c +0 -0
index fe6d82c7b4..34739c98b9 100644

drivers/mmc/sunxi_mmc.c static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz) · line 169

Quoted 4 lines
drivers/mmc/sunxi_mmc.c +1 -0
@@ -166,7 +166,9 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
 
 	if (new_mode) {
 #ifdef CONFIG_MMC_SUNXI_HAS_NEW_MODE
+#ifndef CONFIG_MACH_SUN50I

Didn't we agree on introducing another Kconfig option here?

Maxime

Signature · 10 lines
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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author
#3 lore raw

PATCH v4 2/2 mmc: sunxi: run calibration on A64

In reply to Vasily Khoruzhick

Along with using new mode it fixes eMMC instability on Pinebook

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 arch/arm/include/asm/arch-sunxi/mmc.h |  6 +++++-
 drivers/mmc/sunxi_mmc.c               | 11 +++++++++++
 2 files changed, 16 insertions(+), 1 deletion(-)
arch/arm/include/asm/arch-sunxi/mmc.h +5 -1
index 1574b8e8fe..d6664a01f2 100644
@@ -46,7 +46,9 @@ struct sunxi_mmc {
 	u32 cbda;		/* 0x94 */
 	u32 res2[26];
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	u32 res3[64];
+	u32 res3[17];
+	u32 samp_dl;
+	u32 res4[46];
 #endif
 	u32 fifo;		/* 0x100 / 0x200 FIFO access address */
 };

@@ -130,5 +132,7 @@ struct sunxi_mmc {
 #define SUNXI_MMC_COMMON_CLK_GATE		(1 << 16)
 #define SUNXI_MMC_COMMON_RESET			(1 << 18)
 
+#define SUNXI_MMC_CAL_DL_SW_EN		(0x1 << 7)
+
 struct mmc *sunxi_mmc_init(int sdc_no);
 #endif /* _SUNXI_MMC_H */
drivers/mmc/sunxi_mmc.c +11 -0
index 34739c98b9..9e47e06239 100644
@@ -225,6 +225,17 @@ static int mmc_config_clock(struct sunxi_mmc_priv *priv, struct mmc *mmc)
 	rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK;
 	writel(rval, &priv->reg->clkcr);
 
+#ifdef CONFIG_MACH_SUN50I
+	/* A64 needs to run calibration on eMMC controller and we
+	 * have to set delay of zero before starting calibration.
+	 * Allwinner BSP driver sets a delay only in the case of
+	 * using HS400 which is not supported by mainline U-Boot or
+	 * Linux at the moment
+	 */
+	if (priv->mmc_no == 2)
+		writel(SUNXI_MMC_CAL_DL_SW_EN, &priv->reg->samp_dl);
+#endif
+
 	/* Re-enable Clock */
 	rval |= SUNXI_MMC_CLK_ENABLE;
 	writel(rval, &priv->reg->clkcr);
Signature · 1 line
2.17.1