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sunxi: clock: Fix EHCI and OHCI clocks on A64

PATCH New Vasily Khoruzhick 4 participants 10 messages Jun 8, 2018 – Jun 13, 2018

Subsystems (5)
Arm (32-bit) USB Arm/Allwinner sunXi SoC support USB ehci driver +1 more subsystems
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Vasily Khoruzhick

author
#0 lore raw

PATCH v3 1/4 sunxi: clock: Fix EHCI and OHCI clocks on A64

EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29

Fixes commit fef73766d9ad ("sunxi: clock: Fix OHCI clock gating for H3/H5")

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
arch/arm/include/asm/arch-sunxi/clock_sun6i.h +4 -2
index 8acf79fbba..8afeaf872e 100644
@@ -280,8 +280,10 @@ struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_USB_EHCI1	26
 #define AHB_GATE_OFFSET_USB_EHCI0	24
 #elif defined(CONFIG_MACH_SUN50I)
-#define AHB_GATE_OFFSET_USB_OHCI0	29
-#define AHB_GATE_OFFSET_USB_EHCI0	25
+#define AHB_GATE_OFFSET_USB_OHCI0	28
+#define AHB_GATE_OFFSET_USB_OHCI1	29
+#define AHB_GATE_OFFSET_USB_EHCI0	24
+#define AHB_GATE_OFFSET_USB_EHCI1	25
 #else
 #define AHB_GATE_OFFSET_USB_OHCI1	30
 #define AHB_GATE_OFFSET_USB_OHCI0	29
Signature · 1 line
2.17.1
author
#1 lore raw

PATCH v3 1/4 sunxi: clock: Fix EHCI and OHCI clocks on A64

Quoted 5 lines · Vasily Khoruzhick

EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29

Fixes commit fef73766d9ad ("sunxi: clock: Fix OHCI clock gating for H3/H5")

Signed-off-by Vasily Khoruzhick <[email protected]>

Any feedback on this patch series?

Quoted 24 lines
---
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
arch/arm/include/asm/arch-sunxi/clock_sun6i.h +4 -3
index 8acf79fbba..8afeaf872e 100644
@@ -280,8 +280,10 @@ struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_USB_EHCI1      26
 #define AHB_GATE_OFFSET_USB_EHCI0      24
 #elif defined(CONFIG_MACH_SUN50I)
-#define AHB_GATE_OFFSET_USB_OHCI0      29
-#define AHB_GATE_OFFSET_USB_EHCI0      25
+#define AHB_GATE_OFFSET_USB_OHCI0      28
+#define AHB_GATE_OFFSET_USB_OHCI1      29
+#define AHB_GATE_OFFSET_USB_EHCI0      24
+#define AHB_GATE_OFFSET_USB_EHCI1      25
 #else
 #define AHB_GATE_OFFSET_USB_OHCI1      30
 #define AHB_GATE_OFFSET_USB_OHCI0      29
--

2.17.1

author
#2 lore raw

PATCH v3 2/4 usb: sunxi: ehci: get rid of ifdefs

In reply to Vasily Khoruzhick

We can use compatibles instead.

Signed-off-by Vasily Khoruzhick <[email protected]>

---
v3: use ehci_sunxi_cfg instead of id

 drivers/usb/host/ehci-sunxi.c | 83 ++++++++++++++++++++++++++---------
 1 file changed, 63 insertions(+), 20 deletions(-)
drivers/usb/host/ehci-sunxi.c +63 -20
index 360efc9116..35fbe03331 100644
@@ -22,11 +22,17 @@
 #define AHB_CLK_DIST		1
 #endif
 
+struct ehci_sunxi_cfg {
+	bool has_reset;
+	u32 extra_ahb_gate_mask;
+};
+
 struct ehci_sunxi_priv {
 	struct ehci_ctrl ehci;
 	struct sunxi_ccm_reg *ccm;
 	int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
 	struct phy phy;
+	const struct ehci_sunxi_cfg *cfg;
 };
 
 static int ehci_usb_probe(struct udevice *dev)

@@ -38,6 +44,7 @@ static int ehci_usb_probe(struct udevice *dev)
 	int extra_ahb_gate_mask = 0;
 	int phys, ret;
 
+	priv->cfg = (const struct ehci_sunxi_cfg *)dev_get_driver_data(dev);
 	priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 	if (IS_ERR(priv->ccm))
 		return PTR_ERR(priv->ccm);

@@ -72,18 +79,15 @@ no_phy:
 	 * clocks resp. phys.
 	 */
 	priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
-#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
-	extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
-#endif
+	extra_ahb_gate_mask = priv->cfg->extra_ahb_gate_mask;
 	priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
 	extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;
 
 	setbits_le32(&priv->ccm->ahb_gate0,
 		     priv->ahb_gate_mask | extra_ahb_gate_mask);
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-	setbits_le32(&priv->ccm->ahb_reset0_cfg,
-		     priv->ahb_gate_mask | extra_ahb_gate_mask);
-#endif
+	if (priv->cfg->has_reset)
+		setbits_le32(&priv->ccm->ahb_reset0_cfg,
+			     priv->ahb_gate_mask | extra_ahb_gate_mask);
 
 	hcor = (struct ehci_hcor *)((uintptr_t)hccr +
 				    HC_LENGTH(ehci_readl(&hccr->cr_capbase)));

@@ -108,25 +112,64 @@ static int ehci_usb_remove(struct udevice *dev)
 	if (ret)
 		return ret;
 
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-	clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
-#endif
+	if (priv->cfg->has_reset)
+		clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
 	clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask);
 
 	return 0;
 }
 
+static const struct ehci_sunxi_cfg sun4i_a10_cfg = {
+	.has_reset = false,
+};
+
+static const struct ehci_sunxi_cfg sun6i_a31_cfg = {
+	.has_reset = true,
+};
+
+static const struct ehci_sunxi_cfg sun8i_h3_cfg = {
+	.has_reset = true,
+	.extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0,
+};
+
 static const struct udevice_id ehci_usb_ids[] = {
-	{ .compatible = "allwinner,sun4i-a10-ehci", },
-	{ .compatible = "allwinner,sun5i-a13-ehci", },
-	{ .compatible = "allwinner,sun6i-a31-ehci", },
-	{ .compatible = "allwinner,sun7i-a20-ehci", },
-	{ .compatible = "allwinner,sun8i-a23-ehci", },
-	{ .compatible = "allwinner,sun8i-a83t-ehci", },
-	{ .compatible = "allwinner,sun8i-h3-ehci",  },
-	{ .compatible = "allwinner,sun9i-a80-ehci", },
-	{ .compatible = "allwinner,sun50i-a64-ehci", },
-	{ }
+	{
+		.compatible = "allwinner,sun4i-a10-ehci",
+		.data = (ulong)&sun4i_a10_cfg,
+	},
+	{
+		.compatible = "allwinner,sun5i-a13-ehci",
+		.data = (ulong)&sun4i_a10_cfg,
+	},
+	{
+		.compatible = "allwinner,sun6i-a31-ehci",
+		.data = (ulong)&sun6i_a31_cfg,
+	},
+	{
+		.compatible = "allwinner,sun7i-a20-ehci",
+		.data = (ulong)&sun4i_a10_cfg,
+	},
+	{
+		.compatible = "allwinner,sun8i-a23-ehci",
+		.data = (ulong)&sun6i_a31_cfg,
+	},
+	{
+		.compatible = "allwinner,sun8i-a83t-ehci",
+		.data = (ulong)&sun6i_a31_cfg,
+	},
+	{
+		.compatible = "allwinner,sun8i-h3-ehci",
+		.data = (ulong)&sun8i_h3_cfg,
+	},
+	{
+		.compatible = "allwinner,sun9i-a80-ehci",
+		.data = (ulong)&sun6i_a31_cfg,
+	},
+	{
+		.compatible = "allwinner,sun50i-a64-ehci",
+		.data = (ulong)&sun8i_h3_cfg,
+	},
+	{ /* sentinel */ }
 };
 
 U_BOOT_DRIVER(ehci_sunxi) = {
Signature · 1 line
2.17.1
#3 lore raw

PATCH v3 2/4 usb: sunxi: ehci: get rid of ifdefs

Quoted 16 lines · Vasily Khoruzhick

We can use compatibles instead.

Signed-off-by Vasily Khoruzhick <[email protected]>

---
v3: use ehci_sunxi_cfg instead of id

 drivers/usb/host/ehci-sunxi.c | 83 ++++++++++++++++++++++++++---------
 1 file changed, 63 insertions(+), 20 deletions(-)
drivers/usb/host/ehci-sunxi.c +0 -0
index 360efc9116..35fbe03331 100644
@@ -22,11 +22,17 @@
 #define AHB_CLK_DIST		1
 #endif

drivers/usb/host/ehci-sunxi.c line 33

Quoted 10 lines
drivers/usb/host/ehci-sunxi.c +5 -0
 
+struct ehci_sunxi_cfg {
+	bool has_reset;
+	u32 extra_ahb_gate_mask;
+};
+
 struct ehci_sunxi_priv {
 	struct ehci_ctrl ehci;
 	struct sunxi_ccm_reg *ccm;
 	int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */

Ideally this should be moved to the ehci_sunxi_cfg (and this is true for OHCI as well) function for consistency, but that can be done in a subsequent patch.

It looks good otherwise, thanks!
Maxime

Signature · 3 lines
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
author
#4 lore raw

PATCH v3 2/4 usb: sunxi: ehci: get rid of ifdefs

Quoted 18 lines · Maxime Ripard
Quoted 17 lines · Vasily Khoruzhick

We can use compatibles instead.

Signed-off-by Vasily Khoruzhick <[email protected]>

---
v3: use ehci_sunxi_cfg instead of id

 drivers/usb/host/ehci-sunxi.c | 83 ++++++++++++++++++++++++++---------
 1 file changed, 63 insertions(+), 20 deletions(-)
drivers/usb/host/ehci-sunxi.c +0 -0
index 360efc9116..35fbe03331 100644
@@ -22,11 +22,17 @@
 #define AHB_CLK_DIST         1
 #endif
Quoted 13 lines

drivers/usb/host/ehci-sunxi.c line 33

Quoted 9 lines
drivers/usb/host/ehci-sunxi.c +5 -0
+struct ehci_sunxi_cfg {
+     bool has_reset;
+     u32 extra_ahb_gate_mask;
+};
+
 struct ehci_sunxi_priv {
      struct ehci_ctrl ehci;
      struct sunxi_ccm_reg *ccm;
      int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */

Ideally this should be moved to the ehci_sunxi_cfg (and this is true for OHCI as well) function for consistency, but that can be done in a subsequent patch.

ahb_gate_mask is per-controller, i.e. it differs for EHCI0 and EHCI1 so it can't be moved to ehci_sunxi_cfg.

Quoted 7 lines

It looks good otherwise, thanks!
Maxime

--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

#5 lore raw

PATCH v3 2/4 usb: sunxi: ehci: get rid of ifdefs

Quoted 33 lines · Vasily Khoruzhick
Quoted 18 lines · Maxime Ripard
Quoted 17 lines · Vasily Khoruzhick

We can use compatibles instead.

Signed-off-by Vasily Khoruzhick <[email protected]>

---
v3: use ehci_sunxi_cfg instead of id

 drivers/usb/host/ehci-sunxi.c | 83 ++++++++++++++++++++++++++---------
 1 file changed, 63 insertions(+), 20 deletions(-)
drivers/usb/host/ehci-sunxi.c +0 -0
index 360efc9116..35fbe03331 100644
@@ -22,11 +22,17 @@
 #define AHB_CLK_DIST         1
 #endif
Quoted 13 lines

drivers/usb/host/ehci-sunxi.c line 33

Quoted 9 lines
drivers/usb/host/ehci-sunxi.c +5 -0
+struct ehci_sunxi_cfg {
+     bool has_reset;
+     u32 extra_ahb_gate_mask;
+};
+
 struct ehci_sunxi_priv {
      struct ehci_ctrl ehci;
      struct sunxi_ccm_reg *ccm;
      int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */

Ideally this should be moved to the ehci_sunxi_cfg (and this is true for OHCI as well) function for consistency, but that can be done in a subsequent patch.

Quoted 2 lines

ahb_gate_mask is per-controller, i.e. it differs for EHCI0 and EHCI1 so it can't be moved to ehci_sunxi_cfg.

Ah, right. Nevermind then :)
Maxime

Signature · 3 lines
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
author
#6 lore raw

PATCH v3 3/4 usb: sunxi: ohci: get rid of ifdefs

In reply to Vasily Khoruzhick

We can use compatibles instead.

Signed-off-by Vasily Khoruzhick <[email protected]>

---
v3: use ohci_sunxi_cfg instead of id

 drivers/usb/host/ohci-sunxi.c | 83 ++++++++++++++++++++++++++---------
 1 file changed, 63 insertions(+), 20 deletions(-)
drivers/usb/host/ohci-sunxi.c +63 -20
index ce2b47a5c4..19f99adcf1 100644
@@ -22,12 +22,18 @@
 #define AHB_CLK_DIST		1
 #endif
 
+struct ohci_sunxi_cfg {
+	bool has_reset;
+	u32 extra_ahb_gate_mask;
+};
+
 struct ohci_sunxi_priv {
 	struct sunxi_ccm_reg *ccm;
 	ohci_t ohci;
 	int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
 	int usb_gate_mask; /* Mask of usb_clk_cfg clk gate bits for this hcd */
 	struct phy phy;
+	const struct ohci_sunxi_cfg *cfg;
 };
 
 static int ohci_usb_probe(struct udevice *dev)

@@ -38,6 +44,7 @@ static int ohci_usb_probe(struct udevice *dev)
 	int extra_ahb_gate_mask = 0;
 	int phys, ret;
 
+	priv->cfg = (const struct ohci_sunxi_cfg *)dev_get_driver_data(dev);
 	priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 	if (IS_ERR(priv->ccm))
 		return PTR_ERR(priv->ccm);

@@ -74,9 +81,7 @@ no_phy:
 	 * clocks resp. phys.
 	 */
 	priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
-#ifdef CONFIG_MACH_SUN8I_H3
-	extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
-#endif
+	extra_ahb_gate_mask = priv->cfg->extra_ahb_gate_mask;
 	priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
 	priv->ahb_gate_mask <<= phys * AHB_CLK_DIST;
 	extra_ahb_gate_mask <<= phys * AHB_CLK_DIST;

@@ -85,10 +90,9 @@ no_phy:
 	setbits_le32(&priv->ccm->ahb_gate0,
 		     priv->ahb_gate_mask | extra_ahb_gate_mask);
 	setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-	setbits_le32(&priv->ccm->ahb_reset0_cfg,
-		     priv->ahb_gate_mask | extra_ahb_gate_mask);
-#endif
+	if (priv->cfg->has_reset)
+		setbits_le32(&priv->ccm->ahb_reset0_cfg,
+			     priv->ahb_gate_mask | extra_ahb_gate_mask);
 
 	return ohci_register(dev, regs);
 }

@@ -110,26 +114,65 @@ static int ohci_usb_remove(struct udevice *dev)
 	if (ret)
 		return ret;
 
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-	clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
-#endif
+	if (priv->cfg->has_reset)
+		clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
 	clrbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
 	clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask);
 
 	return 0;
 }
 
+static const struct ohci_sunxi_cfg sun4i_a10_cfg = {
+	.has_reset = false,
+};
+
+static const struct ohci_sunxi_cfg sun6i_a31_cfg = {
+	.has_reset = true,
+};
+
+static const struct ohci_sunxi_cfg sun8i_h3_cfg = {
+	.has_reset = true,
+	.extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
+};
+
 static const struct udevice_id ohci_usb_ids[] = {
-	{ .compatible = "allwinner,sun4i-a10-ohci", },
-	{ .compatible = "allwinner,sun5i-a13-ohci", },
-	{ .compatible = "allwinner,sun6i-a31-ohci", },
-	{ .compatible = "allwinner,sun7i-a20-ohci", },
-	{ .compatible = "allwinner,sun8i-a23-ohci", },
-	{ .compatible = "allwinner,sun8i-a83t-ohci", },
-	{ .compatible = "allwinner,sun8i-h3-ohci",  },
-	{ .compatible = "allwinner,sun9i-a80-ohci", },
-	{ .compatible = "allwinner,sun50i-a64-ohci", },
-	{ }
+	{
+		.compatible = "allwinner,sun4i-a10-ohci",
+		.data = (ulong)&sun4i_a10_cfg,
+	},
+	{
+		.compatible = "allwinner,sun5i-a13-ohci",
+		.data = (ulong)&sun4i_a10_cfg,
+	},
+	{
+		.compatible = "allwinner,sun6i-a31-ohci",
+		.data = (ulong)&sun6i_a31_cfg,
+	},
+	{
+		.compatible = "allwinner,sun7i-a20-ohci",
+		.data = (ulong)&sun4i_a10_cfg,
+	},
+	{
+		.compatible = "allwinner,sun8i-a23-ohci",
+		.data = (ulong)&sun6i_a31_cfg,
+	},
+	{
+		.compatible = "allwinner,sun8i-a83t-ohci",
+		.data = (ulong)&sun6i_a31_cfg,
+	},
+	{
+		.compatible = "allwinner,sun8i-h3-ohci",
+		.data = (ulong)&sun8i_h3_cfg,
+	},
+	{
+		.compatible = "allwinner,sun9i-a80-ohci",
+		.data = (ulong)&sun6i_a31_cfg,
+	},
+	{
+		.compatible = "allwinner,sun50i-a64-ohci",
+		.data = (ulong)&sun6i_a31_cfg,
+	},
+	{ /* sentinel */ }
 };
 
 U_BOOT_DRIVER(usb_ohci) = {
Signature · 1 line
2.17.1
#7 lore raw

PATCH v3 1/4 sunxi: clock: Fix EHCI and OHCI clocks on A64

In reply to Vasily Khoruzhick
Quoted 8 lines · Vasily Khoruzhick

EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29

Fixes commit fef73766d9ad ("sunxi: clock: Fix OHCI clock gating for H3/H5")

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Tested on pine64+ grub EFI from USB, which then loaded kernel+initrd off of USB, as well as using distro_bootcmd's exlinux.conf, loading kernel+initrd+dtb from USB...

For the whole series of 4 v3 patches:

Tested-by Vagrant Cascadian <[email protected]>

live well,
vagrant

Quoted 7 lines
arch/arm/include/asm/arch-sunxi/clock_sun6i.h +0 -0
index 8acf79fbba..8afeaf872e 100644
@@ -280,8 +280,10 @@ struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_USB_EHCI1	26
 #define AHB_GATE_OFFSET_USB_EHCI0	24

arch/arm/include/asm/arch-sunxi/clock_sun6i.h struct sunxi_ccm_reg { · line 289

Quoted 10 lines
arch/arm/include/asm/arch-sunxi/clock_sun6i.h +4 -2
 #elif defined(CONFIG_MACH_SUN50I)
-#define AHB_GATE_OFFSET_USB_OHCI0	29
-#define AHB_GATE_OFFSET_USB_EHCI0	25
+#define AHB_GATE_OFFSET_USB_OHCI0	28
+#define AHB_GATE_OFFSET_USB_OHCI1	29
+#define AHB_GATE_OFFSET_USB_EHCI0	24
+#define AHB_GATE_OFFSET_USB_EHCI1	25
 #else
 #define AHB_GATE_OFFSET_USB_OHCI1	30
 #define AHB_GATE_OFFSET_USB_OHCI0	29

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author
#8 lore raw

PATCH v3 4/4 usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use

In reply to Vasily Khoruzhick

On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0 clock when OHCI1 is in use.

Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy")

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 drivers/usb/host/ohci-sunxi.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)
drivers/usb/host/ohci-sunxi.c +10 -2
index 19f99adcf1..2b99169da6 100644
@@ -25,6 +25,7 @@
 struct ohci_sunxi_cfg {
 	bool has_reset;
 	u32 extra_ahb_gate_mask;
+	u32 extra_usb_gate_mask;
 };
 
 struct ohci_sunxi_priv {

@@ -89,7 +90,8 @@ no_phy:
 
 	setbits_le32(&priv->ccm->ahb_gate0,
 		     priv->ahb_gate_mask | extra_ahb_gate_mask);
-	setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
+	setbits_le32(&priv->ccm->usb_clk_cfg,
+		     priv->usb_gate_mask | priv->cfg->extra_usb_gate_mask);
 	if (priv->cfg->has_reset)
 		setbits_le32(&priv->ccm->ahb_reset0_cfg,
 			     priv->ahb_gate_mask | extra_ahb_gate_mask);

@@ -135,6 +137,12 @@ static const struct ohci_sunxi_cfg sun8i_h3_cfg = {
 	.extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
 };
 
+static const struct ohci_sunxi_cfg sun50i_a64_cfg = {
+	.has_reset = true,
+	.extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
+	.extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK,
+};
+
 static const struct udevice_id ohci_usb_ids[] = {
 	{
 		.compatible = "allwinner,sun4i-a10-ohci",

@@ -170,7 +178,7 @@ static const struct udevice_id ohci_usb_ids[] = {
 	},
 	{
 		.compatible = "allwinner,sun50i-a64-ohci",
-		.data = (ulong)&sun6i_a31_cfg,
+		.data = (ulong)&sun50i_a64_cfg,
 	},
 	{ /* sentinel */ }
 };
Signature · 1 line
2.17.1
Applied
#9 lore raw

PATCH v3 1/4 sunxi: clock: Fix EHCI and OHCI clocks on A64

In reply to Vasily Khoruzhick
Quoted 17 lines · Vasily Khoruzhick

EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29

Fixes commit fef73766d9ad ("sunxi: clock: Fix OHCI clock gating for H3/H5")

Signed-off-by Vasily Khoruzhick <[email protected]>
---
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
arch/arm/include/asm/arch-sunxi/clock_sun6i.h +0 -0
index 8acf79fbba..8afeaf872e 100644
@@ -280,8 +280,10 @@ struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_USB_EHCI1	26
 #define AHB_GATE_OFFSET_USB_EHCI0	24

arch/arm/include/asm/arch-sunxi/clock_sun6i.h struct sunxi_ccm_reg { · line 289

Quoted 10 lines
arch/arm/include/asm/arch-sunxi/clock_sun6i.h +4 -2
 #elif defined(CONFIG_MACH_SUN50I)
-#define AHB_GATE_OFFSET_USB_OHCI0	29
-#define AHB_GATE_OFFSET_USB_EHCI0	25
+#define AHB_GATE_OFFSET_USB_OHCI0	28
+#define AHB_GATE_OFFSET_USB_OHCI1	29
+#define AHB_GATE_OFFSET_USB_EHCI0	24
+#define AHB_GATE_OFFSET_USB_EHCI1	25
 #else
 #define AHB_GATE_OFFSET_USB_OHCI1	30
 #define AHB_GATE_OFFSET_USB_OHCI0	29

Applied all 4, thanks.

Signature · 2 lines
Best regards,
Marek Vasut