arm: dts: aspeed DTS updates for OpenPower

Add the missing node for the CVIC (the coprocessor interrupt controller) and add a label to the SRAM node so it can be referenced from the board device-tree file.

OpenBMC-Staging-Count: 1

Signed-off-by Benjamin Herrenschmidt <[email protected]>

Signed-off-by Joel Stanley <[email protected]>

---
 arch/arm/boot/dts/aspeed-g4.dtsi | 8 +++++++-
 arch/arm/boot/dts/aspeed-g5.dtsi | 9 ++++++++-
 2 files changed, 15 insertions(+), 2 deletions(-)

arch/arm/boot/dts/aspeed-g4.dtsi +7 -1

index 75df1573380e..b1a19f99a4c9 100644
@@ -92,6 +92,12 @@
                        reg = <0x1e6c0080 0x80>;
                };
 
+               cvic: copro-interrupt-controller at 1e6c2000 {
+                       compatible = "aspeed,ast2400-cvic", "aspeed-cvic";
+                       valid-sources = <0x7fffffff>;
+                       reg = <0x1e6c2000 0x80>;
+               };
+
                mac0: ethernet at 1e660000 {
                        compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
                        reg = <0x1e660000 0x180>;

@@ -161,7 +167,7 @@
                                status = "disabled";
                        };
 
-                       sram at 1e720000 {
+                       sram: sram at 1e720000 {
                                compatible = "mmio-sram";
                                reg = <0x1e720000 0x8000>;      // 32K
                        };

arch/arm/boot/dts/aspeed-g5.dtsi +8 -2

index 17f2714d18a7..21141ca1bfa4 100644
@@ -127,6 +127,13 @@
                        reg = <0x1e6c0080 0x80>;
                };
 
+               cvic: copro-interrupt-controller at 1e6c2000 {
+                       compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
+                       valid-sources = <0xffffffff>;
+                       copro-sw-interrupts = <1>;
+                       reg = <0x1e6c2000 0x80>;
+               };
+
                mac0: ethernet at 1e660000 {
                        compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
                        reg = <0x1e660000 0x180>;

@@ -211,7 +218,7 @@
                                status = "disabled";
                        };
 
-                       sram at 1e720000 {
+                       sram: sram at 1e720000 {
                                compatible = "mmio-sram";
                                reg = <0x1e720000 0x9000>;      // 36K
                        };
--

2.17.1

Quoted 5 lines · Benjamin Herrenschmidt

Add the missing node for the CVIC (the coprocessor interrupt controller) and add a label to the SRAM node so it can be referenced from the board device-tree file.

OpenBMC-Staging-Count: 1

We shouldn't be putting this in upstream patches.

I can drop it when I apply if there is no other review.

This switches away from userspace bitbanging to kernel FSI using the coprocessor.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

---
 arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts | 28 ++++++++++++++-----
 1 file changed, 21 insertions(+), 7 deletions(-)

arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts +0 -0

index c7084a819dc6..e6cfdf3c1a67 100644

arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts +19 -8

+                       reg = <0x5ee00000 0x00200000>;
+                       no-map;
+               };
        };
 
        leds {

@@ -44,6 +49,22 @@
                };
        };
 
+       fsi: gpio-fsi {
+               compatible = "aspeed,ast2400-cf-fsi-master", "fsi-master";
+               #address-cells = <2>;
+               #size-cells = <0>;
+
+               memory-region = <&coldfire_memory>;
+               aspeed,sram = <&sram>;
+               aspeed,cvic = <&cvic>;
+
+               clock-gpios = <&gpio ASPEED_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
+               data-gpios = <&gpio ASPEED_GPIO(A, 5) GPIO_ACTIVE_HIGH>;
+               mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
+               enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
+               trans-gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>;
+       };
+
        gpio-keys {
                compatible = "gpio-keys";
 

@@ -303,13 +324,6 @@
                line-name = "SYS_PWROK_BMC";
        };
 
-       pin_gpio_h6 {
-               gpio-hog;
-               gpios = <ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>;
-               output-high;
-               line-name = "SCM1_FSI0_DATA_EN";
-       };
-
        pin_gpio_h7 {
                gpio-hog;
                gpios = <ASPEED_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
--

2.17.1

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This provides proper chip IDs but also adds the various sub-devices necessary for the future OCC driver among other. All the added nodes comply with the existing upstream FSI bindings.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

---
 arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts  |   1 +
 arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts  |   2 +
 .../boot/dts/aspeed-bmc-opp-witherspoon.dts   |   2 +
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts    |   2 +
 arch/arm/boot/dts/ibm-power9-cfam.dtsi        | 104 ++++++++++++++++++
 arch/arm/boot/dts/ibm-power9-dual.dtsi        |  58 ++++++++++
 6 files changed, 169 insertions(+)
 create mode 100644 arch/arm/boot/dts/ibm-power9-cfam.dtsi
 create mode 100644 arch/arm/boot/dts/ibm-power9-dual.dtsi

arch/arm/boot/dts/ibm-power9-cfam.dtsi new file +0 -0

new file mode 100644
index 000000000000..5bda517f93cc

arch/arm/boot/dts/ibm-power9-cfam.dtsi new file +22 -0

+/ {
+       aliases {
+               i2c100 = &cfam0_i2c0;
+               i2c101 = &cfam0_i2c1;
+               i2c102 = &cfam0_i2c2;
+               i2c103 = &cfam0_i2c3;
+               i2c104 = &cfam0_i2c4;
+               i2c105 = &cfam0_i2c5;
+               i2c106 = &cfam0_i2c6;
+               i2c107 = &cfam0_i2c7;
+               i2c108 = &cfam0_i2c8;
+               i2c109 = &cfam0_i2c9;
+               i2c110 = &cfam0_i2c10;
+               i2c111 = &cfam0_i2c11;
+               i2c112 = &cfam0_i2c12;
+               i2c113 = &cfam0_i2c13;
+               i2c114 = &cfam0_i2c14;
+               i2c200 = &cfam1_i2c0;
+               i2c201 = &cfam1_i2c1;
+               i2c202 = &cfam1_i2c2;
+               i2c203 = &cfam1_i2c3;
+               i2c204 = &cfam1_i2c4;

arch/arm/boot/dts/ibm-power9-cfam.dtsi line 7

Quoted 10 lines

+++ b/arch/arm/boot/dts/ibm-power9-cfam.dtsi

arch/arm/boot/dts/ibm-power9-cfam.dtsi new file +7 -0

@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright 2018 IBM Corp
+
+#define __MAKE_LABEL(p,i)      p##i
+#define _MAKE_LABEL(p,i)       __MAKE_LABEL(p,i)
+#define HUB_LABEL              _MAKE_LABEL(fsi_hub,CFAM_CHIP_ID)
+#define I2C_LABEL(n)           _MAKE_LABEL(_MAKE_LABEL(cfam,CFAM_CHIP_ID),_i2c##n)

This is a red flag with respect to obscurity. It's a magic dtsi file that has to be included at the right spot in the dts file or things will break horribly -- we really try to avoid those kind of constructs.

Also, you use it by passing in a predefined CHIP_ID, so you have #define / #include / #undef. And on top of that you have open-coded actual stable naming references to nodes that can't be found because they're created by macros.

I know you want this to instantiate a bunch of boilerplate, so if you want to do that, maybe you'd be better off having this file just define a couple of macros, and then instantiate the actual subtrees with that macro (the macro can then take the chipid).

That way you can
still expose the same label-making macros in the locations where you setup the stable naming. Much less cognitive load on someone trying to read it and figure out just what's being instantiated where, and what nodes the i2c<#> aliases are referring to.

Also:

Quoted 22 lines

arch/arm/boot/dts/ibm-power9-dual.dtsi new file +22 -0

+/ {
+       aliases {
+               i2c100 = &cfam0_i2c0;
+               i2c101 = &cfam0_i2c1;
+               i2c102 = &cfam0_i2c2;
+               i2c103 = &cfam0_i2c3;
+               i2c104 = &cfam0_i2c4;
+               i2c105 = &cfam0_i2c5;
+               i2c106 = &cfam0_i2c6;
+               i2c107 = &cfam0_i2c7;
+               i2c108 = &cfam0_i2c8;
+               i2c109 = &cfam0_i2c9;
+               i2c110 = &cfam0_i2c10;
+               i2c111 = &cfam0_i2c11;
+               i2c112 = &cfam0_i2c12;
+               i2c113 = &cfam0_i2c13;
+               i2c114 = &cfam0_i2c14;
+               i2c200 = &cfam1_i2c0;
+               i2c201 = &cfam1_i2c1;
+               i2c202 = &cfam1_i2c2;
+               i2c203 = &cfam1_i2c3;
+               i2c204 = &cfam1_i2c4;

arch/arm/boot/dts/ibm-power9-dual.dtsi line 55

Quoted 10 lines

arch/arm/boot/dts/ibm-power9-dual.dtsi new file +10 -0

+               i2c205 = &cfam1_i2c5;
+               i2c206 = &cfam1_i2c6;
+               i2c207 = &cfam1_i2c7;
+               i2c208 = &cfam1_i2c8;
+               i2c209 = &cfam1_i2c9;
+               i2c210 = &cfam1_i2c10;
+               i2c211 = &cfam1_i2c11;
+               i2c212 = &cfam1_i2c12;
+               i2c213 = &cfam1_i2c13;
+               i2c214 = &cfam1_i2c14;

This is... unconventional. Fixed mapping but up at a high bus range such that it won't conflict with other SoC busses?

Just make your tools figure out what bus to use with sysfs or DT entries instead, much less of a hack. We've done these things to IRQs and GPIOs in the past, and it's a pain to clean up later.