arm: dts: aspeed DTS updates for OpenPower
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- v1 Latest5 patches 0 repliesNew
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/5 | arm: dts: aspeed: Add coprocessor interrupt controllerarch/ arch/ | +15 | 1 reply | |
| 1/5 | arm: dts: aspeed: Add coprocessor interrupt controller | +0 | 0 replies | |
| 2/5 | arm: dts: OpenPower Romulus system can use coprocessor for FSIarch/ | +10 | 0 replies | |
| 3/5 | arm: dts: OpenPower Palmetto system can use coprocessor for FSIarch/ | +21 | 1 reply | |
| 4/5 | arm: dts: Add power8 CFAM dtsi and use it on palmettoarch/ arch/ | +41 | 0 replies | |
| 5/5 | arm: dts: aspeed: Add power9 CFAM dtsi and use it on OpenPower P9 machinesarch/ arch/ arch/ +3 more | +169 | 1 reply | |
| 5/5 | arm: dts: aspeed: Add power9 CFAM dtsi and use it on OpenPower P9 machines | +0 | 0 replies |
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Cover letter [PATCH 0/5] arm: dts: aspeed DTS updates for OpenPower
These are DTS updates for Aspeed SoCs used on OpenPower systems.
They should comply with existing bindings either upstream, in linux-next or about to be pulled into linux-next, and that have been acked by Rob.
- Add the "cvic" node for the coprocessor interrupt controller
to the Aspeed G4 and G5 SoC .dtsi files.
- Switch OpenPower Romulus and Palmetto systems from using the
Linux bitbang GPIO FSI master to using the new ColdFire coprocessor based one which is much faster (driver about to hit linux-next)
- Add a basic definition of the POWER8 and POWER9 processors
as seen on an FSI bus by the BMC. Not every device in there is exposed yet. More devices will be added as their drivers and bindings get finalized.