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Add support for MIPS Creator CI20

PATCH New Ezequiel Garcia 5 participants 20 messages Dec 10, 2018 – Dec 11, 2018

Subsystems (6)
Device tree bindings MIPS GPIO Common clk +2 more subsystems
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Ezequiel Garcia

author
#0 lore raw

cover Add support for MIPS Creator CI20

As the subject says, this series adds support for CI20.

Most of the work was done by Paul Burton, and then by Marek Vasut. I've just rescued the work from the dark wastelands of Mordor, did some cleaning here and there and submitted.

Patches 1, 2, and 4 are completely untouched. I've picked them from Marek's tree.

For the MMC driver (patch 3) there is some cleanup, and some fixes for proper DM migration.

Finally, patches 5 and 6 have been changed a bit: I've cleaned up the devicetree, the board support files and the defconfig.

This is based on top of today's master (7ff485c68b7e) and has been tested by SD-card booting both U-Boot and Linux. Booting Linux via TFTP was also tested.

Please note that I've added Paul's SOB to all the patches he authored, to make the authorship chain more clear.

Reviews and tests are welcome. Bikesheds not so much! ;-)

Thanks!

Paul Burton (6):
misc: Add JZ47xx efuse driver
gpio: Add JZ47xx GPIO driver
mmc: Add JZ47xx SD/MMC controller driver
mips: Add SPL header
mips: jz47xx: Add JZ4780 SoC support
mips: jz47xx: Add Creator CI20 platform

 arch/mips/Kconfig                             |   7 +
 arch/mips/Makefile                            |   1 +
 arch/mips/dts/Makefile                        |   1 +
 arch/mips/dts/ci20.dts                        | 120 ++++
 arch/mips/dts/jz4780.dtsi                     | 162 ++++++
 arch/mips/include/asm/spl.h                   |  35 ++
 arch/mips/mach-jz47xx/Kconfig                 |  26 +
 arch/mips/mach-jz47xx/Makefile                |   7 +
 arch/mips/mach-jz47xx/include/mach/jz4780.h   | 104 ++++
 .../mach-jz47xx/include/mach/jz4780_dram.h    | 457 +++++++++++++++
 arch/mips/mach-jz47xx/jz4780/Makefile         |   5 +
 arch/mips/mach-jz47xx/jz4780/jz4780.c         | 142 +++++
 arch/mips/mach-jz47xx/jz4780/pll.c            | 528 ++++++++++++++++++
 arch/mips/mach-jz47xx/jz4780/sdram.c          | 271 +++++++++
 arch/mips/mach-jz47xx/jz4780/timer.c          | 238 ++++++++
 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds   |  52 ++
 arch/mips/mach-jz47xx/start.S                 |  99 ++++
 board/imgtec/ci20/Kconfig                     |  15 +
 board/imgtec/ci20/Makefile                    |   5 +
 board/imgtec/ci20/README                      |  10 +
 board/imgtec/ci20/ci20.c                      | 365 ++++++++++++
 configs/ci20_defconfig                        |  47 ++
 drivers/gpio/Kconfig                          |   7 +
 drivers/gpio/Makefile                         |   1 +
 drivers/gpio/gpio-jz47xx.c                    |  78 +++
 drivers/misc/Kconfig                          |   6 +
 drivers/misc/Makefile                         |   1 +
 drivers/misc/jz4780_efuse.c                   | 100 ++++
 drivers/mmc/Kconfig                           |   6 +
 drivers/mmc/Makefile                          |   1 +
 drivers/mmc/jz_mmc.                           |   0
 drivers/mmc/jz_mmc.c                          | 491 ++++++++++++++++
 include/configs/ci20.h                        |  74 +++
 include/dt-bindings/clock/jz4780-cgu.h        |  88 +++
 34 files changed, 3550 insertions(+)
 create mode 100644 arch/mips/dts/ci20.dts
 create mode 100644 arch/mips/dts/jz4780.dtsi
 create mode 100644 arch/mips/include/asm/spl.h
 create mode 100644 arch/mips/mach-jz47xx/Kconfig
 create mode 100644 arch/mips/mach-jz47xx/Makefile
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
 create mode 100644 arch/mips/mach-jz47xx/jz4780/Makefile
 create mode 100644 arch/mips/mach-jz47xx/jz4780/jz4780.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/pll.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/sdram.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/timer.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds
 create mode 100644 arch/mips/mach-jz47xx/start.S
 create mode 100644 board/imgtec/ci20/Kconfig
 create mode 100644 board/imgtec/ci20/Makefile
 create mode 100644 board/imgtec/ci20/README
 create mode 100644 board/imgtec/ci20/ci20.c
 create mode 100644 configs/ci20_defconfig
 create mode 100644 drivers/gpio/gpio-jz47xx.c
 create mode 100644 drivers/misc/jz4780_efuse.c
 create mode 100644 drivers/mmc/jz_mmc.
 create mode 100644 drivers/mmc/jz_mmc.c
 create mode 100644 include/configs/ci20.h
 create mode 100644 include/dt-bindings/clock/jz4780-cgu.h
Signature · 1 line
2.20.0.rc2
author
#1 lore raw

PATCH 1/6 misc: Add JZ47xx efuse driver

From: Paul Burton <[email protected]>

Add driver for the efuse block in the JZ47xx SOC.

Cc Daniel Schwierzeck <[email protected]>
Signed-off-by Paul Burton <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
---
 drivers/misc/Kconfig        |   6 +++
 drivers/misc/Makefile       |   1 +
 drivers/misc/jz4780_efuse.c | 100 ++++++++++++++++++++++++++++++++++++
 3 files changed, 107 insertions(+)
 create mode 100644 drivers/misc/jz4780_efuse.c
drivers/misc/Kconfig +6 -0
index 48febc47d263..704c8dd1955f 100644
@@ -120,6 +120,12 @@ config FSL_SEC_MON
 	  Security Monitor can be transitioned on any security failures,
 	  like software violations or hardware security violations.
 
+config JZ4780_EFUSE
+	bool "Ingenic JZ4780 eFUSE support"
+	depends on ARCH_JZ47XX
+	help
+	  This selects support for the eFUSE on Ingenic JZ4780 SoCs.
+
 config MXC_OCOTP
 	bool "Enable MXC OCOTP Driver"
 	help
drivers/misc/Makefile +1 -0
index 302d44159274..6bdf5054f475 100644
@@ -62,3 +62,4 @@ obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
 obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
 obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
+obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o
drivers/misc/jz4780_efuse.c new file +100 -0

100 lines not on this page · raw message

Signature · 1 line
2.20.0.rc2
#2 lore raw

PATCH 1/6 misc: Add JZ47xx efuse driver

Quoted 7 lines · Ezequiel Garcia

From: Paul Burton <[email protected]>

Add driver for the efuse block in the JZ47xx SOC.

Cc Daniel Schwierzeck <[email protected]>
Signed-off-by Paul Burton <[email protected]>
Signed-off-by Marek Vasut <[email protected]>

[...]

Quoted 4 lines
drivers/misc/jz4780_efuse.c new file +4 -0
+static void jz4780_efuse_read_chunk(size_t addr, size_t count, u8 *buf)
+{
+	void __iomem *regs = (void __iomem *)NEMC_BASE;
+	size_t i;

drivers/misc/jz4780_efuse.c line 48

Quoted 10 lines
drivers/misc/jz4780_efuse.c new file +10 -0
+	u32 val;
+
+	val = EFUSE_EFUCTRL_RD_EN |
+	      ((count - 1) << EFUSE_EFUCTRL_LEN_BIT) |
+	      (addr << EFUSE_EFUCTRL_ADDR_BIT) |
+	      ((addr > 0x200) ? EFUSE_EFUCTRL_CS : 0);
+	writel(val, regs + EFUSE_EFUCTRL);
+	/* FIXME -- wait_bit() */
+	while (!(readl(regs + EFUSE_EFUSTATE) & EFUSE_EFUSTATE_RD_DONE))
+		;

Does wait_for_bit_le32() fit into the SPL if you use it here ?

drivers/misc/jz4780_efuse.c line 54

Quoted 5 lines
drivers/misc/jz4780_efuse.c new file +5 -0
+	if ((count % 4) == 0) {
+		for (i = 0; i < count / 4; i++) {
+			val = readl(regs + EFUSE_EFUDATA(i));
+			put_unaligned(val, (u32 *)(buf + (i * 4)));
+		}

I thought we had something like ioread*_rep(), but I guess not.

Quoted 31 lines
drivers/misc/jz4780_efuse.c new file +31 -0
+	} else {
+		val = readl(regs + EFUSE_EFUDATA(0));
+		if (count > 2)
+			buf[2] = (val >> 16) & 0xff;
+		if (count > 1)
+			buf[1] = (val >> 8) & 0xff;
+		buf[0] = val & 0xff;
+	}
+}
+
+static inline int jz4780_efuse_chunk_size(size_t count)
+{
+	if (count >= 32)
+		return 32;
+	else if ((count / 4) > 0)
+		return (count / 4) * 4;
+	else
+		return count % 4;
+}
+
+void jz4780_efuse_read(size_t addr, size_t count, u8 *buf)
+{
+	size_t chunk;
+
+	while (count > 0) {
+		chunk = jz4780_efuse_chunk_size(count);
+		jz4780_efuse_read_chunk(addr, chunk, buf);
+		addr += chunk;
+		buf += chunk;
+		count -= chunk;
+	}

drivers/misc/jz4780_efuse.c line 95

Quoted 10 lines
drivers/misc/jz4780_efuse.c new file +10 -0
+}
+
+void jz4780_efuse_init(u32 ahb2_rate)
+{
+	void __iomem *regs = (void __iomem *)NEMC_BASE;
+	u32 rd_adj, rd_strobe, tmp;
+
+	rd_adj = (((6500 * (ahb2_rate / 1000000)) / 1000000) + 0xf) / 2;
+	tmp = (((35000 * (ahb2_rate / 1000000)) / 1000000) - 4) - rd_adj;
+	rd_strobe = ((tmp + 0xf) / 2 < 7) ? 7 : (tmp + 0xf) / 2;

Can you turn those magic numbers into macros ? Or if they really come from the datasheet, well ...@least add a comment.

Quoted 5 lines
drivers/misc/jz4780_efuse.c new file +4 -0
+	tmp = (rd_adj << EFUSE_EFUCFG_RD_ADJ_BIT) |
+	      (rd_strobe << EFUSE_EFUCFG_RD_STROBE_BIT);
+	writel(tmp, regs + EFUSE_EFUCFG);
+}
Signature · 2 lines
Best regards,
Marek Vasut
author
#3 lore raw

PATCH 1/6 misc: Add JZ47xx efuse driver

Quoted 11 lines · Marek Vasut
Quoted 7 lines · Ezequiel Garcia

From: Paul Burton <[email protected]>

Add driver for the efuse block in the JZ47xx SOC.

Cc Daniel Schwierzeck <[email protected]>
Signed-off-by Paul Burton <[email protected]>
Signed-off-by Marek Vasut <[email protected]>

[...]

Quoted 17 lines
Quoted 4 lines
drivers/misc/jz4780_efuse.c new file +4 -0
+static void jz4780_efuse_read_chunk(size_t addr, size_t count, u8 *buf)
+{
+	void __iomem *regs = (void __iomem *)NEMC_BASE;
+	size_t i;

drivers/misc/jz4780_efuse.c line 48

Quoted 10 lines
drivers/misc/jz4780_efuse.c new file +10 -0
+	u32 val;
+
+	val = EFUSE_EFUCTRL_RD_EN |
+	      ((count - 1) << EFUSE_EFUCTRL_LEN_BIT) |
+	      (addr << EFUSE_EFUCTRL_ADDR_BIT) |
+	      ((addr > 0x200) ? EFUSE_EFUCTRL_CS : 0);
+	writel(val, regs + EFUSE_EFUCTRL);
+	/* FIXME -- wait_bit() */
+	while (!(readl(regs + EFUSE_EFUSTATE) & EFUSE_EFUSTATE_RD_DONE))
+		;

Does wait_for_bit_le32() fit into the SPL if you use it here ?

I literally haven't looked at these (working) drivers. Let's see..

...hm, to be honest, I'm more worried about these infinite loops than about fancy API uses. An infinite loop in the MMC driver caused a freeze during driver-model porting, so these are more serious threats.

Will try to address the unbounded loop and take a stab at using wait_for_bit_le32.

Thanks for the review!
Eze

#4 lore raw

PATCH 1/6 misc: Add JZ47xx efuse driver

Quoted 30 lines · Ezequiel Garcia
Quoted 11 lines · Marek Vasut
Quoted 7 lines · Ezequiel Garcia

From: Paul Burton <[email protected]>

Add driver for the efuse block in the JZ47xx SOC.

Cc Daniel Schwierzeck <[email protected]>
Signed-off-by Paul Burton <[email protected]>
Signed-off-by Marek Vasut <[email protected]>

[...]

Quoted 17 lines
Quoted 4 lines
drivers/misc/jz4780_efuse.c new file +4 -0
+static void jz4780_efuse_read_chunk(size_t addr, size_t count, u8 *buf)
+{
+	void __iomem *regs = (void __iomem *)NEMC_BASE;
+	size_t i;

drivers/misc/jz4780_efuse.c line 48

Quoted 10 lines
drivers/misc/jz4780_efuse.c new file +10 -0
+	u32 val;
+
+	val = EFUSE_EFUCTRL_RD_EN |
+	      ((count - 1) << EFUSE_EFUCTRL_LEN_BIT) |
+	      (addr << EFUSE_EFUCTRL_ADDR_BIT) |
+	      ((addr > 0x200) ? EFUSE_EFUCTRL_CS : 0);
+	writel(val, regs + EFUSE_EFUCTRL);
+	/* FIXME -- wait_bit() */
+	while (!(readl(regs + EFUSE_EFUSTATE) & EFUSE_EFUSTATE_RD_DONE))
+		;

Does wait_for_bit_le32() fit into the SPL if you use it here ?

Quoted 8 lines

I literally haven't looked at these (working) drivers. Let's see..

...hm, to be honest, I'm more worried about these infinite loops than about fancy API uses. An infinite loop in the MMC driver caused a freeze during driver-model porting, so these are more serious threats.

Will try to address the unbounded loop and take a stab at using wait_for_bit_le32.

Right, that should fix the infinite loop problem.

Signature · 2 lines
Best regards,
Marek Vasut
author
#5 lore raw

PATCH 2/6 gpio: Add JZ47xx GPIO driver

In reply to Ezequiel Garcia

From: Paul Burton <[email protected]>

Add primitive GPIO controller driver for the JZ47xx SoC.

Cc Daniel Schwierzeck <[email protected]>
Signed-off-by Paul Burton <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
---
 drivers/gpio/Kconfig       |  7 ++++
 drivers/gpio/Makefile      |  1 +
 drivers/gpio/gpio-jz47xx.c | 78 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 86 insertions(+)
 create mode 100644 drivers/gpio/gpio-jz47xx.c
drivers/gpio/Kconfig +7 -0
index 35344e57c6c6..46c161c99ce9 100644
@@ -322,4 +322,11 @@ config MT7621_GPIO
 	help
 	  Say yes here to support MediaTek MT7621 compatible GPIOs.
 
+config JZ47XX_GPIO
+	bool "Ingenic JZ47xx GPIO driver"
+	depends on ARCH_JZ47XX
+	default y
+	help
+	  Supports GPIO access on Ingenic JZ47xx SoCs.
+
 endmenu
drivers/gpio/Makefile +1 -0
index 7ed9a4ec4221..92310e9ba934 100644
@@ -59,3 +59,4 @@ obj-$(CONFIG_MSM_GPIO)		+= msm_gpio.o
 obj-$(CONFIG_$(SPL_)PCF8575_GPIO)	+= pcf8575_gpio.o
 obj-$(CONFIG_PM8916_GPIO)	+= pm8916_gpio.o
 obj-$(CONFIG_MT7621_GPIO)	+= mt7621_gpio.o
+obj-$(CONFIG_JZ47XX_GPIO)	+= gpio-jz47xx.o
drivers/gpio/gpio-jz47xx.c new file +78 -0

78 lines not on this page · raw message

Signature · 1 line
2.20.0.rc2
author
#6 lore raw

PATCH 3/6 mmc: Add JZ47xx SD/MMC controller driver

In reply to Ezequiel Garcia

From: Paul Burton <[email protected]>

Add driver for the JZ47xx MSC controller.

Cc Daniel Schwierzeck <[email protected]>
Signed-off-by Paul Burton <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 drivers/mmc/Kconfig  |   6 +
 drivers/mmc/Makefile |   1 +
 drivers/mmc/jz_mmc.  |   0
 drivers/mmc/jz_mmc.c | 491 +++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 498 insertions(+)
 create mode 100644 drivers/mmc/jz_mmc.
 create mode 100644 drivers/mmc/jz_mmc.c
drivers/mmc/Kconfig +6 -0
index fbd13964a084..496b2cba6405 100644
@@ -332,6 +332,12 @@ config MMC_BCM2835
 
 	  If unsure, say N.
 
+config JZ47XX_MMC
+	bool "Ingenic JZ47xx SD/MMC Host Controller support"
+	depends on ARCH_JZ47XX
+	help
+	  This selects support for the SD Card Controller on Ingenic JZ47xx SoCs.
+
 config MMC_SANDBOX
 	bool "Sandbox MMC support"
 	depends on SANDBOX
drivers/mmc/Makefile +1 -0
index 801a26d82192..7892c468f05c 100644
@@ -40,6 +40,7 @@ obj-$(CONFIG_MMC_SANDBOX)		+= sandbox_mmc.o
 obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
 obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
 obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
+obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
 
 # SDHCI
 obj-$(CONFIG_MMC_SDHCI)			+= sdhci.o
drivers/mmc/jz_mmc. new file +0 -0
new file mode 100644
index 000000000000..e69de29bb2d1
drivers/mmc/jz_mmc.c new file +491 -0

491 lines not on this page · raw message

Signature · 1 line
2.20.0.rc2
author
#7 lore raw

PATCH 4/6 mips: Add SPL header

In reply to Ezequiel Garcia

From: Paul Burton <[email protected]>

Add header with SPL boot mode and type definitions.

Cc Daniel Schwierzeck <[email protected]>
Signed-off-by Paul Burton <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
---
 arch/mips/include/asm/spl.h | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 arch/mips/include/asm/spl.h
arch/mips/include/asm/spl.h new file +35 -0
new file mode 100644
index 000000000000..01baab606606
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2012
+ * Texas Instruments, <www.ti.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef	_ASM_SPL_H_
+#define	_ASM_SPL_H_
+
+enum {
+	BOOT_DEVICE_RAM,
+	BOOT_DEVICE_MMC1,
+	BOOT_DEVICE_MMC2,
+	BOOT_DEVICE_MMC2_2,
+	BOOT_DEVICE_NAND,
+	BOOT_DEVICE_ONENAND,
+	BOOT_DEVICE_NOR,
+	BOOT_DEVICE_UART,
+	BOOT_DEVICE_SPI,
+	BOOT_DEVICE_USB,
+	BOOT_DEVICE_SATA,
+	BOOT_DEVICE_I2C,
+	BOOT_DEVICE_BOARD,
+	BOOT_DEVICE_NONE
+};
+
+/* Linker symbols. */
+extern char __bss_start[];
+extern ulong __bss_end;
+
+#ifndef CONFIG_DM
+extern gd_t gdata;
+#endif
+
+#endif
Signature · 1 line
2.20.0.rc2
author
#8 lore raw

PATCH 5/6 mips: jz47xx: Add JZ4780 SoC support

In reply to Ezequiel Garcia

From: Paul Burton <[email protected]>

Add initial support for the Ingenic JZ47xx MIPS SoC.

Cc Daniel Schwierzeck <[email protected]>
Signed-off-by Paul Burton <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 arch/mips/Kconfig                             |   7 +
 arch/mips/Makefile                            |   1 +
 arch/mips/dts/jz4780.dtsi                     | 162 ++++++
 arch/mips/mach-jz47xx/Kconfig                 |  15 +
 arch/mips/mach-jz47xx/Makefile                |   7 +
 arch/mips/mach-jz47xx/include/mach/jz4780.h   | 104 ++++
 .../mach-jz47xx/include/mach/jz4780_dram.h    | 457 +++++++++++++++
 arch/mips/mach-jz47xx/jz4780/Makefile         |   5 +
 arch/mips/mach-jz47xx/jz4780/jz4780.c         | 142 +++++
 arch/mips/mach-jz47xx/jz4780/pll.c            | 528 ++++++++++++++++++
 arch/mips/mach-jz47xx/jz4780/sdram.c          | 271 +++++++++
 arch/mips/mach-jz47xx/jz4780/timer.c          | 238 ++++++++
 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds   |  52 ++
 arch/mips/mach-jz47xx/start.S                 |  99 ++++
 include/dt-bindings/clock/jz4780-cgu.h        |  88 +++
 15 files changed, 2176 insertions(+)
 create mode 100644 arch/mips/dts/jz4780.dtsi
 create mode 100644 arch/mips/mach-jz47xx/Kconfig
 create mode 100644 arch/mips/mach-jz47xx/Makefile
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780.h
 create mode 100644 arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
 create mode 100644 arch/mips/mach-jz47xx/jz4780/Makefile
 create mode 100644 arch/mips/mach-jz47xx/jz4780/jz4780.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/pll.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/sdram.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/timer.c
 create mode 100644 arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds
 create mode 100644 arch/mips/mach-jz47xx/start.S
 create mode 100644 include/dt-bindings/clock/jz4780-cgu.h
arch/mips/Kconfig +7 -0
index 1b1b1d7d0031..44b25460b8cc 100644
@@ -88,6 +88,12 @@ config ARCH_MT7620
 	select SUPPORTS_LITTLE_ENDIAN
 	select SYSRESET
 
+config ARCH_JZ47XX
+	bool "Support Ingenic JZ47xx"
+	select SUPPORT_SPL
+	select OF_CONTROL
+	select DM
+
 config MACH_PIC32
 	bool "Support Microchip PIC32"
 	select DM

@@ -139,6 +145,7 @@ source "board/micronas/vct/Kconfig"
 source "board/qemu-mips/Kconfig"
 source "arch/mips/mach-ath79/Kconfig"
 source "arch/mips/mach-bmips/Kconfig"
+source "arch/mips/mach-jz47xx/Kconfig"
 source "arch/mips/mach-pic32/Kconfig"
 source "arch/mips/mach-mt7620/Kconfig"
arch/mips/Makefile +1 -0
index 802244a06e5d..a294e9b1e8b9 100644
@@ -13,6 +13,7 @@ libs-y += arch/mips/lib/
 
 machine-$(CONFIG_ARCH_ATH79) += ath79
 machine-$(CONFIG_ARCH_BMIPS) += bmips
+machine-$(CONFIG_ARCH_JZ47XX) += jz47xx
 machine-$(CONFIG_MACH_PIC32) += pic32
 machine-$(CONFIG_ARCH_MT7620) += mt7620
arch/mips/dts/jz4780.dtsi new file +162 -0

162 lines not on this page · raw message

arch/mips/mach-jz47xx/Kconfig new file +15 -0
new file mode 100644
index 000000000000..cd6944cfc252
@@ -0,0 +1,15 @@
+menu "Ingenic JZ47xx platforms"
+	depends on ARCH_JZ47XX
+
+config SYS_SOC
+	default "jz47xx"
+
+config SOC_JZ4780
+	bool
+	select SUPPORTS_LITTLE_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select SUPPORTS_CPU_MIPS32_R2
+	help
+	  Support for Ingenic JZ4780 family SoCs.
+
+endmenu
arch/mips/mach-jz47xx/Makefile new file +7 -0
new file mode 100644
index 000000000000..5eee9acf559d
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+extra-$(CONFIG_SPL_BUILD)	:= start.o
+
+obj-$(CONFIG_SOC_JZ4780)	+= jz4780/
arch/mips/mach-jz47xx/include/mach/jz4780.h new file +104 -0

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arch/mips/mach-jz47xx/include/mach/jz4780_dram.h new file +457 -0

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arch/mips/mach-jz47xx/jz4780/Makefile new file +5 -0
new file mode 100644
index 000000000000..683eea65c2f1
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y := jz4780.o pll.o sdram.o timer.o
arch/mips/mach-jz47xx/jz4780/jz4780.c new file +142 -0

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arch/mips/mach-jz47xx/jz4780/pll.c new file +528 -0

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arch/mips/mach-jz47xx/jz4780/sdram.c new file +271 -0

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arch/mips/mach-jz47xx/jz4780/timer.c new file +238 -0

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arch/mips/mach-jz47xx/jz4780/u-boot-spl.lds new file +52 -0

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arch/mips/mach-jz47xx/start.S new file +99 -0

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include/dt-bindings/clock/jz4780-cgu.h new file +88 -0

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Signature · 1 line
2.20.0.rc2
author
#9 lore raw

PATCH 6/6 mips: jz47xx: Add Creator CI20 platform

In reply to Ezequiel Garcia

From: Paul Burton <[email protected]>

Add support for the Creator CI20 platform based on the JZ4780 SoC.

Cc Daniel Schwierzeck <[email protected]>
Signed-off-by Paul Burton <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Signed-off-by Ezequiel Garcia <[email protected]>
---
 arch/mips/dts/Makefile        |   1 +
 arch/mips/dts/ci20.dts        | 120 +++++++++++
 arch/mips/mach-jz47xx/Kconfig |  11 +
 board/imgtec/ci20/Kconfig     |  15 ++
 board/imgtec/ci20/Makefile    |   5 +
 board/imgtec/ci20/README      |  10 +
 board/imgtec/ci20/ci20.c      | 365 ++++++++++++++++++++++++++++++++++
 configs/ci20_defconfig        |  47 +++++
 include/configs/ci20.h        |  74 +++++++
 9 files changed, 648 insertions(+)
 create mode 100644 arch/mips/dts/ci20.dts
 create mode 100644 board/imgtec/ci20/Kconfig
 create mode 100644 board/imgtec/ci20/Makefile
 create mode 100644 board/imgtec/ci20/README
 create mode 100644 board/imgtec/ci20/ci20.c
 create mode 100644 configs/ci20_defconfig
 create mode 100644 include/configs/ci20.h
arch/mips/dts/Makefile +1 -0
index b447141f8717..647d2bf0d53b 100644
@@ -16,6 +16,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
 dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
 dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
+dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
 
 targets += $(dtb-y)
arch/mips/dts/ci20.dts new file +120 -0

120 lines not on this page · raw message

arch/mips/mach-jz47xx/Kconfig +11 -0
index cd6944cfc252..dcaac0162866 100644
@@ -12,4 +12,15 @@ config SOC_JZ4780
 	help
 	  Support for Ingenic JZ4780 family SoCs.
 
+choice
+	prompt "Board select"
+
+config TARGET_JZ4780_CI20
+	bool "Creator CI20 Reference Board"
+	select SOC_JZ4780
+
+endchoice
+
+source "board/imgtec/ci20/Kconfig"
+
 endmenu
board/imgtec/ci20/Kconfig new file +15 -0
new file mode 100644
index 000000000000..82bf65d64f1e
@@ -0,0 +1,15 @@
+if TARGET_JZ4780_CI20
+
+config SYS_BOARD
+	default "ci20"
+
+config SYS_VENDOR
+	default "imgtec"
+
+config SYS_CONFIG_NAME
+	default "ci20"
+
+config SYS_TEXT_BASE
+	default 0x80000000
+
+endif
board/imgtec/ci20/Makefile new file +5 -0
new file mode 100644
index 000000000000..8c00081e660b
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y := ci20.o
board/imgtec/ci20/README new file +10 -0
new file mode 100644
index 000000000000..c757d41c7640
@@ -0,0 +1,10 @@
+CI20 U-Boot
+
+Installation to an SD card:
+  Repartition your card with an MBR such that the first partition starts at an
+  offset of no less than 270KB. Then install U-Boot SPL & the full U-Boot image
+  to the card like so:
+
+    dd if=spl/u-boot-spl.bin of=/dev/sdX obs=512 seek=1
+    dd if=u-boot.img of=/dev/sdX obs=1K seek=14
+    sync
board/imgtec/ci20/ci20.c new file +365 -0

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configs/ci20_defconfig new file +47 -0

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include/configs/ci20.h new file +74 -0

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Signature · 1 line
2.20.0.rc2
#10 lore raw

cover Add support for MIPS Creator CI20

In reply to Ezequiel Garcia
Quoted 15 lines · Ezequiel Garcia

As the subject says, this series adds support for CI20.

Most of the work was done by Paul Burton, and then by Marek Vasut. I've just rescued the work from the dark wastelands of Mordor, did some cleaning here and there and submitted.

Patches 1, 2, and 4 are completely untouched. I've picked them from Marek's tree.

For the MMC driver (patch 3) there is some cleanup, and some fixes for proper DM migration.

Finally, patches 5 and 6 have been changed a bit: I've cleaned up the devicetree, the board support files and the defconfig.

Quoted 8 lines

This is based on top of today's master (7ff485c68b7e) and has been tested by SD-card booting both U-Boot and Linux. Booting Linux via TFTP was also tested.

Please note that I've added Paul's SOB to all the patches he authored, to make the authorship chain more clear.

Reviews and tests are welcome. Bikesheds not so much! ;-)

The platform is awfully size constrained, so it'd be nice to have it in to keep the general bloat in check.

Except for minor nits in 1/6,

Reviewed-by Marek Vasut <[email protected]>
Signature · 2 lines
Best regards,
Marek Vasut
#11 lore raw

cover Add support for MIPS Creator CI20

In reply to Ezequiel Garcia

Hi Ezequiel,

Am 10.12.18 um 21:35 schrieb Ezequiel Garcia:

Quoted 2 lines

Please note that I've added Paul's SOB to all the patches he authored, to make the authorship chain more clear.

That's only permitted if Paul agreed to that beforehand - did he? Never add other people's Signed-off-by if their patches didn't have it!

https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin

As far as the authorship chain goes, you re-did all my forward-porting, that I'm not being credited with Signed-off-by in MMC/SoC/defconfig patches or verbally anywhere?

Also this is surely not a v1 patch! Marek had posted CI20 before, so this should be v2 (doesn't look like I posted mine as v2, it didn't fully build yet) and thus your next iteration should be v3 please.

Further, it would be very helpful - given the history of this patchset - to indicate which toolchain and version you used for building this.

Regards,
Andreas

Signature · 3 lines
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
author
#12 lore raw

cover Add support for MIPS Creator CI20

Quoted 9 lines · Andreas Färber

Hi Ezequiel,

Am 10.12.18 um 21:35 schrieb Ezequiel Garcia:

Quoted 2 lines

Please note that I've added Paul's SOB to all the patches he authored, to make the authorship chain more clear.

That's only permitted if Paul agreed to that beforehand - did he? Never add other people's Signed-off-by if their patches didn't have it!

Fair enough. Let's hope Paul is OK with this. I wasn't really comfortable not having Paul's SOB, given he authored all the patches.

Paul, do we have green light?

Quoted 6 lines

https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin

As far as the authorship chain goes, you re-did all my forward-porting, that I'm not being credited with Signed-off-by in MMC/SoC/defconfig patches or verbally anywhere?

Oh, sorry, but I haven't used anything from your work. This series is entirely based on https://github.com/marex/u-boot-mips/tree/ci20-v2018.xx.

Basically, I've cherry-picked the commits that weren't already available in upstream, adding my SOB to those patches that I've modified.

Like I mentioned in the cover letter, most of the work has been done by Paul Burton and Marek, so they deserve all the credit.

I'm just cleaning and submitting.

Quoted 4 lines

Also this is surely not a v1 patch! Marek had posted CI20 before, so this should be v2 (doesn't look like I posted mine as v2, it didn't fully build yet) and thus your next iteration should be v3 please.

Well, I couldn't find Marek's cover letter, and I've decided to start from scratch.

Two years have passed, we have a new try at getting this merged so I think it deserves it's own set of integers.

Quoted 3 lines

Further, it would be very helpful - given the history of this patchset - to indicate which toolchain and version you used for building this.

I've used gcc version 5.3.0 (Sourcery CodeBench Lite 2016.05-8), installed via Buildroot. Wasn't really paying attention to the toolchain.

I'll test with a recent gcc and post the results.

Thanks,
Eze

#13 lore raw

cover Add support for MIPS Creator CI20

Am 10.12.18 um 22:31 schrieb Ezequiel Garcia:

Quoted 6 lines · Andreas Färber
Quoted 3 lines

Also this is surely not a v1 patch! Marek had posted CI20 before, so this should be v2 (doesn't look like I posted mine as v2, it didn't fully build yet) and thus your next iteration should be v3 please.

Well, I couldn't find Marek's cover letter, and I've decided to start from scratch.

That's OK, you did mention your changes in the cover letter.

Quoted 2 lines

Two years have passed, we have a new try at getting this merged so I think it deserves it's own set of integers.

The patches need to be distinguishable in Patchwork and inboxes if the subjects remained the same, no matter how much time passed.

Thanks,
Andreas

Signature · 3 lines
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
#14 lore raw

cover Add support for MIPS Creator CI20

In reply to Ezequiel Garcia

Hi Ezequiel,

Quoted 5 lines · Ezequiel Garcia
Quoted 4 lines · Andreas Färber

Am 10.12.18 um 21:35 schrieb Ezequiel Garcia:

Quoted 2 lines

Please note that I've added Paul's SOB to all the patches he authored, to make the authorship chain more clear.

Quoted 8 lines
Quoted 3 lines

That's only permitted if Paul agreed to that beforehand - did he? Never add other people's Signed-off-by if their patches didn't have it!

Fair enough. Let's hope Paul is OK with this. I wasn't really comfortable not having Paul's SOB, given he authored all the patches.

Paul, do we have green light?

I'm OK with it in this instance, though please feel free to take authorship if you make significant changes. I've not had the time to do this work myself but I certainly don't want to stand in the way of others :)

It's worth noting though that paul.burton at imgtec.com is no longer a valid email address, so it might be worth updating to paul.burton at mips.com wherever my email address appears.

Thanks,
Paul

#15 lore raw

cover Add support for MIPS Creator CI20

In reply to Ezequiel Garcia
Quoted 1 line · Ezequiel Garcia

On Mon, 2018-12-10 at 22:00 +0100, Andreas Färber wrote:

[snip]

Quoted 8 lines
Quoted 3 lines

Further, it would be very helpful - given the history of this patchset - to indicate which toolchain and version you used for building this.

I've used gcc version 5.3.0 (Sourcery CodeBench Lite 2016.05-8), installed via Buildroot. Wasn't really paying attention to the toolchain.

I'll test with a recent gcc and post the results.

Just to chime in on this part for now, to be clear, it needs to work with the default toolchain buildman uses, which is currently the gcc-7.3 kernel.org ones and buildman will fetch one for you.

Signature · 8 lines
Tom
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#16 lore raw

cover Add support for MIPS Creator CI20

Quoted 7 lines · Tom Rini
Quoted 1 line · Ezequiel Garcia

On Mon, 2018-12-10 at 22:00 +0100, Andreas Färber wrote:

[snip]

Quoted 4 lines
Quoted 3 lines

Further, it would be very helpful - given the history of this patchset - to indicate which toolchain and version you used for building this.

Quoted 9 lines
Quoted 4 lines

I've used gcc version 5.3.0 (Sourcery CodeBench Lite 2016.05-8), installed via Buildroot. Wasn't really paying attention to the toolchain.

I'll test with a recent gcc and post the results.

Just to chime in on this part for now, to be clear, it needs to work with the default toolchain buildman uses, which is currently the gcc-7.3 kernel.org ones and buildman will fetch one for you.

Done!

$ strings u-boot | grep GCC
mips-linux-gcc (GCC) 7.3.0
GCC: (GNU) 7.3.0
$ strings spl/u-boot-spl | grep GCC
GCC: (GNU) 7.3.0

U-Boot 2019.01-rc1-00226-g208679cb9307 (Dec 10 2018 - 21:19:57 -0300)

CPU:   Ingenic JZ4780
Board: Creator CI20 (rev.1)
DRAM:  1 GiB
MMC:   MSC: 0, MSC: 1
Loading Environment from MMC... OK
In:    serial at 10034000
Out:   serial at 10034000
Err:   serial at 10034000
Net:   dm9000
Hit any key to stop autoboot:  0

=>

Regards,
Eze

#17 lore raw

cover Add support for MIPS Creator CI20

Quoted 38 lines · Ezequiel Garcia
Quoted 7 lines · Tom Rini
Quoted 1 line · Ezequiel Garcia

On Mon, 2018-12-10 at 22:00 +0100, Andreas Färber wrote:

[snip]

Quoted 4 lines
Quoted 3 lines

Further, it would be very helpful - given the history of this patchset - to indicate which toolchain and version you used for building this.

Quoted 9 lines
Quoted 4 lines

I've used gcc version 5.3.0 (Sourcery CodeBench Lite 2016.05-8), installed via Buildroot. Wasn't really paying attention to the toolchain.

I'll test with a recent gcc and post the results.

Just to chime in on this part for now, to be clear, it needs to work with the default toolchain buildman uses, which is currently the gcc-7.3 kernel.org ones and buildman will fetch one for you.

Done!

$ strings u-boot | grep GCC
mips-linux-gcc (GCC) 7.3.0
GCC: (GNU) 7.3.0
$ strings spl/u-boot-spl | grep GCC
GCC: (GNU) 7.3.0

U-Boot 2019.01-rc1-00226-g208679cb9307 (Dec 10 2018 - 21:19:57 -0300)

CPU:   Ingenic JZ4780
Board: Creator CI20 (rev.1)
DRAM:  1 GiB
MMC:   MSC: 0, MSC: 1
Loading Environment from MMC... OK
In:    serial at 10034000
Out:   serial at 10034000
Err:   serial at 10034000
Net:   dm9000
Hit any key to stop autoboot:  0
Quoted 1 line

=>

Yay!

Signature · 8 lines
Tom
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#18 lore raw

cover Add support for MIPS Creator CI20

In reply to Ezequiel Garcia
Quoted 15 lines · Ezequiel Garcia

As the subject says, this series adds support for CI20.

Most of the work was done by Paul Burton, and then by Marek Vasut. I've just rescued the work from the dark wastelands of Mordor, did some cleaning here and there and submitted.

Patches 1, 2, and 4 are completely untouched. I've picked them from Marek's tree.

For the MMC driver (patch 3) there is some cleanup, and some fixes for proper DM migration.

Finally, patches 5 and 6 have been changed a bit: I've cleaned up the devicetree, the board support files and the defconfig.

Quoted 8 lines

This is based on top of today's master (7ff485c68b7e) and has been tested by SD-card booting both U-Boot and Linux. Booting Linux via TFTP was also tested.

Please note that I've added Paul's SOB to all the patches he authored, to make the authorship chain more clear.

Reviews and tests are welcome. Bikesheds not so much! ;-)

There's some stuff that's been noted that needs fixing and a v5 (I think, really) posted with those addressed. But if there's nothing else, it would be good to finally get this platform in and I would be open to seeing it come in still at this point in the merge window. Thanks all!

Signature · 8 lines
Tom
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#19 lore raw

cover Add support for MIPS Creator CI20

Quoted 24 lines · Tom Rini
Quoted 22 lines · Ezequiel Garcia

As the subject says, this series adds support for CI20.

Most of the work was done by Paul Burton, and then by Marek Vasut. I've just rescued the work from the dark wastelands of Mordor, did some cleaning here and there and submitted.

Patches 1, 2, and 4 are completely untouched. I've picked them from Marek's tree.

For the MMC driver (patch 3) there is some cleanup, and some fixes for proper DM migration.

Finally, patches 5 and 6 have been changed a bit: I've cleaned up the devicetree, the board support files and the defconfig.

This is based on top of today's master (7ff485c68b7e) and has been tested by SD-card booting both U-Boot and Linux. Booting Linux via TFTP was also tested.

Please note that I've added Paul's SOB to all the patches he authored, to make the authorship chain more clear.

Quoted 8 lines
Quoted 1 line

Reviews and tests are welcome. Bikesheds not so much! ;-)

There's some stuff that's been noted that needs fixing and a v5 (I think, really) posted with those addressed. But if there's nothing else, it would be good to finally get this platform in and I would be open to seeing it come in still at this point in the merge window. Thanks all!

I think that if we are worried about those infinite loops in the drivers, and stuff along that severity level, it won't hurt to fix them as follow-up patches.

Thanks,
Eze