Skip to contentSkip to conversation

clk: socfpga: stratix10: fix divider entry for the emac clocks

PATCH Applied Dinh Nguyen 2 participants 3 messages Jun 7, 2019 – Jun 25, 2019 1 message not in the archive

Subsystems (3)
Stable branch Common clk Arm/socfpga clock framework support
lore
Share & tools
lore

Dinh Nguyen

author maintainer
#0 lore raw

PATCH 1/1 clk: socfpga: stratix10: fix divider entry for the emac clocks

The fixed dividers for the emac clocks should be 2 not 4.

Cc [email protected]
Signed-off-by Dinh Nguyen <[email protected]>
---
 drivers/clk/socfpga/clk-s10.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/clk/socfpga/clk-s10.c +2 -2
index 8281dfbf38c2..5bed36e12951 100644
@@ -103,9 +103,9 @@ static const struct stratix10_perip_cnt_clock s10_main_perip_cnt_clks[] = {
 	{ STRATIX10_NOC_CLK, "noc_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux),
 	  0, 0, 0, 0x3C, 1},
 	{ STRATIX10_EMAC_A_FREE_CLK, "emaca_free_clk", NULL, emaca_free_mux, ARRAY_SIZE(emaca_free_mux),
-	  0, 0, 4, 0xB0, 0},
+	  0, 0, 2, 0xB0, 0},
 	{ STRATIX10_EMAC_B_FREE_CLK, "emacb_free_clk", NULL, emacb_free_mux, ARRAY_SIZE(emacb_free_mux),
-	  0, 0, 4, 0xB0, 1},
+	  0, 0, 2, 0xB0, 1},
 	{ STRATIX10_EMAC_PTP_FREE_CLK, "emac_ptp_free_clk", NULL, emac_ptp_free_mux,
 	  ARRAY_SIZE(emac_ptp_free_mux), 0, 0, 4, 0xB0, 2},
 	{ STRATIX10_GPIO_DB_FREE_CLK, "gpio_db_free_clk", NULL, gpio_db_free_mux,
Signature · 1 line
2.20.0

A message that is not in the archive (sent off-list or not yet received): [email protected]

author maintainer
#2 lore raw
Quoted 11 lines · Sasha Levin

Hi,

[This is an automated email]

This commit has been processed because it contains a -stable tag. The stable tag indicates that it's relevant for the following trees: all

The bot has tested the following trees: v5.1.7, v4.19.48, v4.14.123, v4.9.180, v4.4.180.

v5.1.7: Build OK!
v4.19.48: Build OK!

Can this patch be applied to v5.1.7 and v4.19.48?

Thanks,
Dinh