DC states igt tests patch series

index fd22273a..64ce240e 100644
@@ -38,6 +38,7 @@
 #include "drmtest.h"
 #include "igt_pm.h"
 #include "igt_aux.h"
+#include "igt_sysfs.h"
 
 /**
  * SECTION:igt_pm

@@ -58,16 +59,30 @@ enum {
 	POLICY_MIN_POWER = 2
 };
 
+#define MSR_PKG_CST_CONFIG_CONTROL	0xE2
+/*
+ * Below PKG CST limit mask and PC8 bits are meant for
+ * HSW,BDW SKL,ICL and Goldmont Microarch and future platforms.
+ * Refer IA S/W developers manual vol3c part3 chapter:35
+ */
+#define  PKG_CST_LIMIT_MASK		0xF
+#define  PKG_CST_LIMIT_C8		0x6
+
 #define MAX_PERFORMANCE_STR	"max_performance\n"
 #define MEDIUM_POWER_STR	"medium_power\n"
 #define MIN_POWER_STR		"min_power\n"
 /* Remember to fix this if adding longer strings */
 #define MAX_POLICY_STRLEN	strlen(MAX_PERFORMANCE_STR)
+int8_t *__sata_pm_policies;
+int __scsi_host_cnt;
 
 static char __igt_pm_audio_runtime_power_save[64];
 static char * __igt_pm_audio_runtime_control_path;
 static char __igt_pm_audio_runtime_control[64];
 
+static void __igt_pm_sata_link_pm_exit_handler(int sig);
+static void __igt_pm_restore_sata_link_power_management(void);
+
 static int __igt_pm_audio_restore_runtime_pm(void)
 {
 	int fd;

@@ -280,39 +295,26 @@ void igt_pm_enable_audio_runtime_pm(void)
 		igt_debug("Failed to enable audio runtime PM! (%d)\n", -err);
 }
 
-/**
- * igt_pm_enable_sata_link_power_management:
- *
- * Enable the min_power policy for SATA link power management.
- * Without this we cannot reach deep runtime power states.
- *
- * We don't have any assertions on open since the system might not have
- * a SATA host.
- *
- * Returns:
- * An opaque pointer to the data needed to restore the default values
- * after the test has terminated, or NULL if SATA link power management
- * is not supported. This pointer should be freed when no longer used
- * (typically after having called restore_sata_link_power_management()).
- */
-int8_t *igt_pm_enable_sata_link_power_management(void)
+static void __igt_pm_enable_sata_link_power_management(void)
 {
 	int fd, i;
 	ssize_t len;
 	char *buf;
 	char *file_name;
-	int8_t *link_pm_policies = NULL;
+	int8_t policy;
 
 	file_name = malloc(PATH_MAX);
 	buf = malloc(MAX_POLICY_STRLEN + 1);
 
-	for (i = 0; ; i++) {
-		int8_t policy;
-
+	for (__scsi_host_cnt = 0; ; __scsi_host_cnt++) {
 		snprintf(file_name, PATH_MAX,
 			 "/sys/class/scsi_host/host%d/link_power_management_policy",
-			 i);
+			 __scsi_host_cnt);
 
+		/*
+		 * We don't have any assertions on open since the system
+		 * might not have a SATA host.
+		 */
 		fd = open(file_name, O_RDWR);
 		if (fd < 0)
 			break;

@@ -332,12 +334,26 @@ int8_t *igt_pm_enable_sata_link_power_management(void)
 		else
 			policy = POLICY_UNKNOWN;
 
-		if (!(i % 256))
-			link_pm_policies = realloc(link_pm_policies,
-						   (i / 256 + 1) * 256 + 1);
+		if (!(__scsi_host_cnt % 256))
+			__sata_pm_policies = realloc(__sata_pm_policies,
+						     (__scsi_host_cnt / 256 + 1)
+						     * 256 + 1);
+
+		__sata_pm_policies[__scsi_host_cnt] = policy;
+		close(fd);
+	}
+
+	igt_install_exit_handler(__igt_pm_sata_link_pm_exit_handler);
+
+	for (i = 0; i < __scsi_host_cnt; i++) {
+		snprintf(file_name, PATH_MAX,
+			 "/sys/class/scsi_host/host%d/link_power_management_policy",
+			 i);
+		fd = open(file_name, O_RDWR);
+		if (fd < 0)
+			break;
 
-		link_pm_policies[i] = policy;
-		link_pm_policies[i + 1] = 0;
+		policy = __sata_pm_policies[i];
 
 		/* If the policy is something we don't know about,
 		 * don't touch it, since we might potentially break things.

@@ -355,39 +371,25 @@ int8_t *igt_pm_enable_sata_link_power_management(void)
 	}
 	free(buf);
 	free(file_name);
-
-	return link_pm_policies;
 }
 
-/**
- * igt_pm_restore_sata_link_power_management:
- * @pm_data: An opaque pointer with saved link PM policies;
- *           If NULL is passed we force enable the "max_performance" policy.
- *
- * Restore the link power management policies to the values
- * prior to enabling min_power.
- *
- * Caveat: If the system supports hotplugging and hotplugging takes
- *         place during our testing so that the hosts change numbers
- *         we might restore the settings to the wrong hosts.
- */
-void igt_pm_restore_sata_link_power_management(int8_t *pm_data)
-
+static void __igt_pm_restore_sata_link_power_management(void)
 {
 	int fd, i;
 	char *file_name;
 
+	if (!__sata_pm_policies)
+		return;
+
 	/* Disk runtime PM policies. */
 	file_name = malloc(PATH_MAX);
-	for (i = 0; ; i++) {
+	for (i = 0; i < __scsi_host_cnt; i++) {
 		int8_t policy;
 
-		if (!pm_data)
-			policy = POLICY_MAX_PERFORMANCE;
-		else if (pm_data[i] == POLICY_UNKNOWN)
+		if (__sata_pm_policies[i] == POLICY_UNKNOWN)
 			continue;
 		else
-			policy = pm_data[i];
+			policy = __sata_pm_policies[i];
 
 		snprintf(file_name, PATH_MAX,
 			 "/sys/class/scsi_host/host%d/link_power_management_policy",

@@ -421,7 +423,48 @@ void igt_pm_restore_sata_link_power_management(int8_t *pm_data)
 		close(fd);
 	}
 	free(file_name);
+	free(__sata_pm_policies);
+	__sata_pm_policies = NULL;
+}
+
+/**
+ * igt_pm_enable_sata_link_power_management:
+ *
+ * Enable the min_power policy for SATA link power management.
+ * Without this we cannot reach deep runtime power states.
+ */
+void igt_pm_enable_sata_link_power_management(void)
+{
+	/* Check if has been already saved. */
+	if (__sata_pm_policies)
+		return;
+
+	 __igt_pm_enable_sata_link_power_management();
+}
+
+/**
+ * igt_pm_restore_sata_link_power_management:
+ *
+ * Restore the link power management policies to the values
+ * prior to enabling min_power.
+ *
+ * Caveat: If the system supports hotplugging and hotplugging takes
+ *         place during our testing so that the hosts change numbers
+ *         we might restore the settings to the wrong hosts.
+ */
+void igt_pm_restore_sata_link_power_management(void)
+{
+	if (!__sata_pm_policies)
+		return;
+
+	 __igt_pm_restore_sata_link_power_management();
+}
+
+static void __igt_pm_sata_link_pm_exit_handler(int sig)
+{
+	__igt_pm_restore_sata_link_power_management();
 }
+
 #define POWER_DIR "/sys/devices/pci0000:00/0000:00:02.0/power"
 /* We just leak this on exit ... */
 int pm_status_fd = -1;

@@ -585,6 +628,34 @@ bool igt_setup_runtime_pm(void)
 	return true;
 }
 
+/**
+ * igt_disable_runtime_pm:
+ *
+ * Disable the runtime pm for i915 device.
+ * igt_disable_runtime_pm assumes that igt_setup_runtime_pm has already
+ * called to save runtime autosuspend and control attributes.
+ */
+void igt_disable_runtime_pm(void)
+{
+	int fd;
+	ssize_t size;
+	char buf[6];
+
+	igt_assert_fd(pm_status_fd);
+
+	/* We know we support runtime PM, let's try to disable it now. */
+	fd = open(POWER_DIR "/control", O_RDWR);
+	igt_assert_f(fd >= 0, "Can't open " POWER_DIR "/control\n");
+
+	size = write(fd, "on\n", 3);
+	igt_assert(size == 3);
+	lseek(fd, 0, SEEK_SET);
+	size = read(fd, buf, ARRAY_SIZE(buf));
+	igt_assert(size == 3);
+	igt_assert(strncmp(buf, "on\n", 3) == 0);
+	close(fd);
+}
+
 /**
  * igt_get_runtime_pm_status:
  *

@@ -628,3 +699,53 @@ bool igt_wait_for_pm_status(enum igt_runtime_pm_status status)
 {
 	return igt_wait(igt_get_runtime_pm_status() == status, 10000, 100);
 }
+
+/**
+ * dmc_loaded:
+ * @debugfs: fd to the debugfs dir.
+ *
+ * Check whether DMC FW is loaded or not. DMC FW is require for few Display C
+ * states like DC5 and DC6. FW does the Context Save and Restore during Display
+ * C States entry and exit.
+ *
+ * Returns:
+ * True if DMC FW is loaded otherwise false.
+ */
+bool igt_pm_dmc_loaded(int debugfs)
+{
+	char buf[15];
+	int len;
+
+	len = igt_sysfs_read(debugfs, "i915_dmc_info", buf, sizeof(buf) - 1);
+	if (len < 0)
+		return true; /* no CSR support, no DMC requirement */
+
+	buf[len] = '\0';
+
+	igt_info("DMC: %s\n", buf);
+	return strstr(buf, "fw loaded: yes");
+}
+
+/**
+ * igt_pm_pc8_plus_residencies_enabled:
+ * @msr_fd: fd to /dev/cpu/0/msr
+ * Check whether BIOS has disabled the PC8 package deeper state.
+ *
+ * Returns:
+ * True if PC8+ package deeper state enabled on machine otherwise false.
+ */
+bool igt_pm_pc8_plus_residencies_enabled(int msr_fd)
+{
+	int rc;
+	uint64_t val;
+
+	rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PKG_CST_CONFIG_CONTROL);
+	if (rc != sizeof(val))
+		return false;
+	if ((val & PKG_CST_LIMIT_MASK) < PKG_CST_LIMIT_C8) {
+		igt_info("PKG C-states limited below PC8 by the BIOS\n");
+		return false;
+	}
+
+	return true;
+}

index 10cc6794..7dc24174 100644
@@ -25,8 +25,8 @@
 #define IGT_PM_H
 
 void igt_pm_enable_audio_runtime_pm(void);
-int8_t *igt_pm_enable_sata_link_power_management(void);
-void igt_pm_restore_sata_link_power_management(int8_t *pm_data);
+void igt_pm_enable_sata_link_power_management(void);
+void igt_pm_restore_sata_link_power_management(void);
 
 /**
  * igt_runtime_pm_status:

@@ -47,8 +47,11 @@ enum igt_runtime_pm_status {
 };
 
 bool igt_setup_runtime_pm(void);
+void igt_disable_runtime_pm(void);
 void igt_restore_runtime_pm(void);
 enum igt_runtime_pm_status igt_get_runtime_pm_status(void);
 bool igt_wait_for_pm_status(enum igt_runtime_pm_status status);
+bool igt_pm_dmc_loaded(int debugfs);
+bool igt_pm_pc8_plus_residencies_enabled(int msr_fd);
 
 #endif /* IGT_PM_H */

index 4c1bff5b..9a5f4c37 100644
@@ -47,7 +47,6 @@ struct context {
 #define FADESPEED 100 /* milliseconds between steps */
 
 IGT_TEST_DESCRIPTION("Basic backlight sysfs test");
-static int8_t *pm_data = NULL;
 
 static int backlight_read(int *result, const char *fname)
 {

@@ -235,7 +234,7 @@ igt_main
 		igt_plane_set_fb(primary, &fb);
 
 		igt_display_commit2(&display, display.is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
-		pm_data = igt_pm_enable_sata_link_power_management();
+		igt_pm_enable_sata_link_power_management();
 	}
 
 	igt_subtest("basic-brightness")

@@ -255,8 +254,7 @@ igt_main
 
 		igt_display_fini(&display);
 		igt_remove_fb(display.drm_fd, &fb);
-		igt_pm_restore_sata_link_power_management(pm_data);
-		free(pm_data);
+		igt_pm_restore_sata_link_power_management();
 		close(display.drm_fd);
 	}
 }

index 2168ff72..20c4ff90 100644
@@ -52,11 +52,6 @@
 #include "igt_device.h"
 #include "igt_edid.h"
 
-#define MSR_PKG_CST_CONFIG_CONTROL	0xE2
-/* HSW/BDW: */
-#define  PKG_CST_LIMIT_MASK		0xF
-#define  PKG_CST_LIMIT_C8		0x6
-
 #define MSR_PC8_RES	0x630
 #define MSR_PC9_RES	0x631
 #define MSR_PC10_RES	0x632

@@ -123,8 +118,6 @@ struct modeset_params lpsp_mode_params;
 struct modeset_params non_lpsp_mode_params;
 struct modeset_params *default_mode_params;
 
-static int8_t *pm_data = NULL;
-
 static int modprobe(const char *driver)
 {
 	return igt_kmod_load(driver, NULL);

@@ -146,15 +139,7 @@ static bool supports_pc8_plus_residencies(void)
 	if (rc != sizeof(val))
 		return false;
 
-	rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PKG_CST_CONFIG_CONTROL);
-	if (rc != sizeof(val))
-		return false;
-	if ((val & PKG_CST_LIMIT_MASK) < PKG_CST_LIMIT_C8) {
-		igt_info("PKG C-states limited below PC8 by the BIOS\n");
-		return false;
-	}
-
-	return true;
+	return igt_pm_pc8_plus_residencies_enabled(msr_fd);
 }
 
 static uint64_t get_residency(uint32_t type)

@@ -755,21 +740,6 @@ static void setup_pc8(void)
 	has_pc8 = true;
 }
 
-static bool dmc_loaded(void)
-{
-	char buf[15];
-	int len;
-
-	len = igt_sysfs_read(debugfs, "i915_dmc_info", buf, sizeof(buf) - 1);
-	if (len < 0)
-	    return true; /* no CSR support, no DMC requirement */
-
-	buf[len] = '\0';
-
-	igt_info("DMC: %s\n", buf);
-	return strstr(buf, "fw loaded: yes");
-}
-
 static void dump_file(int dir, const char *filename)
 {
 	char *contents;

@@ -796,7 +766,7 @@ static bool setup_environment(void)
 
 	init_mode_set_data(&ms_data);
 
-	pm_data = igt_pm_enable_sata_link_power_management();
+	igt_pm_enable_sata_link_power_management();
 
 	has_runtime_pm = igt_setup_runtime_pm();
 	setup_pc8();

@@ -804,7 +774,7 @@ static bool setup_environment(void)
 	igt_info("Runtime PM support: %d\n", has_runtime_pm);
 	igt_info("PC8 residency support: %d\n", has_pc8);
 	igt_require(has_runtime_pm);
-	igt_require(dmc_loaded());
+	igt_require(igt_pm_dmc_loaded(debugfs));
 
 out:
 	disable_all_screens(&ms_data);

@@ -821,8 +791,7 @@ static void teardown_environment(void)
 
 	igt_restore_runtime_pm();
 
-	igt_pm_restore_sata_link_power_management(pm_data);
-	free(pm_data);
+	igt_pm_restore_sata_link_power_management();
 
 	fini_mode_set_data(&ms_data);
 

index 438be7a5..944618a1 100644
@@ -203,6 +203,16 @@ int main(int argc, char *argv[])
 		test_dc_state_psr(&data, CHECK_DC5);
 	}
 
+	igt_describe("This test validates display engine entry to DC6 state "
+		     "while PSR is active");
+	igt_subtest("dc6-psr") {
+		data.op_psr_mode = PSR_MODE_1;
+		psr_enable(data.debugfs_fd, data.op_psr_mode);
+		igt_require_f(edp_psr_sink_support(&data),
+			      "Sink does not support PSR\n");
+		test_dc_state_psr(&data, CHECK_DC6);
+	}
+
 	igt_fixture {
 		close(data.debugfs_fd);
 		display_fini(&data);

index 944618a1..553f8407 100644
@@ -44,6 +44,7 @@ typedef struct {
 	enum psr_mode op_psr_mode;
 	drmModeModeInfo *mode;
 	igt_output_t *output;
+	bool runtime_suspend_disabled;
 } data_t;
 
 static bool dc_state_wait_entry(int drm_fd, int dc_flag, int prev_dc_count);

@@ -171,6 +172,67 @@ static void test_dc_state_psr(data_t *data, int dc_flag)
 	cleanup_dc_psr(data);
 }
 
+static void cleanup_dc_dpms(data_t *data)
+{
+	/*
+	 * if runtime PM is disabled for i915 restore it,
+	 * so any other sub-test can use runtime-PM.
+	 */
+	if (data->runtime_suspend_disabled) {
+		igt_restore_runtime_pm();
+		igt_setup_runtime_pm();
+	}
+}
+
+static void setup_dc_dpms(data_t *data)
+{
+	if (IS_BROXTON(data->devid) || IS_GEMINILAKE(data->devid) ||
+	    AT_LEAST_GEN(data->devid, 11)) {
+		igt_disable_runtime_pm();
+		data->runtime_suspend_disabled = true;
+	} else {
+		data->runtime_suspend_disabled = false;
+	}
+}
+
+static void dpms_off(data_t *data)
+{
+	for (int i = 0; i < data->display.n_outputs; i++) {
+		kmstest_set_connector_dpms(data->drm_fd,
+					   data->display.outputs[i].config.connector,
+					   DRM_MODE_DPMS_OFF);
+	}
+
+	if (!data->runtime_suspend_disabled)
+		igt_assert(igt_wait_for_pm_status
+			   (IGT_RUNTIME_PM_STATUS_SUSPENDED));
+}
+
+static void dpms_on(data_t *data)
+{
+	for (int i = 0; i < data->display.n_outputs; i++) {
+		kmstest_set_connector_dpms(data->drm_fd,
+					   data->display.outputs[i].config.connector,
+					   DRM_MODE_DPMS_ON);
+	}
+
+	if (!data->runtime_suspend_disabled)
+		igt_assert(igt_wait_for_pm_status
+			   (IGT_RUNTIME_PM_STATUS_ACTIVE));
+}
+
+static void test_dc_state_dpms(data_t *data, int dc_flag)
+{
+	uint32_t dc_counter;
+
+	setup_dc_dpms(data);
+	dc_counter = read_dc_counter(data->drm_fd, dc_flag);
+	dpms_off(data);
+	check_dc_counter(data->drm_fd, dc_flag, dc_counter);
+	dpms_on(data);
+	cleanup_dc_dpms(data);
+}
+
 IGT_TEST_DESCRIPTION("These tests validate Display Power DC states");
 int main(int argc, char *argv[])
 {

@@ -213,6 +275,12 @@ int main(int argc, char *argv[])
 		test_dc_state_psr(&data, CHECK_DC6);
 	}
 
+	igt_describe("This test validates display engine entry to DC5 state "
+		     "while all connectors's DPMS property set to OFF");
+	igt_subtest("dc5-dpms") {
+		test_dc_state_dpms(&data, CHECK_DC5);
+	}
+
 	igt_fixture {
 		close(data.debugfs_fd);
 		display_fini(&data);

index 553f8407..2ea27b00 100644
@@ -281,6 +281,12 @@ int main(int argc, char *argv[])
 		test_dc_state_dpms(&data, CHECK_DC5);
 	}
 
+	igt_describe("This test validates display engine entry to DC5 state "
+		     "while all connectors's DPMS property set to OFF");
+	igt_subtest("dc6-dpms") {
+		test_dc_state_dpms(&data, CHECK_DC6);
+	}
+
 	igt_fixture {
 		close(data.debugfs_fd);
 		display_fini(&data);

index 2ea27b00..ce3319b7 100644
@@ -23,10 +23,12 @@
  */
 
 #include <errno.h>
+#include <fcntl.h>
 #include <stdbool.h>
 #include <stdio.h>
 #include <string.h>
 #include "igt.h"
+#include "igt_kmod.h"
 #include "igt_psr.h"
 #include "igt_sysfs.h"
 #include "limits.h"

@@ -37,6 +39,7 @@
 
 typedef struct {
 	int drm_fd;
+	int msr_fd;
 	int debugfs_fd;
 	uint32_t devid;
 	igt_display_t display;

@@ -253,6 +256,12 @@ int main(int argc, char *argv[])
 		igt_require(has_runtime_pm);
 		igt_require(igt_pm_dmc_loaded(data.debugfs_fd));
 		igt_display_require(&data.display, data.drm_fd);
+		/* Make sure our Kernel supports MSR and the module is loaded */
+		igt_require(igt_kmod_load("msr", NULL) == 0);
+
+		data.msr_fd = open("/dev/cpu/0/msr", O_RDONLY);
+		igt_assert_f(data.msr_fd >= 0,
+			     "Can't open /dev/cpu/0/msr.\n");
 	}
 
 	igt_describe("This test validates display engine entry to DC5 state "

@@ -272,6 +281,8 @@ int main(int argc, char *argv[])
 		psr_enable(data.debugfs_fd, data.op_psr_mode);
 		igt_require_f(edp_psr_sink_support(&data),
 			      "Sink does not support PSR\n");
+		igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd),
+			      "PC8+ residencies not supported\n");
 		test_dc_state_psr(&data, CHECK_DC6);
 	}
 

@@ -284,11 +295,14 @@ int main(int argc, char *argv[])
 	igt_describe("This test validates display engine entry to DC5 state "
 		     "while all connectors's DPMS property set to OFF");
 	igt_subtest("dc6-dpms") {
+		igt_require_f(igt_pm_pc8_plus_residencies_enabled(data.msr_fd),
+			      "PC8+ residencies not supported\n");
 		test_dc_state_dpms(&data, CHECK_DC6);
 	}
 
 	igt_fixture {
 		close(data.debugfs_fd);
+		close(data.msr_fd);
 		display_fini(&data);
 	}