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soc: aspeed: Add XDMA engine driver

PATCH Superseded Eddie James 2 participants 9 messages Apr 2, 2020 – Apr 5, 2020

Subsystems (2)

v7 of 11 Superseded Latest is v11 →

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#0 lore raw

v7 cover soc: aspeed: Add XDMA engine driver

This series adds a driver to control the Aspeed XDMA engine embedded in the AST2500 and AST2600. The XDMA engine performs automatic DMA operations over PCI-E between the Aspeed SOC (acting as a BMC) and a host processor.

Changes since v6:
- See individual patches

Eddie James (5):
dt-bindings: soc: Add Aspeed XDMA engine
soc: aspeed: Add XDMA Engine Driver
soc: aspeed: xdma: Add user interface
soc: aspeed: xdma: Add reset ioctl
ARM: dts: Aspeed: AST2600: Add XDMA PCI-E root control reset

 .../devicetree/bindings/soc/aspeed/xdma.txt   |   44 +
 MAINTAINERS                                   |    8 +
 arch/arm/boot/dts/aspeed-g6.dtsi              |    3 +-
 drivers/soc/aspeed/Kconfig                    |    8 +
 drivers/soc/aspeed/Makefile                   |    1 +
 drivers/soc/aspeed/aspeed-xdma.c              | 1084 +++++++++++++++++
 include/uapi/linux/aspeed-xdma.h              |   42 +
 7 files changed, 1189 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/soc/aspeed/xdma.txt
 create mode 100644 drivers/soc/aspeed/aspeed-xdma.c
 create mode 100644 include/uapi/linux/aspeed-xdma.h
Signature · 1 line
2.24.0
#1 lore raw

PATCH v7 1/5 dt-bindings: soc: Add Aspeed XDMA engine

Document the bindings for the Aspeed AST25XX and AST26XX XDMA engine.

---
Changes since v6:
- Add PCI-E root complex reset documentation
- Add reset-names documentation
- Switch to memory-region phandle instead of memory regs

 .../devicetree/bindings/soc/aspeed/xdma.txt   | 44 +++++++++++++++++++
 MAINTAINERS                                   |  6 +++
 2 files changed, 50 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/aspeed/xdma.txt
Documentation/devicetree/bindings/soc/aspeed/xdma.txt new file +44 -0
new file mode 100644
index 000000000000..c3d7cdeb1db6
@@ -0,0 +1,44 @@
+Aspeed AST25XX and AST26XX XDMA Engine
+
+The XDMA Engine embedded in the AST2500 and AST2600 SOCs can perform automatic
+DMA operations over PCI between the SOC (acting as a BMC) and a host processor.
+
+Required properties:
+ - compatible		: must be "aspeed,ast2500-xdma" or
+			  "aspeed,ast2600-xdma"
+ - reg			: contains the address and size of the memory region
+			  associated with the XDMA engine registers
+ - clocks		: clock specifier for the clock associated with the
+			  XDMA engine
+ - resets		: reset specifier for the syscon reset associated with
+			  the XDMA engine, and, for the AST2600, a second reset
+			  associated with the PCI-E root complex
+ - reset-names		: required only for the AST2600; must be "dev, "rc"
+ - interrupts-extended	: two interrupt cells; the first specifies the global
+			  interrupt for the XDMA engine and the second
+			  specifies the PCI-E reset or PERST interrupt.
+ - aspeed,scu		: a phandle to the syscon node for the system control
+			  unit of the SOC
+ - memory-region	: a phandle to the reserved memory region to be used by
+			  the XDMA engine for DMA operations
+
+Optional properties:
+ - pcie-device		: should be either "bmc" or "vga", corresponding to
+			  which device should be used by the XDMA engine for
+			  DMA operations. If this property is not set, the XDMA
+			  engine will use the BMC PCI-E device.
+
+Example:
+
+    xdma at 1e6e7000 {
+        compatible = "aspeed,ast2600-xdma";
+        reg = <0x1e6e7000 0x100>;
+        clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
+        resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
+        reset-names = "dev", "rc";
+        interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                              <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
+        aspeed,scu = <&syscon>;
+        pcie-device = "bmc";
+        memory-region = <&vga_memory>;
+    };
MAINTAINERS +6 -0
index 2fd88eeffed5..619a2d559ce2 100644
@@ -2771,6 +2771,12 @@ S:	Maintained
 F:	drivers/media/platform/aspeed-video.c
 F:	Documentation/devicetree/bindings/media/aspeed-video.txt
 
+ASPEED XDMA ENGINE DRIVER
+M:	Eddie James <[email protected]>
+L:	linux-aspeed at lists.ozlabs.org (moderated for non-subscribers)
+S:	Maintained
+F:	Documentation/devicetree/bindings/soc/aspeed/xdma.txt
+
 ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS
 M:	Corentin Chary <[email protected]>
 L:	acpi4asus-user at lists.sourceforge.net
Signature · 1 line
2.24.0
#2 lore raw

PATCH v7 2/5 soc: aspeed: Add XDMA Engine Driver

In reply to Eddie James

The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI DMA operations between the SOC (acting as a BMC) and a host processor in a server.

This commit adds a driver to control the XDMA engine and adds functions to initialize the hardware and memory and start DMA operations.

---
Changes since v6:
- Switch to use a chunk of reserved memory from the devicetree rather than simply reading the address and size
- Add PCI-E root complex reset
- Fix buffer overrun in aspeed_xdma_start
- Switch to usleep_range with a smaller time than the old msleep(10) because that time is for toggling the clock, which we don't do during reset and should be done by the clock driver anyway
- Set some additional bit in the SCU necessary for XDMA to work
- Refactor probe error handling near the end

 MAINTAINERS                      |   2 +
 drivers/soc/aspeed/Kconfig       |   8 +
 drivers/soc/aspeed/Makefile      |   1 +
 drivers/soc/aspeed/aspeed-xdma.c | 840 +++++++++++++++++++++++++++++++
 include/uapi/linux/aspeed-xdma.h |  38 ++
 5 files changed, 889 insertions(+)
 create mode 100644 drivers/soc/aspeed/aspeed-xdma.c
 create mode 100644 include/uapi/linux/aspeed-xdma.h
MAINTAINERS +2 -0
index 619a2d559ce2..96aad6b2e624 100644
@@ -2776,6 +2776,8 @@ M:	Eddie James <[email protected]>
 L:	linux-aspeed at lists.ozlabs.org (moderated for non-subscribers)
 S:	Maintained
 F:	Documentation/devicetree/bindings/soc/aspeed/xdma.txt
+F:	drivers/soc/aspeed/aspeed-xdma.c
+F:	include/uapi/linux/aspeed-xdma.h
 
 ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS
 M:	Corentin Chary <[email protected]>
drivers/soc/aspeed/Kconfig +8 -0
index 323e177aa74d..2a6c16f9e50b 100644
@@ -29,4 +29,12 @@ config ASPEED_P2A_CTRL
 	  ioctl()s, the driver also provides an interface for userspace mappings to
 	  a pre-defined region.
 
+config ASPEED_XDMA
+	tristate "Aspeed XDMA Engine Driver"
+	depends on SOC_ASPEED && REGMAP && MFD_SYSCON && HAS_DMA
+	help
+	  Enable support for the Aspeed XDMA Engine found on the Aspeed AST2XXX
+	  SOCs. The XDMA engine can perform automatic PCI DMA operations
+	  between the AST2XXX (acting as a BMC) and a host processor.
+
 endmenu
drivers/soc/aspeed/Makefile +1 -0
index b64be47f2b1f..977b046dfb73 100644
@@ -2,3 +2,4 @@
 obj-$(CONFIG_ASPEED_LPC_CTRL)	+= aspeed-lpc-ctrl.o
 obj-$(CONFIG_ASPEED_LPC_SNOOP)	+= aspeed-lpc-snoop.o
 obj-$(CONFIG_ASPEED_P2A_CTRL)	+= aspeed-p2a-ctrl.o
+obj-$(CONFIG_ASPEED_XDMA)	+= aspeed-xdma.o
drivers/soc/aspeed/aspeed-xdma.c new file +840 -0

840 lines not on this page · raw message

include/uapi/linux/aspeed-xdma.h new file +38 -0
new file mode 100644
index 000000000000..2efaa6067c39
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
+/* Copyright IBM Corp 2019 */
+
+#ifndef _UAPI_LINUX_ASPEED_XDMA_H_
+#define _UAPI_LINUX_ASPEED_XDMA_H_
+
+#include <linux/types.h>
+
+/*
+ * aspeed_xdma_direction
+ *
+ * ASPEED_XDMA_DIRECTION_DOWNSTREAM: transfers data from the host to the BMC
+ *
+ * ASPEED_XDMA_DIRECTION_UPSTREAM: transfers data from the BMC to the host
+ */
+enum aspeed_xdma_direction {
+	ASPEED_XDMA_DIRECTION_DOWNSTREAM = 0,
+	ASPEED_XDMA_DIRECTION_UPSTREAM,
+};
+
+/*
+ * aspeed_xdma_op
+ *
+ * host_addr: the DMA address on the host side, typically configured by PCI
+ *            subsystem
+ *
+ * len: the size of the transfer in bytes
+ *
+ * direction: an enumerator indicating the direction of the DMA operation; see
+ *            enum aspeed_xdma_direction
+ */
+struct aspeed_xdma_op {
+	__u64 host_addr;
+	__u32 len;
+	__u32 direction;
+};
+
+#endif /* _UAPI_LINUX_ASPEED_XDMA_H_ */
Signature · 1 line
2.24.0
#3 lore raw

PATCH v7 3/5 soc: aspeed: xdma: Add user interface

In reply to Eddie James

This commits adds a miscdevice to provide a user interface to the XDMA engine. The interface provides the write operation to start DMA operations. The DMA parameters are passed as the data to the write call. The actual data to transfer is NOT passed through write. Note that both directions of DMA operation are accomplished through the write command; BMC to host and host to BMC.

The XDMA driver reserves an area of physical memory for DMA operations, as the XDMA engine is restricted to accessing certain physical memory areas on some platforms. This memory forms a pool from which users can allocate pages for their usage with calls to mmap. The space allocated by a client will be the space used in the DMA operation. For an "upstream" (BMC to host) operation, the data in the client's area will be transferred to the host. For a "downstream" (host to BMC) operation, the host data will be placed in the client's memory area.

Poll is also provided in order to determine when the DMA operation is complete for non-blocking IO.

---
Changes since v6:
- Refactor probe error handling for misc device registration

 drivers/soc/aspeed/aspeed-xdma.c | 204 +++++++++++++++++++++++++++++++
 1 file changed, 204 insertions(+)
drivers/soc/aspeed/aspeed-xdma.c +204 -0
index bc746b262de7..4fcdf0967cd4 100644
@@ -13,6 +13,7 @@
 #include <linux/io.h>
 #include <linux/jiffies.h>
 #include <linux/mfd/syscon.h>
+#include <linux/miscdevice.h>
 #include <linux/module.h>
 #include <linux/mutex.h>
 #include <linux/of_device.h>
@@ -208,6 +209,8 @@ struct aspeed_xdma {
 	struct reset_control *reset;
 	struct reset_control *reset_rc;
 
+	/* file_lock serializes reads of current_client */
+	struct mutex file_lock;
 	/* client_lock protects error and in_progress of the client */
 	spinlock_t client_lock;
 	struct aspeed_xdma_client *current_client;
@@ -230,6 +233,8 @@ struct aspeed_xdma {
 	void __iomem *mem_virt;
 	dma_addr_t cmdq_phys;
 	struct gen_pool *pool;
+
+	struct miscdevice misc;
 };
 
 struct aspeed_xdma_client {
@@ -538,6 +543,191 @@ static irqreturn_t aspeed_xdma_pcie_irq(int irq, void *arg)
 	return IRQ_HANDLED;
 }
 
+static ssize_t aspeed_xdma_write(struct file *file, const char __user *buf,
+				 size_t len, loff_t *offset)
+{
+	int rc;
+	struct aspeed_xdma_op op;
+	struct aspeed_xdma_client *client = file->private_data;
+	struct aspeed_xdma *ctx = client->ctx;
+
+	if (len != sizeof(op))
+		return -EINVAL;
+
+	rc = copy_from_user(&op, buf, len);
+	if (rc)
+		return rc;
+
+	if (!op.len || op.len > client->size ||
+	    op.direction > ASPEED_XDMA_DIRECTION_UPSTREAM)
+		return -EINVAL;
+
+	if (file->f_flags & O_NONBLOCK) {
+		if (READ_ONCE(ctx->in_reset))
+			return -EBUSY;
+
+		if (!mutex_trylock(&ctx->file_lock))
+			return -EAGAIN;
+
+		if (READ_ONCE(ctx->current_client)) {
+			mutex_unlock(&ctx->file_lock);
+			return -EBUSY;
+		}
+	} else {
+		mutex_lock(&ctx->file_lock);
+
+		rc = wait_event_interruptible(ctx->wait, !ctx->current_client);
+		if (rc) {
+			mutex_unlock(&ctx->file_lock);
+			return -EINTR;
+		}
+	}
+
+	aspeed_xdma_start(ctx, &op, client->phys, client);
+
+	mutex_unlock(&ctx->file_lock);
+
+	if (!(file->f_flags & O_NONBLOCK)) {
+		rc = wait_event_interruptible(ctx->wait, !client->in_progress);
+		if (rc)
+			return -EINTR;
+
+		if (client->error)
+			return -EIO;
+	}
+
+	return len;
+}
+
+static __poll_t aspeed_xdma_poll(struct file *file,
+				 struct poll_table_struct *wait)
+{
+	__poll_t mask = 0;
+	__poll_t req = poll_requested_events(wait);
+	struct aspeed_xdma_client *client = file->private_data;
+	struct aspeed_xdma *ctx = client->ctx;
+
+	if (req & (EPOLLIN | EPOLLRDNORM)) {
+		if (client->in_progress)
+			poll_wait(file, &ctx->wait, wait);
+
+		if (!client->in_progress) {
+			if (client->error)
+				mask |= EPOLLERR;
+			else
+				mask |= EPOLLIN | EPOLLRDNORM;
+		}
+	}
+
+	if (req & (EPOLLOUT | EPOLLWRNORM)) {
+		if (ctx->current_client)
+			poll_wait(file, &ctx->wait, wait);
+
+		if (!ctx->current_client)
+			mask |= EPOLLOUT | EPOLLWRNORM;
+	}
+
+	return mask;
+}
+
+static void aspeed_xdma_vma_close(struct vm_area_struct *vma)
+{
+	int rc;
+	struct aspeed_xdma_client *client = vma->vm_private_data;
+
+	rc = wait_event_interruptible(client->ctx->wait, !client->in_progress);
+	if (rc)
+		return;
+
+	gen_pool_free(client->ctx->pool, (unsigned long)client->virt,
+		      client->size);
+
+	client->virt = NULL;
+	client->phys = 0;
+	client->size = 0;
+}
+
+static const struct vm_operations_struct aspeed_xdma_vm_ops = {
+	.close =	aspeed_xdma_vma_close,
+};
+
+static int aspeed_xdma_mmap(struct file *file, struct vm_area_struct *vma)
+{
+	int rc;
+	struct aspeed_xdma_client *client = file->private_data;
+	struct aspeed_xdma *ctx = client->ctx;
+
+	/* restrict file to one mapping */
+	if (client->size)
+		return -EBUSY;
+
+	client->size = vma->vm_end - vma->vm_start;
+	client->virt = gen_pool_dma_alloc(ctx->pool, client->size,
+					  &client->phys);
+	if (!client->virt) {
+		client->phys = 0;
+		client->size = 0;
+		return -ENOMEM;
+	}
+
+	vma->vm_pgoff = (client->phys - ctx->mem_phys) >> PAGE_SHIFT;
+	vma->vm_ops = &aspeed_xdma_vm_ops;
+	vma->vm_private_data = client;
+	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+	rc = io_remap_pfn_range(vma, vma->vm_start, client->phys >> PAGE_SHIFT,
+				client->size, vma->vm_page_prot);
+	if (rc) {
+		dev_warn(ctx->dev, "mmap err: v[%08lx] to p[%08x], s[%08x]\n",
+			 vma->vm_start, (u32)client->phys, client->size);
+
+		gen_pool_free(ctx->pool, (unsigned long)client->virt,
+			      client->size);
+
+		client->virt = NULL;
+		client->phys = 0;
+		client->size = 0;
+		return rc;
+	}
+
+	dev_dbg(ctx->dev, "mmap: v[%08lx] to p[%08x], s[%08x]\n",
+		vma->vm_start, (u32)client->phys, client->size);
+
+	return 0;
+}
+
+static int aspeed_xdma_open(struct inode *inode, struct file *file)
+{
+	struct miscdevice *misc = file->private_data;
+	struct aspeed_xdma *ctx = container_of(misc, struct aspeed_xdma, misc);
+	struct aspeed_xdma_client *client = kzalloc(sizeof(*client),
+						    GFP_KERNEL);
+
+	if (!client)
+		return -ENOMEM;
+
+	client->ctx = ctx;
+	file->private_data = client;
+	return 0;
+}
+
+static int aspeed_xdma_release(struct inode *inode, struct file *file)
+{
+	struct aspeed_xdma_client *client = file->private_data;
+
+	kfree(client);
+	return 0;
+}
+
+static const struct file_operations aspeed_xdma_fops = {
+	.owner			= THIS_MODULE,
+	.write			= aspeed_xdma_write,
+	.poll			= aspeed_xdma_poll,
+	.mmap			= aspeed_xdma_mmap,
+	.open			= aspeed_xdma_open,
+	.release		= aspeed_xdma_release,
+};
+
 static int aspeed_xdma_init_scu(struct aspeed_xdma *ctx, struct device *dev)
 {
 	struct regmap *scu = syscon_regmap_lookup_by_phandle(dev->of_node,
@@ -610,6 +800,7 @@ static int aspeed_xdma_probe(struct platform_device *pdev)
 	ctx->chip = md;
 	ctx->dev = dev;
 	platform_set_drvdata(pdev, ctx);
+	mutex_init(&ctx->file_lock);
 	mutex_init(&ctx->start_lock);
 	INIT_WORK(&ctx->reset_work, aspeed_xdma_reset_work);
 	spin_lock_init(&ctx->client_lock);
@@ -725,6 +916,18 @@ static int aspeed_xdma_probe(struct platform_device *pdev)
 
 	aspeed_xdma_init_eng(ctx);
 
+	ctx->misc.minor = MISC_DYNAMIC_MINOR;
+	ctx->misc.fops = &aspeed_xdma_fops;
+	ctx->misc.name = "aspeed-xdma";
+	ctx->misc.parent = dev;
+	rc = misc_register(&ctx->misc);
+	if (rc) {
+		dev_err(dev, "Failed to register xdma miscdevice.\n");
+		gen_pool_free(ctx->pool, (unsigned long)ctx->cmdq,
+			      XDMA_CMDQ_SIZE);
+		goto err;
+	}
+
 	/*
 	 * This interrupt could fire immediately so only request it once the
 	 * engine and driver are initialized.
@@ -755,6 +958,7 @@ static int aspeed_xdma_remove(struct platform_device *pdev)
 {
 	struct aspeed_xdma *ctx = platform_get_drvdata(pdev);
 
+	misc_deregister(&ctx->misc);
 	gen_pool_free(ctx->pool, (unsigned long)ctx->cmdq, XDMA_CMDQ_SIZE);
 
 	reset_control_assert(ctx->reset);
Signature · 1 line
2.24.0
#4 lore raw

PATCH v7 4/5 soc: aspeed: xdma: Add reset ioctl

In reply to Eddie James

Users of the XDMA engine need a way to reset it if something goes wrong. Problems on the host side, or user error, such as incorrect host address, may result in the DMA operation never completing and no way to determine what went wrong. Therefore, add an ioctl to reset the engine so that users can recover in this situation.

---
 drivers/soc/aspeed/aspeed-xdma.c | 36 ++++++++++++++++++++++++++++++++
 include/uapi/linux/aspeed-xdma.h |  4 ++++
 2 files changed, 40 insertions(+)
drivers/soc/aspeed/aspeed-xdma.c +36 -0
index 4fcdf0967cd4..71678bff1545 100644
@@ -630,6 +630,41 @@ static __poll_t aspeed_xdma_poll(struct file *file,
 	return mask;
 }
 
+static long aspeed_xdma_ioctl(struct file *file, unsigned int cmd,
+			      unsigned long param)
+{
+	unsigned long flags;
+	struct aspeed_xdma_client *client = file->private_data;
+	struct aspeed_xdma *ctx = client->ctx;
+
+	switch (cmd) {
+	case ASPEED_XDMA_IOCTL_RESET:
+		spin_lock_irqsave(&ctx->reset_lock, flags);
+		if (ctx->in_reset) {
+			spin_unlock_irqrestore(&ctx->reset_lock, flags);
+			return 0;
+		}
+
+		ctx->in_reset = true;
+		spin_unlock_irqrestore(&ctx->reset_lock, flags);
+
+		if (ctx->current_client)
+			dev_warn(ctx->dev,
+				 "User reset with transfer in progress.\n");
+
+		mutex_lock(&ctx->start_lock);
+
+		aspeed_xdma_reset(ctx);
+
+		mutex_unlock(&ctx->start_lock);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static void aspeed_xdma_vma_close(struct vm_area_struct *vma)
 {
 	int rc;
@@ -723,6 +758,7 @@ static const struct file_operations aspeed_xdma_fops = {
 	.owner			= THIS_MODULE,
 	.write			= aspeed_xdma_write,
 	.poll			= aspeed_xdma_poll,
+	.unlocked_ioctl		= aspeed_xdma_ioctl,
 	.mmap			= aspeed_xdma_mmap,
 	.open			= aspeed_xdma_open,
 	.release		= aspeed_xdma_release,
include/uapi/linux/aspeed-xdma.h +4 -0
index 2efaa6067c39..3a3646fd1e9e 100644
@@ -4,8 +4,12 @@
 #ifndef _UAPI_LINUX_ASPEED_XDMA_H_
 #define _UAPI_LINUX_ASPEED_XDMA_H_
 
+#include <linux/ioctl.h>
 #include <linux/types.h>
 
+#define __ASPEED_XDMA_IOCTL_MAGIC	0xb7
+#define ASPEED_XDMA_IOCTL_RESET		_IO(__ASPEED_XDMA_IOCTL_MAGIC, 0)
+
 /*
  * aspeed_xdma_direction
  *
Signature · 1 line
2.24.0
#5 lore raw

PATCH v7 5/5 ARM: dts: Aspeed: AST2600: Add XDMA PCI-E root control reset

In reply to Eddie James

The AST2600 XDMA engine requires the PCI-E root control reset be cleared as well, so add a phandle to that syscon reset.

---
 arch/arm/boot/dts/aspeed-g6.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/boot/dts/aspeed-g6.dtsi +2 -1
index 1ffc15177b79..65e2826fddb6 100644
@@ -342,7 +342,8 @@ xdma: xdma at 1e6e7000 {
 				compatible = "aspeed,ast2600-xdma";
 				reg = <0x1e6e7000 0x100>;
 				clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
-				resets = <&syscon ASPEED_RESET_DEV_XDMA>;
+				resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
+				reset-names = "dev", "rc";
 				interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
 						      <&scu_ic0 2>;
 				pcie-device = "bmc";
Signature · 1 line
2.24.0
#6 lore raw
In reply to Eddie James
Quoted 6 lines · Eddie James

This series adds a driver to control the Aspeed XDMA engine embedded in the AST2500 and AST2600. The XDMA engine performs automatic DMA operations over PCI-E between the Aspeed SOC (acting as a BMC) and a host processor.

Changes since v6:
- See individual patches

v7 is not an evolution on v6 - v7 contains a bunch of bugs that v6 fixed (at least wrt locking). How did you generate this series?

Also my name is misspelled in each of the Reviewed-by: tags which makes me think that something has gone quite wrong with the posting of v7, and I'm concerned that this was based on e.g. v5 but with my tags against v6 applied.

Andrew

#7 lore raw
Quoted 10 lines · Andrew Jeffery
Quoted 6 lines · Eddie James

This series adds a driver to control the Aspeed XDMA engine embedded in the AST2500 and AST2600. The XDMA engine performs automatic DMA operations over PCI-E between the Aspeed SOC (acting as a BMC) and a host processor.

Changes since v6:
- See individual patches

v7 is not an evolution on v6 - v7 contains a bunch of bugs that v6 fixed (at least wrt locking). How did you generate this series?

My goodness, I could have sworn that was v6. I took the series that was merged in the openbmc kernel. Must have gotten mixed up. -_-

Quoted 4 lines

Also my name is misspelled in each of the Reviewed-by: tags which makes me think that something has gone quite wrong with the posting of v7, and I'm concerned that this was based on e.g. v5 but with my tags against v6 applied.

Well thats because I added them manually since they had "disappeared" or so I thought from v6 during the application to openbmc... guess that should have been a warning sign

Quoted 2 lines

Andrew

#8 lore raw
Quoted 8 lines · Eddie James
Quoted 6 lines · Andrew Jeffery
Quoted 4 lines · Eddie James

This series adds a driver to control the Aspeed XDMA engine embedded in the AST2500 and AST2600. The XDMA engine performs automatic DMA operations over PCI-E between the Aspeed SOC (acting as a BMC) and a host processor.

Quoted 8 lines
Quoted 4 lines
Quoted 2 lines

Changes since v6:
- See individual patches

v7 is not an evolution on v6 - v7 contains a bunch of bugs that v6 fixed (at least wrt locking). How did you generate this series?

My goodness, I could have sworn that was v6. I took the series that was merged in the openbmc kernel. Must have gotten mixed up. -_-

No worries, hopefully v8 is in the right state :)

Quoted 11 lines
Quoted 6 lines

Also my name is misspelled in each of the Reviewed-by: tags which makes me think that something has gone quite wrong with the posting of v7, and I'm concerned that this was based on e.g. v5 but with my tags against v6 applied.

Well thats because I added them manually since they had "disappeared" or so I thought from v6 during the application to openbmc... guess that should have been a warning sign

It certainly was for me!

Cheers,

Andrew