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phy: qualcomm: add qcom ipq806x dwc usb phy driver

PATCH RESEND Superseded Ansuel Smith 3 participants 6 messages Jun 15, 2020 – Jul 13, 2020

Subsystems (3)

v7 of 10 Superseded Latest is v10 →

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PATCH RESEND v7 1/2 phy: qualcomm: add qcom ipq806x dwc usb phy driver

This has lost in the original push for the dwc3 qcom driver. This is needed for ipq806x SoC as without this the usb ports doesn't work at all.

---
v7:
* Add TestedBy tag
v6:
* Use GENMASK instead of hex value
v4:
* Add qcom to specific bindings
v3:
* Use reg instead of regmap phandle
v2:
* Renamed config from PHY_QCOM_DWC3 to PHY_QCOM_IPQ806X_USB
* Rename inline function to generic name to reduce length
* Fix check reported by checkpatch --strict
* Rename compatible to qcom,ipq806x-usb-phy-(hs/ss)

 drivers/phy/qualcomm/Kconfig                |  12 +
 drivers/phy/qualcomm/Makefile               |   1 +
 drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c | 593 ++++++++++++++++++++
 3 files changed, 606 insertions(+)
 create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c
drivers/phy/qualcomm/Kconfig +12 -0
index e46824da29f6..9d41c3d12800 100644
@@ -91,3 +91,15 @@ config PHY_QCOM_USB_HSIC
 	select GENERIC_PHY
 	help
 	  Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
+config PHY_QCOM_IPQ806X_USB
+	tristate "Qualcomm IPQ806x DWC3 USB PHY driver"
+	depends on ARCH_QCOM
+	depends on HAS_IOMEM
+	depends on OF
+	select GENERIC_PHY
+	help
+	  This option enables support for the Synopsis PHYs present inside the
+	  Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports
+	  both HS and SS PHY controllers.
+
drivers/phy/qualcomm/Makefile +1 -0
index 283251d6a5d9..8629299c1495 100644
@@ -10,3 +10,4 @@ obj-$(CONFIG_PHY_QCOM_UFS_14NM)		+= phy-qcom-ufs-qmp-14nm.o
 obj-$(CONFIG_PHY_QCOM_UFS_20NM)		+= phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_USB_HS) 		+= phy-qcom-usb-hs.o
 obj-$(CONFIG_PHY_QCOM_USB_HSIC) 	+= phy-qcom-usb-hsic.o
+obj-$(CONFIG_PHY_QCOM_IPQ806X_USB)		+= phy-qcom-ipq806x-usb.o
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +593 -0

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Signature · 1 line
2.25.1
#1 lore raw

PATCH RESEND v7 2/2 devicetree: bindings: phy: Document ipq806x dwc3 qcom phy

Document dwc3 qcom phy hs and ss phy bindings needed to correctly inizialize and use usb on ipq806x SoC.

---
v7:
* Drop useless AllOf
v6:
* Add maximum value
v5:
* Fix dt_binding_check error
v4:
* Add qcom to specific bindings
v3:
* Use explicit reg instead of regmap

 .../bindings/phy/qcom,ipq806x-usb-phy-hs.yaml | 55 ++++++++++++++
 .../bindings/phy/qcom,ipq806x-usb-phy-ss.yaml | 73 +++++++++++++++++++
 2 files changed, 128 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml
Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml new file +55 -0
new file mode 100644
index 000000000000..23887ebe08fd
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-hs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm ipq806x usb DWC3 HS PHY CONTROLLER
+
+maintainers:
+  - Ansuel Smith <[email protected]>
+
+description:
+  DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
+  controllers used in ipq806x. Each DWC3 PHY controller should have its
+  own node.
+
+properties:
+  compatible:
+    const: qcom,ipq806x-usb-phy-hs
+
+  "#phy-cells":
+    const: 0
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    maxItems: 2
+    items:
+      - const: ref
+      - const: xo
+
+required:
+  - compatible
+  - "#phy-cells"
+  - reg
+  - clocks
+  - clock-names
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
+
+    hs_phy_0: phy@110f8800 {
+      compatible = "qcom,ipq806x-usb-phy-hs";
+      reg = <0x110f8800 0x30>;
+      clocks = <&gcc USB30_0_UTMI_CLK>;
+      clock-names = "ref";
+      #phy-cells = <0>;
+    };
Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml new file +73 -0

73 lines not on this page · raw message

Signature · 1 line
2.25.1
maintainer
#2 lore raw

Re: [RESEND PATCH v7 2/2] devicetree: bindings: phy: Document ipq806x dwc3 qcom phy

Quoted 2 lines · Ansuel Smith

Document dwc3 qcom phy hs and ss phy bindings needed to correctly inizialize and use usb on ipq806x SoC.

Rob ?

Quoted 162 lines

---
v7:
* Drop useless AllOf
v6:
* Add maximum value
v5:
* Fix dt_binding_check error
v4:
* Add qcom to specific bindings
v3:
* Use explicit reg instead of regmap

 .../bindings/phy/qcom,ipq806x-usb-phy-hs.yaml | 55 ++++++++++++++
 .../bindings/phy/qcom,ipq806x-usb-phy-ss.yaml | 73 +++++++++++++++++++
 2 files changed, 128 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml
Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml new file +55 -0
new file mode 100644
index 000000000000..23887ebe08fd
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-hs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm ipq806x usb DWC3 HS PHY CONTROLLER
+
+maintainers:
+  - Ansuel Smith <[email protected]>
+
+description:
+  DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
+  controllers used in ipq806x. Each DWC3 PHY controller should have its
+  own node.
+
+properties:
+  compatible:
+    const: qcom,ipq806x-usb-phy-hs
+
+  "#phy-cells":
+    const: 0
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    maxItems: 2
+    items:
+      - const: ref
+      - const: xo
+
+required:
+  - compatible
+  - "#phy-cells"
+  - reg
+  - clocks
+  - clock-names
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
+
+    hs_phy_0: phy@110f8800 {
+      compatible = "qcom,ipq806x-usb-phy-hs";
+      reg = <0x110f8800 0x30>;
+      clocks = <&gcc USB30_0_UTMI_CLK>;
+      clock-names = "ref";
+      #phy-cells = <0>;
+    };
Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml new file +73 -0
new file mode 100644
index 000000000000..fa30c24b4405
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-ss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm ipq806x usb DWC3 SS PHY CONTROLLER
+
+maintainers:
+  - Ansuel Smith <[email protected]>
+
+description:
+  DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
+  controllers used in ipq806x. Each DWC3 PHY controller should have its
+  own node.
+
+properties:
+  compatible:
+    const: qcom,ipq806x-usb-phy-ss
+
+  "#phy-cells":
+    const: 0
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    maxItems: 2
+    items:
+      - const: ref
+      - const: xo
+
+  qcom,rx-eq:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Override value for rx_eq.
+    default: 4
+    maximum: 7
+
+  qcom,tx-deamp-3_5db:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Override value for transmit preemphasis.
+    default: 23
+    maximum: 63
+
+  qcom,mpll:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Override value for mpll.
+    default: 0
+    maximum: 7
+
+required:
+  - compatible
+  - "#phy-cells"
+  - reg
+  - clocks
+  - clock-names
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
+
+    ss_phy_0: phy@110f8830 {
+      compatible = "qcom,ipq806x-usb-phy-ss";
+      reg = <0x110f8830 0x30>;
+      clocks = <&gcc USB30_0_MASTER_CLK>;
+      clock-names = "ref";
+      #phy-cells = <0>;
+    };
Signature · 1 line
2.25.1
Signature · 1 line
~Vinod
maintainer Reviewed-by on v7 2/2
#3 lore raw

Re: [RESEND PATCH v7 2/2] devicetree: bindings: phy: Document ipq806x dwc3 qcom phy

In reply to Ansuel Smith
Quoted 16 lines · Ansuel Smith

Document dwc3 qcom phy hs and ss phy bindings needed to correctly inizialize and use usb on ipq806x SoC.

---
v7:
* Drop useless AllOf
v6:
* Add maximum value
v5:
* Fix dt_binding_check error
v4:
* Add qcom to specific bindings
v3:
* Use explicit reg instead of regmap

Quoted 6 lines
 .../bindings/phy/qcom,ipq806x-usb-phy-hs.yaml | 55 ++++++++++++++
 .../bindings/phy/qcom,ipq806x-usb-phy-ss.yaml | 73 +++++++++++++++++++
 2 files changed, 128 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml
maintainer
#4 lore raw
In reply to Ansuel Smith

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c line 11

Quoted 12 lines · Ansuel Smith
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +11 -0
@@ -0,0 +1,593 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* Copyright (c) 2014-2015, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.

You have SPDX tag, so we dont need the license text, please remove this. Also we are in 2020 now so Copyright looks incorrect

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c line 321

Quoted 5 lines
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +5 -0
+static int qcom_ipq806x_usb_ss_phy_init(struct phy *phy)
+{
+	struct usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+	int ret;
+	u32 data = 0;

Superfluous init

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c line 506

Quoted 9 lines
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +9 -0
+static int qcom_ipq806x_usb_phy_probe(struct platform_device *pdev)
+{
+	struct usb_phy	*phy_dwc3;
+	struct phy_provider		*phy_provider;
+	struct phy			*generic_phy;
+	const struct of_device_id *match;
+	const struct phy_drvdata *data;
+	struct resource			*res;
+	resource_size_t			size;

Pls pick one, tabs or single spaces, not both. and reverse christmas looks better :)

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c line 514

Quoted 8 lines
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +8 -0
+	struct device_node *np;
+
+	phy_dwc3 = devm_kzalloc(&pdev->dev, sizeof(*phy_dwc3), GFP_KERNEL);
+	if (!phy_dwc3)
+		return -ENOMEM;
+
+	match = of_match_node(qcom_ipq806x_usb_phy_table, pdev->dev.of_node);
+	data = match->data;

How about using of_device_get_match_data() instead?

Signature · 1 line
~Vinod
#5 lore raw

R: [RESEND PATCH v7 1/2] phy: qualcomm: add qcom ipq806x dwc usb phy driver

Quoted 58 lines

-----Messaggio originale-----
Da: Vinod Koul <[email protected]>
Inviato: lunedì 13 luglio 2020 07:33
A: Ansuel Smith <[email protected]>
Cc: Andy Gross <[email protected]>; Jonathan McDowell <[email protected]>; Andy Gross <[email protected]>; Bjorn Andersson <[email protected]>; Kishon Vijay Abraham I <[email protected]>; Rob Herring <[email protected]>; Mark Rutland <[email protected]>; [email protected]; linux- [email protected]; [email protected]
Oggetto: Re: [RESEND PATCH v7 1/2] phy: qualcomm: add qcom ipq806x dwc usb phy driver

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c line 11

Quoted 12 lines · Ansuel Smith
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +11 -0
@@ -0,0 +1,593 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* Copyright (c) 2014-2015, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.

You have SPDX tag, so we dont need the license text, please remove this. Also we are in 2020 now so Copyright looks incorrect

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c line 321

Quoted 5 lines
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +5 -0
+static int qcom_ipq806x_usb_ss_phy_init(struct phy *phy)
+{
+	struct usb_phy *phy_dwc3 = phy_get_drvdata(phy);
+	int ret;
+	u32 data = 0;

Superfluous init

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c line 506

Quoted 9 lines
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +9 -0
+static int qcom_ipq806x_usb_phy_probe(struct platform_device *pdev)
+{
+	struct usb_phy	*phy_dwc3;
+	struct phy_provider		*phy_provider;
+	struct phy			*generic_phy;
+	const struct of_device_id *match;
+	const struct phy_drvdata *data;
+	struct resource			*res;
+	resource_size_t			size;

Pls pick one, tabs or single spaces, not both. and reverse christmas looks better :)

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c

Quoted 3 lines
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +3 -0
+	struct device_node *np;
+
+	phy_dwc3 = devm_kzalloc(&pdev->dev, sizeof(*phy_dwc3),

GFP_KERNEL);

Quoted 10 lines

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c line 514

Quoted 6 lines
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +4 -0
+	if (!phy_dwc3)
+		return -ENOMEM;
+
+	match = of_match_node(qcom_ipq806x_usb_phy_table, pdev-

dev.of_node);

drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c new file +1 -0
+	data = match->data;

How about using of_device_get_match_data() instead? --
~Vinod

match is also used in the function to compare compatible.