Allwinner A100 Initial support
Subsystems (12)
v3 cover Allwinner A100 Initial support
This patch set adds initial support for allwinner a100 soc, which is a 64-bit tablet chip.
v3:
-Add pmu and nmi support
-Add read data mask for calibration
-Code style
-Some trivial things in yaml files
v2:
-Some naming consistency
-Repair email address
-Fix mmc clock
-Don't export system clock
-Fix checkpatch warning
-Drop unneeded pin function, convert to jtag_gpu and i2s_x
Frank Lee (16):
dt-bindings: clk: sunxi-ccu: add compatible string for A100 CCU and
R-CCU
clk: sunxi-ng: add support for the Allwinner A100 CCU
dt-bindings: pinctrl: sunxi: Add A100 pinctrl bindings
dt-bindings: pinctrl: sunxi: make gpio banks supplies required
pinctrl: sunxi: add support for the Allwinner A100 pin controller
dt-bindings: nvmem: SID: add binding for A100's SID controller
dt-bindings: thermal: sun8i: Add binding for A100's THS controller
thermal: sun8i: add TEMP_CALIB_MASK for calibration data in
sun50i_h6_ths_calibrate
thermal: sun8i: Add A100's THS controller support
mfd: axp20x: Allow the AXP803 to be probed by I2C
dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmi
dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controller
dt-bindings: i2c: mv64xxx: Add compatible for the A100 i2c node.
arm64: allwinner: A100: add the basical Allwinner A100 DTSI file
dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindings
arm64: allwinner: A100: add support for Allwinner Perf1 board
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 + .../bindings/clock/allwinner,sun4i-a10-ccu.yaml | 7 +- .../bindings/i2c/marvell,mv64xxx-i2c.yaml | 3 + .../allwinner,sun7i-a20-sc-nmi.yaml | 5 +- .../bindings/nvmem/allwinner,sun4i-a10-sid.yaml | 3 + .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 75 +- .../bindings/thermal/allwinner,sun8i-a83t-ths.yaml | 6 +- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../dts/allwinner/sun50i-a100-allwinner-perf1.dts | 180 +++ arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 364 ++++++ drivers/clk/sunxi-ng/Kconfig | 10 + drivers/clk/sunxi-ng/Makefile | 2 + drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c | 214 ++++ drivers/clk/sunxi-ng/ccu-sun50i-a100-r.h | 21 + drivers/clk/sunxi-ng/ccu-sun50i-a100.c | 1276 ++++++++++++++++++++ drivers/clk/sunxi-ng/ccu-sun50i-a100.h | 56 + drivers/mfd/axp20x-i2c.c | 2 + drivers/pinctrl/sunxi/Kconfig | 10 + drivers/pinctrl/sunxi/Makefile | 2 + drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c | 105 ++ drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c | 708 +++++++++++ drivers/thermal/sun8i_thermal.c | 16 +- include/dt-bindings/clock/sun50i-a100-ccu.h | 116 ++ include/dt-bindings/clock/sun50i-a100-r-ccu.h | 23 + include/dt-bindings/reset/sun50i-a100-ccu.h | 68 ++ include/dt-bindings/reset/sun50i-a100-r-ccu.h | 18 + 26 files changed, 3262 insertions(+), 34 deletions(-) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a100-r.h create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a100.c create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a100.h create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c create mode 100644 include/dt-bindings/clock/sun50i-a100-ccu.h create mode 100644 include/dt-bindings/clock/sun50i-a100-r-ccu.h create mode 100644 include/dt-bindings/reset/sun50i-a100-ccu.h create mode 100644 include/dt-bindings/reset/sun50i-a100-r-ccu.h
Signature · 1 line
1.9.1
PATCH v3 1/16 dt-bindings: clk: sunxi-ccu: add compatible string for A100 CCU and R-CCU
This patch adds binding to a100's ccu clock and r-ccu clock.
--- .../devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml +6 -1
@@ -36,6 +36,8 @@ properties: - allwinner,sun9i-a80-ccu - allwinner,sun50i-a64-ccu - allwinner,sun50i-a64-r-ccu + - allwinner,sun50i-a100-ccu + - allwinner,sun50i-a100-r-ccu - allwinner,sun50i-h5-ccu - allwinner,sun50i-h6-ccu - allwinner,sun50i-h6-r-ccu
@@ -78,6 +80,7 @@ if: - allwinner,sun8i-a83t-r-ccu - allwinner,sun8i-h3-r-ccu - allwinner,sun50i-a64-r-ccu + - allwinner,sun50i-a100-r-ccu - allwinner,sun50i-h6-r-ccu then:
@@ -94,7 +97,9 @@ else: if: properties: compatible: - const: allwinner,sun50i-h6-ccu + enum: + - allwinner,sun50i-a100-ccu + - allwinner,sun50i-h6-ccu then: properties:
Signature · 1 line
1.9.1
Re: [PATCH v3 01/16] dt-bindings: clk: sunxi-ccu: add compatible string for A100 CCU and R-CCU
Quoted 7 lines · Frank Lee
This patch adds binding to a100's ccu clock and r-ccu clock.
Signed-off-by Frank Lee <[email protected]>--- .../devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
Re: [PATCH v3 01/16] dt-bindings: clk: sunxi-ccu: add compatible string for A100 CCU and R-CCU
Quoted 11 lines · Rob Herring
Quoted 7 lines · Frank Lee
This patch adds binding to a100's ccu clock and r-ccu clock.
Signed-off-by Frank Lee <[email protected]>--- .../devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)Reviewed-by Rob Herring <[email protected]>
Note that your series isn't threaded properly. Please send series threaded (in reply to cover letter or 1st patch).
PATCH v3 2/16 clk: sunxi-ng: add support for the Allwinner A100 CCU
In reply to Frank LeeAdd support for a100 in the sunxi-ng CCU framework.
--- drivers/clk/sunxi-ng/Kconfig | 10 + drivers/clk/sunxi-ng/Makefile | 2 + drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c | 214 +++++ drivers/clk/sunxi-ng/ccu-sun50i-a100-r.h | 21 + drivers/clk/sunxi-ng/ccu-sun50i-a100.c | 1276 +++++++++++++++++++++++++ drivers/clk/sunxi-ng/ccu-sun50i-a100.h | 56 ++ include/dt-bindings/clock/sun50i-a100-ccu.h | 116 +++ include/dt-bindings/clock/sun50i-a100-r-ccu.h | 23 + include/dt-bindings/reset/sun50i-a100-ccu.h | 68 ++ include/dt-bindings/reset/sun50i-a100-r-ccu.h | 18 + 10 files changed, 1804 insertions(+) create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a100-r.h create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a100.c create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a100.h create mode 100644 include/dt-bindings/clock/sun50i-a100-ccu.h create mode 100644 include/dt-bindings/clock/sun50i-a100-r-ccu.h create mode 100644 include/dt-bindings/reset/sun50i-a100-ccu.h create mode 100644 include/dt-bindings/reset/sun50i-a100-r-ccu.h
drivers/clk/sunxi-ng/Kconfig +10 -0
@@ -17,6 +17,16 @@ config SUN50I_A64_CCU default ARM64 && ARCH_SUNXI depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST +config SUN50I_A100_CCU + bool "Support for the Allwinner A100 CCU" + default ARM64 && ARCH_SUNXI + depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST + +config SUN50I_A100_R_CCU + bool "Support for the Allwinner A100 PRCM CCU" + default ARM64 && ARCH_SUNXI + depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST + config SUN50I_H6_CCU bool "Support for the Allwinner H6 CCU" default ARM64 && ARCH_SUNXI
drivers/clk/sunxi-ng/Makefile +2 -0
@@ -23,6 +23,8 @@ obj-y += ccu_mp.o # SoC support obj-$(CONFIG_SUNIV_F1C100S_CCU) += ccu-suniv-f1c100s.o obj-$(CONFIG_SUN50I_A64_CCU) += ccu-sun50i-a64.o +obj-$(CONFIG_SUN50I_A100_CCU) += ccu-sun50i-a100.o +obj-$(CONFIG_SUN50I_A100_R_CCU) += ccu-sun50i-a100-r.o obj-$(CONFIG_SUN50I_H6_CCU) += ccu-sun50i-h6.o obj-$(CONFIG_SUN50I_H6_R_CCU) += ccu-sun50i-h6-r.o obj-$(CONFIG_SUN4I_A10_CCU) += ccu-sun4i-a10.o
drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c new file +214 -0
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drivers/clk/sunxi-ng/ccu-sun50i-a100-r.h new file +21 -0
@@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* Copyright (c) 2020 Frank Lee <[email protected]> +*/ + +#ifndef _CCU_SUN50I_A100_R_H +#define _CCU_SUN50I_A100_R_H + +#include <dt-bindings/clock/sun50i-a100-r-ccu.h> +#include <dt-bindings/reset/sun50i-a100-r-ccu.h> + +#define CLK_R_CPUS 0 +#define CLK_R_AHB 1 + +/* exported except APB1 for R_PIO */ + +#define CLK_R_APB2 3 + +#define CLK_NUMBER (CLK_R_AHB_BUS_RTC + 1) + +#endif /* _CCU_SUN50I_A100_R_H */
drivers/clk/sunxi-ng/ccu-sun50i-a100.c new file +1276 -0
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drivers/clk/sunxi-ng/ccu-sun50i-a100.h new file +56 -0
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include/dt-bindings/clock/sun50i-a100-ccu.h new file +116 -0
116 lines not on this page · raw message
include/dt-bindings/clock/sun50i-a100-r-ccu.h new file +23 -0
@@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* +* Copyright (c) 2020 Frank Lee <[email protected]> +*/ + +#ifndef _DT_BINDINGS_CLK_SUN50I_A100_R_CCU_H_ +#define _DT_BINDINGS_CLK_SUN50I_A100_R_CCU_H_ + +#define CLK_R_APB1 2 + +#define CLK_R_APB1_TIMER 4 +#define CLK_R_APB1_TWD 5 +#define CLK_R_APB1_PWM 6 +#define CLK_R_APB1_BUS_PWM 7 +#define CLK_R_APB1_PPU 8 +#define CLK_R_APB2_UART 9 +#define CLK_R_APB2_I2C0 10 +#define CLK_R_APB2_I2C1 11 +#define CLK_R_APB1_IR 12 +#define CLK_R_APB1_BUS_IR 13 +#define CLK_R_AHB_BUS_RTC 14 + +#endif /* _DT_BINDINGS_CLK_SUN50I_A100_R_CCU_H_ */
include/dt-bindings/reset/sun50i-a100-ccu.h new file +68 -0
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include/dt-bindings/reset/sun50i-a100-r-ccu.h new file +18 -0
@@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ +/* +* Copyright (c) 2020 Frank Lee <[email protected]> +*/ + +#ifndef _DT_BINDINGS_RST_SUN50I_A100_R_CCU_H_ +#define _DT_BINDINGS_RST_SUN50I_A100_R_CCU_H_ + +#define RST_R_APB1_TIMER 0 +#define RST_R_APB1_BUS_PWM 1 +#define RST_R_APB1_PPU 2 +#define RST_R_APB2_UART 3 +#define RST_R_APB2_I2C0 4 +#define RST_R_APB2_I2C1 5 +#define RST_R_APB1_BUS_IR 6 +#define RST_R_AHB_BUS_RTC 7 + +#endif /* _DT_BINDINGS_RST_SUN50I_A100_R_CCU_H_ */
Signature · 1 line
1.9.1
PATCH v3 3/16 dt-bindings: pinctrl: sunxi: Add A100 pinctrl bindings
In reply to Frank LeeAdd device tree binding Documentation details for A100 pinctrl driver, whic has an r pin controller and a pin controller with more irq lines.
--- .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 74 +++++++++++++--------- 1 file changed, 44 insertions(+), 30 deletions(-)
Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +44 -30
@@ -48,6 +48,8 @@ properties: - allwinner,sun9i-a80-r-pinctrl - allwinner,sun50i-a64-pinctrl - allwinner,sun50i-a64-r-pinctrl + - allwinner,sun50i-a100-pinctrl + - allwinner,sun50i-a100-r-pinctrl - allwinner,sun50i-h5-pinctrl - allwinner,sun50i-h6-pinctrl - allwinner,sun50i-h6-r-pinctrl
@@ -59,7 +61,7 @@ properties: interrupts: minItems: 1 - maxItems: 5 + maxItems: 7 description: One interrupt per external interrupt bank supported on the controller, sorted by bank number ascending order.
@@ -144,75 +146,87 @@ allOf: # FIXME: We should have the pin bank supplies here, but not a lot of # boards are defining it at the moment so it would generate a lot of # warnings. - - if: properties: compatible: enum: - - allwinner,sun9i-a80-pinctrl + - allwinner,sun50i-a100-pinctrl then: properties: interrupts: - minItems: 5 - maxItems: 5 + minItems: 7 + maxItems: 7 else: if: properties: compatible: enum: - - allwinner,sun6i-a31-pinctrl - - allwinner,sun6i-a31s-pinctrl - - allwinner,sun50i-h6-pinctrl + - allwinner,sun9i-a80-pinctrl then: properties: interrupts: - minItems: 4 - maxItems: 4 + minItems: 5 + maxItems: 5 else: if: properties: compatible: enum: - - allwinner,sun8i-a23-pinctrl - - allwinner,sun8i-a83t-pinctrl - - allwinner,sun50i-a64-pinctrl - - allwinner,sun50i-h5-pinctrl - - allwinner,suniv-f1c100s-pinctrl + - allwinner,sun6i-a31-pinctrl + - allwinner,sun6i-a31s-pinctrl + - allwinner,sun50i-h6-pinctrl then: properties: interrupts: - minItems: 3 - maxItems: 3 + minItems: 4 + maxItems: 4 else: if: properties: compatible: enum: - - allwinner,sun6i-a31-r-pinctrl - - allwinner,sun8i-a33-pinctrl - - allwinner,sun8i-h3-pinctrl - - allwinner,sun8i-v3-pinctrl - - allwinner,sun8i-v3s-pinctrl - - allwinner,sun9i-a80-r-pinctrl - - allwinner,sun50i-h6-r-pinctrl + - allwinner,sun8i-a23-pinctrl + - allwinner,sun8i-a83t-pinctrl + - allwinner,sun50i-a64-pinctrl + - allwinner,sun50i-h5-pinctrl + - allwinner,suniv-f1c100s-pinctrl then: properties: interrupts: - minItems: 2 - maxItems: 2 + minItems: 3 + maxItems: 3 else: - properties: - interrupts: - minItems: 1 - maxItems: 1 + if: + properties: + compatible: + enum: + - allwinner,sun6i-a31-r-pinctrl + - allwinner,sun8i-a33-pinctrl + - allwinner,sun8i-h3-pinctrl + - allwinner,sun8i-v3-pinctrl + - allwinner,sun8i-v3s-pinctrl + - allwinner,sun9i-a80-r-pinctrl + - allwinner,sun50i-h6-r-pinctrl + + then: + properties: + interrupts: + minItems: 2 + maxItems: 2 + + else: + properties: + interrupts: + minItems: 1 + maxItems: 1 additionalProperties: false
Signature · 1 line
1.9.1
Rob Herring
maintainerRe: [PATCH v3 03/16] dt-bindings: pinctrl: sunxi: Add A100 pinctrl bindings
Quoted 2 lines · Frank Lee
Add device tree binding Documentation details for A100 pinctrl driver, whic has an r pin controller and a pin controller with more irq lines.
s/whic/which/
'an r pin controller'?
Quoted 40 lines
Signed-off-by Frank Lee <[email protected]>--- .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 74 +++++++++++++--------- 1 file changed, 44 insertions(+), 30 deletions(-)Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +4
-3@@ -48,6 +48,8 @@ properties: - allwinner,sun9i-a80-r-pinctrl - allwinner,sun50i-a64-pinctrl - allwinner,sun50i-a64-r-pinctrl + - allwinner,sun50i-a100-pinctrl + - allwinner,sun50i-a100-r-pinctrl - allwinner,sun50i-h5-pinctrl - allwinner,sun50i-h6-pinctrl - allwinner,sun50i-h6-r-pinctrl@@ -59,7 +61,7 @@ properties: interrupts: minItems: 1 - maxItems: 5 + maxItems: 7 description: One interrupt per external interrupt bank supported on the controller, sorted by bank number ascending order.@@ -144,75 +146,87 @@ allOf: # FIXME: We should have the pin bank supplies here, but not a lot of # boards are defining it at the moment so it would generate a lot of # warnings. - - if: properties: compatible: enum: - - allwinner,sun9i-a80-pinctrl + - allwinner,sun50i-a100-pinctrl
Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml allOf: · line 162
Quoted 10 lines
Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +2
-2then: properties: interrupts: - minItems: 5 - maxItems: 5 + minItems: 7 + maxItems: 7 else: if:
This diff is hard to follow. Rather than a continual nesting of 'else' clauses, just make each 'if' a new entry under 'allOf' and get rid of the else. Perhaps do that in a separate patch first, then this change will be easier to review.
Quoted 98 lines
Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +38
-25properties: compatible: enum: - - allwinner,sun6i-a31-pinctrl - - allwinner,sun6i-a31s-pinctrl - - allwinner,sun50i-h6-pinctrl + - allwinner,sun9i-a80-pinctrl then: properties: interrupts: - minItems: 4 - maxItems: 4 + minItems: 5 + maxItems: 5 else: if: properties: compatible: enum: - - allwinner,sun8i-a23-pinctrl - - allwinner,sun8i-a83t-pinctrl - - allwinner,sun50i-a64-pinctrl - - allwinner,sun50i-h5-pinctrl - - allwinner,suniv-f1c100s-pinctrl + - allwinner,sun6i-a31-pinctrl + - allwinner,sun6i-a31s-pinctrl + - allwinner,sun50i-h6-pinctrl then: properties: interrupts: - minItems: 3 - maxItems: 3 + minItems: 4 + maxItems: 4 else: if: properties: compatible: enum: - - allwinner,sun6i-a31-r-pinctrl - - allwinner,sun8i-a33-pinctrl - - allwinner,sun8i-h3-pinctrl - - allwinner,sun8i-v3-pinctrl - - allwinner,sun8i-v3s-pinctrl - - allwinner,sun9i-a80-r-pinctrl - - allwinner,sun50i-h6-r-pinctrl + - allwinner,sun8i-a23-pinctrl + - allwinner,sun8i-a83t-pinctrl + - allwinner,sun50i-a64-pinctrl + - allwinner,sun50i-h5-pinctrl + - allwinner,suniv-f1c100s-pinctrl then: properties: interrupts: - minItems: 2 - maxItems: 2 + minItems: 3 + maxItems: 3 else: - properties: - interrupts: - minItems: 1 - maxItems: 1 + if: + properties: + compatible: + enum: + - allwinner,sun6i-a31-r-pinctrl + - allwinner,sun8i-a33-pinctrl + - allwinner,sun8i-h3-pinctrl + - allwinner,sun8i-v3-pinctrl + - allwinner,sun8i-v3s-pinctrl + - allwinner,sun9i-a80-r-pinctrl + - allwinner,sun50i-h6-r-pinctrl + + then: + properties: + interrupts: + minItems: 2 + maxItems: 2 + + else: + properties: + interrupts: + minItems: 1 + maxItems: 1 additionalProperties: falseSignature · 1 line
1.9.1
PATCH v3 4/16 dt-bindings: pinctrl: sunxi: make gpio banks supplies required
In reply to Frank LeeSince we don't really have to care about the existing DT for boards, it would be great to make the gpio banks supplies required.
--- .../devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +1 -0
@@ -134,6 +134,7 @@ patternProperties: required: - "#gpio-cells" - "#interrupt-cells" + - "^vcc-p[a-hlm]-supply$" - compatible - reg - interrupts
Signature · 1 line
1.9.1
Rob Herring
maintainerRe: [PATCH v3 04/16] dt-bindings: pinctrl: sunxi: make gpio banks supplies required
Quoted 8 lines · Frank Lee
Since we don't really have to care about the existing DT for boards, it would be great to make the gpio banks supplies required.
Signed-off-by Frank Lee <[email protected]>--- .../devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 1 + 1 file changed, 1 insertion(+)
My bot found errors running 'make dt_binding_check' on your patch:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml: required:2: '^vcc-p[a-hlm]-supply$' does not match '^([a-zA-Z#][a-zA-Z0-9,+\\-._@]{0,63}|\\$nodename)$' Documentation/devicetree/bindings/Makefile:20: recipe for target 'Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.example.dts' failed
make[1]: *** [Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.example.dts] Error 1
make[1]: *** Waiting for unfinished jobs....
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml: ignoring, error in schema: required: 2
warning: no schema found in file: ./Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml: ignoring, error in schema: required: 2
warning: no schema found in file: ./Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml
Makefile:1347: recipe for target 'dt_binding_check' failed
make: *** [dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1325057
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure dt-schema is up to date:
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Please check and re-submit.
Rob Herring
maintainerRe: [PATCH v3 04/16] dt-bindings: pinctrl: sunxi: make gpio banks supplies required
In reply to Frank LeeQuoted 13 lines · Frank Lee
Since we don't really have to care about the existing DT for boards, it would be great to make the gpio banks supplies required.
Signed-off-by Frank Lee <[email protected]>--- .../devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 1 + 1 file changed, 1 insertion(+)Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +0
-0
Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml patternProperties: · line 137
Quoted 4 lines
Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +1
-0@@ -134,6 +134,7 @@ patternProperties: required: - "#gpio-cells" - "#interrupt-cells" + - "^vcc-p[a-hlm]-supply$"
Patterns aren't supported here. It's something the json-schema folks are working on. For now, You have to list out the specific properties.
Quoted 6 lines
Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +0
-0- compatible - reg - interruptsSignature · 1 line
1.9.1
Re: [PATCH v3 04/16] dt-bindings: pinctrl: sunxi: make gpio banks supplies required
In reply to Frank LeeHello,
Quoted 2 lines · Frank Lee
Since we don't really have to care about the existing DT for boards, it would be great to make the gpio banks supplies required.
What if the borad doesn't use one of the banks? How would I describe such a board if defining supplies for all banks is required?
regards,
o.
Quoted 25 lines
Signed-off-by Frank Lee <[email protected]>--- .../devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 1 + 1 file changed, 1 insertion(+)Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +1
-0@@ -134,6 +134,7 @@ patternProperties: required: - "#gpio-cells" - "#interrupt-cells" + - "^vcc-p[a-hlm]-supply$" - compatible - reg - interruptsSignature · 7 lines
1.9.1 _______________________________________________ linux-arm-kernel mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Re: [PATCH v3 04/16] dt-bindings: pinctrl: sunxi: make gpio banks supplies required
Hi,
Quoted 9 lines · Ondřej Jirman
Hello,
Quoted 2 lines · Frank Lee
Since we don't really have to care about the existing DT for boards, it would be great to make the gpio banks supplies required.
What if the borad doesn't use one of the banks? How would I describe such a board if defining supplies for all banks is required?
If that case ever comes up, we can always drop the requirement, it's going to be backward compatible.
Maxime
Re: [PATCH v3 04/16] dt-bindings: pinctrl: sunxi: make gpio banks supplies required
Maybe we put this work backwards and let a100 join the mainline as soon as possible.
PATCH v3 5/16 pinctrl: sunxi: add support for the Allwinner A100 pin controller
In reply to Frank LeeThis commit introduces support for the pin controller on A100.
--- drivers/pinctrl/sunxi/Kconfig | 10 + drivers/pinctrl/sunxi/Makefile | 2 + drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c | 105 ++++ drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c | 708 ++++++++++++++++++++++++++ 4 files changed, 825 insertions(+) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
drivers/pinctrl/sunxi/Kconfig +10 -0
@@ -94,6 +94,16 @@ config PINCTRL_SUN50I_A64_R default ARM64 && ARCH_SUNXI select PINCTRL_SUNXI +config PINCTRL_SUN50I_A100 + bool "Support for the Allwinner A100 PIO" + default ARM64 && ARCH_SUNXI + select PINCTRL_SUNXI + +config PINCTRL_SUN50I_A100_R + bool "Support for the Allwinner A100 R-PIO" + default ARM64 && ARCH_SUNXI + select PINCTRL_SUNXI + config PINCTRL_SUN50I_H5 bool "Support for the Allwinner H5 PIO" default ARM64 && ARCH_SUNXI
drivers/pinctrl/sunxi/Makefile +2 -0
@@ -13,6 +13,8 @@ obj-$(CONFIG_PINCTRL_SUN8I_A23_R) += pinctrl-sun8i-a23-r.o obj-$(CONFIG_PINCTRL_SUN8I_A33) += pinctrl-sun8i-a33.o obj-$(CONFIG_PINCTRL_SUN50I_A64) += pinctrl-sun50i-a64.o obj-$(CONFIG_PINCTRL_SUN50I_A64_R) += pinctrl-sun50i-a64-r.o +obj-$(CONFIG_PINCTRL_SUN50I_A100) += pinctrl-sun50i-a100.o +obj-$(CONFIG_PINCTRL_SUN50I_A100_R) += pinctrl-sun50i-a100-r.o obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o obj-$(CONFIG_PINCTRL_SUN8I_A83T_R) += pinctrl-sun8i-a83t-r.o obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o
drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c new file +105 -0
105 lines not on this page · raw message
drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c new file +708 -0
708 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v3 6/16 dt-bindings: nvmem: SID: add binding for A100's SID controller
In reply to Frank LeeAdd a binding for A100's SID controller.
--- Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml | 3 +++ 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml +3 -0
@@ -21,6 +21,9 @@ properties: - allwinner,sun8i-a83t-sid - allwinner,sun8i-h3-sid - allwinner,sun50i-a64-sid + - items: + - const: allwinner,sun50i-a100-sid + - const: allwinner,sun50i-a64-sid - allwinner,sun50i-h5-sid - allwinner,sun50i-h6-sid
Signature · 1 line
1.9.1
Rob Herring
maintainerRe: [PATCH v3 06/16] dt-bindings: nvmem: SID: add binding for A100's SID controller
Quoted 7 lines · Frank Lee
Add a binding for A100's SID controller.
Signed-off-by Frank Lee <[email protected]>--- Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml | 3 +++ 1 file changed, 3 insertions(+)
My bot found errors running 'make dt_binding_check' on your patch:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml: properties:compatible:enum:5: {'items': [{'const': 'allwinner,sun50i-a100-sid'}, {'const': 'allwinner,sun50i-a64-sid'}]} is not of type 'string' Documentation/devicetree/bindings/Makefile:20: recipe for target 'Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.example.dts' failed
make[1]: *** [Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.example.dts] Error 1
make[1]: *** Waiting for unfinished jobs....
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml: ignoring, error in schema: properties: compatible: enum: 5
warning: no schema found in file: ./Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml: ignoring, error in schema: properties: compatible: enum: 5
warning: no schema found in file: ./Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml
Makefile:1347: recipe for target 'dt_binding_check' failed
make: *** [dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1325053
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure dt-schema is up to date:
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Please check and re-submit.
PATCH v3 7/16 dt-bindings: thermal: sun8i: Add binding for A100's THS controller
In reply to Frank LeeAdd a binding for A100's ths controller.
--- .../devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml +5 -1
@@ -17,6 +17,7 @@ properties: - allwinner,sun8i-h3-ths - allwinner,sun8i-r40-ths - allwinner,sun50i-a64-ths + - allwinner,sun50i-a100-ths - allwinner,sun50i-h5-ths - allwinner,sun50i-h6-ths
@@ -61,7 +62,9 @@ allOf: properties: compatible: contains: - const: allwinner,sun50i-h6-ths + enum: + - allwinner,sun50i-a100-ths + - allwinner,sun50i-h6-ths then: properties:
@@ -103,6 +106,7 @@ allOf: - const: allwinner,sun8i-h3-ths - const: allwinner,sun8i-r40-ths - const: allwinner,sun50i-a64-ths + - const: allwinner,sun50i-a100-ths - const: allwinner,sun50i-h5-ths - const: allwinner,sun50i-h6-ths
Signature · 1 line
1.9.1
Re: [PATCH v3 07/16] dt-bindings: thermal: sun8i: Add binding for A100's THS controller
Quoted 8 lines · Frank Lee
Add a binding for A100's ths controller.
Signed-off-by Frank Lee <[email protected]>Reviewed-by Yangtao Li <[email protected]>--- .../devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
PATCH v3 8/16 thermal: sun8i: add TEMP_CALIB_MASK for calibration data in sun50i_h6_ths_calibrate
In reply to Frank LeeFor sun50i_h6_ths_calibrate(), the data read from nvmem needs a round of calculation. On the other hand, the newer SOC may store other data in the space other than 12bit sensor data. Add mask operation to read data to avoid conversion error.
--- drivers/thermal/sun8i_thermal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/thermal/sun8i_thermal.c +1 -1
@@ -244,7 +244,7 @@ static int sun50i_h6_ths_calibrate(struct ths_device *tmdev, ft_temp = (caldata[0 ] &FT_TEMP_MASK ) *100 ;for (i =0 ; i < tmdev->chip->sensor_num; i++) { -int sensor_reg = caldata[i +1 ]; +int sensor_reg = caldata[i +1 ] &TEMP_CALIB_MASK ;int cdata, offset;int sensor_temp = tmdev->chip->calc_temp (tmdev, i, sensor_reg);
Signature · 1 line
1.9.1
PATCH v3 9/16 thermal: sun8i: Add A100's THS controller support
In reply to Frank LeeThis patch add thermal sensor controller support for A100, which is similar to the previous ones.
--- drivers/thermal/sun8i_thermal.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
drivers/thermal/sun8i_thermal.c +14 -0
@@ -590,6 +590,19 @@ static int sun8i_ths_remove(struct platform_device *pdev) .calc_temp = sun8i_ths_calc_temp, }; +static const struct ths_thermal_chip sun50i_a100_ths = { + .sensor_num =3 , + .has_bus_clk_reset = true, + .ft_deviation =8000 , + .offset =187744 , + .scale =672 , + .temp_data_base =SUN50I_H6_THS_TEMP_DATA , + .calibrate = sun50i_h6_ths_calibrate, + .init = sun50i_h6_thermal_init, + .irq_ack = sun50i_h6_irq_ack, + .calc_temp = sun8i_ths_calc_temp, +}; +static const struct ths_thermal_chip sun50i_h5_ths = { .sensor_num =2 , .has_mod_clk = true,
@@ -619,6 +632,7 @@ static int sun8i_ths_remove(struct platform_device *pdev) { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, { .compatible = "allwinner,sun8i-r40-ths", .data = &sun8i_r40_ths }, { .compatible = "allwinner,sun50i-a64-ths", .data = &sun50i_a64_ths }, + { .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths }, { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, { /* sentinel */ },
Signature · 1 line
1.9.1
PATCH v3 10/16 mfd: axp20x: Allow the AXP803 to be probed by I2C
In reply to Frank LeeThe AXP803 can be used both using the RSB proprietary bus, or a more traditional I2C bus.
Let's add that possibility.
--- drivers/mfd/axp20x-i2c.c | 2 ++ 1 file changed, 2 insertions(+)
drivers/mfd/axp20x-i2c.c +2 -0
@@ -63,6 +63,7 @@ static int axp20x_i2c_remove(struct i2c_client *i2c) { .compatible = "x-powers,axp209", .data = (void *)AXP209_ID }, { .compatible = "x-powers,axp221", .data = (void *)AXP221_ID }, { .compatible = "x-powers,axp223", .data = (void *)AXP223_ID }, + { .compatible = "x-powers,axp803", .data = (void *)AXP803_ID }, { .compatible = "x-powers,axp806", .data = (void *)AXP806_ID }, { }, };
@@ -74,6 +75,7 @@ static int axp20x_i2c_remove(struct i2c_client *i2c) { "axp209", 0 }, { "axp221", 0 }, { "axp223", 0 }, + { "axp803", 0 }, { "axp806", 0 }, { }, };
Signature · 1 line
1.9.1
Lee Jones
AppliedRe: [PATCH v3 10/16] mfd: axp20x: Allow the AXP803 to be probed by I2C
Quoted 9 lines · Frank Lee
The AXP803 can be used both using the RSB proprietary bus, or a more traditional I2C bus.
Let's add that possibility.
Signed-off-by Frank Lee <[email protected]>--- drivers/mfd/axp20x-i2c.c | 2 ++ 1 file changed, 2 insertions(+)
Applied, thanks.
Signature · 4 lines
Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog
Quoted 3 lines · Frank Lee
This patch set adds initial support for allwinner a100 soc, which is a 64-bit tablet chip.
Hello
Does a product already exists with it ? I couldnt found any. Does a datasheet is availlable ?
Regards
Quoted 10 lines · Frank Lee
Quoted 3 lines
This patch set adds initial support for allwinner a100 soc, which is a 64-bit tablet chip.
Hello
Does a product already exists with it ? I couldnt found any. Does a datasheet is availlable ?
The product is still in development, A133 is actually a high performance version of A100.
Yangtao
Hi,
Quoted 27 lines · Frank Lee
This patch set adds initial support for allwinner a100 soc, which is a 64-bit tablet chip.
v3:
(quoted diff) +0
-4-Add pmu and nmi support -Add read data mask for calibration -Code style -Some trivial things in yaml filesv2:
(quoted diff) +0
-6-Some naming consistency -Repair email address -Fix mmc clock -Don't export system clock -Fix checkpatch warning -Drop unneeded pin function, convert to jtag_gpu and i2s_xFrank Lee (16):
dt-bindings: clk: sunxi-ccu: add compatible string for A100 CCU and
R-CCU
clk: sunxi-ng: add support for the Allwinner A100 CCU
dt-bindings: pinctrl: sunxi: Add A100 pinctrl bindings
dt-bindings: pinctrl: sunxi: make gpio banks supplies required
pinctrl: sunxi: add support for the Allwinner A100 pin controller
dt-bindings: nvmem: SID: add binding for A100's SID controller
dt-bindings: thermal: sun8i: Add binding for A100's THS controller
thermal: sun8i: addTEMP_CALIB_MASKfor calibration data in
Quoted 5 lines
sun50i_h6_ths_calibratethermal: sun8i: Add A100's THS controller support
mfd: axp20x: Allow the AXP803 to be probed by I2C
dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmi
dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controller
it doesn't look like those patches went through?
Quoted 4 lines
dt-bindings: i2c: mv64xxx: Add compatible for the A100 i2c node.
arm64: allwinner: A100: add the basical Allwinner A100 DTSI file
dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindings
arm64: allwinner: A100: add support for Allwinner Perf1 board
On a more general topic, which bootloader have you used to test this? The one from Allwinner's BSP I assume?
Maxime
HI,
Quoted 4 lines
Quoted 2 lines
dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmi
dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controllerit doesn't look like those patches went through?
Due to sending too many emails at once, it seems that some emails have been filtered by the mailbox, and I just reissued them.
Quoted 8 lines
Quoted 5 lines
dt-bindings: i2c: mv64xxx: Add compatible for the A100 i2c node.
arm64: allwinner: A100: add the basical Allwinner A100 DTSI file
dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindings
arm64: allwinner: A100: add support for Allwinner Perf1 boardOn a more general topic, which bootloader have you used to test this? The one from Allwinner's BSP I assume?
Yeah, there is no bringup on the mainline BootLoader yet.
If nothing happens, the next edition will be released today. We hope that A100 will be integrated as soon as possible.
MBR,
Yangtao