MAINTAINERS: add microchip polarfire soc support
PATCH v2 5/5 MAINTAINERS: add microchip polarfire soc support
From: Conor Dooley <[email protected]>
Add Cyril Jean and Lewis Hanly as maintainers for the Microchip SoC directory
--- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+)
MAINTAINERS +9 -0
@@ -14989,6 +14989,15 @@ F: arch/riscv/ N: riscv K: riscv +RISC-V/MICROCHIP POLARFIRE SOC SUPPORT +M: Lewis Hanly <[email protected]> +M: Cyril Jean <[email protected]> +L: [email protected] +S: Supported +F: drivers/mailbox/mailbox-mpfs.c +F: drivers/soc/microchip/ +F: include/soc/microchip/mpfs.h + RNBD BLOCK DRIVERS M: Danil Kipnis <[email protected]> M: Jack Wang <[email protected]>
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2.17.1 _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv
Quoted 7 lines · On Tue, Dec 1, 2020 at 3:03 AM <[email protected]> wrote:
From: Conor Dooley <[email protected]>
Add Cyril Jean and Lewis Hanly as maintainers for the Microchip SoC directory
Signed-off-by Conor Dooley <[email protected]>
I think this patch will make more sense in my basic SoC support patch. Can I include this patch in my series as is?
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--- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+)MAINTAINERS +9
-1@@ -14989,6 +14989,15 @@ F: arch/riscv/ N: riscv K: riscv +RISC-V/MICROCHIP POLARFIRE SOC SUPPORT +M: Lewis Hanly <[email protected]> +M: Cyril Jean <[email protected]> +L: [email protected] +S: Supported +F: drivers/mailbox/mailbox-mpfs.c +F: drivers/soc/microchip/ +F: include/soc/microchip/mpfs.h + RNBD BLOCK DRIVERS M: Danil Kipnis <[email protected]> M: Jack Wang <[email protected]> --2.17.1
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Regards, Atish _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv
Quoted 11 lines · Atish Patra
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Quoted 6 lines · On Tue, Dec 1, 2020 at 3:03 AM <[email protected]> wrote:
From: Conor Dooley <[email protected]>
Add Cyril Jean and Lewis Hanly as maintainers for the Microchip SoC directory
Signed-off-by Conor Dooley <[email protected]>I think this patch will make more sense in my basic SoC support patch. Can I include this patch in my series as is?
Eh sure, I don't mind.
Should it be split and I add the mailbox entry in my series & you do the rest?
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--- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+)MAINTAINERS +9
-1@@ -14989,6 +14989,15 @@ F: arch/riscv/ N: riscv K: riscv +RISC-V/MICROCHIP POLARFIRE SOC SUPPORT +M: Lewis Hanly <[email protected]> +M: Cyril Jean <[email protected]> +L: [email protected] +S: Supported +F: drivers/mailbox/mailbox-mpfs.c +F: drivers/soc/microchip/ +F: include/soc/microchip/mpfs.h + RNBD BLOCK DRIVERS M: Danil Kipnis <[email protected]> M: Jack Wang <[email protected]> --2.17.1
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Atish
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Quoted 10 lines · On Wed, Dec 2, 2020 at 1:13 AM <[email protected]> wrote:
Quoted 8 lines · Atish Patra
EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
Quoted 5 lines · On Tue, Dec 1, 2020 at 3:03 AM <[email protected]> wrote:
From: Conor Dooley <[email protected]>
Add Cyril Jean and Lewis Hanly as maintainers for the Microchip SoC directory
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Signed-off-by Conor Dooley <[email protected]>I think this patch will make more sense in my basic SoC support patch. Can I include this patch in my series as is?
Eh sure, I don't mind.
Should it be split and I add the mailbox entry in my series & you do the rest?
Yeah. That's even better.
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--- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+)MAINTAINERS +9
-1@@ -14989,6 +14989,15 @@ F: arch/riscv/ N: riscv K: riscv +RISC-V/MICROCHIP POLARFIRE SOC SUPPORT +M: Lewis Hanly <[email protected]> +M: Cyril Jean <[email protected]> +L: [email protected] +S: Supported +F: drivers/mailbox/mailbox-mpfs.c +F: drivers/soc/microchip/ +F: include/soc/microchip/mpfs.h + RNBD BLOCK DRIVERS M: Danil Kipnis <[email protected]> M: Jack Wang <[email protected]> --2.17.1
Quoted 4 lines
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Regards,
Atish_______________________________________________
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Regards, Atish