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CBB driver for Tegra194, Tegra234 & Tegra-Grace

PATCH Superseded Sumit Gupta 2 participants 12 messages May 5, 2022 – May 9, 2022

Subsystems (2)
Device tree bindings Tegra architecture support

v4 of 6 Superseded Latest is v6 →

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Sumit Gupta

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#0 lore raw

v4 cover CBB driver for Tegra194, Tegra234 & Tegra-Grace

The patch series adds Control BackBone(CBB) error handling driver for Tegra194, Tegra234 and Tegra-Grace SOC's. Tegra194 is using CBB version 1.0. Tegra234 and Tegra-Grace are using CBB version 2.0. Both CBB1.0 and CBB2.0 have different internal architecture. So, separate drivers are required.
Tegra194 and Tegra234 are using Device Tree. Tegra-Grace is using ACPI.

---
v3 -> v4:
- rebased patches on 5.18-rc5.

v2 -> v3:
- fixed warnings with GCC 11.2 and W=1 reported by kernel test robot.
- changed some function names to make consistent with tegra_cbb_*.

v1 -> v2:
- moved err-notifier-base and off-mask-erd from DT to driver.
- yaml fixes by Thierry.

Sumit Gupta (9):
soc: tegra: set ERD bit to mask inband errors
dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB1.0 binding
dt-bindings: arm: tegra: Add NVIDIA Tegra194 axi2apb binding
arm64: tegra: Add node for CBB1.0 in Tegra194 SOC
soc: tegra: cbb: Add CBB1.0 driver for Tegra194
dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB2.0 binding
arm64: tegra: Add node for CBB2.0 in Tegra234 SOC
soc: tegra: cbb: Add driver for Tegra234 CBB2.0
soc: tegra: cbb: Add support for tegra-grace SOC

 .../arm/tegra/nvidia,tegra194-axi2apb.yaml    |   40 +
 .../arm/tegra/nvidia,tegra194-cbb.yaml        |   93 +
 .../arm/tegra/nvidia,tegra234-cbb.yaml        |   70 +
 arch/arm64/boot/dts/nvidia/tegra194.dtsi      |   62 +-
 arch/arm64/boot/dts/nvidia/tegra234.dtsi      |   42 +
 drivers/soc/tegra/Kconfig                     |    9 +
 drivers/soc/tegra/Makefile                    |    1 +
 drivers/soc/tegra/cbb/Makefile                |    9 +
 drivers/soc/tegra/cbb/tegra-cbb.c             |  198 ++
 drivers/soc/tegra/cbb/tegra194-cbb.c          | 2261 +++++++++++++++++
 drivers/soc/tegra/cbb/tegra234-cbb.c          |  831 ++++++
 drivers/soc/tegra/fuse/tegra-apbmisc.c        |   29 +-
 include/soc/tegra/fuse.h                      |    6 +
 include/soc/tegra/tegra-cbb.h                 |   43 +
 include/soc/tegra/tegra-grace-cbb.h           |  219 ++
 include/soc/tegra/tegra194-cbb.h              |  158 ++
 include/soc/tegra/tegra234-cbb.h              |  342 +++
 17 files changed, 4410 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml
 create mode 100644 drivers/soc/tegra/cbb/Makefile
 create mode 100644 drivers/soc/tegra/cbb/tegra-cbb.c
 create mode 100644 drivers/soc/tegra/cbb/tegra194-cbb.c
 create mode 100644 drivers/soc/tegra/cbb/tegra234-cbb.c
 create mode 100644 include/soc/tegra/tegra-cbb.h
 create mode 100644 include/soc/tegra/tegra-grace-cbb.h
 create mode 100644 include/soc/tegra/tegra194-cbb.h
 create mode 100644 include/soc/tegra/tegra234-cbb.h
Signature · 1 line
2.17.1
author
#1 lore raw

PATCH v4 1/9 soc: tegra: set ERD bit to mask inband errors

Add function to set Error Response Disable bit in MISCREG_CCROC_ERR_CONFIG register from the Control Backbone(CBB) error handler driver. ERD bit allows masking of SError due to inband errors which are caused by illegal register accesses through CBB. When the bit is set, interrupt is used for reporting errors and magic code '0xdead2003' is returned. This change is only required for Tegra194 SOC as the config is moved to CBB register space for future SOC's. Also, remove unmapping the apbmisc_base as it's required to get the base address for accessing the misc register.

Signed-off-by Sumit Gupta <[email protected]>
---
 drivers/soc/tegra/fuse/tegra-apbmisc.c | 29 ++++++++++++++++++++++++--
 include/soc/tegra/fuse.h               |  6 ++++++
 2 files changed, 33 insertions(+), 2 deletions(-)
drivers/soc/tegra/fuse/tegra-apbmisc.c +27 -2
index 590c862538d0..de833f8d2408 100644
@@ -16,12 +16,16 @@
 
 #define FUSE_SKU_INFO	0x10
 
+#define ERD_ERR_CONFIG 0x120c
+#define ERD_MASK_INBAND_ERR 0x1
+
 #define PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT	4
 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG	\
 	(0xf << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT	\
 	(0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
 
+static void __iomem *apbmisc_base;
 static bool long_ram_code;
 static u32 strapping;
 static u32 chipid;

@@ -93,6 +97,28 @@ u32 tegra_read_ram_code(void)
 }
 EXPORT_SYMBOL_GPL(tegra_read_ram_code);
 
+/*
+ * The function sets ERD(Error Response Disable) bit.
+ * This allows to mask inband errors and always send an
+ * OKAY response from CBB to the master which caused error.
+ */
+int tegra194_miscreg_mask_serror(void)
+{
+	if (!apbmisc_base)
+		return -EPROBE_DEFER;
+
+	if (!of_machine_is_compatible("nvidia,tegra194")) {
+		WARN(1, "Only supported for Tegra194 devices!\n");
+		return -EOPNOTSUPP;
+	}
+
+	writel_relaxed(ERD_MASK_INBAND_ERR,
+		       apbmisc_base + ERD_ERR_CONFIG);
+
+	return 0;
+}
+EXPORT_SYMBOL(tegra194_miscreg_mask_serror);
+
 static const struct of_device_id apbmisc_match[] __initconst = {
 	{ .compatible = "nvidia,tegra20-apbmisc", },
 	{ .compatible = "nvidia,tegra186-misc", },

@@ -134,7 +160,7 @@ void __init tegra_init_revision(void)
 
 void __init tegra_init_apbmisc(void)
 {
-	void __iomem *apbmisc_base, *strapping_base;
+	void __iomem *strapping_base;
 	struct resource apbmisc, straps;
 	struct device_node *np;
 

@@ -196,7 +222,6 @@ void __init tegra_init_apbmisc(void)
 		pr_err("failed to map APBMISC registers\n");
 	} else {
 		chipid = readl_relaxed(apbmisc_base + 4);
-		iounmap(apbmisc_base);
 	}
 
 	strapping_base = ioremap(straps.start, resource_size(&straps));
include/soc/tegra/fuse.h +6 -0
index 67d2bc856fbc..977c334136e9 100644
@@ -58,6 +58,7 @@ u32 tegra_read_chipid(void);
 u8 tegra_get_chip_id(void);
 u8 tegra_get_platform(void);
 bool tegra_is_silicon(void);
+int tegra194_miscreg_mask_serror(void);
 #else
 static struct tegra_sku_info tegra_sku_info __maybe_unused;
 

@@ -95,6 +96,11 @@ static inline bool tegra_is_silicon(void)
 {
 	return false;
 }
+
+static inline int tegra194_miscreg_mask_serror(void)
+{
+	return false;
+}
 #endif
 
 struct device *tegra_soc_device_register(void);
Signature · 1 line
2.17.1
author
#2 lore raw

PATCH v4 2/9 dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB1.0 binding

In reply to Sumit Gupta

Add device-tree binding documentation to represent the error handling driver for Control Backbone (CBB) version 1.0 used in Tegra194 SOC. The driver prints debug information about failed transactions due to illegal register accesses on receiving interrupt from CBB.

Signed-off-by Sumit Gupta <[email protected]>
---
 .../arm/tegra/nvidia,tegra194-cbb.yaml        | 93 +++++++++++++++++++
 1 file changed, 93 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml new file +93 -0
new file mode 100644
index 000000000000..3167f0450298
@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: NVIDIA Tegra194 CBB 1.0 device tree bindings
+
+maintainers:
+  - Sumit Gupta <[email protected]>
+
+description: |+
+  The Control Backbone (CBB) is comprised of the physical path from an initiator to a target's
+  register configuration space. CBB 1.0 has multiple hierarchical sub-NOCs (Network-on-Chip) and
+  connects various initiators and targets using different bridges like AXIP2P, AXI2APB.
+
+  This driver handles errors due to illegal register accesses reported by the NOCs inside the CBB.
+  NOCs reporting errors are cluster NOCs "AON-NOC, SCE-NOC, RCE-NOC, BPMP-NOC, CV-NOC" and "CBB
+  Central NOC" which is the main NOC.
+
+  By default, the access issuing initiator is informed about the error using SError or Data Abort
+  exception unless the ERD (Error Response Disable) is enabled/set for that initiator. If the ERD
+  is enabled, then SError or Data Abort is masked and the error is reported with interrupt.
+
+  - For CCPLEX (CPU Complex) initiator, the driver sets ERD bit. So, the errors due to illegal
+    accesses from CCPLEX are reported by interrupts. If ERD is not set, then error is reported by
+    SError.
+  - For other initiators, the ERD is disabled. So, the access issuing initiator is informed about
+    the illegal access by Data Abort exception. In addition, an interrupt is also generated to
+    CCPLEX. These initiators include all engines using Cortex-R5 (which is ARMv7 CPU cluster) and
+    engines like TSEC (Security co-processor), NVDEC (NVIDIA Video Decoder engine) etc which can
+    initiate transactions.
+
+  The driver prints relevant debug information like Error Code, Error Description, Master, Address,
+  AXI ID, Cache, Protection, Security Group etc on receiving error notification.
+
+properties:
+  $nodename:
+    pattern: "^[a-z]+-noc@[0-9a-f]+$"
+
+  compatible:
+    enum:
+      - nvidia,tegra194-cbb-noc
+      - nvidia,tegra194-aon-noc
+      - nvidia,tegra194-bpmp-noc
+      - nvidia,tegra194-rce-noc
+      - nvidia,tegra194-sce-noc
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    description:
+      CCPLEX receives secure or nonsecure interrupt depending on error type. A secure interrupt is
+      received for SEC(firewall) & SLV errors and a non-secure interrupt is received for TMO & DEC
+      errors.
+    items:
+      - description: non-secure interrupt
+      - description: secure interrupt
+
+  nvidia,axi2apb:
+    $ref: '/schemas/types.yaml#/definitions/phandle'
+    description:
+      Specifies the node having all axi2apb bridges which need to be checked for any error logged
+      in their status register.
+
+  nvidia,apbmisc:
+    $ref: '/schemas/types.yaml#/definitions/phandle'
+    description:
+      Specifies the apbmisc node which need to be used for reading ERD register.
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - nvidia,axi2apb
+  - nvidia,apbmisc
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    cbb-noc(a)2300000 {
+        compatible = "nvidia,tegra194-cbb-noc";
+        reg = <0x02300000 0x1000>;
+        interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
+        nvidia,axi2apb = <&axi2apb>;
+        nvidia,apbmisc = <&apbmisc>;
+        status = "okay";
+    };
Signature · 1 line
2.17.1
author
#3 lore raw

PATCH v4 3/9 dt-bindings: arm: tegra: Add NVIDIA Tegra194 axi2apb binding

In reply to Sumit Gupta

Add device-tree binding documentation to represent the axi2apb bridges used by Control Backbone (CBB) 1.0 in Tegra194 SOC. All errors for APB slaves are reported as slave error because APB bas single bit to report error. So, CBB driver needs to further check error status registers of all the axi2apb bridges to find error type.

Signed-off-by Sumit Gupta <[email protected]>
Signed-off-by Thierry Reding <[email protected]>
---
 .../arm/tegra/nvidia,tegra194-axi2apb.yaml    | 40 +++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml new file +40 -0
new file mode 100644
index 000000000000..788a13f8aa93
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: NVIDIA Tegra194 AXI2APB bridge
+
+maintainers:
+  - Sumit Gupta <[email protected]>
+
+properties:
+  $nodename:
+    pattern: "^axi2apb@([0-9a-f]+)$"
+
+  compatible:
+    enum:
+      - nvidia,tegra194-axi2apb
+
+  reg:
+    maxItems: 6
+    description: Physical base address and length of registers for all bridges
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+
+examples:
+  - |
+    axi2apb: axi2apb(a)2390000 {
+      compatible = "nvidia,tegra194-axi2apb";
+      reg = <0x02390000 0x1000>,
+            <0x023a0000 0x1000>,
+            <0x023b0000 0x1000>,
+            <0x023c0000 0x1000>,
+            <0x023d0000 0x1000>,
+            <0x023e0000 0x1000>;
+    };
Signature · 1 line
2.17.1
author
#4 lore raw

PATCH v4 4/9 arm64: tegra: Add node for CBB1.0 in Tegra194 SOC

In reply to Sumit Gupta

Adding device tree nodes to enable the driver for handling errors from Control Backbone(CBB). CBB version 1.0 is used in Tegra194 SOC.

Signed-off-by Sumit Gupta <[email protected]>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 62 +++++++++++++++++++++++-
 1 file changed, 61 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/nvidia/tegra194.dtsi +61 -1
index f9d343b24597..40ad58a1dd10 100644
@@ -23,7 +23,7 @@
 		#size-cells = <1>;
 		ranges = <0x0 0x0 0x0 0x40000000>;
 
-		misc(a)100000 {
+		apbmisc: misc(a)100000 {
 			compatible = "nvidia,tegra194-misc";
 			reg = <0x00100000 0xf000>,
 			      <0x0010f000 0x1000>;

@@ -88,6 +88,27 @@
 			gpio-controller;
 		};
 
+		cbb-noc(a)2300000 {
+			compatible = "nvidia,tegra194-cbb-noc";
+			reg = <0x02300000 0x1000>;
+			interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,axi2apb = <&axi2apb>;
+			nvidia,apbmisc = <&apbmisc>;
+			status = "okay";
+		};
+
+		axi2apb: axi2apb(a)2390000 {
+			compatible = "nvidia,tegra194-axi2apb";
+			reg = <0x2390000 0x1000>,
+			    <0x23a0000 0x1000>,
+			    <0x23b0000 0x1000>,
+			    <0x23c0000 0x1000>,
+			    <0x23d0000 0x1000>,
+			    <0x23e0000 0x1000>;
+			status = "okay";
+		 };
+
 		ethernet(a)2490000 {
 			compatible = "nvidia,tegra194-eqos",
 				     "nvidia,tegra186-eqos",

@@ -1442,6 +1463,26 @@
 			#phy-cells = <0>;
 		};
 
+		sce-noc(a)b600000 {
+			compatible = "nvidia,tegra194-sce-noc";
+			reg = <0xb600000 0x1000>;
+			interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,axi2apb = <&axi2apb>;
+			nvidia,apbmisc = <&apbmisc>;
+			status = "okay";
+		};
+
+		rce-noc(a)be00000 {
+			compatible = "nvidia,tegra194-rce-noc";
+			reg = <0xbe00000 0x1000>;
+			interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,axi2apb = <&axi2apb>;
+			nvidia,apbmisc = <&apbmisc>;
+			status = "okay";
+		};
+
 		hsp_aon: hsp(a)c150000 {
 			compatible = "nvidia,tegra194-hsp";
 			reg = <0x0c150000 0x90000>;

@@ -1576,6 +1617,25 @@
 
 		};
 
+		aon-noc(a)c600000 {
+			compatible = "nvidia,tegra194-aon-noc";
+			reg = <0xc600000 0x1000>;
+			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,apbmisc = <&apbmisc>;
+			status = "okay";
+		};
+
+		bpmp-noc(a)d600000 {
+			compatible = "nvidia,tegra194-bpmp-noc";
+			reg = <0xd600000 0x1000>;
+			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
+					<GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+			nvidia,axi2apb = <&axi2apb>;
+			nvidia,apbmisc = <&apbmisc>;
+			status = "okay";
+		};
+
 		iommu(a)10000000 {
 			compatible = "nvidia,tegra194-smmu", "nvidia,smmu-500";
 			reg = <0x10000000 0x800000>;
Signature · 1 line
2.17.1
author
#5 lore raw

PATCH v4 5/9 soc: tegra: cbb: Add CBB1.0 driver for Tegra194

In reply to Sumit Gupta

Adding driver to handle errors from Control Backbone(CBB) which are generated due to illegal accesses. CBB1.0 is used in Tegra194 SOC. When an error is reported from a NOC within CBB, the driver prints debug information about failed transaction like Error Code, Error Description, Master, Address, AXI ID, Cache, Protection, Security Group etc. It then causes system crash using BUG_ON() or call WARN() based on whether the error type is fatal or not.

Signed-off-by Sumit Gupta <[email protected]>
---
 drivers/soc/tegra/Kconfig            |    9 +
 drivers/soc/tegra/Makefile           |    1 +
 drivers/soc/tegra/cbb/Makefile       |    8 +
 drivers/soc/tegra/cbb/tegra-cbb.c    |  198 +++
 drivers/soc/tegra/cbb/tegra194-cbb.c | 2261 ++++++++++++++++++++++++++
 include/soc/tegra/tegra-cbb.h        |   43 +
 include/soc/tegra/tegra194-cbb.h     |  158 ++
 7 files changed, 2678 insertions(+)
 create mode 100644 drivers/soc/tegra/cbb/Makefile
 create mode 100644 drivers/soc/tegra/cbb/tegra-cbb.c
 create mode 100644 drivers/soc/tegra/cbb/tegra194-cbb.c
 create mode 100644 include/soc/tegra/tegra-cbb.h
 create mode 100644 include/soc/tegra/tegra194-cbb.h
drivers/soc/tegra/Kconfig +9 -0
index 8b53ed1cc67e..0520b9744ec4 100644
@@ -161,3 +161,12 @@ config SOC_TEGRA30_VOLTAGE_COUPLER
 	bool "Voltage scaling support for Tegra30 SoCs"
 	depends on ARCH_TEGRA_3x_SOC || COMPILE_TEST
 	depends on REGULATOR
+
+config SOC_TEGRA_CBB
+	tristate "Tegra driver to handle error from CBB"
+	depends on ARCH_TEGRA_194_SOC
+	default y
+	help
+	  Support for handling error from Tegra Control Backbone(CBB).
+	  This driver handles the errors from CBB and prints debug
+	  information about the failed transactions.
drivers/soc/tegra/Makefile +1 -0
index 054e862b63d8..d722f512dc9d 100644
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-y += fuse/
+obj-y += cbb/
 
 obj-y += common.o
 obj-$(CONFIG_SOC_TEGRA_FLOWCTRL) += flowctrl.o
drivers/soc/tegra/cbb/Makefile new file +8 -0
new file mode 100644
index 000000000000..3f9ff6575628
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Control Backbone Driver code.
+#
+ifdef CONFIG_SOC_TEGRA_CBB
+obj-y += tegra-cbb.o
+obj-$(CONFIG_ARCH_TEGRA_194_SOC)        += tegra194-cbb.o
+endif
drivers/soc/tegra/cbb/tegra-cbb.c new file +198 -0

198 lines not on this page · raw message

drivers/soc/tegra/cbb/tegra194-cbb.c new file +2261 -0

2,261 lines not on this page · raw message

include/soc/tegra/tegra-cbb.h new file +43 -0

43 lines not on this page · raw message

include/soc/tegra/tegra194-cbb.h new file +158 -0

158 lines not on this page · raw message

Signature · 1 line
2.17.1
author
#6 lore raw

PATCH v4 6/9 dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB2.0 binding

In reply to Sumit Gupta

Add device-tree binding documentation to represent CBB2.0 (Control Backbone) error handling driver. The driver prints debug information about failed transaction on receiving interrupt from CBB2.0.

Signed-off-by Sumit Gupta <[email protected]>
---
 .../arm/tegra/nvidia,tegra234-cbb.yaml        | 70 +++++++++++++++++++
 1 file changed, 70 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml new file +70 -0
new file mode 100644
index 000000000000..fa4383be19d8
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: NVIDIA Tegra CBB 2.0 Error handling driver device tree bindings
+
+maintainers:
+  - Sumit Gupta <[email protected]>
+
+description: |+
+  The Control Backbone (CBB) is comprised of the physical path from an initiator to a target's
+  register configuration space. CBB 2.0 consists of multiple sub-blocks connected to each other
+  to create a topology. The Tegra234 SoC has different fabrics based on CBB2.0 architecture which
+  include cluster fabrics BPMP, AON, PSC, SCE, RCE, DCE, FSI and "CBB central fabric".
+
+  In CBB 2.0, each initiator which can issue transactions connects to a Root Master Node (MN)
+  before it connects to any other element of the fabric. Each Root MN contains a Error Monitor
+  (EM) which detects and logs error. Interrupts from various EM blocks are collated by Error
+  Notifier (EN) which is per fabric and presents a single interrupt from fabric to the SoC
+  interrupt controller.
+
+  The driver handles errors from CBB due to illegal register accesses and prints debug information
+  about failed transaction on receiving the interrupt from EN. Debug information includes Error
+  Code, Error Description, MasterID, Fabric, SlaveID, Address, Cache, Protection, Security Group
+  etc on receiving error notification.
+
+  If the Error Response Disable (ERD) is set/enabled for an initiator, then SError or Data abort
+  exception error response is masked and an interrupt is used for reporting errors due to illegal
+  accesses from that initiator. The value returned on read failures is '0xFFFFFFFF' for
+  compatibility with PCIE.
+
+properties:
+  $nodename:
+    pattern: "^[a-z]+-fabric@[0-9a-f]+$"
+
+  compatible:
+    enum:
+      - nvidia,tegra234-aon-fabric
+      - nvidia,tegra234-bpmp-fabric
+      - nvidia,tegra234-cbb-fabric
+      - nvidia,tegra234-dce-fabric
+      - nvidia,tegra234-rce-fabric
+      - nvidia,tegra234-sce-fabric
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: secure interrupt from error notifier
+
+additionalProperties: true
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    cbb-fabric(a)1300000 {
+      compatible = "nvidia,tegra234-cbb-fabric";
+      reg = <0x13a00000 0x400000>;
+      interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
+      status = "okay";
+    };
Signature · 1 line
2.17.1
author
#7 lore raw

PATCH v4 7/9 arm64: tegra: Add node for CBB2.0 in Tegra234 SOC

In reply to Sumit Gupta

Control Backbone(CBB) version 2.0 is used in Tegra234 SOC. Adding nodes to enable handling of errors from different CBB 2.0 based fabrics in Tegra234 SOC.

Signed-off-by Sumit Gupta <[email protected]>
---
 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 42 ++++++++++++++++++++++++
 1 file changed, 42 insertions(+)
arch/arm64/boot/dts/nvidia/tegra234.dtsi +42 -0
index 71c21d7d0551..2ac6debe007e 100644
@@ -915,6 +915,20 @@
 			status = "okay";
 		};
 
+		sce-fabric(a)b600000 {
+			compatible = "nvidia,tegra234-sce-fabric";
+			reg = <0xb600000 0x40000>;
+			interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+			status = "okay";
+		};
+
+		rce-fabric(a)be00000 {
+			compatible = "nvidia,tegra234-rce-fabric";
+			reg = <0xbe00000 0x40000>;
+			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+			status = "okay";
+		};
+
 		hsp_aon: hsp(a)c150000 {
 			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
 			reg = <0x0c150000 0x90000>;

@@ -999,6 +1013,27 @@
 			interrupt-controller;
 		};
 
+		aon-fabric(a)c600000 {
+			compatible = "nvidia,tegra234-aon-fabric";
+			reg = <0xc600000 0x40000>;
+			interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
+			status = "okay";
+		};
+
+		bpmp-fabric(a)d600000 {
+			compatible = "nvidia,tegra234-bpmp-fabric";
+			reg = <0xd600000 0x40000>;
+			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+			status = "okay";
+		};
+
+		dce-fabric(a)de00000 {
+			compatible = "nvidia,tegra234-sce-fabric";
+			reg = <0xde00000 0x40000>;
+			interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>;
+			status = "okay";
+		};
+
 		gic: interrupt-controller(a)f400000 {
 			compatible = "arm,gic-v3";
 			reg = <0x0f400000 0x010000>, /* GICD */

@@ -1292,6 +1327,13 @@
 			nvidia,memory-controller = <&mc>;
 			status = "okay";
 		};
+
+		cbb-fabric(a)0x13a00000 {
+			compatible = "nvidia,tegra234-cbb-fabric";
+			reg = <0x13a00000 0x400000>;
+			interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
+			status = "okay";
+		};
 	};
 
 	ccplex(a)e000000 {
Signature · 1 line
2.17.1
author
#8 lore raw

PATCH v4 8/9 soc: tegra: cbb: Add driver for Tegra234 CBB2.0

In reply to Sumit Gupta

Adding driver to handle errors from CBB version 2.0 which is used in Tegra234 SOC. The driver prints debug information about failed transaction on receiving interrupt from Error Notifier. Error notifier collates the interrupts from various Error Monitor blocks and presents a single interrupt to the SOC Interrupt Controller.
For timeout errors, the driver also does the lookup to find timedout clients and prints client id. The IP's who want to reset if there is a timeout will have to call BPMP from the client IP's driver. BPMP firmware will also clear the timeout bit after resetting the IP so that next transactions are send to them after reset.

Signed-off-by Sumit Gupta <[email protected]>
---
 drivers/soc/tegra/Kconfig            |   2 +-
 drivers/soc/tegra/cbb/Makefile       |   1 +
 drivers/soc/tegra/cbb/tegra234-cbb.c | 743 +++++++++++++++++++++++++++
 include/soc/tegra/tegra234-cbb.h     | 342 ++++++++++++
 4 files changed, 1087 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/tegra/cbb/tegra234-cbb.c
 create mode 100644 include/soc/tegra/tegra234-cbb.h
drivers/soc/tegra/Kconfig +1 -1
index 0520b9744ec4..f0cf6a33cb5b 100644
@@ -164,7 +164,7 @@ config SOC_TEGRA30_VOLTAGE_COUPLER
 
 config SOC_TEGRA_CBB
 	tristate "Tegra driver to handle error from CBB"
-	depends on ARCH_TEGRA_194_SOC
+	depends on ARCH_TEGRA_194_SOC || ARCH_TEGRA_234_SOC
 	default y
 	help
 	  Support for handling error from Tegra Control Backbone(CBB).
drivers/soc/tegra/cbb/Makefile +1 -0
index 3f9ff6575628..71877d20651f 100644
@@ -5,4 +5,5 @@
 ifdef CONFIG_SOC_TEGRA_CBB
 obj-y += tegra-cbb.o
 obj-$(CONFIG_ARCH_TEGRA_194_SOC)        += tegra194-cbb.o
+obj-$(CONFIG_ARCH_TEGRA_234_SOC)        += tegra234-cbb.o
 endif
drivers/soc/tegra/cbb/tegra234-cbb.c new file +743 -0

743 lines not on this page · raw message

include/soc/tegra/tegra234-cbb.h new file +342 -0

342 lines not on this page · raw message

Signature · 1 line
2.17.1
author
#9 lore raw

PATCH v4 9/9 soc: tegra: cbb: Add support for tegra-grace SOC

In reply to Sumit Gupta

Adding support for Tegra Grace SOC which uses CBB2.0 architecture based fabrics. Also, adding ACPI support required for Grace. Fabrics reporting errors in Grace are "CBB Fabric" and "BPMP Fabric". "CBB Fabric" connects various other CBB2.0 based fabrics and also services the Initiators and Targets which are connected to itself. "BPMP Fabric" is present in BPMP cluster.

Signed-off-by Sumit Gupta <[email protected]>
---
 drivers/soc/tegra/cbb/tegra234-cbb.c |  90 ++++++++++-
 include/soc/tegra/tegra-grace-cbb.h  | 219 +++++++++++++++++++++++++++
 2 files changed, 308 insertions(+), 1 deletion(-)
 create mode 100644 include/soc/tegra/tegra-grace-cbb.h
drivers/soc/tegra/cbb/tegra234-cbb.c +89 -1
index 782d28e50ca1..1889331ddb22 100644
@@ -11,6 +11,7 @@
  */
 
 #include <asm/cpufeature.h>
+#include <linux/acpi.h>
 #include <linux/clk.h>
 #include <linux/debugfs.h>
 #include <linux/module.h>

@@ -27,6 +28,7 @@
 #include <soc/tegra/fuse.h>
 #include <soc/tegra/tegra-cbb.h>
 #include <soc/tegra/tegra234-cbb.h>
+#include <soc/tegra/tegra-grace-cbb.h>
 
 static LIST_HEAD(cbb_errmon_list);
 static DEFINE_SPINLOCK(cbb_errmon_lock);

@@ -258,14 +260,33 @@ static void print_errlog_err(struct seq_file *file, struct tegra_cbb_errmon_reco
 	u8 cache_type = 0, prot_type = 0, burst_length = 0;
 	u8 mstr_id = 0, grpsec = 0, vqc = 0, falconsec = 0;
 	u8 beat_size = 0, access_type = 0, access_id = 0;
+	u8 requester_socket_id = 0, local_socket_id = 0;
 	u8 slave_id = 0, fab_id = 0, burst_type = 0;
 	char fabric_name[20];
+	bool is_numa = 0;
+
+	if (num_possible_nodes() > 1)
+		is_numa = true;
 
 	mstr_id   = FIELD_GET(FAB_EM_EL_MSTRID, errmon->mn_user_bits);
 	vqc	  = FIELD_GET(FAB_EM_EL_VQC, errmon->mn_user_bits);
 	grpsec	  = FIELD_GET(FAB_EM_EL_GRPSEC, errmon->mn_user_bits);
 	falconsec = FIELD_GET(FAB_EM_EL_FALCONSEC, errmon->mn_user_bits);
 
+	/*
+	 * For SOC with multiple NUMA nodes, print cross socket access
+	 * errors only if initiator/master_id is CCPLEX, CPMU or GPU.
+	 */
+	if (is_numa) {
+		local_socket_id = numa_node_id();
+		requester_socket_id = FIELD_GET(REQ_SOCKET_ID, errmon->mn_attr2);
+
+		if (requester_socket_id != local_socket_id) {
+			if ((mstr_id != 0x1) && (mstr_id != 0x2) && (mstr_id != 0xB))
+				return;
+		}
+	}
+
 	fab_id	   = FIELD_GET(FAB_EM_EL_FABID, errmon->mn_attr2);
 	slave_id   = FIELD_GET(FAB_EM_EL_SLAVEID, errmon->mn_attr2);
 

@@ -298,6 +319,15 @@ static void print_errlog_err(struct seq_file *file, struct tegra_cbb_errmon_reco
 	else
 		strcpy(fabric_name, errmon->name);
 
+	if (is_numa) {
+		tegra_cbb_print_err(file, "\t  Requester_Socket_Id\t: 0x%x\n",
+				    requester_socket_id);
+		tegra_cbb_print_err(file, "\t  Local_Socket_Id\t: 0x%x\n",
+				    local_socket_id);
+		tegra_cbb_print_err(file, "\t  No. of NUMA_NODES\t: 0x%x\n",
+				    num_possible_nodes());
+	}
+
 	tegra_cbb_print_err(file, "\t  Fabric\t\t: %s\n", fabric_name);
 	tegra_cbb_print_err(file, "\t  Slave_Id\t\t: 0x%x\n", slave_id);
 	tegra_cbb_print_err(file, "\t  Burst_length\t\t: 0x%x\n", burst_length);

@@ -585,6 +615,23 @@ static struct tegra_cbb_fabric_data tegra234_sce_fab_data = {
 	.err_notifier_base = 0x19000
 };
 
+static struct tegra_cbb_fabric_data tegra_grace_cbb_fab_data = {
+	.name   = "cbb-fabric",
+	.tegra_cbb_master_id = tegra_grace_master_id,
+	.sn_addr_map = tegra_grace_cbb_sn_lookup,
+	.noc_errors = tegra_grace_errmon_errors,
+	.err_notifier_base = 0x60000,
+	.off_mask_erd = 0x40004
+};
+
+static struct tegra_cbb_fabric_data tegra_grace_bpmp_fab_data = {
+	.name   = "bpmp-fabric",
+	.tegra_cbb_master_id = tegra_grace_master_id,
+	.sn_addr_map = tegra_grace_bpmp_sn_lookup,
+	.noc_errors = tegra_grace_errmon_errors,
+	.err_notifier_base = 0x19000
+};
+
 static const struct of_device_id tegra234_cbb_dt_ids[] = {
 	{.compatible    = "nvidia,tegra234-cbb-fabric",
 		.data = &tegra234_cbb_fab_data},

@@ -602,6 +649,36 @@ static const struct of_device_id tegra234_cbb_dt_ids[] = {
 };
 MODULE_DEVICE_TABLE(of, tegra234_cbb_dt_ids);
 
+struct cbb_acpi_uid_noc {
+	const char *hid;
+	const char *uid;
+	const struct tegra_cbb_fabric_data *fab;
+};
+
+static const struct cbb_acpi_uid_noc cbb_acpi_uids[] = {
+	{ "NVDA1070", "1", &tegra_grace_cbb_fab_data },
+	{ "NVDA1070", "2", &tegra_grace_bpmp_fab_data },
+	{ },
+};
+
+static const struct acpi_device_id tegra_grace_cbb_acpi_ids[] = {
+	{ "NVDA1070" },
+	{ },
+};
+MODULE_DEVICE_TABLE(acpi, tegra_grace_cbb_acpi_ids);
+
+static const struct
+tegra_cbb_fabric_data *cbb_acpi_get_fab_data(struct acpi_device *adev)
+{
+	const struct cbb_acpi_uid_noc *u;
+
+	for (u = cbb_acpi_uids; u->hid; u++) {
+		if (acpi_dev_hid_uid_match(adev, u->hid, u->uid))
+			return u->fab;
+	}
+	return NULL;
+}
+
 static int
 tegra234_cbb_errmon_init(const struct tegra_cbb_fabric_data *pdata,
 			 struct tegra_cbb *cbb, struct resource *res_base)

@@ -646,10 +723,20 @@ static int tegra234_cbb_probe(struct platform_device *pdev)
 	struct tegra_cbb_errmon_record *errmon = NULL;
 	const struct tegra_cbb_fabric_data *pdata = NULL;
 	struct resource *res_base = NULL;
+	struct device *dev = &pdev->dev;
+	struct acpi_device *device;
 	struct tegra_cbb *cbb;
 	int err = 0;
 
-	pdata = of_device_get_match_data(&pdev->dev);
+	if (of_machine_is_compatible("nvidia,tegra23x") ||
+	    of_machine_is_compatible("nvidia,tegra234")) {
+		pdata = of_device_get_match_data(&pdev->dev);
+	} else {
+		device = ACPI_COMPANION(dev);
+		if (!device)
+			return -ENODEV;
+		pdata = cbb_acpi_get_fab_data(device);
+	}
 	if (!pdata) {
 		dev_err(&pdev->dev, "No device match found\n");
 		return -EINVAL;

@@ -720,6 +807,7 @@ static struct platform_driver tegra234_cbb_driver = {
 		.owner  = THIS_MODULE,
 		.name   = "tegra234-cbb",
 		.of_match_table = of_match_ptr(tegra234_cbb_dt_ids),
+		.acpi_match_table = ACPI_PTR(tegra_grace_cbb_acpi_ids),
 #ifdef CONFIG_PM_SLEEP
 		.pm     = &tegra234_cbb_pm,
 #endif
include/soc/tegra/tegra-grace-cbb.h new file +219 -0

219 lines not on this page · raw message

Signature · 1 line
2.17.1
build bot
#10 lore raw

Re: [Patch v4 9/9] soc: tegra: cbb: Add support for tegra-grace SOC

Thank you for the patch! Perhaps something to improve:

Hi Sumit,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on tegra/for-next]
[also build test WARNING on robh/for-next v5.18-rc5 next-20220505] [cannot apply to tegra-drm/drm/tegra/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Sumit-Gupta/CBB-driver-for-Tegra194-Tegra234-Tegra-Grace/20220506-010937
base:   https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git for-next
config: arm64-randconfig-r033-20220505 (https://download.01.org/0day-ci/archive/20220506/[email protected]/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 5e004fb787698440a387750db7f8028e7cb14cfc)

reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# https://github.com/intel-lab-lkp/linux/commit/ba92bd64d05fc7383dce973c2428eca5b4c65805
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Sumit-Gupta/CBB-driver-for-Tegra194-Tegra234-Tegra-Grace/20220506-010937 git checkout ba92bd64d05fc7383dce973c2428eca5b4c65805
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/soc/tegra/cbb/

If you fix the issue, kindly add following tag as appropriate

Reported-by kernel test robot <[email protected]>

All warnings (new ones prefixed by >>):

drivers/soc/tegra/cbb/tegra234-cbb.c:726:17: warning: unused variable 'dev' [-Wunused-variable]

           struct device *dev = &pdev->dev;
                          ^
>> drivers/soc/tegra/cbb/tegra234-cbb.c:664:36: warning: unused variable 'tegra_grace_cbb_acpi_ids' [-Wunused-const-variable]
   static const struct acpi_device_id tegra_grace_cbb_acpi_ids[] = {
                                      ^

2 warnings generated.

vim +/tegra_grace_cbb_acpi_ids +664 drivers/soc/tegra/cbb/tegra234-cbb.c

663

 > 664	static const struct acpi_device_id tegra_grace_cbb_acpi_ids[] = {
   665		{ "NVDA1070" },
   666		{ },
   667	};
   668	MODULE_DEVICE_TABLE(acpi, tegra_grace_cbb_acpi_ids);
   669	
   670	static const struct
   671	tegra_cbb_fabric_data *cbb_acpi_get_fab_data(struct acpi_device *adev)
   672	{
   673		const struct cbb_acpi_uid_noc *u;
   674	
   675		for (u = cbb_acpi_uids; u->hid; u++) {
   676			if (acpi_dev_hid_uid_match(adev, u->hid, u->uid))
   677				return u->fab;
   678		}
   679		return NULL;
   680	}
   681	
   682	static int
   683	tegra234_cbb_errmon_init(const struct tegra_cbb_fabric_data *pdata,
   684				 struct tegra_cbb *cbb, struct resource *res_base)
   685	{
   686		struct platform_device *pdev = cbb->pdev;
   687		struct tegra_cbb_errmon_record *errmon;
   688		unsigned long flags = 0;
   689		int err = 0;
   690	
   691		errmon = (struct tegra_cbb_errmon_record *)cbb->err_rec;
   692		errmon->vaddr = devm_ioremap_resource(&pdev->dev, res_base);
   693		if (IS_ERR(errmon->vaddr))
   694			return -EINVAL;
   695	
   696		errmon->name = pdata->name;
   697		errmon->start = res_base->start;
   698		errmon->tegra_cbb_master_id = pdata->tegra_cbb_master_id;
   699		errmon->err_notifier_base = pdata->err_notifier_base;
   700		errmon->off_mask_erd = pdata->off_mask_erd;
   701		errmon->sn_addr_map = pdata->sn_addr_map;
   702		errmon->noc_errors = pdata->noc_errors;
   703		errmon->cbb = cbb;
   704	
   705		if (errmon->off_mask_erd)
   706			errmon->erd_mask_inband_err = 1;
   707	
   708		err = tegra_cbb_err_getirq(pdev, NULL, &errmon->sec_irq);
   709		if (err)
   710			return err;
   711	
   712		cbb->ops = &tegra234_cbb_errmon_ops;
   713	
   714		spin_lock_irqsave(&cbb_errmon_lock, flags);
   715		list_add(&errmon->node, &cbb_errmon_list);
   716		spin_unlock_irqrestore(&cbb_errmon_lock, flags);
   717	
   718		return 0;
   719	};
   720	
   721	static int tegra234_cbb_probe(struct platform_device *pdev)
   722	{
   723		struct tegra_cbb_errmon_record *errmon = NULL;
   724		const struct tegra_cbb_fabric_data *pdata = NULL;
   725		struct resource *res_base = NULL;
 > 726		struct device *dev = &pdev->dev;

727 struct acpi_device *device;
728 struct tegra_cbb *cbb;
729 int err = 0;
730
731 if (of_machine_is_compatible("nvidia,tegra23x") ||
732 of_machine_is_compatible("nvidia,tegra234")) {
733 pdata = of_device_get_match_data(&pdev->dev);
734 } else {
735 device = ACPI_COMPANION(dev);
736 if (!device)
737 return -ENODEV;
738 pdata = cbb_acpi_get_fab_data(device);
739 }
740 if (!pdata) {
741 dev_err(&pdev->dev, "No device match found\n");
742 return -EINVAL;
743 }
744
745 res_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
746 if (!res_base) {
747 dev_err(&pdev->dev, "Could not find base address");
748 return -ENOENT;
749 }
750
751 cbb = devm_kzalloc(&pdev->dev, sizeof(*cbb), GFP_KERNEL);
752 if (!cbb)
753 return -ENOMEM;
754
755 errmon = devm_kzalloc(&pdev->dev, sizeof(*errmon), GFP_KERNEL);
756 if (!errmon)
757 return -ENOMEM;
758
759 cbb->err_rec = errmon;
760 cbb->pdev = pdev;
761 err = tegra234_cbb_errmon_init(pdata, cbb, res_base);
762 if (err) {
763 dev_err(&pdev->dev, "cbberr init for soc failing\n");
764 return err;
765 }
766
767 /* set ERD bit to mask SError and generate interrupt to report error */
768 if (errmon->erd_mask_inband_err)
769 tegra234_cbb_mn_mask_serror(cbb);
770
771 platform_set_drvdata(pdev, cbb);
772
773 return tegra_cbb_register_isr_enaberr(cbb);
774 }
775

Signature · 2 lines
0-DAY CI Kernel Test Service
https://01.org/lkp
author
#11 lore raw

Re: [Patch v4 9/9] soc: tegra: cbb: Add support for tegra-grace SOC

Quoted 36 lines · kernel test robot

External email: Use caution opening links or attachments

Hi Sumit,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on tegra/for-next]
[also build test WARNING on robh/for-next v5.18-rc5 next-20220505] [cannot apply to tegra-drm/drm/tegra/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/intel-lab-lkp/linux/commits/Sumit-Gupta/CBB-driver-for-Tegra194-Tegra234-Tegra-Grace/20220506-010937
base:   https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git for-next
config: arm64-randconfig-r033-20220505 (https://download.01.org/0day-ci/archive/20220506/202205061255.rw9iNJAz-lkp(a)intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 5e004fb787698440a387750db7f8028e7cb14cfc)

reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# https://github.com/intel-lab-lkp/linux/commit/ba92bd64d05fc7383dce973c2428eca5b4c65805
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Sumit-Gupta/CBB-driver-for-Tegra194-Tegra234-Tegra-Grace/20220506-010937 git checkout ba92bd64d05fc7383dce973c2428eca5b4c65805
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/soc/tegra/cbb/

If you fix the issue, kindly add following tag as appropriate

Reported-by kernel test robot <[email protected]>

All warnings (new ones prefixed by >>):

Quoted 8 lines
    drivers/soc/tegra/cbb/tegra234-cbb.c:726:17: warning: unused variable 'dev' [-Wunused-variable]
            struct device *dev = &pdev->dev;
                           ^
Quoted 1 line
Quoted 1 line

drivers/soc/tegra/cbb/tegra234-cbb.c:664:36: warning: unused variable 'tegra_grace_cbb_acpi_ids' [-Wunused-const-variable]

    static const struct acpi_device_id tegra_grace_cbb_acpi_ids[] = {
                                       ^
    2 warnings generated.

Thankyou for the report.
I have included the fix and posted v5.

Quoted 120 lines

vim +/tegra_grace_cbb_acpi_ids +664 drivers/soc/tegra/cbb/tegra234-cbb.c

    663
Quoted 1 line

664 static const struct acpi_device_id tegra_grace_cbb_acpi_ids[] = {

    665          { "NVDA1070" },
    666          { },
    667  };
    668  MODULE_DEVICE_TABLE(acpi, tegra_grace_cbb_acpi_ids);
    669
    670  static const struct
    671  tegra_cbb_fabric_data *cbb_acpi_get_fab_data(struct acpi_device *adev)
    672  {
    673          const struct cbb_acpi_uid_noc *u;
    674
    675          for (u = cbb_acpi_uids; u->hid; u++) {
    676                  if (acpi_dev_hid_uid_match(adev, u->hid, u->uid))
    677                          return u->fab;
    678          }
    679          return NULL;
    680  }
    681
    682  static int
    683  tegra234_cbb_errmon_init(const struct tegra_cbb_fabric_data *pdata,
    684                           struct tegra_cbb *cbb, struct resource *res_base)
    685  {
    686          struct platform_device *pdev = cbb->pdev;
    687          struct tegra_cbb_errmon_record *errmon;
    688          unsigned long flags = 0;
    689          int err = 0;
    690
    691          errmon = (struct tegra_cbb_errmon_record *)cbb->err_rec;
    692          errmon->vaddr = devm_ioremap_resource(&pdev->dev, res_base);
    693          if (IS_ERR(errmon->vaddr))
    694                  return -EINVAL;
    695
    696          errmon->name = pdata->name;
    697          errmon->start = res_base->start;
    698          errmon->tegra_cbb_master_id = pdata->tegra_cbb_master_id;
    699          errmon->err_notifier_base = pdata->err_notifier_base;
    700          errmon->off_mask_erd = pdata->off_mask_erd;
    701          errmon->sn_addr_map = pdata->sn_addr_map;
    702          errmon->noc_errors = pdata->noc_errors;
    703          errmon->cbb = cbb;
    704
    705          if (errmon->off_mask_erd)
    706                  errmon->erd_mask_inband_err = 1;
    707
    708          err = tegra_cbb_err_getirq(pdev, NULL, &errmon->sec_irq);
    709          if (err)
    710                  return err;
    711
    712          cbb->ops = &tegra234_cbb_errmon_ops;
    713
    714          spin_lock_irqsave(&cbb_errmon_lock, flags);
    715          list_add(&errmon->node, &cbb_errmon_list);
    716          spin_unlock_irqrestore(&cbb_errmon_lock, flags);
    717
    718          return 0;
    719  };
    720
    721  static int tegra234_cbb_probe(struct platform_device *pdev)
    722  {
    723          struct tegra_cbb_errmon_record *errmon = NULL;
    724          const struct tegra_cbb_fabric_data *pdata = NULL;
    725          struct resource *res_base = NULL;
Quoted 1 line

726 struct device *dev = &pdev->dev;

    727          struct acpi_device *device;
    728          struct tegra_cbb *cbb;
    729          int err = 0;
    730
    731          if (of_machine_is_compatible("nvidia,tegra23x") ||
    732              of_machine_is_compatible("nvidia,tegra234")) {
    733                  pdata = of_device_get_match_data(&pdev->dev);
    734          } else {
    735                  device = ACPI_COMPANION(dev);
    736                  if (!device)
    737                          return -ENODEV;
    738                  pdata = cbb_acpi_get_fab_data(device);
    739          }
    740          if (!pdata) {
    741                  dev_err(&pdev->dev, "No device match found\n");
    742                  return -EINVAL;
    743          }
    744
    745          res_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
    746          if (!res_base) {
    747                  dev_err(&pdev->dev, "Could not find base address");
    748                  return -ENOENT;
    749          }
    750
    751          cbb = devm_kzalloc(&pdev->dev, sizeof(*cbb), GFP_KERNEL);
    752          if (!cbb)
    753                  return -ENOMEM;
    754
    755          errmon = devm_kzalloc(&pdev->dev, sizeof(*errmon), GFP_KERNEL);
    756          if (!errmon)
    757                  return -ENOMEM;
    758
    759          cbb->err_rec = errmon;
    760          cbb->pdev = pdev;
    761          err = tegra234_cbb_errmon_init(pdata, cbb, res_base);
    762          if (err) {
    763                  dev_err(&pdev->dev, "cbberr init for soc failing\n");
    764                  return err;
    765          }
    766
    767          /* set ERD bit to mask SError and generate interrupt to report error */
    768          if (errmon->erd_mask_inband_err)
    769                  tegra234_cbb_mn_mask_serror(cbb);
    770
    771          platform_set_drvdata(pdev, cbb);
    772
    773          return tegra_cbb_register_isr_enaberr(cbb);
    774  }
    775

--
0-DAY CI Kernel Test Service
https://01.org/lkp