KVM TDX basic feature support
Subsystems (17)
v7 cover KVM TDX basic feature support
From: Isaku Yamahata <[email protected]>
KVM TDX basic feature support
Hello. This is v7 the patch series vof KVM TDX support.
This is based on v5.19-rc1 + kvm/queue branch + TDX HOST patch series. The tree can be found at https://github.com/intel/tdx/tree/kvm-upstream
How to run/test: It's describe at https://github.com/intel/tdx/wiki/TDX-KVM
Major changes from v6:
- rebased to v5.19 base
TODO:
- integrate fd-based guest memory. As the discussion is still on-going, I intentionally dropped fd-based guest memory support yet. The integration can be found at https://github.com/intel/tdx/tree/kvm-upstream-workaround.
- 2M large page support. It's work-in-progress.
For large page support, there are several design choices. Here is the design options. Any thoughts/feedback?
KVM MMU Large page support for TDX
* What needs to be done
- Track private or shared of each page size (4KB, 2MB, 1GB) based on TDG.VP.VMCALL<MapGPA>. For large pages(2MB, 1GB), it can be mixed (some lower-size pages are private and some shared.) In this case, the page can't be large.
- if necessary, split large page on TDG.VP.VMCALL<MapGPA>
(split on dirty page tracking is future work)
- resolving KVM page fault
When resolving a private page and the page is large in the host, GPA can be resolved as a large page in Secure-EPT. Even if the page is large on the host side, sometimes a 4KB page can be resolved because it's up to guest TD to accept at 4KB, 2MB, or 1GB.
- collapsing pages into a large page.
At this point, it's okay to not implement this. When dirty page tracking is supported, this needs to be supported.
- On MapGPA, the page can be collapsed into a large page
- handle zapping SPTE and try to collapse the pages on the next KVM page fault Unlike the EPT case, some trick is needed.
- For performance, optimize KVM page fault path at the cost of complicating MapGPA path.
* options to track private or shared
At each page size (4KB, 2MB, and 1GB), track private, shared, or mixed (2MB and 1GB case). For 4KB each page, 1 bit per page is needed. private or shared. For large pages (2MB and 1GB), 2 bits per large page is needed. (private, shared, or mixed). When resolving KVM page fault, we don't want to check the lower-size pages to check if the given GPA can be a large for performance. On MapGPA check it instead.
Option A). enhance kvm_arch_memory_slot
enum kvm_page_type {
KVM_PAGE_TYPE_INVALID,
KVM_PAGE_TYPE_SHARED,
KVM_PAGE_TYPE_PRIVATE,
KVM_PAGE_TYPE_MIXED,
};
struct kvm_page_attr {
enum kvm_page_type type;
}; struct kvm_arch_memory_slot {
+ struct kvm_page_attr *page_attr[KVM_NR_PAGE_SIZES];
Option B). steal one more bit SPTE_MIXED_MASK in addition to SPTE_SHARED_MASK If !SPTE_MIXED_MASK, it can be large page.
Option C). use SPTE_SHARED_MASK and kvm_mmu_page::mixed bitmap kvm_mmu_page::mixed bitmap of 1GB, root indicates mixed for 2MB, 1GB.
* comparison
A).
+ straightforward to implement
+ SPTE_SHARED_MASK isn't needed
- memory overhead compared to B). or C).
- more memory reference on KVM page fault
B).
+ simpler than C) (complex than A)?)
+ efficient on KVM page fault. (only SPTE reference)
+ low memory overhead
- Waste precious SPTE bits.
C).
+ efficient on KVM page fault. (only SPTE reference)
+ low memory overhead
- complicates MapGPA
- scattered data structure
Thanks,
Isaku Yamahata
Changes from v6:
- rebased to v5.19
Changes from v5:
- export __seamcall and use it
- move mutex lock from callee function of smp_call_on_cpu to the caller.
- rename mmu_prezap => flush_shadow_all_private() and tdx_mmu_release_hkid
- updated comment
- drop the use of tdh_mng_key.reclaimid(): as the function is for backward compatibility to only return success
- struct kvm_tdx_cmd: metadata => flags, added __u64 error.
- make this ioctl systemwide ioctl
- ABI change to struct kvm_init_vm
- guest_tsc_khz: use kvm->arch.default_tsc_khz
- rename BUILD_BUG_ON_MEMCPY to MEMCPY_SAME_SIZE
- drop exporting kvm_set_tsc_khz().
- fix kvm_tdp_page_fault() for mtrr emulation
- rename it to kvm_gfn_shared_mask(), dropped kvm_gpa_shared_mask()
- drop kvm_is_private_gfn(), kept kvm_is_private_gpa()
keep kvm_{gfn, gpa}_private(), kvm_gpa_private()
- update commit message
- rename shadow_init_value => shadow_nonprsent_value
- added ept_violation_ve_test mode
- shadow_nonpresent_value => SHADOW_NONPRESENT_VALUE in tdp_mmu.c
- legacy MMU case
=> - mmu_topup_shadow_page_cache(), kvm_mmu_create()
- FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
- #VE warning:
- rename: REMOVED_SPTE => __REMOVED_SPTE, SHADOW_REMOVED_SPTE => REMOVED_SPTE
- merge into Like we discussed, this patch should be merged with patch "KVM: x86/mmu: Allow non-zero init value for shadow PTE".
- fix pointed by Sagi. check !is_private check => (kvm_gfn_shared_mask && !is_private)
- introduce kvm_gfn_for_root(kvm, root, gfn)
- add only_shared argument to kvm_tdp_mmu_handle_gfn()
- use kvm_arch_dirty_log_supported()
- rename SPTE_PRIVATE_PROHIBIT to SPTE_SHARED_MASK.
- rename: is_private_prohibit_spte() => spte_shared_mask()
- fix: shadow_nonpresent_value => SHADOW_NONPRESENT_VALUE in comment
- dropped this patch as the change was merged into kvm/queue
- update vt_apicv_post_state_restore()
- use is_64_bit_hypercall()
- comment: expand MSMI -> Machine Check System Management Interrupt
- fixed TDX_SEPT_PFERR
- tdvmcall_p[1234]_{write, read}() => tdvmcall_a[0123]_{read,write}()
- rename tdmvcall_exit_readon() => tdvmcall_leaf()
- remove optional zero check of argument.
- do a check for static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE) in kvm_vcpu_ioctl_smi and __apic_accept_irq.
- WARN_ON_ONCE in tdx_smi_allowed and tdx_enable_smi_window.
- introduce vcpu_deliver_init to x86_ops
- sprinkeled KVM_BUG_ON()
Changes from v4:
- rebased to TDX host kernel patch series.
- include all the patches to make this patch series working.
- add [MARKER] patches to mark the patch layer clear.
---
* What's TDX?
TDX stands for Trust Domain Extensions, which extends Intel Virtual Machines Extensions (VMX) to introduce a kind of virtual machine guest called a Trust Domain (TD) for confidential computing.
A TD runs in a CPU mode that is designed to protect the confidentiality of its memory contents and its CPU state from any other software, including the hosting Virtual Machine Monitor (VMM), unless explicitly shared by the TD itself.
We have more detailed explanations below (***). We have the high-level design of TDX KVM below (****).
In this patch series, we use "TD" or "guest TD" to differentiate it from the current "VM" (Virtual Machine), which is supported by KVM today.
* The organization of this patch series
This patch series is on top of the patches series "TDX host kernel support":
https://lore.kernel.org/lkml/[email protected]/
this patch series is available at
https://github.com/intel/tdx/releases/tag/kvm-upstream
The corresponding patches to qemu are available at
https://github.com/intel/qemu-tdx/commits/tdx-upstream
The relations of the layers are depicted as follows.
The arrows below show the order of patch reviews we would like to have.
The below layers are chosen so that the device model, for example, qemu can exercise each layering step by step. Check if TDX is supported, create TD VM, create TD vcpu, allow vcpu running, populate TD guest private memory, and handle vcpu exits/hypercalls/interrupts to run TD fully.
TDX vcpu
interrupt/exits/hypercall<------------\
^ |
| |
TD finalization |
^ |
| |
TDX EPT violation<------------\ |
^ | |
| | |
TD vcpu enter/exit | |
^ | |
| | |
TD vcpu creation/destruction | \-------KVM TDP MMU MapGPA
^ | ^
| | |
TD VM creation/destruction \---------------KVM TDP MMU hooks ^ ^
| |
TDX architectural definitions KVM TDP refactoring for TDX
^ ^
| |
TDX, VMX <--------TDX host kernel KVM MMU GPA stolen bits
coexistence support
The followings are explanations of each layer. Each layer has a dummy commit that starts with [MARKER] in subject. It is intended to help to identify where each layer starts.
TDX host kernel support:
https://lore.kernel.org/lkml/[email protected]/
The guts of system-wide initialization of TDX module. There is an independent patch series for host x86. TDX KVM patches call functions this patch series provides to initialize the TDX module.
TDX, VMX coexistence:
Infrastructure to allow TDX to coexist with VMX and trigger the initialization of the TDX module.
This layer starts with
"KVM: VMX: Move out vmx_x86_ops to 'main.c' to wrap VMX and TDX"
TDX architectural definitions:
Add TDX architectural definitions and helper functions
This layer starts with
"[MARKER] The start of TDX KVM patch series: TDX architectural definitions".
TD VM creation/destruction:
Guest TD creation/destroy allocation and releasing of TDX specific vm and vcpu structure. Create an initial guest memory image with TDX measurement.
This layer starts with
"[MARKER] The start of TDX KVM patch series: TD VM creation/destruction".
TD vcpu creation/destruction:
guest TD creation/destroy Allocation and releasing of TDX specific vm and vcpu structure. Create an initial guest memory image with TDX measurement.
This layer starts with
"[MARKER] The start of TDX KVM patch series: TD vcpu creation/destruction"
TDX EPT violation:
Create an initial guest memory image with TDX measurement. Handle secure EPT violations to populate guest pages with TDX SEAMCALLs. This layer starts with
"[MARKER] The start of TDX KVM patch series: TDX EPT violation"
TD vcpu enter/exit:
Allow TDX vcpu to enter into TD and exit from TD. Save CPU state before entering into TD. Restore CPU state after exiting from TD.
This layer starts with
"[MARKER] The start of TDX KVM patch series: TD vcpu enter/exit"
TD vcpu interrupts/exit/hypercall:
Handle various exits/hypercalls and allow interrupts to be injected so that TD vcpu can continue running.
This layer starts with
"[MARKER] The start of TDX KVM patch series: TD vcpu exits/interrupts/hypercalls"
KVM MMU GPA shared bit:
Introduce framework to handle shared bit repurposed bit of GPA TDX repurposed a bit of GPA to indicate shared or private. If it's shared, it's the same as the conventional VMX EPT case. VMM can access shared guest pages. If it's private, it's handled by Secure-EPT and the guest page is encrypted.
This layer starts with
"[MARKER] The start of TDX KVM patch series: KVM MMU GPA stolen bits"
KVM TDP refactoring for TDX:
TDX Secure EPT requires different constants. e.g. initial value EPT entry value etc. Various refactoring for those differences. This layer starts with
"[MARKER] The start of TDX KVM patch series: KVM TDP refactoring for TDX"
KVM TDP MMU hooks:
Introduce framework to TDP MMU to add hooks in addition to direct EPT access TDX added Secure EPT which is an enhancement to VMX EPT. Unlike conventional VMX EPT, CPU can't directly read/write Secure EPT. Instead, use TDX SEAMCALLs to operate on Secure EPT.
This layer starts with
"[MARKER] The start of TDX KVM patch series: KVM TDP MMU hooks"
KVM TDP MMU MapGPA:
Introduce framework to handle switching guest pages from private/shared to shared/private. For a given GPA, a guest page can be assigned to a private GPA or a shared GPA exclusively. With TDX MapGPA hypercall, guest TD converts GPA assignments from private (or shared) to shared (or private).
This layer starts with
"[MARKER] The start of TDX KVM patch series: KVM TDP MMU MapGPA "
KVM guest private memory: (not shown in the above diagram)
[PATCH v4 00/12] KVM: mm: fd-based approach for supporting KVM guest private
memory: https://lkml.org/lkml/2022/1/18/395
Guest private memory requires different memory management in KVM. The patch proposes a way for it. Integration with TDX KVM.
(***)
* TDX module
A CPU-attested software module called the "TDX module" is designed to implement the TDX architecture, and it is loaded by the UEFI firmware today. It can be loaded by the kernel or driver at runtime, but in this patch series we assume that the TDX module is already loaded and initialized.
The TDX module provides two main new logical modes of operation built upon the new SEAM (Secure Arbitration Mode) root and non-root CPU modes added to the VMX architecture. TDX root mode is mostly identical to the VMX root operation mode, and the TDX functions (described later) are triggered by the new SEAMCALL instruction with the desired interface function selected by an input operand (leaf number, in RAX). TDX non-root mode is used for TD guest operation. TDX non-root operation (i.e. "guest TD" mode) is similar to the VMX non-root operation (i.e. guest VM), with changes and restrictions to better assure that no other software or hardware has direct visibility of the TD memory and state.
TDX transitions between TDX root operation and TDX non-root operation include TD Entries, from TDX root to TDX non-root mode, and TD Exits from TDX non-root to TDX root mode. A TD Exit might be asynchronous, triggered by some external event (e.g., external interrupt or SMI) or an exception, or it might be synchronous, triggered by a TDCALL (TDG.VP.VMCALL) function.
TD VCPUs can be entered using SEAMCALL(TDH.VP.ENTER) by KVM. TDH.VP.ENTER is one of the TDX interface functions as mentioned above, and "TDH" stands for Trust Domain Host. Those host-side TDX interface functions are categorized into various areas just for better organization, such as SYS (TDX module management), MNG (TD management), VP (VCPU), PHYSMEM (physical memory), MEM (private memory), etc. For example, SEAMCALL(TDH.SYS.INFO) returns the TDX module information.
TDCS (Trust Domain Control Structure) is the main control structure of a guest TD, and encrypted (using the guest TD's ephemeral private key). At a high level, TDCS holds information for controlling TD operation as a whole, execution, EPTP, MSR bitmaps, etc that KVM needs to set it up. Note that MSR bitmaps are held as part of TDCS (unlike VMX) because they are meant to have the same value for all VCPUs of the same TD.
Trust Domain Virtual Processor State (TDVPS) is the root control structure of a TD VCPU. It helps the TDX module control the operation of the VCPU, and holds the VCPU state while the VCPU is not running. TDVPS is opaque to software and DMA access, accessible only by using the TDX module interface functions (such as TDH.VP.RD, TDH.VP.WR). TDVPS includes TD VMCS, and TD VMCS auxiliary structures, such as virtual APIC page, virtualization exception information, etc.
Several VMX control structures (such as Shared EPT and Posted interrupt descriptor) are directly managed and accessed by the host VMM. These control structures are pointed to by fields in the TD VMCS.
The above means that 1) KVM needs to allocate different data structures for TDs,
2) KVM can reuse the existing code for TDs for some operations, 3) it needs to define TD-specific handling for others. 3) Redirect operations to . 3) Redirect operations to the TDX specific callbacks, like "if (is_td_vcpu(vcpu)) tdx_callback() else vmx_callback();".
*TD Private Memory
TD private memory is designed to hold TD private content, encrypted by the CPU using the TD ephemeral key. An encryption engine holds a table of encryption keys, and an encryption key is selected for each memory transaction based on a Host Key Identifier (HKID). By design, the host VMM does not have access to the encryption keys.
In the first generation of MKTME, HKID is "stolen" from the physical address by allocating a configurable number of bits from the top of the physical address. The HKID space is partitioned into shared HKIDs for legacy MKTME accesses and private HKIDs for SEAM-mode-only accesses. We use 0 for the shared HKID on the host so that MKTME can be opaque or bypassed on the host.
During TDX non-root operation (i.e. guest TD), memory accesses can be qualified as either shared or private, based on the value of a new SHARED bit in the Guest Physical Address (GPA). The CPU translates shared GPAs using the usual VMX EPT (Extended Page Table) or "Shared EPT" (in this document), which resides in host VMM memory. The Shared EPT is directly managed by the host VMM - the same as with the current VMX. Since guest TDs usually require I/O, and the data exchange needs to be done via shared memory, thus KVM needs to use the current EPT functionality even for TDs.
* Secure EPT and Minoring using the TDP code
The CPU translates private GPAs using a separate Secure EPT. The Secure EPT pages are encrypted and integrity-protected with the TD's ephemeral private key. Secure EPT can be managed _indirectly_ by the host VMM, using the TDX interface functions, and thus conceptually Secure EPT is a subset of EPT (why "subset"). Since execution of such interface functions takes much longer time than accessing memory directly, in KVM we use the existing TDP code to minor the Secure EPT for the TD.
This way, we can effectively walk Secure EPT without using the TDX interface functions.
* VM life cycle and TDX specific operations
The userspace VMM, such as QEMU, needs to build and treat TDs differently. For example, a TD needs to boot in private memory, and the host software cannot copy the initial image to private memory.
* TSC Virtualization
The TDX module helps TDs maintain reliable TSC (Time Stamp Counter) values (e.g. consistent among the TD VCPUs) and the virtual TSC frequency is determined by TD configuration, i.e. when the TD is created, not per VCPU. The current KVM owns TSC virtualization for VMs, but the TDX module does for TDs.
* MCE support for TDs
The TDX module doesn't allow VMM to inject MCE. Instead PV way is needed for TD to communicate with VMM. For now, KVM silently ignores MCE request by VMM. MSRs related to MCE (e.g, MCE bank registers) can be naturally emulated by paravirtualizing MSR access.
[1] For details, the specifications, [2], [3], [4], [5], [6], [7], are available.
* Restrictions or future work
Some features are not included to reduce patch size. Those features are addressed as future independent patch series.
- large page (2M, 1G)
- qemu gdb stub
- guest PMU
- and more
* Prerequisites
It's required to load the TDX module and initialize it. It's out of the scope of this patch series. Another independent patch for the common x86 code is planned. It defines CONFIG_INTEL_TDX_HOST and this patch series uses CONFIG_INTEL_TDX_HOST. It's assumed that With CONFIG_INTEL_TDX_HOST=y, the TDX module is initialized and ready for KVM to use the TDX module APIs for TDX guest life cycle like tdh.mng.init are ready to use.
Concretely Global initialization, LP (Logical Processor) initialization, global configuration, the key configuration, and TDMR and PAMT initialization are done. The state of the TDX module is SYS_READY. Please refer to the TDX module specification, the chapter Intel TDX Module Lifecycle State Machine
** Detecting the TDX module readiness.
TDX host patch series implements the detection of the TDX module availability and its initialization so that KVM can use it. Also it manages Host KeyID (HKID) assigned to guest TD.
The assumed APIs the TDX host patch series provides are
- int seamrr_enabled()
Check if required cpu feature (SEAM mode) is available. This only check CPU feature availability. At this point, the TDX module may not be ready for KVM to use.
- int init_tdx(void);
Initialization of TDX module so that the TDX module is ready for KVM to use.
- const struct tdsysinfo_struct *tdx_get_sysinfo(void);
Return the system wide information about the TDX module. NULL if the TDX isn't initialized.
- u32 tdx_get_global_keyid(void);
Return global key id that is used for the TDX module itself.
- int tdx_keyid_alloc(void);
Allocate HKID for guest TD.
- void tdx_keyid_free(int keyid);
Free HKID for guest TD.
(****)
* TDX KVM high-level design
- Host key ID management
Host Key ID (HKID) needs to be assigned to each TDX guest for memory encryption. It is assumed The TDX host patch series implements necessary functions, u32 tdx_get_global_keyid(void), int tdx_keyid_alloc(void) and,
void tdx_keyid_free(int keyid).
- Data structures and VM type
Because TDX is different from VMX, define its own VM/VCPU structures, struct kvm_tdx and struct vcpu_tdx instead of struct kvm_vmx and struct vcpu_vmx. To identify the VM, introduce VM-type to specify which VM type, VMX (default) or TDX, is used.
- VM life cycle and TDX specific operations
Re-purpose the existing KVM_MEMORY_ENCRYPT_OP to add TDX specific operations. New commands are used to get the TDX system parameters, set TDX specific VM/VCPU parameters, set initial guest memory and measurement.
The creation of TDX VM requires five additional operations in addition to the conventional VM creation.
- Get KVM system capability to check if TDX VM type is supported
- VM creation (KVM_CREATE_VM)
- New: Get the TDX specific system parameters. KVM_TDX_GET_CAPABILITY.
- New: Set TDX specific VM parameters. KVM_TDX_INIT_VM.
- VCPU creation (KVM_CREATE_VCPU)
- New: Set TDX specific VCPU parameters. KVM_TDX_INIT_VCPU.
- New: Initialize guest memory as boot state and extend the measurement with the memory. KVM_TDX_INIT_MEM_REGION.
- New: Finalize VM. KVM_TDX_FINALIZE. Complete measurement of the initial TDX VM contents.
- VCPU RUN (KVM_VCPU_RUN)
- Protected guest state
Because the guest state (CPU state and guest memory) is protected, the KVM VMM can't operate on them. For example, accessing CPU registers, injecting exceptions, and accessing guest memory. Those operations are handled as silently ignored, returning zero or initial reset value when it's requested via KVM API ioctls.
VM/VCPU state and callbacks for TDX specific operations. Define tdx specific VM state and VCPU state instead of VMX ones. Redirect operations to TDX specific callbacks. "if (tdx) tdx_op() else vmx_op()".
Operations on the CPU state
silently ignore operations on the guest state. For example, the write to CPU registers is ignored and the read from CPU registers returns 0.
. ignore access to CPU registers except for allowed ones.
. TSC: add a check if tsc is immutable and return an error. Because the KVM
implementation updates the internal tsc state and it's difficult to back out those changes. Instead, skip the logic.
. dirty logging: add check if dirty logging is supported.
. exceptions/SMI/MCE/SIPI/INIT: silently ignore
Note: virtual external interrupt and NMI can be injected into TDX guests.
- KVM MMU integration
One bit of the guest physical address (bit 51 or 47) is repurposed to indicate if the guest physical address is private (the bit is cleared) or shared (the bit is set). The bits are called stolen bits.
- Stolen bits framework
systematically tracks which guest physical address, shared or private, is used.
- Shared EPT and secure EPT
There are two EPTs. Shared EPT (the conventional one) and Secure EPT(the new one). Shared EPT is handled the same for the stolen bit set. Secure EPT points to private guest pages. To resolve EPT violation, KVM walks one of two EPTs based on faulted GPA. Because it's costly to access secure EPT during walking EPTs with SEAMCALLs for the private guest physical address, another private EPT is used as a shadow of Secure-EPT with the existing logic at the cost of extra memory.
The following depicts the relationship.
KVM | TDX module
| | |
-------------+---------- | |
| | | |
V V | |
shared GPA private GPA | |
CPU shared EPT pointer KVM private EPT pointer | CPU secure EPT pointer
| | | |
| | | |
V V | V
shared EPT private EPT--------mirror----->Secure EPT
| | | |
| \--------------------+------\ |
| | | |
V | V V
shared guest page | private guest page
|
|
non-encrypted memory | encrypted memory
| - Operating on Secure EPT
Use the TDX module APIs to operate on Secure EPT. To call the TDX API during resolving EPT violation, add hooks to additional operation and wiring it to TDX backend.
* References
[1] TDX specification
https://www.intel.com/content/www/us/en/developer/articles/technical/intel-trust-domain-extensions.html
[2] Intel Trust Domain Extensions (Intel TDX)
https://cdrdv2.intel.com/v1/dl/getContent/726790
[3] Intel CPU Architectural Extensions Specification
https://www.intel.com/content/dam/develop/external/us/en/documents-tps/intel-tdx-cpu-architectural-specification.pdf
[4] Intel TDX Module 1.0 Specification
https://www.intel.com/content/dam/develop/external/us/en/documents/tdx-module-1.0-public-spec-v0.931.pdf
[5] Intel TDX Loader Interface Specification
https://www.intel.com/content/dam/develop/external/us/en/documents-tps/intel-tdx-seamldr-interface-specification.pdf
[6] Intel TDX Guest-Hypervisor Communication Interface
https://cdrdv2.intel.com/v1/dl/getContent/726790
[7] Intel TDX Virtual Firmware Design Guide
https://www.intel.com/content/dam/develop/external/us/en/documents/tdx-virtual-firmware-design-guide-rev-1.01.pdf
[8] intel public github
kvm TDX branch: https://github.com/intel/tdx/tree/kvm
TDX guest branch: https://github.com/intel/tdx/tree/guest
qemu TDX https://github.com/intel/qemu-tdx
[9] TDVF
https://github.com/tianocore/edk2-staging/tree/TDVF
This was merged into EDK2 main branch. https://github.com/tianocore/edk2
Chao Gao (3):
KVM: x86: Move check_processor_compatibility from init ops to runtime
ops
Partially revert "KVM: Pass kvm_init()'s opaque param to additional
arch funcs"
KVM: x86: Allow to update cached values in kvm_user_return_msrs w/o
wrmsr
Isaku Yamahata (72):
KVM: Refactor CPU compatibility check on module initialiization x86/virt/vmx/tdx: export platform_tdx_enabled()
KVM: TDX: Detect CPU feature on kernel module initialization
KVM: x86: Refactor KVM VMX module init/exit functions
KVM: TDX: Add placeholders for TDX VM/vcpu structure x86/virt/tdx: Add a helper function to return system wide info about
TDX module
KVM: TDX: Initialize TDX module when loading kvm_intel.ko
KVM: TDX: Make TDX VM type supported
[MARKER] The start of TDX KVM patch series: TDX architectural
definitions
KVM: TDX: Define TDX architectural definitions
KVM: TDX: Add C wrapper functions for SEAMCALLs to the TDX module
KVM: TDX: Add helper functions to print TDX SEAMCALL error [MARKER] The start of TDX KVM patch series: TD VM creation/destruction x86/cpu: Add helper functions to allocate/free TDX private host key id
KVM: TDX: Add place holder for TDX VM specific mem_enc_op ioctl
KVM: TDX: Make pmu_intel.c ignore guest TD case
[MARKER] The start of TDX KVM patch series: TD vcpu
creation/destruction
KVM: TDX: allocate/free TDX vcpu structure
KVM: TDX: allocate/free TDX vcpu structure
[MARKER] The start of TDX KVM patch series: KVM MMU GPA shared bits
KVM: x86/mmu: introduce config for PRIVATE KVM MMU [MARKER] The start of TDX KVM patch series: KVM TDP refactoring for
TDX
KVM: x86/mmu: Disallow fast page fault on private GPA
KVM: VMX: Introduce test mode related to EPT violation VE [MARKER] The start of TDX KVM patch series: KVM TDP MMU hooks
KVM: x86/mmu: Focibly use TDP MMU for TDX
KVM: x86/mmu: Add a private pointer to struct kvm_mmu_page
KVM: x86/tdp_mmu: refactor kvm_tdp_mmu_map()
KVM: x86/tdp_mmu: Support TDX private mapping for TDP MMU [MARKER] The start of TDX KVM patch series: TDX EPT violation
KVM: x86/tdp_mmu: Ignore unsupported mmu operation on private GFNs
KVM: TDX: don't request KVM_REQ_APIC_PAGE_RELOAD
KVM: TDX: TDP MMU TDX support
[MARKER] The start of TDX KVM patch series: KVM TDP MMU MapGPA
KVM: x86/mmu: steal software usable git to record if GFN is for shared
or not
KVM: x86/tdp_mmu: implement MapGPA hypercall for TDX [MARKER] The start of TDX KVM patch series: TD finalization
KVM: TDX: Create initial guest memory
KVM: TDX: Finalize VM initialization
[MARKER] The start of TDX KVM patch series: TD vcpu enter/exit
KVM: TDX: Add helper assembly function to TDX vcpu
KVM: TDX: Implement TDX vcpu enter/exit path
KVM: TDX: vcpu_run: save/restore host state(host kernel gs)
KVM: TDX: restore host xsave state when exit from the guest TD
KVM: TDX: restore user ret MSRs
[MARKER] The start of TDX KVM patch series: TD vcpu
exits/interrupts/hypercalls
KVM: TDX: complete interrupts after tdexit
KVM: TDX: restore debug store when TD exit
KVM: TDX: handle vcpu migration over logical processor
KVM: x86: Add a switch_db_regs flag to handle TDX's auto-switched
behavior
KVM: TDX: remove use of struct vcpu_vmx from posted_interrupt.c
KVM: TDX: Implement interrupt injection
KVM: TDX: Implements vcpu request_immediate_exit
KVM: TDX: Implement methods to inject NMI
KVM: TDX: Add a place holder to handle TDX VM exit
KVM: TDX: handle EXIT_REASON_OTHER_SMI
KVM: TDX: handle ept violation/misconfig exit
KVM: TDX: handle EXCEPTION_NMI and EXTERNAL_INTERRUPT
KVM: TDX: Add a place holder for handler of TDX hypercalls
(TDG.VP.VMCALL)
KVM: TDX: handle KVM hypercall with TDG.VP.VMCALL
KVM: TDX: Handle TDX PV CPUID hypercall
KVM: TDX: Handle TDX PV HLT hypercall
KVM: TDX: Handle TDX PV port io hypercall
KVM: TDX: Implement callbacks for MSR operations for TDX
KVM: TDX: Handle TDX PV rdmsr/wrmsr hypercall
KVM: TDX: Handle TDX PV report fatal error hypercall
KVM: TDX: Handle TDX PV map_gpa hypercall
KVM: TDX: Handle TDG.VP.VMCALL<GetTdVmCallInfo> hypercall
KVM: TDX: Silently discard SMI request
KVM: TDX: Silently ignore INIT/SIPI Documentation/virtual/kvm: Document on Trust Domain Extensions(TDX)
KVM: x86: design documentation on TDX support of x86 KVM TDP MMU
Rick Edgecombe (1):
KVM: x86/mmu: Add address conversion functions for TDX shared bits
Sean Christopherson (25):
KVM: VMX: Move out vmx_x86_ops to 'main.c' to wrap VMX and TDX
KVM: Enable hardware before doing arch VM initialization
KVM: x86: Introduce vm_type to differentiate default VMs from
confidential VMs
KVM: TDX: Add TDX "architectural" error codes
KVM: TDX: Stub in tdx.h with structs, accessors, and VMCS helpers
KVM: TDX: create/destroy VM structure
KVM: TDX: x86: Add ioctl to get TDX systemwide parameters
KVM: TDX: Do TDX specific vcpu initialization
KVM: x86/mmu: Explicitly check for MMIO spte in fast page fault
KVM: x86/mmu: Allow non-zero value for non-present SPTE
KVM: x86/mmu: Track shadow MMIO value/mask on a per-VM basis
KVM: x86/mmu: Allow per-VM override of the TDP max page level
KVM: x86/mmu: Zap only leaf SPTEs for deleted/moved memslot for
private mmu
KVM: x86/mmu: Disallow dirty logging for x86 TDX
KVM: VMX: Split out guts of EPT violation to common/exposed function
KVM: VMX: Move setting of EPT MMU masks to common VT-x code
KVM: TDX: Add load_mmu_pgd method for TDX
KVM: x86/mmu: Introduce kvm_mmu_map_tdp_page() for use by TDX
KVM: TDX: Add support for find pending IRQ in a protected local APIC
KVM: x86: Assume timer IRQ was injected if APIC state is proteced
KVM: VMX: Modify NMI and INTR handlers to take intr_info as function
argument
KVM: VMX: Move NMI/exception handler to common helper
KVM: x86: Split core of hypercall emulation to helper function
KVM: TDX: Handle TDX PV MMIO hypercall
KVM: TDX: Add methods to ignore accesses to CPU state
Xiaoyao Li (1):
KVM: TDX: initialize VM with TDX specific parameters
Documentation/virt/kvm/api.rst | 30 +- .../virt/kvm/intel-tdx-layer-status.rst | 33 + Documentation/virt/kvm/intel-tdx.rst | 381 +++ Documentation/virt/kvm/tdx-tdp-mmu.rst | 466 ++++ arch/arm64/kvm/arm.c | 2 +- arch/mips/kvm/mips.c | 14 +- arch/powerpc/kvm/powerpc.c | 2 +- arch/riscv/kvm/main.c | 2 +- arch/s390/kvm/kvm-s390.c | 2 +- arch/x86/events/intel/ds.c | 1 + arch/x86/include/asm/kvm-x86-ops.h | 10 + arch/x86/include/asm/kvm_host.h | 56 +- arch/x86/include/asm/tdx.h | 67 + arch/x86/include/asm/vmx.h | 14 + arch/x86/include/uapi/asm/kvm.h | 95 + arch/x86/include/uapi/asm/vmx.h | 5 +- arch/x86/kvm/Kconfig | 4 + arch/x86/kvm/Makefile | 3 +- arch/x86/kvm/irq.c | 3 + arch/x86/kvm/lapic.c | 37 +- arch/x86/kvm/lapic.h | 2 + arch/x86/kvm/mmu.h | 42 +- arch/x86/kvm/mmu/mmu.c | 360 ++- arch/x86/kvm/mmu/mmu_internal.h | 123 +- arch/x86/kvm/mmu/paging_tmpl.h | 5 +- arch/x86/kvm/mmu/spte.c | 46 +- arch/x86/kvm/mmu/spte.h | 65 +- arch/x86/kvm/mmu/tdp_iter.c | 1 + arch/x86/kvm/mmu/tdp_iter.h | 5 +- arch/x86/kvm/mmu/tdp_mmu.c | 690 ++++- arch/x86/kvm/mmu/tdp_mmu.h | 12 +- arch/x86/kvm/svm/svm.c | 13 +- arch/x86/kvm/vmx/common.h | 174 ++ arch/x86/kvm/vmx/evmcs.c | 2 +- arch/x86/kvm/vmx/evmcs.h | 2 +- arch/x86/kvm/vmx/main.c | 1071 +++++++ arch/x86/kvm/vmx/pmu_intel.c | 39 +- arch/x86/kvm/vmx/pmu_intel.h | 28 + arch/x86/kvm/vmx/posted_intr.c | 43 +- arch/x86/kvm/vmx/posted_intr.h | 13 + arch/x86/kvm/vmx/tdx.c | 2465 +++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 275 ++ arch/x86/kvm/vmx/tdx_arch.h | 157 ++ arch/x86/kvm/vmx/tdx_errno.h | 29 + arch/x86/kvm/vmx/tdx_error.c | 22 + arch/x86/kvm/vmx/tdx_ops.h | 188 ++ arch/x86/kvm/vmx/vmenter.S | 146 + arch/x86/kvm/vmx/vmx.c | 737 ++--- arch/x86/kvm/vmx/vmx.h | 39 +- arch/x86/kvm/vmx/x86_ops.h | 235 ++ arch/x86/kvm/x86.c | 148 +- arch/x86/virt/vmx/tdx/seamcall.S | 2 + arch/x86/virt/vmx/tdx/tdx.c | 54 +- arch/x86/virt/vmx/tdx/tdx.h | 52 - include/linux/kvm_host.h | 4 +- include/uapi/linux/kvm.h | 2 + tools/arch/x86/include/uapi/asm/kvm.h | 95 + tools/include/uapi/linux/kvm.h | 1 + virt/kvm/kvm_main.c | 67 +- 59 files changed, 7877 insertions(+), 804 deletions(-) create mode 100644 Documentation/virt/kvm/intel-tdx-layer-status.rst create mode 100644 Documentation/virt/kvm/intel-tdx.rst create mode 100644 Documentation/virt/kvm/tdx-tdp-mmu.rst create mode 100644 arch/x86/kvm/vmx/common.h create mode 100644 arch/x86/kvm/vmx/main.c create mode 100644 arch/x86/kvm/vmx/pmu_intel.h create mode 100644 arch/x86/kvm/vmx/tdx.c create mode 100644 arch/x86/kvm/vmx/tdx.h create mode 100644 arch/x86/kvm/vmx/tdx_arch.h create mode 100644 arch/x86/kvm/vmx/tdx_errno.h create mode 100644 arch/x86/kvm/vmx/tdx_error.c create mode 100644 arch/x86/kvm/vmx/tdx_ops.h create mode 100644 arch/x86/kvm/vmx/x86_ops.h
Signature · 1 line
2.25.1
PATCH v7 1/102 KVM: x86: Move check_processor_compatibility from init ops to runtime ops
From: Chao Gao <[email protected]>
so that KVM can do compatibility checks on hotplugged CPUs. Drop __init from check_processor_compatibility() and its callees.
use a static_call() to invoke .check_processor_compatibility.
Opportunistically rename {svm,vmx}_check_processor_compat to conform to the naming convention of fields of kvm_x86_ops.
--- arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/kvm/svm/svm.c | 4 ++-- arch/x86/kvm/vmx/evmcs.c | 2 +- arch/x86/kvm/vmx/evmcs.h | 2 +- arch/x86/kvm/vmx/vmx.c | 14 +++++++------- arch/x86/kvm/x86.c | 3 +-- 7 files changed, 14 insertions(+), 14 deletions(-)
arch/x86/include/asm/kvm-x86-ops.h +1 -0
@@ -129,6 +129,7 @@ KVM_X86_OP(msr_filter_changed) KVM_X86_OP(complete_emulated_msr) KVM_X86_OP(vcpu_deliver_sipi_vector) KVM_X86_OP_OPTIONAL_RET0(vcpu_get_apicv_inhibit_reasons); +KVM_X86_OP(check_processor_compatibility) #undef KVM_X86_OP #undef KVM_X86_OP_OPTIONAL
arch/x86/include/asm/kvm_host.h +1 -1
@@ -1427,6 +1427,7 @@ static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)struct kvm_x86_ops {const char *name; +int (*check_processor_compatibility)(void );int (*hardware_enable)(void );void (*hardware_disable)(void );void (*hardware_unsetup)(void );
@@ -1637,7 +1638,6 @@ struct kvm_x86_nested_ops {struct kvm_x86_init_ops {int (*cpu_has_kvm_support)(void );int (*disabled_by_bios)(void ); -int (*check_processor_compatibility)(void );int (*hardware_setup)(void );unsigned int (*handle_intel_pt_intr)(void );
arch/x86/kvm/svm/svm.c +2 -2
@@ -4083,7 +4083,7 @@ svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall) hypercall[2 ] =0xd9 ; } -static int __init svm_check_processor_compat (void ) +static int svm_check_processor_compatibility (void ) {return 0 ; }
@@ -4703,6 +4703,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { .name = "kvm_amd", .hardware_unsetup = svm_hardware_unsetup, + .check_processor_compatibility = svm_check_processor_compatibility, .hardware_enable = svm_hardware_enable, .hardware_disable = svm_hardware_disable, .has_emulated_msr = svm_has_emulated_msr,
@@ -5090,7 +5091,6 @@ static struct kvm_x86_init_ops svm_init_ops __initdata = { .cpu_has_kvm_support = has_svm, .disabled_by_bios = is_disabled, .hardware_setup = svm_hardware_setup, - .check_processor_compatibility = svm_check_processor_compat, .runtime_ops = &svm_x86_ops, .pmu_ops = &amd_pmu_ops,
arch/x86/kvm/vmx/evmcs.c +1 -1
@@ -295,7 +295,7 @@ const struct evmcs_field vmcs_field_to_evmcs_1[] = {const unsigned int nr_evmcs_1_fields =ARRAY_SIZE (vmcs_field_to_evmcs_1);#if IS_ENABLED (CONFIG_HYPERV ) -__init void evmcs_sanitize_exec_ctrls (struct vmcs_config *vmcs_conf) +void evmcs_sanitize_exec_ctrls (struct vmcs_config *vmcs_conf) { vmcs_conf->cpu_based_exec_ctrl &= ~EVMCS1_UNSUPPORTED_EXEC_CTRL ; vmcs_conf->pin_based_exec_ctrl &= ~EVMCS1_UNSUPPORTED_PINCTRL ;
arch/x86/kvm/vmx/evmcs.h +1 -1
@@ -212,7 +212,7 @@ static inline void evmcs_load(u64 phys_addr) vp_ap->enlighten_vmentry =1 ; } -__init void evmcs_sanitize_exec_ctrls (struct vmcs_config *vmcs_conf); +void evmcs_sanitize_exec_ctrls (struct vmcs_config *vmcs_conf);#else /* !IS_ENABLED(CONFIG_HYPERV) */ static __always_inline void evmcs_write64(unsigned long field, u64 value) {}static inline void evmcs_write32 (unsigned long field,u32 value) {}
arch/x86/kvm/vmx/vmx.c +7 -7
@@ -2410,8 +2410,8 @@ static bool cpu_has_sgx(void)return cpuid_eax (0 ) >=0x12 && (cpuid_eax (0x12 ) &BIT (0 )); } -static __init int adjust_vmx_controls (u32 ctl_min,u32 ctl_opt, -u32 msr,u32 *result) +static int adjust_vmx_controls (u32 ctl_min,u32 ctl_opt, +u32 msr,u32 *result) {u32 vmx_msr_low, vmx_msr_high;u32 ctl = ctl_min | ctl_opt;
@@ -2429,7 +2429,7 @@ static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,return 0 ; } -static __init u64 adjust_vmx_controls64 (u64 ctl_opt,u32 msr) +static u64 adjust_vmx_controls64 (u64 ctl_opt,u32 msr) {u64 allowed;
@@ -2438,8 +2438,8 @@ static __init u64 adjust_vmx_controls64(u64 ctl_opt, u32 msr)return ctl_opt & allowed; } -static __init int setup_vmcs_config (struct vmcs_config *vmcs_conf, -struct vmx_capability *vmx_cap) +static int setup_vmcs_config (struct vmcs_config *vmcs_conf, +struct vmx_capability *vmx_cap) {u32 vmx_msr_low, vmx_msr_high;u32 min, opt, min2, opt2;
@@ -7318,7 +7318,7 @@ static int vmx_vm_init(struct kvm *kvm)return 0 ; } -static int __init vmx_check_processor_compat (void ) +static int vmx_check_processor_compatibility (void ) {struct vmcs_config vmcs_conf;struct vmx_capability vmx_cap;
@@ -7928,6 +7928,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { .hardware_unsetup = vmx_hardware_unsetup, + .check_processor_compatibility = vmx_check_processor_compatibility, .hardware_enable = vmx_hardware_enable, .hardware_disable = vmx_hardware_disable, .has_emulated_msr = vmx_has_emulated_msr,
@@ -8316,7 +8317,6 @@ static __init int hardware_setup(void)static struct kvm_x86_init_ops vmx_init_ops__initdata = { .cpu_has_kvm_support = cpu_has_kvm_support, .disabled_by_bios = vmx_disabled_by_bios, - .check_processor_compatibility = vmx_check_processor_compat, .hardware_setup = hardware_setup, .handle_intel_pt_intr =NULL ,
arch/x86/kvm/x86.c +1 -2
@@ -11802,7 +11802,6 @@ void kvm_arch_hardware_unsetup(void)int kvm_arch_check_processor_compat (void *opaque) {struct cpuinfo_x86 *c = &cpu_data (smp_processor_id ()); -struct kvm_x86_init_ops *ops = opaque;WARN_ON (!irqs_disabled ());
@@ -11810,7 +11809,7 @@ int kvm_arch_check_processor_compat(void *opaque) __cr4_reserved_bits(cpu_has, &boot_cpu_data)) return -EIO; -return ops->check_processor_compatibility (); +return static_call (kvm_x86_check_processor_compatibility)(); }bool kvm_vcpu_is_reset_bsp (struct kvm_vcpu *vcpu)
Signature · 1 line
2.25.1
PATCH v7 2/102 Partially revert "KVM: Pass kvm_init()'s opaque param to additional arch funcs"
In reply to [email protected]From: Chao Gao <[email protected]>
This partially reverts commit b99040853738 ("KVM: Pass kvm_init()'s opaque param to additional arch funcs") remove opaque from kvm_arch_check_processor_compat because no one uses this opaque now. Address conflicts for ARM (due to file movement) and manually handle RISC-V which comes after the commit.
And changes about kvm_arch_hardware_setup() in original commit are still needed so they are not reverted.
--- arch/arm64/kvm/arm.c | 2 +- arch/mips/kvm/mips.c | 2 +- arch/powerpc/kvm/powerpc.c | 2 +- arch/riscv/kvm/main.c | 2 +- arch/s390/kvm/kvm-s390.c | 2 +- arch/x86/kvm/x86.c | 2 +- include/linux/kvm_host.h | 2 +- virt/kvm/kvm_main.c | 16 +++------------- 8 files changed, 10 insertions(+), 20 deletions(-)
arch/arm64/kvm/arm.c +1 -1
@@ -68,7 +68,7 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return 0 ; }
arch/mips/kvm/mips.c +1 -1
@@ -140,7 +140,7 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return 0 ; }
arch/powerpc/kvm/powerpc.c +1 -1
@@ -446,7 +446,7 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return kvmppc_core_check_processor_compat (); }
arch/riscv/kvm/main.c +1 -1
@@ -20,7 +20,7 @@ long kvm_arch_dev_ioctl(struct file *filp,return -EINVAL ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return 0 ; }
arch/s390/kvm/kvm-s390.c +1 -1
@@ -251,7 +251,7 @@ int kvm_arch_hardware_enable(void)return 0 ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return 0 ; }
arch/x86/kvm/x86.c +1 -1
@@ -11799,7 +11799,7 @@ void kvm_arch_hardware_unsetup(void)static_call (kvm_x86_hardware_unsetup)(); } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {struct cpuinfo_x86 *c = &cpu_data (smp_processor_id ());
include/linux/kvm_host.h +1 -1
@@ -1442,7 +1442,7 @@ int kvm_arch_hardware_enable(void);void kvm_arch_hardware_disable (void );int kvm_arch_hardware_setup (void *opaque);void kvm_arch_hardware_unsetup (void ); -int kvm_arch_check_processor_compat (void *opaque); +int kvm_arch_check_processor_compat (void );int kvm_arch_vcpu_runnable (struct kvm_vcpu *vcpu);bool kvm_arch_vcpu_in_kernel (struct kvm_vcpu *vcpu);int kvm_arch_vcpu_should_kick (struct kvm_vcpu *vcpu);
virt/kvm/kvm_main.c +3 -13
@@ -5697,22 +5697,14 @@ void kvm_unregister_perf_callbacks(void) }#endif -struct kvm_cpu_compat_check { -void *opaque; -int *ret; -}; - -static void check_processor_compat (void *data) +static void check_processor_compat (void *rtn) { -struct kvm_cpu_compat_check *c = data; - - *c->ret =kvm_arch_check_processor_compat (c->opaque); + *(int *)rtn =kvm_arch_check_processor_compat (); }int kvm_init (void *opaque,unsigned vcpu_size,unsigned vcpu_align,struct module *module) { -struct kvm_cpu_compat_check c;int r;int cpu;
@@ -5740,10 +5732,8 @@ int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,if (r <0 ) goto out_free_1; - c.ret = &r; - c.opaque = opaque;for_each_online_cpu (cpu) { -smp_call_function_single (cpu, check_processor_compat, &c,1 ); +smp_call_function_single (cpu, check_processor_compat, &r,1 );if (r <0 ) goto out_free_2; }
Signature · 1 line
2.25.1
Re: [PATCH v7 002/102] Partially revert "KVM: Pass kvm_init()'s opaque param to additional arch funcs"
Quoted 10 lines · On Mon, 2022-06-27 at 14:52 -0700, [email protected] wrote:
From: Chao Gao <[email protected]>
This partially reverts commit
b99040853738("KVM: Pass kvm_init()'s opaque param to additional arch funcs") remove opaque fromkvm_arch_check_processor_compatbecause no one uses this opaque now. Address conflicts for ARM (due to file movement) and manually handle RISC-V which comes after the commit.And changes about
kvm_arch_hardware_setup()in original commit are still needed so they are not reverted.
I tried to dig the history to find out why we are doing this.
IMHO it's better to give a reason why you need to revert the opaque. I guess no one uses this opaque now doesn't mean we need to remove it?
Perhaps you should mention this is a preparation to hardware_enable_all()/hardware_disable_all() during module loading time. Instead of extending hardware_enable_all()/hardware_disable_all() to take the opaque and pass to kvm_arch_check_process_compat(), just remove the opaque.
Or perhaps just merge this patch to next one?
Quoted 151 lines
Signed-off-by Chao Gao <[email protected]>Reviewed-by Sean Christopherson <[email protected]>Reviewed-by Suzuki K Poulose <[email protected]>Acked-by Anup Patel <[email protected]>Acked-by Claudio Imbrenda <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/arm64/kvm/arm.c | 2 +- arch/mips/kvm/mips.c | 2 +- arch/powerpc/kvm/powerpc.c | 2 +- arch/riscv/kvm/main.c | 2 +- arch/s390/kvm/kvm-s390.c | 2 +- arch/x86/kvm/x86.c | 2 +- include/linux/kvm_host.h | 2 +- virt/kvm/kvm_main.c | 16 +++------------- 8 files changed, 10 insertions(+), 20 deletions(-)arch/arm64/kvm/arm.c +1
-1@@ -68,7 +68,7 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return 0 ; }arch/mips/kvm/mips.c +1
-1@@ -140,7 +140,7 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return 0 ; }arch/powerpc/kvm/powerpc.c +1
-1@@ -446,7 +446,7 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return kvmppc_core_check_processor_compat (); }arch/riscv/kvm/main.c +1
-1@@ -20,7 +20,7 @@ long kvm_arch_dev_ioctl(struct file *filp,return -EINVAL ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return 0 ; }arch/s390/kvm/kvm-s390.c +1
-1@@ -251,7 +251,7 @@ int kvm_arch_hardware_enable(void)return 0 ; } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {return 0 ; }arch/x86/kvm/x86.c +1
-1@@ -11799,7 +11799,7 @@ void kvm_arch_hardware_unsetup(void)static_call (kvm_x86_hardware_unsetup)(); } -int kvm_arch_check_processor_compat (void *opaque) +int kvm_arch_check_processor_compat (void ) {struct cpuinfo_x86 *c = &cpu_data (smp_processor_id ());include/linux/kvm_host.h +1
-1@@ -1442,7 +1442,7 @@ int kvm_arch_hardware_enable(void);void kvm_arch_hardware_disable (void );int kvm_arch_hardware_setup (void *opaque);void kvm_arch_hardware_unsetup (void ); -int kvm_arch_check_processor_compat (void *opaque); +int kvm_arch_check_processor_compat (void );int kvm_arch_vcpu_runnable (struct kvm_vcpu *vcpu);bool kvm_arch_vcpu_in_kernel (struct kvm_vcpu *vcpu);int kvm_arch_vcpu_should_kick (struct kvm_vcpu *vcpu);virt/kvm/kvm_main.c +3
-13@@ -5697,22 +5697,14 @@ void kvm_unregister_perf_callbacks(void) }#endif -struct kvm_cpu_compat_check { -void *opaque; -int *ret; -}; - -static void check_processor_compat (void *data) +static void check_processor_compat (void *rtn) { -struct kvm_cpu_compat_check *c = data; - - *c->ret =kvm_arch_check_processor_compat (c->opaque); + *(int *)rtn =kvm_arch_check_processor_compat (); }int kvm_init (void *opaque,unsigned vcpu_size,unsigned vcpu_align,struct module *module) { -struct kvm_cpu_compat_check c;int r;int cpu;@@ -5740,10 +5732,8 @@ int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,if (r <0 ) goto out_free_1; - c.ret = &r; - c.opaque = opaque;for_each_online_cpu (cpu) { -smp_call_function_single (cpu, check_processor_compat, &c,1 ); +smp_call_function_single (cpu, check_processor_compat, &r,1 );if (r <0 ) goto out_free_2; }
Re: [PATCH v7 002/102] Partially revert "KVM: Pass kvm_init()'s opaque param to additional arch funcs"
Quoted 17 lines · Kai Huang
Quoted 10 lines · On Mon, 2022-06-27 at 14:52 -0700, [email protected] wrote:
From: Chao Gao <[email protected]>
This partially reverts commit
b99040853738("KVM: Pass kvm_init()'s opaque param to additional arch funcs") remove opaque fromkvm_arch_check_processor_compatbecause no one uses this opaque now. Address conflicts for ARM (due to file movement) and manually handle RISC-V which comes after the commit.And changes about
kvm_arch_hardware_setup()in original commit are still needed so they are not reverted.I tried to dig the history to find out why we are doing this.
IMHO it's better to give a reason why you need to revert the opaque. I guess no one uses this opaque now doesn't mean we need to remove it?
Quoted 6 lines
Perhaps you should mention this is a preparation to hardware_enable_all()/hardware_disable_all() during module loading time. Instead of extending hardware_enable_all()/hardware_disable_all() to take the opaque and pass to
kvm_arch_check_process_compat(), just remove the opaque.Or perhaps just merge this patch to next one?
Here is the updated commit message.
Partially revert "KVM: Pass kvm_init()'s opaque param to additional arch funcs"
This partially reverts commit b99040853738 ("KVM: Pass kvm_init()'s opaque param to additional arch funcs") remove opaque from kvm_arch_check_processor_compat because no one uses this opaque now. Address conflicts for ARM (due to file movement) and manually handle RISC-V which comes after the commit. The change about kvm_arch_hardware_setup() in original commit are still needed so they are not reverted.
The current implementation enables hardware (e.g. enable VMX on all CPUs), arch-specific initialization for VM creation, and disables hardware (in x86, disable VMX on all CPUs) for last VM destruction.
TDX requires its initialization on loading KVM module with VMX enabled on all available CPUs. It needs to enable/disable hardware on module initialization. To reuse the same logic, one way is to pass around the unused opaque argument, another way is to remove the unused opaque argument. This patch is a preparation for the latter by removing the argument.
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 3/102 KVM: Refactor CPU compatibility check on module initialiization
In reply to [email protected]From: Isaku Yamahata <[email protected]>
Although non-x86 arch doesn't break as long as I inspected code, it's by code inspection. This should be reviewed by each arch maintainers.
kvm_init() checks CPU compatibility by calling kvm_arch_check_processor_compat() on all online CPUs. Move the callback to hardware_enable_nolock() and add hardware_enable_all() and hardware_disable_all().
Add arch specific callback kvm_arch_post_hardware_enable_setup() for arch to do arch specific initialization that required hardware_enable_all(). This makes a room for TDX module to initialize on kvm module loading. TDX module requires all online cpu to enable VMX by VMXON.
If kvm_arch_hardware_enable/disable() depend on (*) part, such dependency must be called before kvm_init(). In fact kvm_intel() does. Although other arch doesn't as long as I checked as follows, it should be reviewed by each arch maintainers.
Before this patch:
- Arch module initialization
- kvm_init()
- kvm_arch_init()
- kvm_arch_check_processor_compat() on each CPUs
- post arch specific initialization ---- (*)
- when creating/deleting first/last VM
- kvm_arch_hardware_enable() on each CPUs --- (A)
- kvm_arch_hardware_disable() on each CPUs --- (B)
After this patch:
- Arch module initialization
- kvm_init()
- kvm_arch_init()
- kvm_arch_hardware_enable() on each CPUs (A)
- kvm_arch_check_processor_compat() on each CPUs
- kvm_arch_hardware_disable() on each CPUs (B)
- post arch specific initialization --- (*)
Code inspection result:
(A)/(B) can depend on (*) before this patch. If there is dependency, such initialization must be moved before kvm_init() with this patch. VMX does in fact. As long as I inspected other archs and find only mips has it.
- arch/mips/kvm/mips.c
module init function, kvm_mips_init(), does some initialization after kvm_init(). Compile test only. Needs review.
- arch/x86/kvm/x86.c
- uses vm_list which is statically initialized.
- static_call(kvm_x86_hardware_enable)();
- SVM: (*) is empty.
- VMX: needs fix
- arch/powerpc/kvm/powerpc.c
kvm_arch_hardware_enable/disable() are nop
- arch/s390/kvm/kvm-s390.c
kvm_arch_hardware_enable/disable() are nop
- arch/arm64/kvm/arm.c
module init function, arm_init(), calls only kvm_init(). (*) is empty
- arch/riscv/kvm/main.c
module init function, riscv_kvm_init(), calls only kvm_init(). (*) is empty
--- arch/mips/kvm/mips.c | 12 +++++++----- arch/x86/kvm/vmx/vmx.c | 15 +++++++++++---- include/linux/kvm_host.h | 1 + virt/kvm/kvm_main.c | 25 ++++++++++++++++++------- 4 files changed, 37 insertions(+), 16 deletions(-)
arch/mips/kvm/mips.c +7 -5
@@ -1643,11 +1643,6 @@ static int __init kvm_mips_init(void) } ret =kvm_mips_entry_setup (); -if (ret) -return ret; - - ret =kvm_init (NULL ,sizeof (struct kvm_vcpu ),0 ,THIS_MODULE ); -if (ret)return ret;
@@ -1656,6 +1651,13 @@ static int __init kvm_mips_init(void)register_die_notifier (&kvm_mips_csr_die_notifier); + ret =kvm_init (NULL ,sizeof (struct kvm_vcpu ),0 ,THIS_MODULE ); + +if (ret) { +unregister_die_notifier (&kvm_mips_csr_die_notifier); +return ret; + } +return 0 ; }
arch/x86/kvm/vmx/vmx.c +11 -4
@@ -8372,6 +8372,15 @@ static void vmx_exit(void) }module_exit (vmx_exit); +/* initialize before kvm_init() so that hardware_enable/disable() can work. */ +static void __init vmx_init_early (void ) +{ +int cpu; + +for_each_possible_cpu (cpu) +INIT_LIST_HEAD (&per_cpu (loaded_vmcss_on_cpu, cpu)); +} +static int __init vmx_init (void ) {int r, cpu;
@@ -8409,6 +8418,7 @@ static int __init vmx_init(void) }#endif +vmx_init_early (); r =kvm_init (&vmx_init_ops,sizeof (struct vcpu_vmx ), __alignof__(struct vcpu_vmx ),THIS_MODULE );if (r)
@@ -8427,11 +8437,8 @@ static int __init vmx_init(void)return r; } -for_each_possible_cpu (cpu) { -INIT_LIST_HEAD (&per_cpu (loaded_vmcss_on_cpu, cpu)); - +for_each_possible_cpu (cpu)pi_init_cpu (cpu); - }#ifdef CONFIG_KEXEC_CORE rcu_assign_pointer(crash_vmclear_loaded_vmcss,
include/linux/kvm_host.h +1 -0
@@ -1441,6 +1441,7 @@ void kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu, struct dentry *debugfs_int kvm_arch_hardware_enable (void );void kvm_arch_hardware_disable (void );int kvm_arch_hardware_setup (void *opaque); +int kvm_arch_post_hardware_enable_setup (void *opaque);void kvm_arch_hardware_unsetup (void );int kvm_arch_check_processor_compat (void );int kvm_arch_vcpu_runnable (struct kvm_vcpu *vcpu);
virt/kvm/kvm_main.c +18 -7
@@ -4899,8 +4899,13 @@ static void hardware_enable_nolock(void *junk)cpumask_set_cpu (cpu, cpus_hardware_enabled); + r =kvm_arch_check_processor_compat (); +if (r) + goto out; + r =kvm_arch_hardware_enable (); +out:if (r) {cpumask_clear_cpu (cpu, cpus_hardware_enabled);atomic_inc (&hardware_enable_failed);
@@ -5697,9 +5702,9 @@ void kvm_unregister_perf_callbacks(void) }#endif -static void check_processor_compat (void *rtn) +__weak int kvm_arch_post_hardware_enable_setup (void *opaque) { - *(int *)rtn =kvm_arch_check_processor_compat (); +return 0 ; } int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,
@@ -5732,11 +5737,17 @@ int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,if (r <0 ) goto out_free_1; -for_each_online_cpu (cpu) { -smp_call_function_single (cpu, check_processor_compat, &r,1 ); -if (r <0 ) - goto out_free_2; - } +/* hardware_enable_nolock() checks CPU compatibility on each CPUs. */ + r =hardware_enable_all (); +if (r) + goto out_free_2; +/* +* Arch specific initialization that requires to enable virtualization +* feature. e.g. TDX module initialization requires VMXON on all +* present CPUs. +*/ +kvm_arch_post_hardware_enable_setup (opaque); +hardware_disable_all (); r =cpuhp_setup_state_nocalls (CPUHP_AP_KVM_STARTING ,"kvm/cpu:starting" , kvm_starting_cpu, kvm_dying_cpu);
Signature · 1 line
2.25.1
Re: [PATCH v7 003/102] KVM: Refactor CPU compatibility check on module initialiization
Quoted 200 lines · On Mon, 2022-06-27 at 14:52 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
Although non-x86 arch doesn't break as long as I inspected code, it's by code inspection. This should be reviewed by each arch maintainers.
kvm_init()checks CPU compatibility by callingkvm_arch_check_processor_compat()on all online CPUs. Move the callback tohardware_enable_nolock()and addhardware_enable_all()andhardware_disable_all().
Add arch specific callbackkvm_arch_post_hardware_enable_setup()for arch to do arch specific initialization that requiredhardware_enable_all(). This makes a room for TDX module to initialize on kvm module loading. TDX module requires all online cpu to enable VMX by VMXON.If kvm_arch_hardware_enable/disable() depend on (*) part, such dependency must be called before
kvm_init(). In factkvm_intel()does. Although other arch doesn't as long as I checked as follows, it should be reviewed by each arch maintainers.Before this patch:
- Arch module initialization
-kvm_init()
-kvm_arch_init()
-kvm_arch_check_processor_compat()on each CPUs
- post arch specific initialization ---- (*)- when creating/deleting first/last VM
-kvm_arch_hardware_enable()on each CPUs --- (A)
-kvm_arch_hardware_disable()on each CPUs --- (B)After this patch:
- Arch module initialization
-kvm_init()
-kvm_arch_init()
-kvm_arch_hardware_enable()on each CPUs (A)
-kvm_arch_check_processor_compat()on each CPUs
-kvm_arch_hardware_disable()on each CPUs (B)
- post arch specific initialization --- (*)Code inspection result:
(A)/(B) can depend on (*) before this patch. If there is dependency, such initialization must be moved beforekvm_init()with this patch. VMX does in fact. As long as I inspected other archs and find only mips has it.-
arch/mips/kvm/mips.c
module init function,kvm_mips_init(), does some initialization afterkvm_init(). Compile test only. Needs review.-
arch/x86/kvm/x86.c
- usesvm_listwhich is statically initialized.
- static_call(kvm_x86_hardware_enable)();
- SVM: (*) is empty.
- VMX: needs fix-
arch/powerpc/kvm/powerpc.c
kvm_arch_hardware_enable/disable() are nop-
arch/s390/kvm/kvm-s390.c
kvm_arch_hardware_enable/disable() are nop-
arch/arm64/kvm/arm.c
module init function,arm_init(), calls onlykvm_init(). (*) is empty-
arch/riscv/kvm/main.c
module init function,riscv_kvm_init(), calls onlykvm_init(). (*) is emptyCo-developed-by Sean Christopherson <[email protected]>Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/mips/kvm/mips.c | 12 +++++++----- arch/x86/kvm/vmx/vmx.c | 15 +++++++++++---- include/linux/kvm_host.h | 1 + virt/kvm/kvm_main.c | 25 ++++++++++++++++++------- 4 files changed, 37 insertions(+), 16 deletions(-)arch/mips/kvm/mips.c +7
-5@@ -1643,11 +1643,6 @@ static int __init kvm_mips_init(void) } ret =kvm_mips_entry_setup (); -if (ret) -return ret; - - ret =kvm_init (NULL ,sizeof (struct kvm_vcpu ),0 ,THIS_MODULE ); -if (ret)return ret;@@ -1656,6 +1651,13 @@ static int __init kvm_mips_init(void)register_die_notifier (&kvm_mips_csr_die_notifier); + ret =kvm_init (NULL ,sizeof (struct kvm_vcpu ),0 ,THIS_MODULE ); + +if (ret) { +unregister_die_notifier (&kvm_mips_csr_die_notifier); +return ret; + } +return 0 ; }arch/x86/kvm/vmx/vmx.c +11
-4@@ -8372,6 +8372,15 @@ static void vmx_exit(void) }module_exit (vmx_exit); +/* initialize before kvm_init() so that hardware_enable/disable() can work. */ +static void __init vmx_init_early (void ) +{ +int cpu; + +for_each_possible_cpu (cpu) +INIT_LIST_HEAD (&per_cpu (loaded_vmcss_on_cpu, cpu)); +} +static int __init vmx_init (void ) {int r, cpu;@@ -8409,6 +8418,7 @@ static int __init vmx_init(void) }#endif +vmx_init_early (); r =kvm_init (&vmx_init_ops,sizeof (struct vcpu_vmx ), __alignof__(struct vcpu_vmx ),THIS_MODULE );if (r)@@ -8427,11 +8437,8 @@ static int __init vmx_init(void)return r; } -for_each_possible_cpu (cpu) { -INIT_LIST_HEAD (&per_cpu (loaded_vmcss_on_cpu, cpu)); - +for_each_possible_cpu (cpu)pi_init_cpu (cpu); - }#ifdef CONFIG_KEXEC_CORE rcu_assign_pointer(crash_vmclear_loaded_vmcss,include/linux/kvm_host.h +1
-0@@ -1441,6 +1441,7 @@ void kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu, struct dentry *debugfs_int kvm_arch_hardware_enable (void );void kvm_arch_hardware_disable (void );int kvm_arch_hardware_setup (void *opaque); +int kvm_arch_post_hardware_enable_setup (void *opaque);void kvm_arch_hardware_unsetup (void );int kvm_arch_check_processor_compat (void );int kvm_arch_vcpu_runnable (struct kvm_vcpu *vcpu);virt/kvm/kvm_main.c +7
-7@@ -4899,8 +4899,13 @@ static void hardware_enable_nolock(void *junk)cpumask_set_cpu (cpu, cpus_hardware_enabled); + r =kvm_arch_check_processor_compat (); +if (r) + goto out; + r =kvm_arch_hardware_enable (); +out:if (r) {cpumask_clear_cpu (cpu, cpus_hardware_enabled);atomic_inc (&hardware_enable_failed);@@ -5697,9 +5702,9 @@ void kvm_unregister_perf_callbacks(void) }#endif -static void check_processor_compat (void *rtn) +__weak int kvm_arch_post_hardware_enable_setup (void *opaque) { - *(int *)rtn =kvm_arch_check_processor_compat (); +return 0 ; } int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,@@ -5732,11 +5737,17 @@ int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,if (r <0 ) goto out_free_1; -for_each_online_cpu (cpu) { -smp_call_function_single (cpu, check_processor_compat, &r,1 ); -if (r <0 ) - goto out_free_2; - }
virt/kvm/kvm_main.c int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align, · line 5749
Quoted 10 lines
virt/kvm/kvm_main.c +10
-0+/* hardware_enable_nolock() checks CPU compatibility on each CPUs. */ + r =hardware_enable_all (); +if (r) + goto out_free_2; +/* +* Arch specific initialization that requires to enable virtualization +* feature. e.g. TDX module initialization requires VMXON on all +* present CPUs. +*/ +kvm_arch_post_hardware_enable_setup (opaque);
Please see my reply to your patch "KVM: TDX: Initialize TDX module when loading kvm_intel.ko".
The introduce of __weak kvm_arch_post_hardware_enable_setup() should be in that patch since it has nothing to do the job you claimed to do in this patch.
And by removing it, this patch can be taken out of TDX series and upstreamed separately.
Quoted 4 lines
virt/kvm/kvm_main.c +1
-0+hardware_disable_all (); r =cpuhp_setup_state_nocalls (CPUHP_AP_KVM_STARTING ,"kvm/cpu:starting" , kvm_starting_cpu, kvm_dying_cpu);
Re: [PATCH v7 003/102] KVM: Refactor CPU compatibility check on module initialiization
Quoted 15 lines
virt/kvm/kvm_main.c int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align, · line 5749
Quoted 11 lines
virt/kvm/kvm_main.c +10
-0+/* hardware_enable_nolock() checks CPU compatibility on each CPUs. */ + r =hardware_enable_all (); +if (r) + goto out_free_2; +/* +* Arch specific initialization that requires to enable virtualization +* feature. e.g. TDX module initialization requires VMXON on all +* present CPUs. +*/ +kvm_arch_post_hardware_enable_setup (opaque);Please see my reply to your patch "KVM: TDX: Initialize TDX module when loading kvm_intel.ko".
Quoted 5 lines
The introduce of
__weakkvm_arch_post_hardware_enable_setup()should be in that patch since it has nothing to do the job you claimed to do in this patch.And by removing it, this patch can be taken out of TDX series and upstreamed separately.
I tried to dig more about the history. Please see my another reply and ignore this.
Re: [PATCH v7 003/102] KVM: Refactor CPU compatibility check on module initialiization
In reply to [email protected]Quoted 4 lines · On Mon, 2022-06-27 at 14:52 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
Although non-x86 arch doesn't break as long as I inspected code, it's by code inspection. This should be reviewed by each arch maintainers.
This first paragraph doesn't make sense to me. At this moment, we don't know why you need this patch at all.
Quoted 4 lines
kvm_init()checks CPU compatibility by callingkvm_arch_check_processor_compat()on all online CPUs.
What's the problem here which requires you need to do ..
Quoted 3 lines
Move the callback
tohardware_enable_nolock()and addhardware_enable_all()andhardware_disable_all().
.. this?
Quoted 4 lines
Add arch specific callback
kvm_arch_post_hardware_enable_setup()for arch to do arch specific initialization that requiredhardware_enable_all(). This makes a room for TDX module to initialize on kvm module loading. TDX module requires all online cpu to enable VMX by VMXON.
So to me this is the reason why you need to do hardware_enable_all() in kvm_init(). There's nothing wrong with "kvm_init() checks CPU compatibility by calling kvm_arch_check_processor_compat() on all online CPUs", right?
In this case, shouldn't we say something like "opportunistically move kvm_arch_check_processor_compat() to hardware_enable_nolock()" because this is not the reason that you want this patch, correct?
Also, maybe I am missing something obviously, but why do you need to do hardware_disable_all() right after hardware_enable_all() in kvm_init()? Could you at least put some explanation in the changelog?
And again, it's better to add one sentence or so to explain why do you want to init TDX module during module loading time.
Quoted 4 lines
If kvm_arch_hardware_enable/disable() depend on (*) part, such dependency must be called before
kvm_init().
I don't follow the logic here. If kvm_arch_hardware_enable() depends on something, then you need to put kvm_arch_hardware_enable() after that, or move that forward. But why such dependency must be called "before kvm_init()"?
Also, I think you are talking about the problem that _after_ you move hardware_enable_all() to kvm_init(), but not problem in existing code, right?
Quoted 2 lines
In fact
kvm_intel()does.
No such function kvm_intel().
Again, what's the issue here? Can you add more sentences to explain the _problem_, or _why_?
Quoted 15 lines
Although
other arch doesn't as long as I checked as follows, it should be reviewed by each arch maintainers.Before this patch:
- Arch module initialization
-kvm_init()
-kvm_arch_init()
-kvm_arch_check_processor_compat()on each CPUs
- post arch specific initialization ---- (*)- when creating/deleting first/last VM
-kvm_arch_hardware_enable()on each CPUs --- (A)
-kvm_arch_hardware_disable()on each CPUs --- (B)
Quoted 6 lines
After this patch:
- Arch module initialization
-kvm_init()
-kvm_arch_init()
-kvm_arch_hardware_enable()on each CPUs (A)
-kvm_arch_check_processor_compat()on each CPUs
Even with this patch, unless I am seeing mistakenly, kvm_arch_hardware_enable() is called _after_ kvm_arch_check_processor_compat().
Quoted 7 lines
-
kvm_arch_hardware_disable()on each CPUs (B)
- post arch specific initialization --- (*)Code inspection result:
(A)/(B) can depend on (*) before this patch. If there is dependency, such initialization must be moved beforekvm_init()with this patch.
Must be moved to before (A)/(B), right?
Quoted 3 lines
VMX does
in fact.
More details will help, please.
Quoted 5 lines
As long as I inspected other archs and find only mips has it.
-
arch/mips/kvm/mips.c
module init function,kvm_mips_init(), does some initialization afterkvm_init(). Compile test only. Needs review.
Is "Needs review" changelog material?
Quoted 3 lines
-
arch/x86/kvm/x86.c
- usesvm_listwhich is statically initialized.
I can hardly see how "vm_list is statically initialized" is causing any problem here. Exactly what's the problem here??
Quoted 3 lines
- static_call(kvm_x86_hardware_enable)();
- SVM: (*) is empty.
- VMX: needs fix
What's the problem, and how are you going to fix? Shouldn't this be in changelog?
Quoted 42 lines
-
arch/powerpc/kvm/powerpc.c
kvm_arch_hardware_enable/disable() are nop-
arch/s390/kvm/kvm-s390.c
kvm_arch_hardware_enable/disable() are nop-
arch/arm64/kvm/arm.c
module init function,arm_init(), calls onlykvm_init(). (*) is empty-
arch/riscv/kvm/main.c
module init function,riscv_kvm_init(), calls onlykvm_init(). (*) is emptyCo-developed-by Sean Christopherson <[email protected]>Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/mips/kvm/mips.c | 12 +++++++----- arch/x86/kvm/vmx/vmx.c | 15 +++++++++++---- include/linux/kvm_host.h | 1 + virt/kvm/kvm_main.c | 25 ++++++++++++++++++------- 4 files changed, 37 insertions(+), 16 deletions(-)arch/mips/kvm/mips.c +0
-5@@ -1643,11 +1643,6 @@ static int __init kvm_mips_init(void) } ret =kvm_mips_entry_setup (); -if (ret) -return ret; - - ret =kvm_init (NULL ,sizeof (struct kvm_vcpu ),0 ,THIS_MODULE ); -if (ret)return ret;
arch/mips/kvm/mips.c static int __init kvm_mips_init(void) · line 1660
Quoted 10 lines
arch/mips/kvm/mips.c +7
-0@@ -1656,6 +1651,13 @@ static int __init kvm_mips_init(void)register_die_notifier (&kvm_mips_csr_die_notifier); + ret =kvm_init (NULL ,sizeof (struct kvm_vcpu ),0 ,THIS_MODULE ); + +if (ret) { +unregister_die_notifier (&kvm_mips_csr_die_notifier); +return ret; + } +
I don't understand how moving "hardware_enable_all()/hardware_disable_all()" to kvm_init() is related to this change.
Anyway, at least some comments?
arch/x86/kvm/vmx/vmx.c static void vmx_exit(void) · line 8375
Quoted 12 lines
arch/mips/kvm/mips.c +0
-0return 0 ; }arch/x86/kvm/vmx/vmx.c +1
-0@@ -8372,6 +8372,15 @@ static void vmx_exit(void) }module_exit (vmx_exit); +/* initialize before kvm_init() so that hardware_enable/disable() can work. */
There's no function named hardware_enable() or hardware_disable().
arch/x86/kvm/vmx/vmx.c static void vmx_exit(void) · line 8383
Quoted 8 lines
arch/x86/kvm/vmx/vmx.c +8
-0+static void __init vmx_init_early (void ) +{ +int cpu; + +for_each_possible_cpu (cpu) +INIT_LIST_HEAD (&per_cpu (loaded_vmcss_on_cpu, cpu)); +} +
Perhaps I am missing something, but I couldn't see why this must be done before kvm_init(). Please give some comments?
Quoted 75 lines
arch/x86/kvm/vmx/vmx.c +2
-4static int __init vmx_init (void ) {int r, cpu;@@ -8409,6 +8418,7 @@ static int __init vmx_init(void) }#endif +vmx_init_early (); r =kvm_init (&vmx_init_ops,sizeof (struct vcpu_vmx ), __alignof__(struct vcpu_vmx ),THIS_MODULE );if (r)@@ -8427,11 +8437,8 @@ static int __init vmx_init(void)return r; } -for_each_possible_cpu (cpu) { -INIT_LIST_HEAD (&per_cpu (loaded_vmcss_on_cpu, cpu)); - +for_each_possible_cpu (cpu)pi_init_cpu (cpu); - }#ifdef CONFIG_KEXEC_CORE rcu_assign_pointer(crash_vmclear_loaded_vmcss,include/linux/kvm_host.h +1
-0@@ -1441,6 +1441,7 @@ void kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu, struct dentry *debugfs_int kvm_arch_hardware_enable (void );void kvm_arch_hardware_disable (void );int kvm_arch_hardware_setup (void *opaque); +int kvm_arch_post_hardware_enable_setup (void *opaque);void kvm_arch_hardware_unsetup (void );int kvm_arch_check_processor_compat (void );int kvm_arch_vcpu_runnable (struct kvm_vcpu *vcpu);virt/kvm/kvm_main.c +7
-7@@ -4899,8 +4899,13 @@ static void hardware_enable_nolock(void *junk)cpumask_set_cpu (cpu, cpus_hardware_enabled); + r =kvm_arch_check_processor_compat (); +if (r) + goto out; + r =kvm_arch_hardware_enable (); +out:if (r) {cpumask_clear_cpu (cpu, cpus_hardware_enabled);atomic_inc (&hardware_enable_failed);@@ -5697,9 +5702,9 @@ void kvm_unregister_perf_callbacks(void) }#endif -static void check_processor_compat (void *rtn) +__weak int kvm_arch_post_hardware_enable_setup (void *opaque) { - *(int *)rtn =kvm_arch_check_processor_compat (); +return 0 ; } int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,@@ -5732,11 +5737,17 @@ int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,if (r <0 ) goto out_free_1; -for_each_online_cpu (cpu) { -smp_call_function_single (cpu, check_processor_compat, &r,1 ); -if (r <0 ) - goto out_free_2; - }
virt/kvm/kvm_main.c int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align, · line 5749
Quoted 10 lines
virt/kvm/kvm_main.c +10
-0+/* hardware_enable_nolock() checks CPU compatibility on each CPUs. */ + r =hardware_enable_all (); +if (r) + goto out_free_2; +/* +* Arch specific initialization that requires to enable virtualization +* feature. e.g. TDX module initialization requires VMXON on all +* present CPUs. +*/ +kvm_arch_post_hardware_enable_setup (opaque);
So after digging history and looking at the code again, I guess perhaps it's also fine to introduce this __weak version here (since you have given the reason to do so in changelog), but in this way perhaps it's better to put this patch and the patch to load TDX module closely so it's easier to review.
Or to me it's also fine to move this chunk to the patch to init TDX module as I replied before.
virt/kvm/kvm_main.c int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align, · line 5750
Quoted 1 line
virt/kvm/kvm_main.c +1
-0+hardware_disable_all ();
IMO needs a comment why do we need to do hardware_disable_all() here. It doesn't make a lot sense to me.
Quoted 3 lines
virt/kvm/kvm_main.c +0
-0r =cpuhp_setup_state_nocalls (CPUHP_AP_KVM_STARTING ,"kvm/cpu:starting" , kvm_starting_cpu, kvm_dying_cpu);
Re: [PATCH v7 003/102] KVM: Refactor CPU compatibility check on module initialiization
In reply to [email protected]Here is the updated version.
commit 7d042749b631f668ed9e99044228f16c212161bc
Author: Isaku Yamahata <[email protected]> Date: Fri Apr 22 16:56:51 2022 -0700
KVM: Refactor CPU compatibility check on module initialization
TDX module requires its initialization. It requires VMX to be enabled. Although there are several options of when to initialize it, the choice is the initialization time of the KVM kernel module. There is no usable arch-specific hook for the TDX module to utilize during the KVM kernel module initialization. The code doesn't enable/disable hardware (VMX in TDX case) during the kernel module initialization. Add a hook for enabling hardware, arch-specific initialization, and disabling hardware during KVM kernel module initialization to make a room for TDX module initialization. The current KVM enables hardware when the first VM is created and disables hardware when the last VM is destroyed. When no VM is running, hardware is disabled. To follow these semantics, the kernel module initialization needs to disable hardware. Opportunistically refactor the code to enable/disable hardware.
Add hadware_enable_all() and hardware_disable_all() to kvm_init() and introduce a new arch-specific callback function, kvm_arch_post_hardware_enable_setup, for arch to do arch-specific initialization that requires hardware_enable_all(). Opportunistically, move kvm_arch_check_processor_compat() to to hardware_enabled_nolock(). TDX module initialization code will go into kvm_arch_post_hardware_enable_setup().
This patch reorders some function calls as below from (*) (**) (A) and (B) to (A) (B) and (*). Here (A) and (B) depends on (*), but not (**). By code inspection, only mips and VMX has the code of (*). No other arch has empty (*). So refactor mips and VMX and eliminate the necessity hook for (*) instead of adding an unused hook.
Before this patch:
- Arch module initialization
- kvm_init()
- kvm_arch_init()
- kvm_arch_check_processor_compat() on each CPUs
- post-arch-specific initialization -- (*): (A) and (B) depends on this
- post-arch-specific initialization -- (**): no dependency to (A) and (B)
- When creating/deleting the first/last VM
- kvm_arch_hardware_enable() on each CPUs -- (A)
- kvm_arch_hardware_disable() on each CPUs -- (B)
After this patch:
- Arch module initialization
- kvm_init()
- kvm_arch_init()
- arch-specific initialization -- (*)
- kvm_arch_check_processor_compat() on each CPUs
- kvm_arch_hardware_enable() on each CPUs -- (A)
- kvm_arch_hardware_disable() on each CPUs -- (B)
- post-arch-specific initialization -- (**)
- When creating/deleting the first/last VM (no logic change)
- kvm_arch_hardware_enable() on each CPUs -- (A)
- kvm_arch_hardware_disable() on each CPUs -- (B)
Code inspection result:
As long as I inspected, I found only mips and VMX have non-empty (*) or non-empty (A) or (B).
x86: tested on a real machine
mips: compile test only
powerpc, s390, arm, riscv: code inspection only
- arch/mips/kvm/mips.c
module init function, kvm_mips_init(), does some initialization after kvm_init(). Compile test only.
- arch/x86/kvm/x86.c
- uses vm_list which is statically initialized.
- static_call(kvm_x86_hardware_enable)();
- SVM: (*) and (**) are empty.
- VMX: initialize percpu variable loaded_vmcss_on_cpu that VMXON uses.
- arch/powerpc/kvm/powerpc.c
kvm_arch_hardware_enable/disable() are nop
- arch/s390/kvm/kvm-s390.c
kvm_arch_hardware_enable/disable() are nop
- arch/arm64/kvm/arm.c
module init function, arm_init(), calls only kvm_init(). (*) and (**) are empty
- arch/riscv/kvm/main.c
module init function, riscv_kvm_init(), calls only kvm_init(). (*) and (**) are empty
arch/mips/kvm/mips.c +11 -5
@@ -1642,12 +1642,11 @@ static int __init kvm_mips_init(void)return -EOPNOTSUPP ; } +/* +* kvm_init() calls kvm_arch_hardware_enable/disable(). The early +* initialization is needed before calling kvm_init(). +*/ ret =kvm_mips_entry_setup (); -if (ret) -return ret; - - ret =kvm_init (NULL ,sizeof (struct kvm_vcpu ),0 ,THIS_MODULE ); -if (ret)return ret;
@@ -1656,6 +1655,13 @@ static int __init kvm_mips_init(void)register_die_notifier (&kvm_mips_csr_die_notifier); + ret =kvm_init (NULL ,sizeof (struct kvm_vcpu ),0 ,THIS_MODULE ); + +if (ret) { +unregister_die_notifier (&kvm_mips_csr_die_notifier); +return ret; + } +return 0 ; }
arch/x86/kvm/vmx/vmx.c +19 -4
@@ -8442,6 +8442,23 @@ static void vmx_exit(void) }module_exit (vmx_exit); +/* +* Early initialization before kvm_init() so that vmx_hardware_enable/disable() +* can work. +*/ +static void __init vmx_init_early (void ) +{ +int cpu; + +/* +* vmx_hardware_disable() accesses loaded_vmcss_on_cpu list. +* Initialize the variable before kvm_init() that calls +* vmx_hardware_enable/disable(). +*/ +for_each_possible_cpu (cpu) +INIT_LIST_HEAD (&per_cpu (loaded_vmcss_on_cpu, cpu)); +} +static int __init vmx_init (void ) {int r, cpu;
@@ -8479,6 +8496,7 @@ static int __init vmx_init(void) }#endif +vmx_init_early (); r =kvm_init (&vmx_init_ops,sizeof (struct vcpu_vmx ), __alignof__(struct vcpu_vmx ),THIS_MODULE );if (r)
@@ -8499,11 +8517,8 @@ static int __init vmx_init(void)vmx_setup_fb_clear_ctrl (); -for_each_possible_cpu (cpu) { -INIT_LIST_HEAD (&per_cpu (loaded_vmcss_on_cpu, cpu)); - +for_each_possible_cpu (cpu)pi_init_cpu (cpu); - }#ifdef CONFIG_KEXEC_CORE rcu_assign_pointer(crash_vmclear_loaded_vmcss,
include/linux/kvm_host.h +1 -0
@@ -1441,6 +1441,7 @@ void kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu, struct dentry *debugfs_int kvm_arch_hardware_enable (void );void kvm_arch_hardware_disable (void );int kvm_arch_hardware_setup (void *opaque); +int kvm_arch_post_hardware_enable_setup (void *opaque);void kvm_arch_hardware_unsetup (void );int kvm_arch_check_processor_compat (void );int kvm_arch_vcpu_runnable (struct kvm_vcpu *vcpu);
virt/kvm/kvm_main.c +24 -7
@@ -4899,8 +4899,13 @@ static void hardware_enable_nolock(void *junk)cpumask_set_cpu (cpu, cpus_hardware_enabled); + r =kvm_arch_check_processor_compat (); +if (r) + goto out; + r =kvm_arch_hardware_enable (); +out:if (r) {cpumask_clear_cpu (cpu, cpus_hardware_enabled);atomic_inc (&hardware_enable_failed);
@@ -5697,9 +5702,9 @@ void kvm_unregister_perf_callbacks(void) }#endif -static void check_processor_compat (void *rtn) +__weak int kvm_arch_post_hardware_enable_setup (void *opaque) { - *(int *)rtn =kvm_arch_check_processor_compat (); +return 0 ; } int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,
@@ -5732,11 +5737,23 @@ int kvm_init(void *opaque, unsigned vcpu_size, unsigned vcpu_align,if (r <0 ) goto out_free_1; -for_each_online_cpu (cpu) { -smp_call_function_single (cpu, check_processor_compat, &r,1 ); -if (r <0 ) - goto out_free_2; - } +/* hardware_enable_nolock() checks CPU compatibility on each CPUs. */ + r =hardware_enable_all (); +if (r) + goto out_free_2; +/* +* Arch specific initialization that requires to enable virtualization +* feature. e.g. TDX module initialization requires VMXON on all +* present CPUs. +*/ +kvm_arch_post_hardware_enable_setup (opaque); +/* +* Make hardware disabled after the KVM module initialization. KVM +* enables hardware when the first KVM VM is created and disables +* hardware when the last KVM VM is destroyed. When no KVM VM is +* running, hardware is disabled. Keep that semantics. +*/ +hardware_disable_all (); r =cpuhp_setup_state_nocalls (CPUHP_AP_KVM_STARTING ,"kvm/cpu:starting" , kvm_starting_cpu, kvm_dying_cpu);
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 4/102 KVM: VMX: Move out vmx_x86_ops to 'main.c' to wrap VMX and TDX
In reply to [email protected]From: Sean Christopherson <[email protected]>
KVM accesses Virtual Machine Control Structure (VMCS) with VMX instructions to operate on VM. TDX defines its data structure and TDX SEAMCALL APIs for VMM to operate on Trust Domain (TD) instead.
Trust Domain Virtual Processor State (TDVPS) is the root control structure of a TD VCPU. It helps the TDX module control the operation of the VCPU, and holds the VCPU state while the VCPU is not running. TDVPS is opaque to software and DMA access, accessible only by using the TDX module interface functions (such as TDH.VP.RD, TDH.VP.WR ,..). TDVPS includes TD VMCS, and TD VMCS auxiliary structures, such as virtual APIC page, virtualization exception information, etc. TDVPS is composed of Trust Domain Virtual Processor Root (TDVPR) which is the root page of TDVPS and Trust Domain Virtual Processor eXtension (TDVPX) pages which extend TDVPR to help provide enough physical space for the logical TDVPS structure.
Also, we have a new structure, Trust Domain Control Structure (TDCS) is the main control structure of a guest TD, and encrypted (using the guest TD's ephemeral private key). At a high level, TDCS holds information for controlling TD operation as a whole, execution, EPTP, MSR bitmaps, etc. KVM needs to set it up. Note that MSR bitmaps are held as part of TDCS (unlike VMX) because they are meant to have the same value for all VCPUs of the same TD. TDCS is a multi-page logical structure composed of multiple Trust Domain Control Extension (TDCX) physical pages. Trust Domain Root (TDR) is the root control structure of a guest TD and is encrypted using the TDX global private key. It holds a minimal set of state variables that enable guest TD control even during times when the TD's private key is not known, or when the TD's key management state does not permit access to memory encrypted using the TD's private key.
The following shows the relationship between those structures.
TDR--> TDCS per-TD
| \--> TDCX
\
\--> TDVPS per-TD VCPU
\--> TDVPR and TDVPXThe existing global struct kvm_x86_ops already defines an interface which fits with TDX. But kvm_x86_ops is system-wide, not per-VM structure. To allow VMX to coexist with TDs, the kvm_x86_ops callbacks will have wrappers "if (tdx) tdx_op() else vmx_op()" to switch VMX or TDX at run time.
To split the runtime switch, the VMX implementation, and the TDX implementation, add main.c, and move out the vmx_x86_ops hooks in preparation for adding TDX, which can coexist with VMX, i.e. KVM can run both VMs and TDs. Use 'vt' for the naming scheme as a nod to VT-x and as a concatenation of VmxTdx.
The current code looks as follows.
In vmx.c
static vmx_op() { ... }
static struct kvm_x86_ops vmx_x86_ops = {
.op = vmx_op,initialization code
The eventually converted code will look like In vmx.c, keep the VMX operations.
vmx_op() { ... }
VMX initialization
In tdx.c, define the TDX operations.
tdx_op() { ... }
TDX initialization
In x86_ops.h, declare the VMX and TDX operations.
vmx_op();
tdx_op();
In main.c, define common wrappers for VMX and VMX.
static vt_ops() { if (tdx) tdx_ops() else vmx_ops() }
static struct kvm_x86_ops vt_x86_ops = {
.op = vt_op,initialization to call VMX and TDX initialization
Opportunistically, fix the name inconsistency from vmx_create_vcpu() and vmx_free_vcpu() to vmx_vcpu_create() and vxm_vcpu_free().
--- arch/x86/kvm/Makefile | 2 +- arch/x86/kvm/vmx/main.c | 155 ++++++++++++++++ arch/x86/kvm/vmx/vmx.c | 363 +++++++++++-------------------------- arch/x86/kvm/vmx/x86_ops.h | 125 +++++++++++++ 4 files changed, 386 insertions(+), 259 deletions(-) create mode 100644 arch/x86/kvm/vmx/main.c create mode 100644 arch/x86/kvm/vmx/x86_ops.h
arch/x86/kvm/Makefile +1 -1
@@ -22,7 +22,7 @@ kvm-$(CONFIG_X86_64) += mmu/tdp_iter.o mmu/tdp_mmu.o kvm-$(CONFIG_KVM_XEN) += xen.o kvm-intel-y += vmx/vmx.o vmx/vmenter.o vmx/pmu_intel.o vmx/vmcs12.o \ - vmx/evmcs.o vmx/nested.o vmx/posted_intr.o + vmx/evmcs.o vmx/nested.o vmx/posted_intr.o vmx/main.o kvm-intel-$(CONFIG_X86_SGX_KVM) += vmx/sgx.o kvm-amd-y += svm/svm.o svm/vmenter.o svm/pmu.o svm/nested.o svm/avic.o svm/sev.o
arch/x86/kvm/vmx/main.c new file +155 -0
155 lines not on this page · raw message
arch/x86/kvm/vmx/vmx.c +105 -258
914 lines not on this page · raw message
arch/x86/kvm/vmx/x86_ops.h new file +125 -0
125 lines not on this page · raw message
Signature · 1 line
2.25.1
PATCH v7 5/102 x86/virt/vmx/tdx: export platform_tdx_enabled()
In reply to [email protected]From: Isaku Yamahata <[email protected]>
TDX KVM uses platform_tdx_enabled() via vmx_hardware_setup() to check if the platform supports TDX, concretely CPU SEAM mode, irrespective of TDX module is loaded or initialized.
--- arch/x86/virt/vmx/tdx/tdx.c | 1 + 1 file changed, 1 insertion(+)
arch/x86/virt/vmx/tdx/tdx.c +1 -0
@@ -1285,6 +1285,7 @@ bool platform_tdx_enabled(void) {return tdx_keyid_num >=2 ; } +EXPORT_SYMBOL_GPL (platform_tdx_enabled);/** * tdx_init - Initialize the TDX module
Signature · 1 line
2.25.1
PATCH v7 6/102 KVM: TDX: Detect CPU feature on kernel module initialization
In reply to [email protected]From: Isaku Yamahata <[email protected]>
TDX requires several initialization steps for KVM to create guest TDs. Detect CPU feature, enable VMX (TDX is based on VMX), detect TDX module availability, and initialize TDX module. This patch implements the first step to detect CPU feature. Because VMX isn't enabled yet by VMXON instruction on KVM kernel module initialization, defer further initialization step until VMX is enabled by hardware_enable callback.
Introduce a module parameter, enable_tdx, to explicitly enable TDX KVM support. It's off by default to keep same behavior for those who don't use TDX. Implement CPU feature detection at KVM kernel module initialization as hardware_setup callback to check if CPU feature is available and get some CPU parameters.
--- arch/x86/kvm/Makefile | 1 + arch/x86/kvm/vmx/main.c | 18 ++++++++++++++++- arch/x86/kvm/vmx/tdx.c | 40 ++++++++++++++++++++++++++++++++++++++ arch/x86/kvm/vmx/x86_ops.h | 6 ++++++ 4 files changed, 64 insertions(+), 1 deletion(-) create mode 100644 arch/x86/kvm/vmx/tdx.c
arch/x86/kvm/Makefile +1 -0
@@ -24,6 +24,7 @@ kvm-$(CONFIG_KVM_XEN) += xen.o kvm-intel-y += vmx/vmx.o vmx/vmenter.o vmx/pmu_intel.o vmx/vmcs12.o \ vmx/evmcs.o vmx/nested.o vmx/posted_intr.o vmx/main.o kvm-intel-$(CONFIG_X86_SGX_KVM) += vmx/sgx.o +kvm-intel-$(CONFIG_INTEL_TDX_HOST) += vmx/tdx.o kvm-amd-y += svm/svm.o svm/vmenter.o svm/pmu.o svm/nested.o svm/avic.o svm/sev.o
arch/x86/kvm/vmx/main.c +17 -1
@@ -6,6 +6,22 @@#include "nested.h" #include "pmu.h" +static bool __read_mostly enable_tdx =IS_ENABLED (CONFIG_INTEL_TDX_HOST ); +module_param_named (tdx, enable_tdx, bool,0444 ); + +static __init int vt_hardware_setup (void ) +{ +int ret; + + ret =vmx_hardware_setup (); +if (ret) +return ret; + + enable_tdx = enable_tdx && !tdx_hardware_setup (&vt_x86_ops); + +return 0 ; +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,
@@ -147,7 +163,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = {struct kvm_x86_init_ops vt_init_ops__initdata = { .cpu_has_kvm_support = vmx_cpu_has_kvm_support, .disabled_by_bios = vmx_disabled_by_bios, - .hardware_setup = vmx_hardware_setup, + .hardware_setup = vt_hardware_setup, .handle_intel_pt_intr =NULL , .runtime_ops = &vt_x86_ops,
arch/x86/kvm/vmx/tdx.c new file +40 -0
@@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +#include <linux/cpu.h> + +#include <asm/tdx.h> + +#include "capabilities.h" +#include "x86_ops.h" + +#undef pr_fmt +#define pr_fmt (fmt) "tdx: " fmt + +static u64 hkid_mask__ro_after_init ; +static u8 hkid_start_pos__ro_after_init ; + +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops) +{ +u32 max_pa; + +if (!enable_ept) { +pr_warn ("Cannot enable TDX with EPT disabled\n" ); +return -EINVAL ; + } + +if (!platform_tdx_enabled ()) { +pr_warn ("Cannot enable TDX on TDX disabled platform\n" ); +return -ENODEV ; + } + +/* Safe guard check because TDX overrides tlb_remote_flush callback. */ +if (WARN_ON_ONCE (x86_ops->tlb_remote_flush)) +return -EIO ; + + max_pa =cpuid_eax (0x80000008 ) &0xff ; + hkid_start_pos = boot_cpu_data.x86_phys_bits; + hkid_mask =GENMASK_ULL (max_pa -1 , hkid_start_pos); +pr_info ("kvm: TDX is supported. hkid start pos %d mask 0x%llx\n" , + hkid_start_pos, hkid_mask); + +return 0 ; +}
arch/x86/kvm/vmx/x86_ops.h +6 -0
@@ -122,4 +122,10 @@ void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu);#endif void vmx_setup_mce (struct kvm_vcpu *vcpu); +#ifdef CONFIG_INTEL_TDX_HOST +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops); +#else +static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; } +#endif +#endif /* __KVM_X86_VMX_X86_OPS_H */
Signature · 1 line
2.25.1
Re: [PATCH v7 006/102] KVM: TDX: Detect CPU feature on kernel module initialization
Quoted 8 lines · On Mon, 2022-06-27 at 14:52 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
TDX requires several initialization steps for KVM to create guest TDs. Detect CPU feature, enable VMX (TDX is based on VMX), detect TDX module availability, and initialize TDX module. This patch implements the first step to detect CPU feature. Because VMX isn't enabled yet by VMXON instruction on KVM kernel module initialization, defer further initialization step until VMX is enabled by
hardware_enablecallback.
Not clear why you need to split into multiple patches. If we put all initialization into one patch, it's much easier to see why those steps are done in whatever way.
Quoted 91 lines
Introduce a module parameter,
enable_tdx, to explicitly enable TDX KVM support. It's off by default to keep same behavior for those who don't use TDX. Implement CPU feature detection at KVM kernel module initialization ashardware_setupcallback to check if CPU feature is available and get some CPU parameters.Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/Makefile | 1 + arch/x86/kvm/vmx/main.c | 18 ++++++++++++++++- arch/x86/kvm/vmx/tdx.c | 40 ++++++++++++++++++++++++++++++++++++++ arch/x86/kvm/vmx/x86_ops.h | 6 ++++++ 4 files changed, 64 insertions(+), 1 deletion(-) create mode 100644 arch/x86/kvm/vmx/tdx.carch/x86/kvm/Makefile +1
-0@@ -24,6 +24,7 @@ kvm-$(CONFIG_KVM_XEN) += xen.o kvm-intel-y += vmx/vmx.o vmx/vmenter.o vmx/pmu_intel.o vmx/vmcs12.o \ vmx/evmcs.o vmx/nested.o vmx/posted_intr.o vmx/main.o kvm-intel-$(CONFIG_X86_SGX_KVM) += vmx/sgx.o +kvm-intel-$(CONFIG_INTEL_TDX_HOST) += vmx/tdx.o kvm-amd-y += svm/svm.o svm/vmenter.o svm/pmu.o svm/nested.o svm/avic.o svm/sev.oarch/x86/kvm/vmx/main.c +17
-1@@ -6,6 +6,22 @@#include "nested.h" #include "pmu.h" +static bool __read_mostly enable_tdx =IS_ENABLED (CONFIG_INTEL_TDX_HOST ); +module_param_named (tdx, enable_tdx, bool,0444 ); + +static __init int vt_hardware_setup (void ) +{ +int ret; + + ret =vmx_hardware_setup (); +if (ret) +return ret; + + enable_tdx = enable_tdx && !tdx_hardware_setup (&vt_x86_ops); + +return 0 ; +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,@@ -147,7 +163,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = {struct kvm_x86_init_ops vt_init_ops__initdata = { .cpu_has_kvm_support = vmx_cpu_has_kvm_support, .disabled_by_bios = vmx_disabled_by_bios, - .hardware_setup = vmx_hardware_setup, + .hardware_setup = vt_hardware_setup, .handle_intel_pt_intr =NULL , .runtime_ops = &vt_x86_ops,arch/x86/kvm/vmx/tdx.c new file +21
-0@@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +#include <linux/cpu.h> + +#include <asm/tdx.h> + +#include "capabilities.h" +#include "x86_ops.h" + +#undef pr_fmt +#define pr_fmt (fmt) "tdx: " fmt + +static u64 hkid_mask__ro_after_init ; +static u8 hkid_start_pos__ro_after_init ; + +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops) +{ +u32 max_pa; + +if (!enable_ept) { +pr_warn ("Cannot enable TDX with EPT disabled\n" ); +return -EINVAL ;
arch/x86/kvm/vmx/tdx.c line 31
Quoted 10 lines
arch/x86/kvm/vmx/tdx.c new file +10
-0+ } + +if (!platform_tdx_enabled ()) { +pr_warn ("Cannot enable TDX on TDX disabled platform\n" ); +return -ENODEV ; + } + +/* Safe guard check because TDX overrides tlb_remote_flush callback. */ +if (WARN_ON_ONCE (x86_ops->tlb_remote_flush)) +return -EIO ;
To me it's better to move this chunk to the patch which actually implements how to flush TLB foro private pages. W/o some background, it's hard to tell why TDX needs to overrides tlb_remote_flush callback. Otherwise it's quite hard to review here.
For instance, even if it must be replaced, I am wondering why it must be empty at the beginning? For instance, assuming it has an original version which does something:
x86_ops->tlb_remote_flush = vmx_remote_flush;
Why cannot it be replaced with vt_tlb_remote_flush():
int vt_tlb_remote_flush(struct kvm *kvm)
{
if (is_td(kvm))
return tdx_tlb_remote_flush(kvm);
return vmx_remote_flush(kvm);
}?
arch/x86/kvm/vmx/tdx.c line 37
Quoted 6 lines
arch/x86/kvm/vmx/tdx.c new file +6
-0+ + max_pa =cpuid_eax (0x80000008 ) &0xff ; + hkid_start_pos = boot_cpu_data.x86_phys_bits; + hkid_mask =GENMASK_ULL (max_pa -1 , hkid_start_pos); +pr_info ("kvm: TDX is supported. hkid start pos %d mask 0x%llx\n" , + hkid_start_pos, hkid_mask);
Again, I think it's better to introduce those in the patch where you actually need those. It will be more clear if you introduce those with the code which actually uses them.
For instance, I think both hkid_start_pos and hkid_mask are not necessary. If you want to apply one keyid to an address, isn't below enough?
u64 phys |= ((keyid) << boot_cpu_data.x86_phys_bits);
Quoted 8 lines
arch/x86/kvm/vmx/tdx.c new file +3
-0+ +return 0 ; +}arch/x86/kvm/vmx/x86_ops.h +0
-0
arch/x86/kvm/vmx/x86_ops.h void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu); · line 129
Quoted 8 lines
arch/x86/kvm/vmx/x86_ops.h +5
-0@@ -122,4 +122,10 @@ void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu);#endif void vmx_setup_mce (struct kvm_vcpu *vcpu); +#ifdef CONFIG_INTEL_TDX_HOST +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops); +#else +static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; } +#endif
I think if you introduce a "tdx_ops.h", or "tdx_x86_ops.h", and you can only include it when CONFIG_INTEL_TDX_HOST is true, then in tdx_ops.h you don't need those stubs.
Makes sense?
Quoted 2 lines
arch/x86/kvm/vmx/x86_ops.h +1
-0+#endif /* __KVM_X86_VMX_X86_OPS_H */
Re: [PATCH v7 006/102] KVM: TDX: Detect CPU feature on kernel module initialization
Quoted 10 lines · Kai Huang
Quoted 8 lines · On Mon, 2022-06-27 at 14:52 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
TDX requires several initialization steps for KVM to create guest TDs. Detect CPU feature, enable VMX (TDX is based on VMX), detect TDX module availability, and initialize TDX module. This patch implements the first step to detect CPU feature. Because VMX isn't enabled yet by VMXON instruction on KVM kernel module initialization, defer further initialization step until VMX is enabled by
hardware_enablecallback.
Quoted 3 lines
Not clear why you need to split into multiple patches. If we put all initialization into one patch, it's much easier to see why those steps are done in whatever way.
I moved down this patch before "KVM: TDX: Initialize TDX module when loading kvm_intel.ko". So the patch flow is, - detect tdx cpu feature, and then
- initialize tdx module.
Quoted 59 lines
Quoted 27 lines
arch/x86/kvm/vmx/tdx.c new file +21
-0@@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +#include <linux/cpu.h> + +#include <asm/tdx.h> + +#include "capabilities.h" +#include "x86_ops.h" + +#undef pr_fmt +#define pr_fmt (fmt) "tdx: " fmt + +static u64 hkid_mask__ro_after_init ; +static u8 hkid_start_pos__ro_after_init ; + +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops) +{ +u32 max_pa; + +if (!enable_ept) { +pr_warn ("Cannot enable TDX with EPT disabled\n" ); +return -EINVAL ;arch/x86/kvm/vmx/tdx.c line 31
Quoted 10 lines
arch/x86/kvm/vmx/tdx.c new file +10
-0+ } + +if (!platform_tdx_enabled ()) { +pr_warn ("Cannot enable TDX on TDX disabled platform\n" ); +return -ENODEV ; + } + +/* Safe guard check because TDX overrides tlb_remote_flush callback. */ +if (WARN_ON_ONCE (x86_ops->tlb_remote_flush)) +return -EIO ;To me it's better to move this chunk to the patch which actually implements how to flush TLB foro private pages. W/o some background, it's hard to tell why TDX needs to overrides
tlb_remote_flushcallback. Otherwise it's quite hard to review here.For instance, even if it must be replaced, I am wondering why it must be empty at the beginning? For instance, assuming it has an original version which does something:
x86_ops->tlb_remote_flush = vmx_remote_flush;Why cannot it be replaced with
vt_tlb_remote_flush():int vt_tlb_remote_flush(struct kvm *kvm) { if (is_td(kvm)) return tdx_tlb_remote_flush(kvm); return vmx_remote_flush(kvm); }
Quoted 1 line
?
There is a bit tricky part. Anyway I rewrote to follow this way. Here is a preparation patch to allow such direction.
Subject: [PATCH 055/290] KVM: x86/VMX: introduce vmx tlb_remote_flush and
tlb_remote_flush_with_range
This is preparation for TDX to define its own tlb_remote_flush and tlb_remote_flush_with_range. Currently vmx code defines tlb_remote_flush and tlb_remote_flush_with_range defined as NULL by default and only when nested hyper-v guest case, they are defined to non-NULL methods.
To make TDX code to override those two methods consistently with other methods, define vmx_tlb_remote_flush and vmx_tlb_remote_flush_with_range as nop and call hyper-v code only when nested hyper-v guest case.
--- arch/x86/kvm/kvm_onhyperv.c | 5 ++++- arch/x86/kvm/kvm_onhyperv.h | 1 + arch/x86/kvm/mmu/mmu.c | 2 +- arch/x86/kvm/svm/svm_onhyperv.h | 1 + arch/x86/kvm/vmx/main.c | 2 ++ arch/x86/kvm/vmx/vmx.c | 34 ++++++++++++++++++++++++++++----- arch/x86/kvm/vmx/x86_ops.h | 3 +++ 7 files changed, 41 insertions(+), 7 deletions(-)
arch/x86/kvm/kvm_onhyperv.c +4 -1
@@ -93,11 +93,14 @@ int hv_remote_flush_tlb(struct kvm *kvm) }EXPORT_SYMBOL_GPL (hv_remote_flush_tlb); +bool hv_use_remote_flush_tlb__ro_after_init ; +EXPORT_SYMBOL_GPL (hv_use_remote_flush_tlb); +void hv_track_root_tdp (struct kvm_vcpu *vcpu,hpa_t root_tdp) {struct kvm_arch *kvm_arch = &vcpu->kvm->arch; -if (kvm_x86_ops.tlb_remote_flush == hv_remote_flush_tlb) { +if (hv_use_remote_flush_tlb) {spin_lock (&kvm_arch->hv_root_tdp_lock); vcpu->arch.hv_root_tdp = root_tdp;if (root_tdp != kvm_arch->hv_root_tdp)
arch/x86/kvm/kvm_onhyperv.h +1 -0
@@ -10,6 +10,7 @@int hv_remote_flush_tlb_with_range (struct kvm *kvm,struct kvm_tlb_range *range);int hv_remote_flush_tlb (struct kvm *kvm); +extern bool hv_use_remote_flush_tlb__ro_after_init ;void hv_track_root_tdp (struct kvm_vcpu *vcpu,hpa_t root_tdp);#else /* !CONFIG_HYPERV */ static inline void hv_track_root_tdp (struct kvm_vcpu *vcpu,hpa_t root_tdp)
arch/x86/kvm/mmu/mmu.c +1 -1
@@ -264,7 +264,7 @@ static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, {int ret = -ENOTSUPP ; -if (range && kvm_x86_ops.tlb_remote_flush_with_range) +if (range &&kvm_available_flush_tlb_with_range ()) ret =static_call (kvm_x86_tlb_remote_flush_with_range)(kvm, range);if (ret)
arch/x86/kvm/svm/svm_onhyperv.h +1 -0
@@ -36,6 +36,7 @@ static inline void svm_hv_hardware_setup(void) svm_x86_ops.tlb_remote_flush = hv_remote_flush_tlb; svm_x86_ops.tlb_remote_flush_with_range = hv_remote_flush_tlb_with_range; + hv_use_remote_flush_tlb = true; }if (ms_hyperv.nested_features &HV_X64_NESTED_DIRECT_FLUSH ) {
arch/x86/kvm/vmx/main.c +2 -0
@@ -187,6 +187,8 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .flush_tlb_all = vmx_flush_tlb_all, .flush_tlb_current = vmx_flush_tlb_current, + .tlb_remote_flush = vmx_tlb_remote_flush, + .tlb_remote_flush_with_range = vmx_tlb_remote_flush_with_range, .flush_tlb_gva = vmx_flush_tlb_gva, .flush_tlb_guest = vmx_flush_tlb_guest,
arch/x86/kvm/vmx/vmx.c +29 -5
@@ -3110,6 +3110,33 @@ void vmx_flush_tlb_current(struct kvm_vcpu *vcpu)vpid_sync_context (vmx_get_current_vpid (vcpu)); } +int vmx_tlb_remote_flush (struct kvm *kvm) +{ +#if IS_ENABLED (CONFIG_HYPERV ) +if (hv_use_tlb_remote_flush) +return hv_remote_flush_tlb (kvm); +#endif +/* +* fallback to KVM_REQ_TLB_FLUSH. +* See kvm_arch_flush_remote_tlb() and kvm_flush_remote_tlbs(). +*/ +return -EOPNOTSUPP ; +} + +int vmx_tlb_remote_flush_with_range (struct kvm *kvm, +struct kvm_tlb_range *range) +{ +#if IS_ENABLED (CONFIG_HYPERV ) +if (hv_use_tlb_remote_flush) +return hv_remote_flush_tlb_with_range (kvm, range); +#endif +/* +* fallback to tlb_remote_flush. See +* kvm_flush_remote_tlbs_with_range() +*/ +return -EOPNOTSUPP ; +} +void vmx_flush_tlb_gva (struct kvm_vcpu *vcpu,gva_t addr) {/*
@@ -8176,11 +8203,8 @@ __init int vmx_hardware_setup(void)#if IS_ENABLED (CONFIG_HYPERV )if (ms_hyperv.nested_features &HV_X64_NESTED_GUEST_MAPPING_FLUSH - && enable_ept) { - vt_x86_ops.tlb_remote_flush = hv_remote_flush_tlb; - vt_x86_ops.tlb_remote_flush_with_range = - hv_remote_flush_tlb_with_range; - } + && enable_ept) + hv_use_tlb_remote_flush = true;#endif if (!cpu_has_vmx_ple ()) {
arch/x86/kvm/vmx/x86_ops.h +3 -0
@@ -90,6 +90,9 @@ void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);bool vmx_get_if_flag (struct kvm_vcpu *vcpu);void vmx_flush_tlb_all (struct kvm_vcpu *vcpu);void vmx_flush_tlb_current (struct kvm_vcpu *vcpu); +int vmx_tlb_remote_flush (struct kvm *kvm); +int vmx_tlb_remote_flush_with_range (struct kvm *kvm, +struct kvm_tlb_range *range);void vmx_flush_tlb_gva (struct kvm_vcpu *vcpu,gva_t addr);void vmx_flush_tlb_guest (struct kvm_vcpu *vcpu);void vmx_set_interrupt_shadow (struct kvm_vcpu *vcpu,int mask);
Signature · 1 line
2.25.1
Quoted 11 lines
arch/x86/kvm/vmx/tdx.c line 37
Quoted 6 lines
arch/x86/kvm/vmx/tdx.c new file +6
-0+ + max_pa =cpuid_eax (0x80000008 ) &0xff ; + hkid_start_pos = boot_cpu_data.x86_phys_bits; + hkid_mask =GENMASK_ULL (max_pa -1 , hkid_start_pos); +pr_info ("kvm: TDX is supported. hkid start pos %d mask 0x%llx\n" , + hkid_start_pos, hkid_mask);Again, I think it's better to introduce those in the patch where you actually need those. It will be more clear if you introduce those with the code which actually uses them.
Quoted 4 lines
For instance, I think both
hkid_start_posandhkid_maskare not necessary. If you want to apply one keyid to an address, isn't below enough?u64 phys |= ((keyid) << boot_cpu_data.x86_phys_bits);
Nice catch. I removed max_pa, hkid_start_pos and hkid_mask.
Quoted 18 lines
arch/x86/kvm/vmx/x86_ops.h void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu); · line 129
Quoted 13 lines
arch/x86/kvm/vmx/x86_ops.h +5
-0@@ -122,4 +122,10 @@ void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu);#endif void vmx_setup_mce (struct kvm_vcpu *vcpu); +#ifdef CONFIG_INTEL_TDX_HOST +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops); +#else +static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; } +#endif I think if you introduce a "
tdx_ops.h", or "tdx_x86_ops.h", and you can only include it whenCONFIG_INTEL_TDX_HOSTis true, then intdx_ops.hyou don't need those stubs.
Quoted 1 line
Makes sense?
main.c includes many tdx_xxx(). If we do so without stubs, many CONFIG_INTEL_TDX_HOST in main.c.
Signature · 1 line
Isaku Yamahata <[email protected]>
Re: [PATCH v7 006/102] KVM: TDX: Detect CPU feature on kernel module initialization
Quoted 13 lines · Isaku Yamahata
Quoted 10 lines · Kai Huang
Quoted 8 lines · On Mon, 2022-06-27 at 14:52 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
TDX requires several initialization steps for KVM to create guest TDs. Detect CPU feature, enable VMX (TDX is based on VMX), detect TDX module availability, and initialize TDX module. This patch implements the first step to detect CPU feature. Because VMX isn't enabled yet by VMXON instruction on KVM kernel module initialization, defer further initialization step until VMX is enabled by
hardware_enablecallback.
Quoted 7 lines
Quoted 3 lines
Not clear why you need to split into multiple patches. If we put all initialization into one patch, it's much easier to see why those steps are done in whatever way.
I moved down this patch before "KVM: TDX: Initialize TDX module when loading kvm_intel.ko". So the patch flow is, - detect tdx cpu feature, and then
- initialize tdx module.
Unable to comment until see the actual patch/code. My point is this series is already very big (107 patches!!). We should avoid splitting code chunks to small patches when there's no real benefits. For instance, when the code change is an infrastructural patch so logically can and should be separated (also easier to review). Or when the patch is too big (thus hard to review) and splitting "dependencies" into smaller patches that can help to review.
To me this patch (and init TDX module) doesn't belong to any of above. The only piece in this patch that makes sense to me is below:
if (!enable_ept) {
pr_warn("Cannot enable TDX with EPT disabled\n");
return -EINVAL;
}
if (!platform_tdx_enabled()) {
pr_warn("Cannot enable TDX on TDX disabled platform\n");
return -ENODEV;
}And I don't see why it cannot be done together with initializing TDX module.
Btw, I do see in the init TDX module patch, you did more than tdx_init() such as setting up 'tdx_capabilities' etc. To me it makes more sense to split that part out (if necessary) with some explanation why we need those 'tdx_capabilities' after tdx_init().
Quoted 69 lines
Quoted 61 lines
Quoted 29 lines
arch/x86/kvm/vmx/tdx.c new file +21
-0@@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +#include <linux/cpu.h> + +#include <asm/tdx.h> + +#include "capabilities.h" +#include "x86_ops.h" + +#undef pr_fmt +#define pr_fmt (fmt) "tdx: " fmt + +static u64 hkid_mask__ro_after_init ; +static u8 hkid_start_pos__ro_after_init ; + +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops) +{ +u32 max_pa; + +if (!enable_ept) { +pr_warn ("Cannot enable TDX with EPT disabled\n" ); +return -EINVAL ;arch/x86/kvm/vmx/tdx.c line 31
Quoted 10 lines
arch/x86/kvm/vmx/tdx.c new file +10
-0+ } + +if (!platform_tdx_enabled ()) { +pr_warn ("Cannot enable TDX on TDX disabled platform\n" ); +return -ENODEV ; + } + +/* Safe guard check because TDX overrides tlb_remote_flush callback. */ +if (WARN_ON_ONCE (x86_ops->tlb_remote_flush)) +return -EIO ;To me it's better to move this chunk to the patch which actually implements how to flush TLB foro private pages. W/o some background, it's hard to tell why TDX needs to overrides
tlb_remote_flushcallback. Otherwise it's quite hard to review here.For instance, even if it must be replaced, I am wondering why it must be empty at the beginning? For instance, assuming it has an original version which does something:
x86_ops->tlb_remote_flush = vmx_remote_flush;Why cannot it be replaced with
vt_tlb_remote_flush():int vt_tlb_remote_flush(struct kvm *kvm) { if (is_td(kvm)) return tdx_tlb_remote_flush(kvm); return vmx_remote_flush(kvm); }Quoted 1 line
?
There is a bit tricky part. Anyway I rewrote to follow this way. Here is a preparation patch to allow such direction.
Subject: [PATCH 055/290] KVM: x86/VMX: introduce vmx
tlb_remote_flushand
tlb_remote_flush_with_range
Quoted 8 lines
This is preparation for TDX to define its own
tlb_remote_flushandtlb_remote_flush_with_range. Currently vmx code definestlb_remote_flushandtlb_remote_flush_with_rangedefined as NULL by default and only when nested hyper-v guest case, they are defined to non-NULL methods.To make TDX code to override those two methods consistently with other methods, define
vmx_tlb_remote_flushandvmx_tlb_remote_flush_with_rangeas nop and call hyper-v code only when nested hyper-v guest case.
So why put into this patch which does "Detect CPU feature on kernel module initialization"?
(btw, can you improve patch title to be more specific on which CPU feature on which kernel module initialization?)
Even with your above explanation, it's hard to justify why we need this, because you didn't explain _why_ we need to "make TDX code to override those two methods".
Makes sense?
Skip below code now as I'd like to see that in a separate patch.
Quoted 169 lines
Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/kvm_onhyperv.c | 5 ++++- arch/x86/kvm/kvm_onhyperv.h | 1 + arch/x86/kvm/mmu/mmu.c | 2 +- arch/x86/kvm/svm/svm_onhyperv.h | 1 + arch/x86/kvm/vmx/main.c | 2 ++ arch/x86/kvm/vmx/vmx.c | 34 ++++++++++++++++++++++++++++----- arch/x86/kvm/vmx/x86_ops.h | 3 +++ 7 files changed, 41 insertions(+), 7 deletions(-)arch/x86/kvm/kvm_onhyperv.c +4
-1@@ -93,11 +93,14 @@ int hv_remote_flush_tlb(struct kvm *kvm) }EXPORT_SYMBOL_GPL (hv_remote_flush_tlb); +bool hv_use_remote_flush_tlb__ro_after_init ; +EXPORT_SYMBOL_GPL (hv_use_remote_flush_tlb); +void hv_track_root_tdp (struct kvm_vcpu *vcpu,hpa_t root_tdp) {struct kvm_arch *kvm_arch = &vcpu->kvm->arch; -if (kvm_x86_ops.tlb_remote_flush == hv_remote_flush_tlb) { +if (hv_use_remote_flush_tlb) {spin_lock (&kvm_arch->hv_root_tdp_lock); vcpu->arch.hv_root_tdp = root_tdp;if (root_tdp != kvm_arch->hv_root_tdp)arch/x86/kvm/kvm_onhyperv.h +1
-0@@ -10,6 +10,7 @@int hv_remote_flush_tlb_with_range (struct kvm *kvm,struct kvm_tlb_range *range);int hv_remote_flush_tlb (struct kvm *kvm); +extern bool hv_use_remote_flush_tlb__ro_after_init ;void hv_track_root_tdp (struct kvm_vcpu *vcpu,hpa_t root_tdp);#else /* !CONFIG_HYPERV */ static inline void hv_track_root_tdp (struct kvm_vcpu *vcpu,hpa_t root_tdp)arch/x86/kvm/mmu/mmu.c +1
-1@@ -264,7 +264,7 @@ static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm, {int ret = -ENOTSUPP ; -if (range && kvm_x86_ops.tlb_remote_flush_with_range) +if (range &&kvm_available_flush_tlb_with_range ()) ret =static_call (kvm_x86_tlb_remote_flush_with_range)(kvm, range);if (ret)arch/x86/kvm/svm/svm_onhyperv.h +1
-0@@ -36,6 +36,7 @@ static inline void svm_hv_hardware_setup(void) svm_x86_ops.tlb_remote_flush = hv_remote_flush_tlb; svm_x86_ops.tlb_remote_flush_with_range = hv_remote_flush_tlb_with_range; + hv_use_remote_flush_tlb = true; }if (ms_hyperv.nested_features &HV_X64_NESTED_DIRECT_FLUSH ) {arch/x86/kvm/vmx/main.c +2
-0@@ -187,6 +187,8 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .flush_tlb_all = vmx_flush_tlb_all, .flush_tlb_current = vmx_flush_tlb_current, + .tlb_remote_flush = vmx_tlb_remote_flush, + .tlb_remote_flush_with_range = vmx_tlb_remote_flush_with_range, .flush_tlb_gva = vmx_flush_tlb_gva, .flush_tlb_guest = vmx_flush_tlb_guest,arch/x86/kvm/vmx/vmx.c +29
-5@@ -3110,6 +3110,33 @@ void vmx_flush_tlb_current(struct kvm_vcpu *vcpu)vpid_sync_context (vmx_get_current_vpid (vcpu)); } +int vmx_tlb_remote_flush (struct kvm *kvm) +{ +#if IS_ENABLED (CONFIG_HYPERV ) +if (hv_use_tlb_remote_flush) +return hv_remote_flush_tlb (kvm); +#endif +/* +* fallback to KVM_REQ_TLB_FLUSH. +* See kvm_arch_flush_remote_tlb() and kvm_flush_remote_tlbs(). +*/ +return -EOPNOTSUPP ; +} + +int vmx_tlb_remote_flush_with_range (struct kvm *kvm, +struct kvm_tlb_range *range) +{ +#if IS_ENABLED (CONFIG_HYPERV ) +if (hv_use_tlb_remote_flush) +return hv_remote_flush_tlb_with_range (kvm, range); +#endif +/* +* fallback to tlb_remote_flush. See +* kvm_flush_remote_tlbs_with_range() +*/ +return -EOPNOTSUPP ; +} +void vmx_flush_tlb_gva (struct kvm_vcpu *vcpu,gva_t addr) {/* @@ -8176,11 +8203,8 @@ __init int vmx_hardware_setup(void)#if IS_ENABLED (CONFIG_HYPERV )if (ms_hyperv.nested_features &HV_X64_NESTED_GUEST_MAPPING_FLUSH - && enable_ept) { - vt_x86_ops.tlb_remote_flush = hv_remote_flush_tlb; - vt_x86_ops.tlb_remote_flush_with_range = - hv_remote_flush_tlb_with_range; - } + && enable_ept) + hv_use_tlb_remote_flush = true;#endif if (!cpu_has_vmx_ple ()) {arch/x86/kvm/vmx/x86_ops.h +3
-0@@ -90,6 +90,9 @@ void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);bool vmx_get_if_flag (struct kvm_vcpu *vcpu);void vmx_flush_tlb_all (struct kvm_vcpu *vcpu);void vmx_flush_tlb_current (struct kvm_vcpu *vcpu); +int vmx_tlb_remote_flush (struct kvm *kvm); +int vmx_tlb_remote_flush_with_range (struct kvm *kvm, +struct kvm_tlb_range *range);void vmx_flush_tlb_gva (struct kvm_vcpu *vcpu,gva_t addr);void vmx_flush_tlb_guest (struct kvm_vcpu *vcpu);void vmx_set_interrupt_shadow (struct kvm_vcpu *vcpu,int mask);Signature · 1 line
2.25.1Quoted 11 lines
arch/x86/kvm/vmx/tdx.c line 37
Quoted 6 lines
arch/x86/kvm/vmx/tdx.c new file +6
-0+ + max_pa =cpuid_eax (0x80000008 ) &0xff ; + hkid_start_pos = boot_cpu_data.x86_phys_bits; + hkid_mask =GENMASK_ULL (max_pa -1 , hkid_start_pos); +pr_info ("kvm: TDX is supported. hkid start pos %d mask 0x%llx\n" , + hkid_start_pos, hkid_mask);Again, I think it's better to introduce those in the patch where you actually need those. It will be more clear if you introduce those with the code which actually uses them.
Quoted 4 lines
For instance, I think both
hkid_start_posandhkid_maskare not necessary. If you want to apply one keyid to an address, isn't below enough?u64 phys |= ((keyid) << boot_cpu_data.x86_phys_bits);Nice catch. I removed
max_pa,hkid_start_posandhkid_mask.
Regardless whether you need 'max_pa, hkid_start_pos and hkid_mask', the point is it's better to introduce when you really need them.
They are not big chunk which needs to be separated out to improve readability.
Quoted 20 lines
Quoted 20 lines
Quoted 7 lines
arch/x86/kvm/vmx/x86_ops.h +0
-0arch/x86/kvm/vmx/x86_ops.h void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu); · line 129
Quoted 8 lines
arch/x86/kvm/vmx/x86_ops.h +5
-0@@ -122,4 +122,10 @@ void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu);#endif void vmx_setup_mce (struct kvm_vcpu *vcpu); +#ifdef CONFIG_INTEL_TDX_HOST +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops); +#else +static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; } +#endif I think if you introduce a "
tdx_ops.h", or "tdx_x86_ops.h", and you can only include it whenCONFIG_INTEL_TDX_HOSTis true, then intdx_ops.hyou don't need those stubs.
Quoted 4 lines
Quoted 1 line
Makes sense?
main.cincludes manytdx_xxx(). If we do so without stubs, manyCONFIG_INTEL_TDX_HOSTinmain.c.
OK.
PATCH v7 7/102 KVM: Enable hardware before doing arch VM initialization
In reply to [email protected]From: Sean Christopherson <[email protected]>
Swap the order of hardware_enable_all() and kvm_arch_init_vm() to accommodate Intel's TDX, which needs VMX to be enabled during VM init in order to make SEAMCALLs.
This also provides consistent ordering between kvm_create_vm() and kvm_destroy_vm() with respect to calling kvm_arch_destroy_vm() and hardware_disable_all().
--- virt/kvm/kvm_main.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
virt/kvm/kvm_main.c +7 -7
@@ -1138,19 +1138,19 @@ static struct kvm *kvm_create_vm(unsigned long type)rcu_assign_pointer (kvm->buses[i],kzalloc (sizeof (struct kvm_io_bus ),GFP_KERNEL_ACCOUNT ));if (!kvm->buses[i]) - goto out_err_no_arch_destroy_vm; + goto out_err_no_disable; } kvm->max_halt_poll_ns = halt_poll_ns; - r =kvm_arch_init_vm (kvm, type); -if (r) - goto out_err_no_arch_destroy_vm; - r =hardware_enable_all ();if (r) goto out_err_no_disable; + r =kvm_arch_init_vm (kvm, type); +if (r) + goto out_err_no_arch_destroy_vm; +#ifdef CONFIG_HAVE_KVM_IRQFD INIT_HLIST_HEAD (&kvm->irq_ack_notifier_list);#endif
@@ -1188,10 +1188,10 @@ static struct kvm *kvm_create_vm(unsigned long type)mmu_notifier_unregister (&kvm->mmu_notifier, current->mm);#endif out_err_no_mmu_notifier: -hardware_disable_all (); -out_err_no_disable:kvm_arch_destroy_vm (kvm); out_err_no_arch_destroy_vm: +hardware_disable_all (); +out_err_no_disable:WARN_ON_ONCE (!refcount_dec_and_test (&kvm->users_count));for (i =0 ; i <KVM_NR_BUSES ; i++)kfree (kvm_get_bus (kvm, i));
Signature · 1 line
2.25.1
Re: [PATCH v7 007/102] KVM: Enable hardware before doing arch VM initialization
Quoted 9 lines · On Mon, 2022-06-27 at 14:52 -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
Swap the order of
hardware_enable_all()andkvm_arch_init_vm()to accommodate Intel's TDX, which needs VMX to be enabled during VM init in order to make SEAMCALLs.This also provides consistent ordering between
kvm_create_vm()andkvm_destroy_vm()with respect to callingkvm_arch_destroy_vm()andhardware_disable_all().
Quoted 50 lines
Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>Reviewed-by Paolo Bonzini <[email protected]>--- virt/kvm/kvm_main.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)virt/kvm/kvm_main.c +7
-7@@ -1138,19 +1138,19 @@ static struct kvm *kvm_create_vm(unsigned long type)rcu_assign_pointer (kvm->buses[i],kzalloc (sizeof (struct kvm_io_bus ),GFP_KERNEL_ACCOUNT ));if (!kvm->buses[i]) - goto out_err_no_arch_destroy_vm; + goto out_err_no_disable; } kvm->max_halt_poll_ns = halt_poll_ns; - r =kvm_arch_init_vm (kvm, type); -if (r) - goto out_err_no_arch_destroy_vm; - r =hardware_enable_all ();if (r) goto out_err_no_disable; + r =kvm_arch_init_vm (kvm, type); +if (r) + goto out_err_no_arch_destroy_vm; +#ifdef CONFIG_HAVE_KVM_IRQFD INIT_HLIST_HEAD (&kvm->irq_ack_notifier_list);#endif @@ -1188,10 +1188,10 @@ static struct kvm *kvm_create_vm(unsigned long type)mmu_notifier_unregister (&kvm->mmu_notifier, current->mm);#endif out_err_no_mmu_notifier: -hardware_disable_all (); -out_err_no_disable:kvm_arch_destroy_vm (kvm); out_err_no_arch_destroy_vm: +hardware_disable_all (); +out_err_no_disable:WARN_ON_ONCE (!refcount_dec_and_test (&kvm->users_count));for (i =0 ; i <KVM_NR_BUSES ; i++)kfree (kvm_get_bus (kvm, i));
PATCH v7 8/102 KVM: x86: Refactor KVM VMX module init/exit functions
In reply to [email protected]From: Isaku Yamahata <[email protected]>
Currently, KVM VMX module initialization/exit functions are a single function each. Refactor KVM VMX module initialization functions into KVM common part and VMX part so that TDX specific part can be added cleanly. Opportunistically refactor module exit function as well.
The current module initialization flow is, 1.) calculate the sizes of VMX kvm structure and VMX vcpu structure, 2.) hyper-v specific initialization 3.) report those sizes to the KVM common layer and KVM common initialization, and 4.) VMX specific system-wide initialization.
Refactor the KVM VMX module initialization function into functions with a wrapper function to separate VMX logic in vmx.c from a file, main.c, common among VMX and TDX. We have a wrapper function, "vt_init() {vmx kvm/vcpu size calculation; hv_vp_assist_page_init(); kvm_init(); vmx_init(); }" in main.c, and hv_vp_assist_page_init() and vmx_init() in vmx.c. hv_vp_assist_page_init() initializes hyper-v specific assist pages, kvm_init() does system-wide initialization of the KVM common layer, and vmx_init() does system-wide VMX initialization.
The KVM architecture common layer allocates struct kvm with reported size for architecture-specific code. The KVM VMX module defines its structure as struct vmx_kvm { struct kvm; VMX specific members;} and uses it as struct vmx kvm. Similar for vcpu structure. TDX KVM patches will define TDX specific kvm and vcpu structures, add tdx_pre_kvm_init() to report the sizes of them to the KVM common layer.
The current module exit function is also a single function, a combination of VMX specific logic and common KVM logic. Refactor it into VMX specific logic and KVM common logic. This is just refactoring to keep the VMX specific logic in vmx.c from main.c.
--- arch/x86/kvm/vmx/main.c | 38 +++++++++++++ arch/x86/kvm/vmx/vmx.c | 106 ++++++++++++++++++------------------- arch/x86/kvm/vmx/x86_ops.h | 6 +++ 3 files changed, 95 insertions(+), 55 deletions(-)
arch/x86/kvm/vmx/main.c +38 -0
@@ -169,3 +169,41 @@ struct kvm_x86_init_ops vt_init_ops __initdata = { .runtime_ops = &vt_x86_ops, .pmu_ops = &intel_pmu_ops, }; + +static int __init vt_init (void ) +{ +unsigned int vcpu_size, vcpu_align; +int r; + + vt_x86_ops.vm_size =sizeof (struct kvm_vmx ); + vcpu_size =sizeof (struct vcpu_vmx ); + vcpu_align = __alignof__(struct vcpu_vmx ); + +hv_vp_assist_page_init (); +vmx_init_early (); + + r =kvm_init (&vt_init_ops, vcpu_size, vcpu_align,THIS_MODULE ); +if (r) + goto err_vmx_post_exit; + + r =vmx_init (); +if (r) + goto err_kvm_exit; + +return 0 ; + +err_kvm_exit: +kvm_exit (); +err_vmx_post_exit: +hv_vp_assist_page_exit (); +return r; +} +module_init (vt_init); + +static void vt_exit (void ) +{ +vmx_exit (); +kvm_exit (); +hv_vp_assist_page_exit (); +} +module_exit (vt_exit);
arch/x86/kvm/vmx/vmx.c +51 -55
143 lines not on this page · raw message
arch/x86/kvm/vmx/x86_ops.h +6 -0
@@ -8,6 +8,12 @@#include "x86.h" +void __init hv_vp_assist_page_init (void ); +void hv_vp_assist_page_exit (void ); +void __init vmx_init_early (void ); +int __init vmx_init (void ); +void vmx_exit (void ); +__init int vmx_cpu_has_kvm_support (void );__init int vmx_disabled_by_bios (void );__init int vmx_hardware_setup (void );
Signature · 1 line
2.25.1
Re: [PATCH v7 008/102] KVM: x86: Refactor KVM VMX module init/exit functions
Quoted 28 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
Currently, KVM VMX module initialization/exit functions are a single function each. Refactor KVM VMX module initialization functions into KVM common part and VMX part so that TDX specific part can be added cleanly. Opportunistically refactor module exit function as well.
The current module initialization flow is, 1.) calculate the sizes of VMX kvm structure and VMX vcpu structure, 2.) hyper-v specific initialization 3.) report those sizes to the KVM common layer and KVM common initialization, and 4.) VMX specific system-wide initialization.
Refactor the KVM VMX module initialization function into functions with a wrapper function to separate VMX logic in
vmx.cfrom a file,main.c, common among VMX and TDX. We have a wrapper function, "vt_init(){vmx kvm/vcpu size calculation;hv_vp_assist_page_init();kvm_init();vmx_init(); }" inmain.c, andhv_vp_assist_page_init()andvmx_init()invmx.c.hv_vp_assist_page_init()initializes hyper-v specific assist pages,kvm_init()does system-wide initialization of the KVM common layer, andvmx_init()does system-wide VMX initialization.The KVM architecture common layer allocates struct kvm with reported size for architecture-specific code. The KVM VMX module defines its structure as struct
vmx_kvm{ struct kvm; VMX specific members;} and uses it as struct vmx kvm. Similar for vcpu structure. TDX KVM patches will define TDX specific kvm and vcpu structures, addtdx_pre_kvm_init()to report the sizes of them to the KVM common layer.
Quoted 4 lines
The current module exit function is also a single function, a combination of VMX specific logic and common KVM logic. Refactor it into VMX specific logic and KVM common logic. This is just refactoring to keep the VMX specific logic in
vmx.cfrommain.c.
This patch, coupled with the patch:
KVM: VMX: Move out vmx_x86_ops to 'main.c' to wrap VMX and TDX
Basically provides an infrastructure to support both VMX and TDX. Why we cannot merge them into one patch? What's the benefit of splitting them?
At least, why the two patches cannot be put together closely?
Quoted 223 lines
Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/vmx/main.c | 38 +++++++++++++ arch/x86/kvm/vmx/vmx.c | 106 ++++++++++++++++++------------------- arch/x86/kvm/vmx/x86_ops.h | 6 +++ 3 files changed, 95 insertions(+), 55 deletions(-)arch/x86/kvm/vmx/main.c +38
-0@@ -169,3 +169,41 @@ struct kvm_x86_init_ops vt_init_ops __initdata = { .runtime_ops = &vt_x86_ops, .pmu_ops = &intel_pmu_ops, }; + +static int __init vt_init (void ) +{ +unsigned int vcpu_size, vcpu_align; +int r; + + vt_x86_ops.vm_size =sizeof (struct kvm_vmx ); + vcpu_size =sizeof (struct vcpu_vmx ); + vcpu_align = __alignof__(struct vcpu_vmx ); + +hv_vp_assist_page_init (); +vmx_init_early (); + + r =kvm_init (&vt_init_ops, vcpu_size, vcpu_align,THIS_MODULE ); +if (r) + goto err_vmx_post_exit; + + r =vmx_init (); +if (r) + goto err_kvm_exit; + +return 0 ; + +err_kvm_exit: +kvm_exit (); +err_vmx_post_exit: +hv_vp_assist_page_exit (); +return r; +} +module_init (vt_init); + +static void vt_exit (void ) +{ +vmx_exit (); +kvm_exit (); +hv_vp_assist_page_exit (); +} +module_exit (vt_exit);arch/x86/kvm/vmx/vmx.c +51
-55@@ -8181,15 +8181,45 @@ static void vmx_cleanup_l1d_flush(void) l1tf_vmx_mitigation =VMENTER_L1D_FLUSH_AUTO ; } -static void vmx_exit (void ) +void __init hv_vp_assist_page_init (void ) { -#ifdef CONFIG_KEXEC_CORE -RCU_INIT_POINTER (crash_vmclear_loaded_vmcss,NULL ); -synchronize_rcu (); -#endif +#if IS_ENABLED (CONFIG_HYPERV ) +/* +* Enlightened VMCS usage should be recommended and the host needs +* to support eVMCS v1 or above. We can also disable eVMCS support +* with module parameter. +*/ +if (enlightened_vmcs && + ms_hyperv.hints &HV_X64_ENLIGHTENED_VMCS_RECOMMENDED && + (ms_hyperv.nested_features &HV_X64_ENLIGHTENED_VMCS_VERSION ) >= +KVM_EVMCS_VERSION ) { +int cpu; + +/* Check that we have assist pages on all online CPUs */ +for_each_online_cpu (cpu) { +if (!hv_get_vp_assist_page (cpu)) { + enlightened_vmcs = false; +break ; + } + } -kvm_exit (); +if (enlightened_vmcs) { +pr_info ("KVM: vmx: using Hyper-V Enlightened VMCS\n" ); +static_branch_enable (&enable_evmcs); + } + +if (ms_hyperv.nested_features &HV_X64_NESTED_DIRECT_FLUSH ) + vt_x86_ops.enable_direct_tlbflush + = hv_enable_direct_tlbflush; + }else { + enlightened_vmcs = false; + } +#endif +} + +void hv_vp_assist_page_exit (void ) +{#if IS_ENABLED (CONFIG_HYPERV )if (static_branch_unlikely (&enable_evmcs)) {int cpu;@@ -8213,14 +8243,10 @@ static void vmx_exit(void) static_branch_disable(&enable_evmcs); }#endif -vmx_cleanup_l1d_flush (); - - allow_smaller_maxphyaddr = false; } -module_exit (vmx_exit);/* initialize before kvm_init() so that hardware_enable/disable() can work. */ -static void __init vmx_init_early (void ) +void __init vmx_init_early (void ) {int cpu;@@ -8228,49 +8254,10 @@ static void __init vmx_init_early(void)INIT_LIST_HEAD (&per_cpu (loaded_vmcss_on_cpu, cpu)); } -static int __init vmx_init (void ) +int __init vmx_init (void ) {int r, cpu; -#if IS_ENABLED (CONFIG_HYPERV ) -/* -* Enlightened VMCS usage should be recommended and the host needs -* to support eVMCS v1 or above. We can also disable eVMCS support -* with module parameter. -*/ -if (enlightened_vmcs && - ms_hyperv.hints &HV_X64_ENLIGHTENED_VMCS_RECOMMENDED && - (ms_hyperv.nested_features &HV_X64_ENLIGHTENED_VMCS_VERSION ) >= -KVM_EVMCS_VERSION ) { - -/* Check that we have assist pages on all online CPUs */ -for_each_online_cpu (cpu) { -if (!hv_get_vp_assist_page (cpu)) { - enlightened_vmcs = false; -break ; - } - } - -if (enlightened_vmcs) { -pr_info ("KVM: vmx: using Hyper-V Enlightened VMCS\n" ); -static_branch_enable (&enable_evmcs); - } - -if (ms_hyperv.nested_features &HV_X64_NESTED_DIRECT_FLUSH ) - vt_x86_ops.enable_direct_tlbflush - = hv_enable_direct_tlbflush; - - }else { - enlightened_vmcs = false; - } -#endif - -vmx_init_early (); - r =kvm_init (&vt_init_ops,sizeof (struct vcpu_vmx ), - __alignof__(struct vcpu_vmx ),THIS_MODULE ); -if (r) -return r; -/* * Must be called after kvm_init() so enable_ept is properly set * up. Hand the parameter mitigation value in which was stored in @@ -8279,10 +8266,8 @@ static int __init vmx_init(void)* mitigation mode. */ r =vmx_setup_l1d_flush (vmentry_l1d_flush_param); -if (r) { -vmx_exit (); +if (r)return r; - }for_each_possible_cpu (cpu)pi_init_cpu (cpu);@@ -8303,4 +8288,15 @@ static int __init vmx_init(void)return 0 ; } -module_init (vmx_init); + +void vmx_exit (void ) +{ +#ifdef CONFIG_KEXEC_CORE +RCU_INIT_POINTER (crash_vmclear_loaded_vmcss,NULL ); +synchronize_rcu (); +#endif + +vmx_cleanup_l1d_flush (); + + allow_smaller_maxphyaddr = false; +}arch/x86/kvm/vmx/x86_ops.h +6
-0@@ -8,6 +8,12 @@#include "x86.h" +void __init hv_vp_assist_page_init (void ); +void hv_vp_assist_page_exit (void ); +void __init vmx_init_early (void ); +int __init vmx_init (void ); +void vmx_exit (void ); +__init int vmx_cpu_has_kvm_support (void );__init int vmx_disabled_by_bios (void );__init int vmx_hardware_setup (void );
Re: [PATCH v7 008/102] KVM: x86: Refactor KVM VMX module init/exit functions
Quoted 34 lines · Kai Huang
Quoted 28 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
Currently, KVM VMX module initialization/exit functions are a single function each. Refactor KVM VMX module initialization functions into KVM common part and VMX part so that TDX specific part can be added cleanly. Opportunistically refactor module exit function as well.
The current module initialization flow is, 1.) calculate the sizes of VMX kvm structure and VMX vcpu structure, 2.) hyper-v specific initialization 3.) report those sizes to the KVM common layer and KVM common initialization, and 4.) VMX specific system-wide initialization.
Refactor the KVM VMX module initialization function into functions with a wrapper function to separate VMX logic in
vmx.cfrom a file,main.c, common among VMX and TDX. We have a wrapper function, "vt_init(){vmx kvm/vcpu size calculation;hv_vp_assist_page_init();kvm_init();vmx_init(); }" inmain.c, andhv_vp_assist_page_init()andvmx_init()invmx.c.hv_vp_assist_page_init()initializes hyper-v specific assist pages,kvm_init()does system-wide initialization of the KVM common layer, andvmx_init()does system-wide VMX initialization.The KVM architecture common layer allocates struct kvm with reported size for architecture-specific code. The KVM VMX module defines its structure as struct
vmx_kvm{ struct kvm; VMX specific members;} and uses it as struct vmx kvm. Similar for vcpu structure. TDX KVM patches will define TDX specific kvm and vcpu structures, addtdx_pre_kvm_init()to report the sizes of them to the KVM common layer.Quoted 4 lines
The current module exit function is also a single function, a combination of VMX specific logic and common KVM logic. Refactor it into VMX specific logic and KVM common logic. This is just refactoring to keep the VMX specific logic in
vmx.cfrommain.c.
Quoted 8 lines
This patch, coupled with the patch:
KVM: VMX: Move out
vmx_x86_opsto 'main.c' to wrap VMX and TDXBasically provides an infrastructure to support both VMX and TDX. Why we cannot merge them into one patch? What's the benefit of splitting them?
At least, why the two patches cannot be put together closely?
It is trivial for the change of "KVM: VMX: Move out vmx_x86_ops to 'main.c' to wrap VMX and TDX" to introduce no functional change. But it's not trivial for this patch to introduce no functional change.
So I moved this patch right after the main.c patch.
Signature · 1 line
Isaku Yamahata <[email protected]>
Re: [PATCH v7 008/102] KVM: x86: Refactor KVM VMX module init/exit functions
Quoted 41 lines · Isaku Yamahata
Quoted 38 lines · Kai Huang
Quoted 28 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
Currently, KVM VMX module initialization/exit functions are a single function each. Refactor KVM VMX module initialization functions into KVM common part and VMX part so that TDX specific part can be added cleanly. Opportunistically refactor module exit function as well.
The current module initialization flow is, 1.) calculate the sizes of VMX kvm structure and VMX vcpu structure, 2.) hyper-v specific initialization 3.) report those sizes to the KVM common layer and KVM common initialization, and 4.) VMX specific system-wide initialization.
Refactor the KVM VMX module initialization function into functions with a wrapper function to separate VMX logic in
vmx.cfrom a file,main.c, common among VMX and TDX. We have a wrapper function, "vt_init(){vmx kvm/vcpu size calculation;hv_vp_assist_page_init();kvm_init();vmx_init(); }" inmain.c, andhv_vp_assist_page_init()andvmx_init()invmx.c.hv_vp_assist_page_init()initializes hyper-v specific assist pages,kvm_init()does system-wide initialization of the KVM common layer, andvmx_init()does system-wide VMX initialization.The KVM architecture common layer allocates struct kvm with reported size for architecture-specific code. The KVM VMX module defines its structure as struct
vmx_kvm{ struct kvm; VMX specific members;} and uses it as struct vmx kvm. Similar for vcpu structure. TDX KVM patches will define TDX specific kvm and vcpu structures, addtdx_pre_kvm_init()to report the sizes of them to the KVM common layer.Quoted 4 lines
The current module exit function is also a single function, a combination of VMX specific logic and common KVM logic. Refactor it into VMX specific logic and KVM common logic. This is just refactoring to keep the VMX specific logic in
vmx.cfrommain.c.This patch, coupled with the patch:
KVM: VMX: Move out
vmx_x86_opsto 'main.c' to wrap VMX and TDX
Quoted 8 lines
Quoted 4 lines
Basically provides an infrastructure to support both VMX and TDX. Why we cannot merge them into one patch? What's the benefit of splitting them?
At least, why the two patches cannot be put together closely?
It is trivial for the change of "KVM: VMX: Move out
vmx_x86_opsto 'main.c' to wrap VMX and TDX" to introduce no functional change. But it's not trivial for this patch to introduce no functional change.
This doesn't sound right. If I understand correctly, this patch supposedly shouldn't bring any functional change, right? Could you explain what functional change does this patch bring?
Re: [PATCH v7 008/102] KVM: x86: Refactor KVM VMX module init/exit functions
Quoted 47 lines · Kai Huang
Quoted 46 lines · Isaku Yamahata
Quoted 42 lines · Kai Huang
Quoted 28 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
Currently, KVM VMX module initialization/exit functions are a single function each. Refactor KVM VMX module initialization functions into KVM common part and VMX part so that TDX specific part can be added cleanly. Opportunistically refactor module exit function as well.
The current module initialization flow is, 1.) calculate the sizes of VMX kvm structure and VMX vcpu structure, 2.) hyper-v specific initialization 3.) report those sizes to the KVM common layer and KVM common initialization, and 4.) VMX specific system-wide initialization.
Refactor the KVM VMX module initialization function into functions with a wrapper function to separate VMX logic in
vmx.cfrom a file,main.c, common among VMX and TDX. We have a wrapper function, "vt_init(){vmx kvm/vcpu size calculation;hv_vp_assist_page_init();kvm_init();vmx_init(); }" inmain.c, andhv_vp_assist_page_init()andvmx_init()invmx.c.hv_vp_assist_page_init()initializes hyper-v specific assist pages,kvm_init()does system-wide initialization of the KVM common layer, andvmx_init()does system-wide VMX initialization.The KVM architecture common layer allocates struct kvm with reported size for architecture-specific code. The KVM VMX module defines its structure as struct
vmx_kvm{ struct kvm; VMX specific members;} and uses it as struct vmx kvm. Similar for vcpu structure. TDX KVM patches will define TDX specific kvm and vcpu structures, addtdx_pre_kvm_init()to report the sizes of them to the KVM common layer.Quoted 4 lines
The current module exit function is also a single function, a combination of VMX specific logic and common KVM logic. Refactor it into VMX specific logic and KVM common logic. This is just refactoring to keep the VMX specific logic in
vmx.cfrommain.c.This patch, coupled with the patch:
KVM: VMX: Move out
vmx_x86_opsto 'main.c' to wrap VMX and TDXBasically provides an infrastructure to support both VMX and TDX. Why we cannot merge them into one patch? What's the benefit of splitting them?
At least, why the two patches cannot be put together closely?
Quoted 7 lines
Quoted 3 lines
It is trivial for the change of "KVM: VMX: Move out
vmx_x86_opsto 'main.c' to wrap VMX and TDX" to introduce no functional change. But it's not trivial for this patch to introduce no functional change.This doesn't sound right. If I understand correctly, this patch supposedly shouldn't bring any functional change, right? Could you explain what functional change does this patch bring?
This patch doesn't bring functional change. This patch changes orders of some function calls. It doesn't matter actually. But I think it's non-trivial.
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 9/102 KVM: TDX: Add placeholders for TDX VM/vcpu structure
In reply to [email protected]From: Isaku Yamahata <[email protected]>
Add placeholders TDX VM/vcpu structure that overlays with VMX VM/vcpu structures. Initialize VM structure size and vcpu size/align so that x86 KVM common code knows those size irrespective of VMX or TDX. Those structures will be populated as guest creation logic develops.
Add helper functions to check if the VM is guest TD and add conversion functions between KVM VM/VCPU and TDX VM/VCPU.
--- arch/x86/kvm/vmx/main.c | 8 +++--- arch/x86/kvm/vmx/tdx.c | 1 + arch/x86/kvm/vmx/tdx.h | 54 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 60 insertions(+), 3 deletions(-) create mode 100644 arch/x86/kvm/vmx/tdx.h
arch/x86/kvm/vmx/main.c +5 -3
@@ -5,6 +5,7 @@#include "vmx.h" #include "nested.h" #include "pmu.h" +#include "tdx.h" static bool __read_mostly enable_tdx =IS_ENABLED (CONFIG_INTEL_TDX_HOST );module_param_named (tdx, enable_tdx, bool,0444 );
@@ -175,9 +176,10 @@ static int __init vt_init(void)unsigned int vcpu_size, vcpu_align;int r; - vt_x86_ops.vm_size =sizeof (struct kvm_vmx ); - vcpu_size =sizeof (struct vcpu_vmx ); - vcpu_align = __alignof__(struct vcpu_vmx ); + vt_x86_ops.vm_size =max (sizeof (struct kvm_vmx ),sizeof (struct kvm_tdx )); + vcpu_size =max (sizeof (struct vcpu_vmx ),sizeof (struct vcpu_tdx )); + vcpu_align =max (__alignof__(struct vcpu_vmx ), + __alignof__(struct vcpu_tdx ));hv_vp_assist_page_init ();vmx_init_early ();
arch/x86/kvm/vmx/tdx.c +1 -0
@@ -5,6 +5,7 @@#include "capabilities.h" #include "x86_ops.h" +#include "tdx.h" #undef pr_fmt#define pr_fmt (fmt) "tdx: " fmt
arch/x86/kvm/vmx/tdx.h new file +54 -0
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Signature · 1 line
2.25.1
PATCH v7 10/102 x86/virt/tdx: Add a helper function to return system wide info about TDX module
In reply to [email protected]From: Isaku Yamahata <[email protected]>
TDX KVM needs system-wide information about the TDX module, struct tdsysinfo_struct. Add a helper function tdx_get_sysinfo() to return it instead of KVM getting it with various error checks. Move out the struct definition about it to common place tdx_host.h.
--- arch/x86/include/asm/tdx.h | 55 +++++++++++++++++++++++++++++++++++++ arch/x86/virt/vmx/tdx/tdx.c | 20 +++++++++++--- arch/x86/virt/vmx/tdx/tdx.h | 52 ----------------------------------- 3 files changed, 71 insertions(+), 56 deletions(-)
arch/x86/include/asm/tdx.h +55 -0
@@ -89,11 +89,66 @@ static inline long tdx_kvm_hypercall(unsigned int nr, unsigned long p1,#endif /* CONFIG_INTEL_TDX_GUEST && CONFIG_KVM_GUEST */ #ifdef CONFIG_INTEL_TDX_HOST +struct tdx_cpuid_config { +u32 leaf; +u32 sub_leaf; +u32 eax; +u32 ebx; +u32 ecx; +u32 edx; +} __packed; + +#define TDSYSINFO_STRUCT_SIZE 1024 +#define TDSYSINFO_STRUCT_ALIGNMENT 1024 + +struct tdsysinfo_struct { +/* TDX-SEAM Module Info */ +u32 attributes; +u32 vendor_id; +u32 build_date; +u16 build_num; +u16 minor_version; +u16 major_version; +u8 reserved0[14 ]; +/* Memory Info */ +u16 max_tdmrs; +u16 max_reserved_per_tdmr; +u16 pamt_entry_size; +u8 reserved1[10 ]; +/* Control Struct Info */ +u16 tdcs_base_size; +u8 reserved2[2 ]; +u16 tdvps_base_size; +u8 tdvps_xfam_dependent_size; +u8 reserved3[9 ]; +/* TD Capabilities */ +u64 attributes_fixed0; +u64 attributes_fixed1; +u64 xfam_fixed0; +u64 xfam_fixed1; +u8 reserved4[32 ]; +u32 num_cpuid_config; +/* +* The actual number of CPUID_CONFIG depends on above +* 'num_cpuid_config'. The size of 'struct tdsysinfo_struct' +* is 1024B defined by TDX architecture. Use a union with +* specific padding to make 'sizeof(struct tdsysinfo_struct)' +* equal to 1024. +*/ +union { +struct tdx_cpuid_config cpuid_configs[0 ]; +u8 reserved5[892 ]; + }; +} __packed__aligned(TDSYSINFO_STRUCT_ALIGNMENT) ; +bool platform_tdx_enabled (void );int tdx_init (void ); +const struct tdsysinfo_struct *tdx_get_sysinfo (void );#else /* !CONFIG_INTEL_TDX_HOST */ static inline bool platform_tdx_enabled (void ) {return false; }static inline int tdx_init (void ) {return -ENODEV ; } +struct tdsysinfo_struct ; +static inline const struct tdsysinfo_struct *tdx_get_sysinfo (void ) {return NULL ; }#endif /* CONFIG_INTEL_TDX_HOST */ #endif /* !__ASSEMBLY__ */
arch/x86/virt/vmx/tdx/tdx.c +16 -4
@@ -364,9 +364,9 @@ static int check_cmrs(struct cmr_info *cmr_array, int *actual_cmr_num)return 0 ; } -static int tdx_get_sysinfo (struct tdsysinfo_struct *tdsysinfo, -struct cmr_info *cmr_array, -int *actual_cmr_num) +static int __tdx_get_sysinfo (struct tdsysinfo_struct *tdsysinfo, +struct cmr_info *cmr_array, +int *actual_cmr_num) {struct tdx_module_output out;u64 ret;
@@ -393,6 +393,18 @@ static int tdx_get_sysinfo(struct tdsysinfo_struct *tdsysinfo,return check_cmrs (cmr_array, actual_cmr_num); } +const struct tdsysinfo_struct *tdx_get_sysinfo (void ) +{ +const struct tdsysinfo_struct *r =NULL ; + +mutex_lock (&tdx_module_lock); +if (tdx_module_status ==TDX_MODULE_INITIALIZED ) + r = &tdx_sysinfo; +mutex_unlock (&tdx_module_lock); +return r; +} +EXPORT_SYMBOL_GPL (tdx_get_sysinfo); +/* * Skip the memory region below 1MB. Return true if the entire * region is skipped. Otherwise, the updated range is returned.
@@ -1116,7 +1128,7 @@ static int init_tdx_module(void)if (ret) goto out; - ret =tdx_get_sysinfo (&tdx_sysinfo, tdx_cmr_array, &tdx_cmr_num); + ret =__tdx_get_sysinfo (&tdx_sysinfo, tdx_cmr_array, &tdx_cmr_num);if (ret) goto out;
arch/x86/virt/vmx/tdx/tdx.h +0 -52
58 lines not on this page · raw message
Signature · 1 line
2.25.1
Re: [PATCH v7 010/102] x86/virt/tdx: Add a helper function to return system wide info about TDX module
Quoted 6 lines · On Mon, Jun 27, 2022 at 02:53:02PM -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
TDX KVM needs system-wide information about the TDX module, struct
tdsysinfo_struct. Add a helper functiontdx_get_sysinfo()to return it instead of KVM getting it with various error checks. Move out the struct definition about it to common placetdx_host.h.
Please correct the tdx_host.h to tdx.h or arch/x86/include/asm/tdx.h
Quoted 190 lines
Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/tdx.h | 55 +++++++++++++++++++++++++++++++++++++ arch/x86/virt/vmx/tdx/tdx.c | 20 +++++++++++--- arch/x86/virt/vmx/tdx/tdx.h | 52 ----------------------------------- 3 files changed, 71 insertions(+), 56 deletions(-)arch/x86/include/asm/tdx.h +55
-0@@ -89,11 +89,66 @@ static inline long tdx_kvm_hypercall(unsigned int nr, unsigned long p1,#endif /* CONFIG_INTEL_TDX_GUEST && CONFIG_KVM_GUEST */ #ifdef CONFIG_INTEL_TDX_HOST +struct tdx_cpuid_config { +u32 leaf; +u32 sub_leaf; +u32 eax; +u32 ebx; +u32 ecx; +u32 edx; +} __packed; + +#define TDSYSINFO_STRUCT_SIZE 1024 +#define TDSYSINFO_STRUCT_ALIGNMENT 1024 + +struct tdsysinfo_struct { +/* TDX-SEAM Module Info */ +u32 attributes; +u32 vendor_id; +u32 build_date; +u16 build_num; +u16 minor_version; +u16 major_version; +u8 reserved0[14 ]; +/* Memory Info */ +u16 max_tdmrs; +u16 max_reserved_per_tdmr; +u16 pamt_entry_size; +u8 reserved1[10 ]; +/* Control Struct Info */ +u16 tdcs_base_size; +u8 reserved2[2 ]; +u16 tdvps_base_size; +u8 tdvps_xfam_dependent_size; +u8 reserved3[9 ]; +/* TD Capabilities */ +u64 attributes_fixed0; +u64 attributes_fixed1; +u64 xfam_fixed0; +u64 xfam_fixed1; +u8 reserved4[32 ]; +u32 num_cpuid_config; +/* +* The actual number of CPUID_CONFIG depends on above +* 'num_cpuid_config'. The size of 'struct tdsysinfo_struct' +* is 1024B defined by TDX architecture. Use a union with +* specific padding to make 'sizeof(struct tdsysinfo_struct)' +* equal to 1024. +*/ +union { +struct tdx_cpuid_config cpuid_configs[0 ]; +u8 reserved5[892 ]; + }; +} __packed__aligned(TDSYSINFO_STRUCT_ALIGNMENT) ; +bool platform_tdx_enabled (void );int tdx_init (void ); +const struct tdsysinfo_struct *tdx_get_sysinfo (void );#else /* !CONFIG_INTEL_TDX_HOST */ static inline bool platform_tdx_enabled (void ) {return false; }static inline int tdx_init (void ) {return -ENODEV ; } +struct tdsysinfo_struct ; +static inline const struct tdsysinfo_struct *tdx_get_sysinfo (void ) {return NULL ; }#endif /* CONFIG_INTEL_TDX_HOST */ #endif /* !__ASSEMBLY__ */ arch/x86/virt/vmx/tdx/tdx.c +16
-4@@ -364,9 +364,9 @@ static int check_cmrs(struct cmr_info *cmr_array, int *actual_cmr_num)return 0 ; } -static int tdx_get_sysinfo (struct tdsysinfo_struct *tdsysinfo, -struct cmr_info *cmr_array, -int *actual_cmr_num) +static int __tdx_get_sysinfo (struct tdsysinfo_struct *tdsysinfo, +struct cmr_info *cmr_array, +int *actual_cmr_num) {struct tdx_module_output out;u64 ret;@@ -393,6 +393,18 @@ static int tdx_get_sysinfo(struct tdsysinfo_struct *tdsysinfo,return check_cmrs (cmr_array, actual_cmr_num); } +const struct tdsysinfo_struct *tdx_get_sysinfo (void ) +{ +const struct tdsysinfo_struct *r =NULL ; + +mutex_lock (&tdx_module_lock); +if (tdx_module_status ==TDX_MODULE_INITIALIZED ) + r = &tdx_sysinfo; +mutex_unlock (&tdx_module_lock); +return r; +} +EXPORT_SYMBOL_GPL (tdx_get_sysinfo); +/* * Skip the memory region below 1MB. Return true if the entire * region is skipped. Otherwise, the updated range is returned. @@ -1116,7 +1128,7 @@ static int init_tdx_module(void)if (ret) goto out; - ret =tdx_get_sysinfo (&tdx_sysinfo, tdx_cmr_array, &tdx_cmr_num); + ret =__tdx_get_sysinfo (&tdx_sysinfo, tdx_cmr_array, &tdx_cmr_num);if (ret) goto out;arch/x86/virt/vmx/tdx/tdx.h +0
-53@@ -65,58 +65,6 @@ struct cmr_info {#define MAX_CMRS 32#define CMR_INFO_ARRAY_ALIGNMENT 512 -struct cpuid_config { -u32 leaf; -u32 sub_leaf; -u32 eax; -u32 ebx; -u32 ecx; -u32 edx; -} __packed; - -#define TDSYSINFO_STRUCT_SIZE 1024 -#define TDSYSINFO_STRUCT_ALIGNMENT 1024 - -struct tdsysinfo_struct { -/* TDX-SEAM Module Info */ -u32 attributes; -u32 vendor_id; -u32 build_date; -u16 build_num; -u16 minor_version; -u16 major_version; -u8 reserved0[14 ]; -/* Memory Info */ -u16 max_tdmrs; -u16 max_reserved_per_tdmr; -u16 pamt_entry_size; -u8 reserved1[10 ]; -/* Control Struct Info */ -u16 tdcs_base_size; -u8 reserved2[2 ]; -u16 tdvps_base_size; -u8 tdvps_xfam_dependent_size; -u8 reserved3[9 ]; -/* TD Capabilities */ -u64 attributes_fixed0; -u64 attributes_fixed1; -u64 xfam_fixed0; -u64 xfam_fixed1; -u8 reserved4[32 ]; -u32 num_cpuid_config; -/* -* The actual number of CPUID_CONFIG depends on above -* 'num_cpuid_config'. The size of 'struct tdsysinfo_struct' -* is 1024B defined by TDX architecture. Use a union with -* specific padding to make 'sizeof(struct tdsysinfo_struct)' -* equal to 1024. -*/ -union { -struct cpuid_config cpuid_configs[0 ]; -u8 reserved5[892 ]; - }; -} __packed__aligned(TDSYSINFO_STRUCT_ALIGNMENT) ; -struct tdmr_reserved_area {u64 offset;u64 size; --2.25.1
Re: [PATCH v7 010/102] x86/virt/tdx: Add a helper function to return system wide info about TDX module
Quoted 9 lines · Yuan Yao
Quoted 6 lines · On Mon, Jun 27, 2022 at 02:53:02PM -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
TDX KVM needs system-wide information about the TDX module, struct
tdsysinfo_struct. Add a helper functiontdx_get_sysinfo()to return it instead of KVM getting it with various error checks. Move out the struct definition about it to common placetdx_host.h.Please correct the
tdx_host.htotdx.horarch/x86/include/asm/tdx.h
Oops. Thanks for catching it. fixed it.
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 11/102 KVM: TDX: Initialize TDX module when loading kvm_intel.ko
In reply to [email protected]From: Isaku Yamahata <[email protected]>
To use TDX functionality, TDX module needs to be loaded and initialized. A TDX host patch series[1] implements the detection of the TDX module, tdx_detect() and its initialization, tdx_init().
This patch is to call those functions, tdx_detect() and tdx_init(), when loading kvm_intel.ko.
Add a hook, kvm_arch_post_hardware_enable_setup, to module initialization while hardware is enabled, i.e. after hardware_enable_all() and before hardware_disable_all(). Because TDX requires all present CPUs to enable VMX (VMXON).
[1] https://lore.kernel.org/lkml/[email protected]/
--- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/vmx/main.c | 11 ++++++ arch/x86/kvm/vmx/tdx.c | 60 +++++++++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 4 +++ arch/x86/kvm/x86.c | 8 +++++ 5 files changed, 84 insertions(+)
arch/x86/include/asm/kvm_host.h +1 -0
@@ -1639,6 +1639,7 @@ struct kvm_x86_init_ops {int (*cpu_has_kvm_support)(void );int (*disabled_by_bios)(void );int (*hardware_setup)(void ); +int (*post_hardware_enable_setup)(void );unsigned int (*handle_intel_pt_intr)(void );struct kvm_x86_ops *runtime_ops;
arch/x86/kvm/vmx/main.c +11 -0
@@ -23,6 +23,16 @@ static __init int vt_hardware_setup(void)return 0 ; } +static int __init vt_post_hardware_enable_setup (void ) +{ + enable_tdx = enable_tdx && !tdx_module_setup (); +/* +* Even if it failed to initialize TDX module, conventional VMX is +* available. Keep VMX usable. +*/ +return 0 ; +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,
@@ -165,6 +175,7 @@ struct kvm_x86_init_ops vt_init_ops __initdata = { .cpu_has_kvm_support = vmx_cpu_has_kvm_support, .disabled_by_bios = vmx_disabled_by_bios, .hardware_setup = vt_hardware_setup, + .post_hardware_enable_setup = vt_post_hardware_enable_setup, .handle_intel_pt_intr = NULL, .runtime_ops = &vt_x86_ops,
arch/x86/kvm/vmx/tdx.c +60 -0
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arch/x86/kvm/vmx/tdx.h +4 -0
@@ -3,6 +3,8 @@#define __KVM_X86_TDX_H #ifdef CONFIG_INTEL_TDX_HOST +int tdx_module_setup(void); + struct kvm_tdx { struct kvm kvm; /* TDX specific members follow. */
@@ -37,6 +39,8 @@ static inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu) return container_of(vcpu, struct vcpu_tdx, vcpu); }#else +static inline int tdx_module_setup (void ) {return -ENODEV ; }; +struct kvm_tdx {struct kvm kvm; };
arch/x86/kvm/x86.c +8 -0
@@ -11792,6 +11792,14 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ; } +int kvm_arch_post_hardware_enable_setup (void *opaque) +{ +struct kvm_x86_init_ops *ops = opaque; +if (ops->post_hardware_enable_setup) +return ops->post_hardware_enable_setup (); +return 0 ; +} +void kvm_arch_hardware_unsetup (void ) {kvm_unregister_perf_callbacks ();
Signature · 1 line
2.25.1
Re: [PATCH v7 011/102] KVM: TDX: Initialize TDX module when loading kvm_intel.ko
Quoted 5 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
To use TDX functionality, TDX module needs to be loaded and initialized. A TDX host patch series[1] implements the detection of the TDX module,
tdx_detect()and its initialization,tdx_init().
"A TDX host patch series[1]" really isn't a commit message material. You can put it to the cover letter, but not here.
Also tdx_detect() is removed in latest code.
Quoted 161 lines
This patch is to call those functions,
tdx_detect()andtdx_init(), when loading kvm_intel.ko.Add a hook,
kvm_arch_post_hardware_enable_setup, to module initialization while hardware is enabled, i.e. afterhardware_enable_all()and beforehardware_disable_all(). Because TDX requires all present CPUs to enable VMX (VMXON).[1] https://lore.kernel.org/lkml/[email protected]/
Suggested-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/vmx/main.c | 11 ++++++ arch/x86/kvm/vmx/tdx.c | 60 +++++++++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 4 +++ arch/x86/kvm/x86.c | 8 +++++ 5 files changed, 84 insertions(+)arch/x86/include/asm/kvm_host.h +1
-0@@ -1639,6 +1639,7 @@ struct kvm_x86_init_ops {int (*cpu_has_kvm_support)(void );int (*disabled_by_bios)(void );int (*hardware_setup)(void ); +int (*post_hardware_enable_setup)(void );unsigned int (*handle_intel_pt_intr)(void );struct kvm_x86_ops *runtime_ops;arch/x86/kvm/vmx/main.c +11
-0@@ -23,6 +23,16 @@ static __init int vt_hardware_setup(void)return 0 ; } +static int __init vt_post_hardware_enable_setup (void ) +{ + enable_tdx = enable_tdx && !tdx_module_setup (); +/* +* Even if it failed to initialize TDX module, conventional VMX is +* available. Keep VMX usable. +*/ +return 0 ; +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,@@ -165,6 +175,7 @@ struct kvm_x86_init_ops vt_init_ops __initdata = { .cpu_has_kvm_support = vmx_cpu_has_kvm_support, .disabled_by_bios = vmx_disabled_by_bios, .hardware_setup = vt_hardware_setup, + .post_hardware_enable_setup = vt_post_hardware_enable_setup, .handle_intel_pt_intr = NULL, .runtime_ops = &vt_x86_ops,arch/x86/kvm/vmx/tdx.c +60
-0@@ -13,6 +13,66 @@static u64 hkid_mask__ro_after_init ;static u8 hkid_start_pos__ro_after_init ; +#define TDX_MAX_NR_CPUID_CONFIGS \ + ((sizeof(struct tdsysinfo_struct) - \ + offsetof(struct tdsysinfo_struct, cpuid_configs)) \ + / sizeof(struct tdx_cpuid_config)) + +struct tdx_capabilities { +u8 tdcs_nr_pages; +u8 tdvpx_nr_pages; + +u64 attrs_fixed0; +u64 attrs_fixed1; +u64 xfam_fixed0; +u64 xfam_fixed1; + +u32 nr_cpuid_configs; +struct tdx_cpuid_config cpuid_configs[TDX_MAX_NR_CPUID_CONFIGS ]; +}; + +/* Capabilities of KVM + the TDX module. */ +static struct tdx_capabilities tdx_caps; + +int __init tdx_module_setup (void ) +{ +const struct tdsysinfo_struct *tdsysinfo; +int ret =0 ; + +BUILD_BUG_ON (sizeof (*tdsysinfo) !=1024 ); +BUILD_BUG_ON (TDX_MAX_NR_CPUID_CONFIGS !=37 ); + + ret =tdx_init (); +if (ret) { +pr_info ("Failed to initialize TDX module.\n" ); +return ret; + } + + tdsysinfo =tdx_get_sysinfo (); +if (tdsysinfo->num_cpuid_config >TDX_MAX_NR_CPUID_CONFIGS ) +return -EIO ; + + tdx_caps = (struct tdx_capabilities ) { + .tdcs_nr_pages = tdsysinfo->tdcs_base_size /PAGE_SIZE , +/* +* TDVPS = TDVPR(4K page) + TDVPX(multiple 4K pages). +* -1 for TDVPR. +*/ + .tdvpx_nr_pages = tdsysinfo->tdvps_base_size /PAGE_SIZE -1 , + .attrs_fixed0 = tdsysinfo->attributes_fixed0, + .attrs_fixed1 = tdsysinfo->attributes_fixed1, + .xfam_fixed0 = tdsysinfo->xfam_fixed0, + .xfam_fixed1 = tdsysinfo->xfam_fixed1, + .nr_cpuid_configs = tdsysinfo->num_cpuid_config, + }; +if (!memcpy (tdx_caps.cpuid_configs, tdsysinfo->cpuid_configs, + tdsysinfo->num_cpuid_config * +sizeof (struct tdx_cpuid_config ))) +return -EIO ; + +return 0 ; +} +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {u32 max_pa;arch/x86/kvm/vmx/tdx.h +4
-0@@ -3,6 +3,8 @@#define __KVM_X86_TDX_H #ifdef CONFIG_INTEL_TDX_HOST +int tdx_module_setup(void); + struct kvm_tdx { struct kvm kvm; /* TDX specific members follow. */@@ -37,6 +39,8 @@ static inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu) return container_of(vcpu, struct vcpu_tdx, vcpu); }#else +static inline int tdx_module_setup (void ) {return -ENODEV ; }; +struct kvm_tdx {struct kvm kvm; };arch/x86/kvm/x86.c +0
-0@@ -11792,6 +11792,14 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ;
arch/x86/kvm/x86.c int kvm_arch_hardware_setup(void *opaque) · line 11802
Quoted 10 lines
arch/x86/kvm/x86.c +8
-0} +int kvm_arch_post_hardware_enable_setup (void *opaque) +{ +struct kvm_x86_init_ops *ops = opaque; +if (ops->post_hardware_enable_setup) +return ops->post_hardware_enable_setup (); +return 0 ; +} +
Where is this kvm_arch_post_hardware_enable_setup() called?
Shouldn't the code change which calls it be part of this patch?
Quoted 3 lines
arch/x86/kvm/x86.c +0
-0void kvm_arch_hardware_unsetup (void ) {kvm_unregister_perf_callbacks ();
Re: [PATCH v7 011/102] KVM: TDX: Initialize TDX module when loading kvm_intel.ko
Quoted 11 lines · Kai Huang
Quoted 5 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
To use TDX functionality, TDX module needs to be loaded and initialized. A TDX host patch series[1] implements the detection of the TDX module,
tdx_detect()and its initialization,tdx_init()."A TDX host patch series[1]" really isn't a commit message material. You can put it to the cover letter, but not here.
Also
tdx_detect()is removed in latest code.
How about the followings?
KVM: TDX: Initialize TDX module when loading kvm_intel.ko
To use TDX functionality, TDX module needs to be loaded and initialized. This patch is to call a function, tdx_init(), when loading kvm_intel.ko.
Add a hook, kvm_arch_post_hardware_enable_setup, to module initialization while hardware is enabled, i.e. after hardware_enable_all() and before hardware_disable_all(). Because TDX requires all present CPUs to enable VMX (VMXON).
Quoted 19 lines
Quoted 6 lines
arch/x86/kvm/x86.c +0
-0@@ -11792,6 +11792,14 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ;arch/x86/kvm/x86.c int kvm_arch_hardware_setup(void *opaque) · line 11802
Quoted 10 lines
arch/x86/kvm/x86.c +8
-0} +int kvm_arch_post_hardware_enable_setup (void *opaque) +{ +struct kvm_x86_init_ops *ops = opaque; +if (ops->post_hardware_enable_setup) +return ops->post_hardware_enable_setup (); +return 0 ; +} +Where is this
kvm_arch_post_hardware_enable_setup()called?
Quoted 1 line
Shouldn't the code change which calls it be part of this patch?
The patch of "4/102 KVM: Refactor CPU compatibility check on module initialiization" introduces it. Because the patch affects multiple archs (mips, x86, poerpc, s390, and arm), I deliberately put it in early.
Signature · 1 line
Isaku Yamahata <[email protected]>
Re: [PATCH v7 011/102] KVM: TDX: Initialize TDX module when loading kvm_intel.ko
Quoted 10 lines · Isaku Yamahata
Quoted 7 lines · Kai Huang
Quoted 5 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
To use TDX functionality, TDX module needs to be loaded and initialized. A TDX host patch series[1] implements the detection of the TDX module,
tdx_detect()and its initialization,tdx_init().
Quoted 8 lines
Quoted 4 lines
"A TDX host patch series[1]" really isn't a commit message material. You can put it to the cover letter, but not here.
Also
tdx_detect()is removed in latest code.How about the followings?
KVM: TDX: Initialize TDX module when loading kvm_intel.ko
Personally don't like kvm_intel.ko in title (or changelog), but will leave to maintainers.
Quoted 3 lines
To use TDX functionality, TDX module needs to be loaded and initialized. This patch is to call a function,
tdx_init(), when loading kvm_intel.ko.
Could you add explain why we need to init TDX module when loading KVM module?
You don't have to say "call a function, tdx_init()", which can be easily seen in the code.
Quoted 5 lines
Add a hook,
kvm_arch_post_hardware_enable_setup, to module initialization while hardware is enabled, i.e. afterhardware_enable_all()and beforehardware_disable_all(). Because TDX requires all present CPUs to enable VMX (VMXON).
Please explicitly say it is a replacement of the default __weak version, so people can know there's already a default one. Otherwise people may wonder why this isn't called in this patch (i.e. I skipped patch 03 as it looks not directly related to TDX).
That being said, why cannot you send out that patch separately but have to include it into TDX series?
Looking at it, the only thing that is related to TDX is an empty kvm_arch_post_hardware_enable_setup() with a comment saying TDX needs to do something there. This logic has nothing to do with the actual job in that patch.
So why cannot we introduce that __weak version in this patch, so that the rest of it can be non-TDX related at all and can be upstreamed separately?
Quoted 20 lines
Quoted 20 lines
Quoted 7 lines
arch/x86/kvm/x86.c +0
-0@@ -11792,6 +11792,14 @@ int kvm_arch_hardware_setup(void *opaque)return 0 ;arch/x86/kvm/x86.c int kvm_arch_hardware_setup(void *opaque) · line 11802
Quoted 10 lines
arch/x86/kvm/x86.c +8
-0} +int kvm_arch_post_hardware_enable_setup (void *opaque) +{ +struct kvm_x86_init_ops *ops = opaque; +if (ops->post_hardware_enable_setup) +return ops->post_hardware_enable_setup (); +return 0 ; +} +Where is this
kvm_arch_post_hardware_enable_setup()called?
Quoted 5 lines
Quoted 1 line
Shouldn't the code change which calls it be part of this patch?
The patch of "4/102 KVM: Refactor CPU compatibility check on module initialiization" introduces it. Because the patch affects multiple archs (mips, x86, poerpc, s390, and arm), I deliberately put it in early.
It's patch 03, but not 04. And see above.
Re: [PATCH v7 011/102] KVM: TDX: Initialize TDX module when loading kvm_intel.ko
Quoted 4 lines · Kai Huang
Quoted 2 lines
To use TDX functionality, TDX module needs to be loaded and initialized. This patch is to call a function,
tdx_init(), when loading kvm_intel.ko.Could you add explain why we need to init TDX module when loading KVM module?
Makes sense. Added a paragraph for it.
Quoted 13 lines
Quoted 4 lines
Add a hook,
kvm_arch_post_hardware_enable_setup, to module initialization while hardware is enabled, i.e. afterhardware_enable_all()and beforehardware_disable_all(). Because TDX requires all present CPUs to enable VMX (VMXON).Please explicitly say it is a replacement of the default
__weakversion, so people can know there's already a default one. Otherwise people may wonder why this isn't called in this patch (i.e. I skipped patch 03 as it looks not directly related to TDX).That being said, why cannot you send out that patch separately but have to include it into TDX series?
Quoted 7 lines
Looking at it, the only thing that is related to TDX is an empty
kvm_arch_post_hardware_enable_setup()with a comment saying TDX needs to do something there. This logic has nothing to do with the actual job in that patch.So why cannot we introduce that
__weakversion in this patch, so that the rest of it can be non-TDX related at all and can be upstreamed separately?
The patch that adds weak kvm_arch_post_hardware_enable_setup() doesn't make sense without the hook because it only enable_hardware and then disable hardware immediately.
The patch touches multiple kvm arch. and I split out TDX specific part in this patch. Ideally those two patch should be near. But I move it early to draw attention for reviewers from multiple kvm arch.
Here is the updated version.
KVM: TDX: Initialize the TDX module when loading the KVM intel kernel module
To use TDX, the TDX module needs to be loaded and initialized. This patch is to call a function to initialize the TDX module when loading KVM intel kernel module.
There are several options on when to initialize the TDX module. A.) kernel boot time as builtin, B.) kernel module loading time, C.) the first guest TD creation time. B.) was chosen. A.) causes unnecessary overhead (boot time and memory) even when TDX isn't used. With C.), a user may hit an error of the TDX initialization when trying to create the first guest TD. The machine that fails to initialize the TDX module can't boot any guest TD further. Such failure is undesirable. B.) has a good balance between them.
Add a hook, kvm_arch_post_hardware_enable_setup, to module initialization while hardware is enabled, i.e. after hardware_enable_all() and before hardware_disable_all(). Because TDX requires all present CPUs to enable VMX (VMXON). The x86 specific kvm_arch_post_hardware_enable_setup overrides the existing weak symbol of kvm_arch_post_hardware_enable_setup which is called at the KVM module initialization.
Signature · 1 line
Isaku Yamahata <[email protected]>
Re: [PATCH v7 011/102] KVM: TDX: Initialize TDX module when loading kvm_intel.ko
Quoted 29 lines · Isaku Yamahata
Quoted 4 lines · Kai Huang
Quoted 2 lines
To use TDX functionality, TDX module needs to be loaded and initialized. This patch is to call a function,
tdx_init(), when loading kvm_intel.ko.Could you add explain why we need to init TDX module when loading KVM module?
Makes sense. Added a paragraph for it.
Quoted 18 lines
Quoted 4 lines
Add a hook,
kvm_arch_post_hardware_enable_setup, to module initialization while hardware is enabled, i.e. afterhardware_enable_all()and beforehardware_disable_all(). Because TDX requires all present CPUs to enable VMX (VMXON).Please explicitly say it is a replacement of the default
__weakversion, so people can know there's already a default one. Otherwise people may wonder why this isn't called in this patch (i.e. I skipped patch 03 as it looks not directly related to TDX).That being said, why cannot you send out that patch separately but have to include it into TDX series?
Looking at it, the only thing that is related to TDX is an empty
kvm_arch_post_hardware_enable_setup()with a comment saying TDX needs to do something there. This logic has nothing to do with the actual job in that patch.
Quoted 6 lines
Quoted 2 lines
So why cannot we introduce that
__weakversion in this patch, so that the rest of it can be non-TDX related at all and can be upstreamed separately?The patch that adds weak
kvm_arch_post_hardware_enable_setup()doesn't make sense without the hook because it onlyenable_hardwareand then disable hardware immediately.
It's not a disaster if you describe the reason to do so in the changelog, but no strong opinion here.
But I do think you need a comment to explain why disable hardware is called immediately. Is it because we want to maintain the current behaviour that we want to allow out-of-tree driver, i.e. virtualbox to be loaded when KVM is loaded?
Quoted 3 lines
The patch touches multiple kvm arch. and I split out TDX specific part in this patch. Ideally those two patch should be near. But I move it early to draw attention for reviewers from multiple kvm arch.
Explicitly say this is the replacement of the default __weak version is fine.
Quoted 9 lines
Here is the updated version.
KVM: TDX: Initialize the TDX module when loading the KVM intel kernel module
To use TDX, the TDX module needs to be loaded and initialized. This patch is to call a function to initialize the TDX module when loading KVM intel kernel module.
Quoted 8 lines
There are several options on when to initialize the TDX module. A.) kernel boot time as builtin, B.) kernel module loading time, C.) the first guest TD creation time. B.) was chosen. A.) causes unnecessary overhead (boot time and memory) even when TDX isn't used. With C.), a user may hit an error of the TDX initialization when trying to create the first guest TD. The machine that fails to initialize the TDX module can't boot any guest TD further. Such failure is undesirable. B.) has a good balance between them.
You don't need to mention A. When this patch is merged, the host series must have been merged already. In another words, this is already a fact, but not an option.
Quoted 5 lines
Add a hook,
kvm_arch_post_hardware_enable_setup, to module initialization while hardware is enabled, i.e. afterhardware_enable_all()and beforehardware_disable_all().
You don't need to say "add a hook ..., i.e. after hardware_enable_all() and before hardware_disable_all()". Where the function is called is already a fact. We have a __weak version already.
Quoted 5 lines
Because TDX requires all present CPUs to enable
VMX (VMXON). The x86 specifickvm_arch_post_hardware_enable_setupoverrides the existing weak symbol ofkvm_arch_post_hardware_enable_setupwhich is called at the KVM module initialization.
PATCH v7 12/102 KVM: x86: Introduce vm_type to differentiate default VMs from confidential VMs
In reply to [email protected]From: Sean Christopherson <[email protected]>
Unlike default VMs, confidential VMs (Intel TDX and AMD SEV-ES) don't allow some operations (e.g., memory read/write, register state access, etc).
Introduce vm_type to track the type of the VM to x86 KVM. Other arch KVMs already use vm_type, KVM_INIT_VM accepts vm_type, and x86 KVM callback vm_init accepts vm_type. So follow them. Further, a different policy can be made based on vm_type. Define KVM_X86_DEFAULT_VM for default VM as default and define KVM_X86_TDX_VM for Intel TDX VM. The wrapper function will be defined as "bool is_td(kvm) { return vm_type == VM_TYPE_TDX; }"
Add a capability KVM_CAP_VM_TYPES to effectively allow device model, e.g. qemu, to query what VM types are supported by KVM. This (introduce a new capability and add vm_type) is chosen to align with other arch KVMs that have VM types already. Other arch KVMs uses different name to query supported vm types and there is no common name for it, so new name was chosen.
--- Documentation/virt/kvm/api.rst | 21 +++++++++++++++++++++ arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/include/uapi/asm/kvm.h | 3 +++ arch/x86/kvm/svm/svm.c | 6 ++++++ arch/x86/kvm/vmx/main.c | 1 + arch/x86/kvm/vmx/tdx.h | 6 +----- arch/x86/kvm/vmx/vmx.c | 5 +++++ arch/x86/kvm/vmx/x86_ops.h | 1 + arch/x86/kvm/x86.c | 9 ++++++++- include/uapi/linux/kvm.h | 1 + tools/arch/x86/include/uapi/asm/kvm.h | 3 +++ tools/include/uapi/linux/kvm.h | 1 + 13 files changed, 54 insertions(+), 6 deletions(-)
Documentation/virt/kvm/api.rst +21 -0
@@ -147,10 +147,31 @@ described as 'basic' will be available. The new VM has no virtual cpus and no memory. You probably want to use 0 as machine type. +X86: +^^^^ + +Supported vm type can be queried from KVM_CAP_VM_TYPES, which returns the +bitmap of supported vm types. The 1-setting of bit @n means vm type with +value @n is supported. + +S390: +^^^^^ + In order to create user controlled virtual machines on S390, check KVM_CAP_S390_UCONTROL and use the flag KVM_VM_S390_UCONTROL as privileged user (CAP_SYS_ADMIN). +MIPS: +^^^^^ + +To use hardware assisted virtualization on MIPS (VZ ASE) rather than +the default trap & emulate implementation (which changes the virtual +memory layout to fit in user mode), check KVM_CAP_MIPS_VZ and use the +flag KVM_VM_MIPS_VZ. + +ARM64: +^^^^^^ + On arm64, the physical address size for a VM (IPA Size limit) is limited to 40bits by default. The limit can be configured if the host supports the extension KVM_CAP_ARM_VM_IPA_SIZE. When supported, use
arch/x86/include/asm/kvm-x86-ops.h +1 -0
@@ -19,6 +19,7 @@ KVM_X86_OP(hardware_disable) KVM_X86_OP(hardware_unsetup) KVM_X86_OP(has_emulated_msr) KVM_X86_OP(vcpu_after_set_cpuid) +KVM_X86_OP(is_vm_type_supported) KVM_X86_OP(vm_init) KVM_X86_OP_OPTIONAL(vm_destroy) KVM_X86_OP_OPTIONAL_RET0(vcpu_precreate)
arch/x86/include/asm/kvm_host.h +2 -0
@@ -1141,6 +1141,7 @@ enum kvm_apicv_inhibit { };struct kvm_arch { +unsigned long vm_type;unsigned long n_used_mmu_pages;unsigned long n_requested_mmu_pages;unsigned long n_max_mmu_pages;
@@ -1434,6 +1435,7 @@ struct kvm_x86_ops {bool (*has_emulated_msr)(struct kvm *kvm,u32 index);void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); +bool (*is_vm_type_supported)(unsigned long vm_type);unsigned int vm_size;int (*vm_init)(struct kvm *kvm);void (*vm_destroy)(struct kvm *kvm);
arch/x86/include/uapi/asm/kvm.h +3 -0
@@ -531,4 +531,7 @@ struct kvm_pmu_event_filter {#define KVM_VCPU_TSC_CTRL 0/* control group for the timestamp counter (TSC) */ #define KVM_VCPU_TSC_OFFSET 0/* attribute for the TSC offset */ +#define KVM_X86_DEFAULT_VM 0 +#define KVM_X86_TDX_VM 1 +#endif /* _ASM_X86_KVM_H */
arch/x86/kvm/svm/svm.c +6 -0
@@ -4685,6 +4685,11 @@ static void svm_vm_destroy(struct kvm *kvm)sev_vm_destroy (kvm); } +static bool svm_is_vm_type_supported (unsigned long type) +{ +return type ==KVM_X86_DEFAULT_VM ; +} +static int svm_vm_init (struct kvm *kvm) {if (!pause_filter_count || !pause_filter_thresh)
@@ -4712,6 +4717,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { .vcpu_free = svm_vcpu_free, .vcpu_reset = svm_vcpu_reset, + .is_vm_type_supported = svm_is_vm_type_supported, .vm_size = sizeof(struct kvm_svm), .vm_init = svm_vm_init, .vm_destroy = svm_vm_destroy,
arch/x86/kvm/vmx/main.c +1 -0
@@ -43,6 +43,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .hardware_disable = vmx_hardware_disable, .has_emulated_msr = vmx_has_emulated_msr, + .is_vm_type_supported = vmx_is_vm_type_supported, .vm_size = sizeof(struct kvm_vmx), .vm_init = vmx_vm_init, .vm_destroy = vmx_vm_destroy,
arch/x86/kvm/vmx/tdx.h +1 -5
@@ -17,11 +17,7 @@ struct vcpu_tdx {static inline bool is_td (struct kvm *kvm) { -/* -* TDX VM type isn't defined yet. -* return kvm->arch.vm_type == KVM_X86_TDX_VM; -*/ -return false; +return kvm->arch.vm_type ==KVM_X86_TDX_VM ; }static inline bool is_td_vcpu (struct kvm_vcpu *vcpu)
arch/x86/kvm/vmx/vmx.c +5 -0
@@ -7281,6 +7281,11 @@ int vmx_vcpu_create(struct kvm_vcpu *vcpu)return err; } +bool vmx_is_vm_type_supported (unsigned long type) +{ +return type ==KVM_X86_DEFAULT_VM ; +} +#define L1TF_MSG_SMT "L1TF CPU bug present and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"#define L1TF_MSG_L1D "L1TF CPU bug present and virtualization mitigation disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"
arch/x86/kvm/vmx/x86_ops.h +1 -0
@@ -25,6 +25,7 @@ void vmx_hardware_unsetup(void);int vmx_check_processor_compatibility (void );int vmx_hardware_enable (void );void vmx_hardware_disable (void ); +bool vmx_is_vm_type_supported (unsigned long type);int vmx_vm_init (struct kvm *kvm);void vmx_vm_destroy (struct kvm *kvm);int vmx_vcpu_precreate (struct kvm *kvm);
arch/x86/kvm/x86.c +8 -1
@@ -4408,6 +4408,11 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)case KVM_CAP_X86_NOTIFY_VMEXIT : r = kvm_caps.has_notify_vmexit;break ; +case KVM_CAP_VM_TYPES : + r =BIT (KVM_X86_DEFAULT_VM ); +if (static_call (kvm_x86_is_vm_type_supported)(KVM_X86_TDX_VM )) + r |=BIT (KVM_X86_TDX_VM ); +break ;default :break ; }
@@ -11858,9 +11863,11 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)int ret;unsigned long flags; -if (type) +if (!static_call (kvm_x86_is_vm_type_supported)(type))return -EINVAL ; + kvm->arch.vm_type = type; + ret =kvm_page_track_init (kvm);if (ret) goto out;
include/uapi/linux/kvm.h +1 -0
@@ -1166,6 +1166,7 @@ struct kvm_ppc_resize_hpt {#define KVM_CAP_S390_PROTECTED_DUMP 217#define KVM_CAP_X86_TRIPLE_FAULT_EVENT 218#define KVM_CAP_X86_NOTIFY_VMEXIT 219 +#define KVM_CAP_VM_TYPES 220#ifdef KVM_CAP_IRQ_ROUTING
tools/arch/x86/include/uapi/asm/kvm.h +3 -0
@@ -525,4 +525,7 @@ struct kvm_pmu_event_filter {#define KVM_VCPU_TSC_CTRL 0/* control group for the timestamp counter (TSC) */ #define KVM_VCPU_TSC_OFFSET 0/* attribute for the TSC offset */ +#define KVM_X86_DEFAULT_VM 0 +#define KVM_X86_TDX_VM 1 +#endif /* _ASM_X86_KVM_H */
tools/include/uapi/linux/kvm.h +1 -0
@@ -1152,6 +1152,7 @@ struct kvm_ppc_resize_hpt {#define KVM_CAP_DISABLE_QUIRKS2 213/* #define KVM_CAP_VM_TSC_CONTROL 214 */ #define KVM_CAP_SYSTEM_EVENT_DATA 215 +#define KVM_CAP_VM_TYPES 220#ifdef KVM_CAP_IRQ_ROUTING
Signature · 1 line
2.25.1
Re: [PATCH v7 012/102] KVM: x86: Introduce vm_type to differentiate default VMs from confidential VMs
Quoted 45 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
Unlike default VMs, confidential VMs (Intel TDX and AMD SEV-ES) don't allow some operations (e.g., memory read/write, register state access, etc).
Introduce
vm_typeto track the type of the VM to x86 KVM. Other arch KVMs already usevm_type,KVM_INIT_VMacceptsvm_type, and x86 KVM callbackvm_initacceptsvm_type. So follow them. Further, a different policy can be made based onvm_type. DefineKVM_X86_DEFAULT_VMfor default VM as default and defineKVM_X86_TDX_VMfor Intel TDX VM. The wrapper function will be defined as "boolis_td(kvm){ returnvm_type==VM_TYPE_TDX; }"Add a capability
KVM_CAP_VM_TYPESto effectively allow device model, e.g. qemu, to query what VM types are supported by KVM. This (introduce a new capability and addvm_type) is chosen to align with other arch KVMs that have VM types already. Other arch KVMs uses different name to query supported vm types and there is no common name for it, so new name was chosen.Co-developed-by Xiaoyao Li <[email protected]>Signed-off-by Xiaoyao Li <[email protected]>Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>Reviewed-by Paolo Bonzini <[email protected]>--- Documentation/virt/kvm/api.rst | 21 +++++++++++++++++++++ arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/include/uapi/asm/kvm.h | 3 +++ arch/x86/kvm/svm/svm.c | 6 ++++++ arch/x86/kvm/vmx/main.c | 1 + arch/x86/kvm/vmx/tdx.h | 6 +----- arch/x86/kvm/vmx/vmx.c | 5 +++++ arch/x86/kvm/vmx/x86_ops.h | 1 + arch/x86/kvm/x86.c | 9 ++++++++- include/uapi/linux/kvm.h | 1 + tools/arch/x86/include/uapi/asm/kvm.h | 3 +++ tools/include/uapi/linux/kvm.h | 1 + 13 files changed, 54 insertions(+), 6 deletions(-)Documentation/virt/kvm/api.rst +0
-0
Documentation/virt/kvm/api.rst described as 'basic' will be available. · line 155
Quoted 9 lines
Documentation/virt/kvm/api.rst +6
-0@@ -147,10 +147,31 @@ described as 'basic' will be available. The new VM has no virtual cpus and no memory. You probably want to use 0 as machine type. +X86: +^^^^ + +Supported vm type can be queried from KVM_CAP_VM_TYPES, which returns the +bitmap of supported vm types. The 1-setting of bit @n means vm type with +value @n is supported.
Perhaps I am missing something, but I don't understand how the below changes (except the x86 part above) in Documentation are related to this patch.
Quoted 107 lines
Documentation/virt/kvm/api.rst +15
-0+ +S390: +^^^^^ + In order to create user controlled virtual machines on S390, check KVM_CAP_S390_UCONTROL and use the flag KVM_VM_S390_UCONTROL as privileged user (CAP_SYS_ADMIN). +MIPS: +^^^^^ + +To use hardware assisted virtualization on MIPS (VZ ASE) rather than +the default trap & emulate implementation (which changes the virtual +memory layout to fit in user mode), check KVM_CAP_MIPS_VZ and use the +flag KVM_VM_MIPS_VZ. + +ARM64: +^^^^^^ + On arm64, the physical address size for a VM (IPA Size limit) is limited to 40bits by default. The limit can be configured if the host supports the extension KVM_CAP_ARM_VM_IPA_SIZE. When supported, usearch/x86/include/asm/kvm-x86-ops.h +1
-0@@ -19,6 +19,7 @@ KVM_X86_OP(hardware_disable) KVM_X86_OP(hardware_unsetup) KVM_X86_OP(has_emulated_msr) KVM_X86_OP(vcpu_after_set_cpuid) +KVM_X86_OP(is_vm_type_supported) KVM_X86_OP(vm_init) KVM_X86_OP_OPTIONAL(vm_destroy) KVM_X86_OP_OPTIONAL_RET0(vcpu_precreate)arch/x86/include/asm/kvm_host.h +2
-0@@ -1141,6 +1141,7 @@ enum kvm_apicv_inhibit { };struct kvm_arch { +unsigned long vm_type;unsigned long n_used_mmu_pages;unsigned long n_requested_mmu_pages;unsigned long n_max_mmu_pages;@@ -1434,6 +1435,7 @@ struct kvm_x86_ops {bool (*has_emulated_msr)(struct kvm *kvm,u32 index);void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); +bool (*is_vm_type_supported)(unsigned long vm_type);unsigned int vm_size;int (*vm_init)(struct kvm *kvm);void (*vm_destroy)(struct kvm *kvm);arch/x86/include/uapi/asm/kvm.h +3
-0@@ -531,4 +531,7 @@ struct kvm_pmu_event_filter {#define KVM_VCPU_TSC_CTRL 0/* control group for the timestamp counter (TSC) */ #define KVM_VCPU_TSC_OFFSET 0/* attribute for the TSC offset */ +#define KVM_X86_DEFAULT_VM 0 +#define KVM_X86_TDX_VM 1 +#endif /* _ASM_X86_KVM_H */ arch/x86/kvm/svm/svm.c +6
-0@@ -4685,6 +4685,11 @@ static void svm_vm_destroy(struct kvm *kvm)sev_vm_destroy (kvm); } +static bool svm_is_vm_type_supported (unsigned long type) +{ +return type ==KVM_X86_DEFAULT_VM ; +} +static int svm_vm_init (struct kvm *kvm) {if (!pause_filter_count || !pause_filter_thresh)@@ -4712,6 +4717,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { .vcpu_free = svm_vcpu_free, .vcpu_reset = svm_vcpu_reset, + .is_vm_type_supported = svm_is_vm_type_supported, .vm_size = sizeof(struct kvm_svm), .vm_init = svm_vm_init, .vm_destroy = svm_vm_destroy,arch/x86/kvm/vmx/main.c +1
-0@@ -43,6 +43,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .hardware_disable = vmx_hardware_disable, .has_emulated_msr = vmx_has_emulated_msr, + .is_vm_type_supported = vmx_is_vm_type_supported, .vm_size = sizeof(struct kvm_vmx), .vm_init = vmx_vm_init, .vm_destroy = vmx_vm_destroy,arch/x86/kvm/vmx/tdx.h +0
-0
arch/x86/kvm/vmx/tdx.h struct vcpu_tdx { · line 21
Quoted 10 lines
arch/x86/kvm/vmx/tdx.h +1
-5@@ -17,11 +17,7 @@ struct vcpu_tdx {static inline bool is_td (struct kvm *kvm) { -/* -* TDX VM type isn't defined yet. -* return kvm->arch.vm_type == KVM_X86_TDX_VM; -*/ -return false; +return kvm->arch.vm_type ==KVM_X86_TDX_VM ; }
If you put this patch before patch:
[PATCH v7 009/102] KVM: TDX: Add placeholders for TDX VM/vcpu structure
Then you don't need to introduce this chunk in above patch and then remove it here, which is unnecessary and ugly.
And you can even only introduce KVM_X86_DEFAULT_VM but not KVM_X86_TDX_VM in this patch, so you can make this patch as a infrastructural patch to report VM type. The KVM_X86_TDX_VM can come with the patch where is_td() is introduced (in your above patch 9).
To me, it's more clean way to write patch. For instance, this infrastructural patch can be theoretically used by other series if they have similar thing to support, but doesn't need to carry is_td() and KVM_X86_TDX_VM burden that you made.
Quoted 95 lines
arch/x86/kvm/vmx/tdx.h +0
-0static inline bool is_td_vcpu (struct kvm_vcpu *vcpu)arch/x86/kvm/vmx/vmx.c +5
-0@@ -7281,6 +7281,11 @@ int vmx_vcpu_create(struct kvm_vcpu *vcpu)return err; } +bool vmx_is_vm_type_supported (unsigned long type) +{ +return type ==KVM_X86_DEFAULT_VM ; +} +#define L1TF_MSG_SMT "L1TF CPU bug present and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"#define L1TF_MSG_L1D "L1TF CPU bug present and virtualization mitigation disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"arch/x86/kvm/vmx/x86_ops.h +1
-0@@ -25,6 +25,7 @@ void vmx_hardware_unsetup(void);int vmx_check_processor_compatibility (void );int vmx_hardware_enable (void );void vmx_hardware_disable (void ); +bool vmx_is_vm_type_supported (unsigned long type);int vmx_vm_init (struct kvm *kvm);void vmx_vm_destroy (struct kvm *kvm);int vmx_vcpu_precreate (struct kvm *kvm);arch/x86/kvm/x86.c +8
-1@@ -4408,6 +4408,11 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)case KVM_CAP_X86_NOTIFY_VMEXIT : r = kvm_caps.has_notify_vmexit;break ; +case KVM_CAP_VM_TYPES : + r =BIT (KVM_X86_DEFAULT_VM ); +if (static_call (kvm_x86_is_vm_type_supported)(KVM_X86_TDX_VM )) + r |=BIT (KVM_X86_TDX_VM ); +break ;default :break ; }@@ -11858,9 +11863,11 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)int ret;unsigned long flags; -if (type) +if (!static_call (kvm_x86_is_vm_type_supported)(type))return -EINVAL ; + kvm->arch.vm_type = type; + ret =kvm_page_track_init (kvm);if (ret) goto out;include/uapi/linux/kvm.h +1
-0@@ -1166,6 +1166,7 @@ struct kvm_ppc_resize_hpt {#define KVM_CAP_S390_PROTECTED_DUMP 217#define KVM_CAP_X86_TRIPLE_FAULT_EVENT 218#define KVM_CAP_X86_NOTIFY_VMEXIT 219 +#define KVM_CAP_VM_TYPES 220#ifdef KVM_CAP_IRQ_ROUTING tools/arch/x86/include/uapi/asm/kvm.h +3
-0@@ -525,4 +525,7 @@ struct kvm_pmu_event_filter {#define KVM_VCPU_TSC_CTRL 0/* control group for the timestamp counter (TSC) */ #define KVM_VCPU_TSC_OFFSET 0/* attribute for the TSC offset */ +#define KVM_X86_DEFAULT_VM 0 +#define KVM_X86_TDX_VM 1 +#endif /* _ASM_X86_KVM_H */ tools/include/uapi/linux/kvm.h +1
-0@@ -1152,6 +1152,7 @@ struct kvm_ppc_resize_hpt {#define KVM_CAP_DISABLE_QUIRKS2 213/* #define KVM_CAP_VM_TSC_CONTROL 214 */ #define KVM_CAP_SYSTEM_EVENT_DATA 215 +#define KVM_CAP_VM_TYPES 220#ifdef KVM_CAP_IRQ_ROUTING
Signature · 2 lines
Thanks, -Kai
Re: [PATCH v7 012/102] KVM: x86: Introduce vm_type to differentiate default VMs from confidential VMs
Quoted 190 lines · Kai Huang
Quoted 45 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
Unlike default VMs, confidential VMs (Intel TDX and AMD SEV-ES) don't allow some operations (e.g., memory read/write, register state access, etc).
Introduce
vm_typeto track the type of the VM to x86 KVM. Other arch KVMs already usevm_type,KVM_INIT_VMacceptsvm_type, and x86 KVM callbackvm_initacceptsvm_type. So follow them. Further, a different policy can be made based onvm_type. DefineKVM_X86_DEFAULT_VMfor default VM as default and defineKVM_X86_TDX_VMfor Intel TDX VM. The wrapper function will be defined as "boolis_td(kvm){ returnvm_type==VM_TYPE_TDX; }"Add a capability
KVM_CAP_VM_TYPESto effectively allow device model, e.g. qemu, to query what VM types are supported by KVM. This (introduce a new capability and addvm_type) is chosen to align with other arch KVMs that have VM types already. Other arch KVMs uses different name to query supported vm types and there is no common name for it, so new name was chosen.Co-developed-by Xiaoyao Li <[email protected]>Signed-off-by Xiaoyao Li <[email protected]>Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>Reviewed-by Paolo Bonzini <[email protected]>--- Documentation/virt/kvm/api.rst | 21 +++++++++++++++++++++ arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/include/uapi/asm/kvm.h | 3 +++ arch/x86/kvm/svm/svm.c | 6 ++++++ arch/x86/kvm/vmx/main.c | 1 + arch/x86/kvm/vmx/tdx.h | 6 +----- arch/x86/kvm/vmx/vmx.c | 5 +++++ arch/x86/kvm/vmx/x86_ops.h | 1 + arch/x86/kvm/x86.c | 9 ++++++++- include/uapi/linux/kvm.h | 1 + tools/arch/x86/include/uapi/asm/kvm.h | 3 +++ tools/include/uapi/linux/kvm.h | 1 + 13 files changed, 54 insertions(+), 6 deletions(-)Documentation/virt/kvm/api.rst +0
-0Documentation/virt/kvm/api.rst described as 'basic' will be available. · line 155
Quoted 9 lines
Documentation/virt/kvm/api.rst +6
-0@@ -147,10 +147,31 @@ described as 'basic' will be available. The new VM has no virtual cpus and no memory. You probably want to use 0 as machine type. +X86: +^^^^ + +Supported vm type can be queried from KVM_CAP_VM_TYPES, which returns the +bitmap of supported vm types. The 1-setting of bit @n means vm type with +value @n is supported.Perhaps I am missing something, but I don't understand how the below changes (except the x86 part above) in Documentation are related to this patch.
Quoted 107 lines
Documentation/virt/kvm/api.rst +15
-0+ +S390: +^^^^^ + In order to create user controlled virtual machines on S390, check KVM_CAP_S390_UCONTROL and use the flag KVM_VM_S390_UCONTROL as privileged user (CAP_SYS_ADMIN). +MIPS: +^^^^^ + +To use hardware assisted virtualization on MIPS (VZ ASE) rather than +the default trap & emulate implementation (which changes the virtual +memory layout to fit in user mode), check KVM_CAP_MIPS_VZ and use the +flag KVM_VM_MIPS_VZ. + +ARM64: +^^^^^^ + On arm64, the physical address size for a VM (IPA Size limit) is limited to 40bits by default. The limit can be configured if the host supports the extension KVM_CAP_ARM_VM_IPA_SIZE. When supported, usearch/x86/include/asm/kvm-x86-ops.h +1
-0@@ -19,6 +19,7 @@ KVM_X86_OP(hardware_disable) KVM_X86_OP(hardware_unsetup) KVM_X86_OP(has_emulated_msr) KVM_X86_OP(vcpu_after_set_cpuid) +KVM_X86_OP(is_vm_type_supported) KVM_X86_OP(vm_init) KVM_X86_OP_OPTIONAL(vm_destroy) KVM_X86_OP_OPTIONAL_RET0(vcpu_precreate)arch/x86/include/asm/kvm_host.h +2
-0@@ -1141,6 +1141,7 @@ enum kvm_apicv_inhibit { };struct kvm_arch { +unsigned long vm_type;unsigned long n_used_mmu_pages;unsigned long n_requested_mmu_pages;unsigned long n_max_mmu_pages;@@ -1434,6 +1435,7 @@ struct kvm_x86_ops {bool (*has_emulated_msr)(struct kvm *kvm,u32 index);void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); +bool (*is_vm_type_supported)(unsigned long vm_type);unsigned int vm_size;int (*vm_init)(struct kvm *kvm);void (*vm_destroy)(struct kvm *kvm);arch/x86/include/uapi/asm/kvm.h +3
-0@@ -531,4 +531,7 @@ struct kvm_pmu_event_filter {#define KVM_VCPU_TSC_CTRL 0/* control group for the timestamp counter (TSC) */ #define KVM_VCPU_TSC_OFFSET 0/* attribute for the TSC offset */ +#define KVM_X86_DEFAULT_VM 0 +#define KVM_X86_TDX_VM 1 +#endif /* _ASM_X86_KVM_H */ arch/x86/kvm/svm/svm.c +6
-0@@ -4685,6 +4685,11 @@ static void svm_vm_destroy(struct kvm *kvm)sev_vm_destroy (kvm); } +static bool svm_is_vm_type_supported (unsigned long type) +{ +return type ==KVM_X86_DEFAULT_VM ; +} +static int svm_vm_init (struct kvm *kvm) {if (!pause_filter_count || !pause_filter_thresh)@@ -4712,6 +4717,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { .vcpu_free = svm_vcpu_free, .vcpu_reset = svm_vcpu_reset, + .is_vm_type_supported = svm_is_vm_type_supported, .vm_size = sizeof(struct kvm_svm), .vm_init = svm_vm_init, .vm_destroy = svm_vm_destroy,arch/x86/kvm/vmx/main.c +1
-0@@ -43,6 +43,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .hardware_disable = vmx_hardware_disable, .has_emulated_msr = vmx_has_emulated_msr, + .is_vm_type_supported = vmx_is_vm_type_supported, .vm_size = sizeof(struct kvm_vmx), .vm_init = vmx_vm_init, .vm_destroy = vmx_vm_destroy,arch/x86/kvm/vmx/tdx.h +0
-0arch/x86/kvm/vmx/tdx.h struct vcpu_tdx { · line 21
Quoted 10 lines
arch/x86/kvm/vmx/tdx.h +1
-5@@ -17,11 +17,7 @@ struct vcpu_tdx {static inline bool is_td (struct kvm *kvm) { -/* -* TDX VM type isn't defined yet. -* return kvm->arch.vm_type == KVM_X86_TDX_VM; -*/ -return false; +return kvm->arch.vm_type ==KVM_X86_TDX_VM ; }If you put this patch before patch:
[PATCH v7 009/102] KVM: TDX: Add placeholders for TDX VM/vcpu structure
Then you don't need to introduce this chunk in above patch and then remove it here, which is unnecessary and ugly.
And you can even only introduce
KVM_X86_DEFAULT_VMbut notKVM_X86_TDX_VMin this patch, so you can make this patch as a infrastructural patch to report VM type. TheKVM_X86_TDX_VMcan come with the patch whereis_td()is introduced (in your above patch 9).
Quoted 4 lines
To me, it's more clean way to write patch. For instance, this infrastructural patch can be theoretically used by other series if they have similar thing to support, but doesn't need to carry
is_td()andKVM_X86_TDX_VMburden that you made.
Sorry I missed this patch already has Paolo's Reviewed-by. Please feel free to ignore my comments.
Signature · 2 lines
Thanks, -Kai
Re: [PATCH v7 012/102] KVM: x86: Introduce vm_type to differentiate default VMs from confidential VMs
In reply to Kai HuangQuoted 49 lines · Kai Huang
Quoted 48 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
Unlike default VMs, confidential VMs (Intel TDX and AMD SEV-ES) don't allow some operations (e.g., memory read/write, register state access, etc).
Introduce
vm_typeto track the type of the VM to x86 KVM. Other arch KVMs already usevm_type,KVM_INIT_VMacceptsvm_type, and x86 KVM callbackvm_initacceptsvm_type. So follow them. Further, a different policy can be made based onvm_type. DefineKVM_X86_DEFAULT_VMfor default VM as default and defineKVM_X86_TDX_VMfor Intel TDX VM. The wrapper function will be defined as "boolis_td(kvm){ returnvm_type==VM_TYPE_TDX; }"Add a capability
KVM_CAP_VM_TYPESto effectively allow device model, e.g. qemu, to query what VM types are supported by KVM. This (introduce a new capability and addvm_type) is chosen to align with other arch KVMs that have VM types already. Other arch KVMs uses different name to query supported vm types and there is no common name for it, so new name was chosen.Co-developed-by Xiaoyao Li <[email protected]>Signed-off-by Xiaoyao Li <[email protected]>Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>Reviewed-by Paolo Bonzini <[email protected]>--- Documentation/virt/kvm/api.rst | 21 +++++++++++++++++++++ arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/include/uapi/asm/kvm.h | 3 +++ arch/x86/kvm/svm/svm.c | 6 ++++++ arch/x86/kvm/vmx/main.c | 1 + arch/x86/kvm/vmx/tdx.h | 6 +----- arch/x86/kvm/vmx/vmx.c | 5 +++++ arch/x86/kvm/vmx/x86_ops.h | 1 + arch/x86/kvm/x86.c | 9 ++++++++- include/uapi/linux/kvm.h | 1 + tools/arch/x86/include/uapi/asm/kvm.h | 3 +++ tools/include/uapi/linux/kvm.h | 1 + 13 files changed, 54 insertions(+), 6 deletions(-)Documentation/virt/kvm/api.rst +0
-0@@ -147,10 +147,31 @@ described as 'basic' will be available. The new VM has no virtual cpus and no memory. You probably want to use 0 as machine type.
Quoted 10 lines
Documentation/virt/kvm/api.rst described as 'basic' will be available. · line 155
Quoted 6 lines
Documentation/virt/kvm/api.rst +6
-0+X86: +^^^^ + +Supported vm type can be queried from KVM_CAP_VM_TYPES, which returns the +bitmap of supported vm types. The 1-setting of bit @n means vm type with +value @n is supported.Perhaps I am missing something, but I don't understand how the below changes (except the x86 part above) in Documentation are related to this patch.
This is to summarize divergence of archs. Those archs (s390, mips, and arm64) introduce essentially same KVM capabilities, but different names. This patch makes things worse. So I thought it's good idea to summarize it. Probably this documentation part can be split out into its own patch. thoughts?
Quoted 28 lines
Quoted 5 lines
arch/x86/kvm/vmx/tdx.h +0
-0arch/x86/kvm/vmx/tdx.h struct vcpu_tdx { · line 21
Quoted 10 lines
arch/x86/kvm/vmx/tdx.h +1
-5@@ -17,11 +17,7 @@ struct vcpu_tdx {static inline bool is_td (struct kvm *kvm) { -/* -* TDX VM type isn't defined yet. -* return kvm->arch.vm_type == KVM_X86_TDX_VM; -*/ -return false; +return kvm->arch.vm_type ==KVM_X86_TDX_VM ; }If you put this patch before patch:
[PATCH v7 009/102] KVM: TDX: Add placeholders for TDX VM/vcpu structure
Then you don't need to introduce this chunk in above patch and then remove it here, which is unnecessary and ugly.
And you can even only introduce
KVM_X86_DEFAULT_VMbut notKVM_X86_TDX_VMin this patch, so you can make this patch as a infrastructural patch to report VM type. TheKVM_X86_TDX_VMcan come with the patch whereis_td()is introduced (in your above patch 9).
Quoted 4 lines
To me, it's more clean way to write patch. For instance, this infrastructural patch can be theoretically used by other series if they have similar thing to support, but doesn't need to carry
is_td()andKVM_X86_TDX_VMburden that you made.
There are two choices. One is to put this patch before 9 as you suggested, other is to put it here right before the patch 13 that uses vm_type_supported().
Thanks,
Signature · 1 line
Isaku Yamahata <[email protected]>
Re: [PATCH v7 012/102] KVM: x86: Introduce vm_type to differentiate default VMs from confidential VMs
Quoted 63 lines · Isaku Yamahata
Quoted 49 lines · Kai Huang
Quoted 48 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
Unlike default VMs, confidential VMs (Intel TDX and AMD SEV-ES) don't allow some operations (e.g., memory read/write, register state access, etc).
Introduce
vm_typeto track the type of the VM to x86 KVM. Other arch KVMs already usevm_type,KVM_INIT_VMacceptsvm_type, and x86 KVM callbackvm_initacceptsvm_type. So follow them. Further, a different policy can be made based onvm_type. DefineKVM_X86_DEFAULT_VMfor default VM as default and defineKVM_X86_TDX_VMfor Intel TDX VM. The wrapper function will be defined as "boolis_td(kvm){ returnvm_type==VM_TYPE_TDX; }"Add a capability
KVM_CAP_VM_TYPESto effectively allow device model, e.g. qemu, to query what VM types are supported by KVM. This (introduce a new capability and addvm_type) is chosen to align with other arch KVMs that have VM types already. Other arch KVMs uses different name to query supported vm types and there is no common name for it, so new name was chosen.Co-developed-by Xiaoyao Li <[email protected]>Signed-off-by Xiaoyao Li <[email protected]>Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>Reviewed-by Paolo Bonzini <[email protected]>--- Documentation/virt/kvm/api.rst | 21 +++++++++++++++++++++ arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/include/uapi/asm/kvm.h | 3 +++ arch/x86/kvm/svm/svm.c | 6 ++++++ arch/x86/kvm/vmx/main.c | 1 + arch/x86/kvm/vmx/tdx.h | 6 +----- arch/x86/kvm/vmx/vmx.c | 5 +++++ arch/x86/kvm/vmx/x86_ops.h | 1 + arch/x86/kvm/x86.c | 9 ++++++++- include/uapi/linux/kvm.h | 1 + tools/arch/x86/include/uapi/asm/kvm.h | 3 +++ tools/include/uapi/linux/kvm.h | 1 + 13 files changed, 54 insertions(+), 6 deletions(-)Documentation/virt/kvm/api.rst +0
-0@@ -147,10 +147,31 @@ described as 'basic' will be available. The new VM has no virtual cpus and no memory. You probably want to use 0 as machine type.Quoted 10 lines
Documentation/virt/kvm/api.rst described as 'basic' will be available. · line 155
Quoted 6 lines
Documentation/virt/kvm/api.rst +6
-0+X86: +^^^^ + +Supported vm type can be queried from KVM_CAP_VM_TYPES, which returns the +bitmap of supported vm types. The 1-setting of bit @n means vm type with +value @n is supported.Perhaps I am missing something, but I don't understand how the below changes (except the x86 part above) in Documentation are related to this patch.
Quoted 4 lines
This is to summarize divergence of archs. Those archs (s390, mips, and arm64) introduce essentially same KVM capabilities, but different names. This patch makes things worse. So I thought it's good idea to summarize it. Probably this documentation part can be split out into its own patch. thoughts?
I will leave to maintainers here. Thought personally I would split different things into different patches.
Quoted 35 lines
Quoted 30 lines
Quoted 7 lines
arch/x86/kvm/vmx/tdx.h +0
-0arch/x86/kvm/vmx/tdx.h struct vcpu_tdx { · line 21
Quoted 10 lines
arch/x86/kvm/vmx/tdx.h +1
-5@@ -17,11 +17,7 @@ struct vcpu_tdx {static inline bool is_td (struct kvm *kvm) { -/* -* TDX VM type isn't defined yet. -* return kvm->arch.vm_type == KVM_X86_TDX_VM; -*/ -return false; +return kvm->arch.vm_type ==KVM_X86_TDX_VM ; }If you put this patch before patch:
[PATCH v7 009/102] KVM: TDX: Add placeholders for TDX VM/vcpu structure
Then you don't need to introduce this chunk in above patch and then remove it here, which is unnecessary and ugly.
And you can even only introduce
KVM_X86_DEFAULT_VMbut notKVM_X86_TDX_VMin this patch, so you can make this patch as a infrastructural patch to report VM type. TheKVM_X86_TDX_VMcan come with the patch whereis_td()is introduced (in your above patch 9).Quoted 4 lines
To me, it's more clean way to write patch. For instance, this infrastructural patch can be theoretically used by other series if they have similar thing to support, but doesn't need to carry
is_td()andKVM_X86_TDX_VMburden that you made.
Quoted 4 lines
There are two choices. One is to put this patch before 9 as you suggested, other is to put it here right before the patch 13 that uses
vm_type_supported().Thanks,
To me this belongs to category of "infrastructural patch", which does "Add new ABI to support reporting VM types". It can originally support default VM only. TDX VM can come later. But will leave to maintainers.
PATCH v7 13/102 KVM: TDX: Make TDX VM type supported
In reply to [email protected]From: Isaku Yamahata <[email protected]>
NOTE: This patch is in position of the patch series for developers to be able to test codes during the middle of the patch series although this patch series doesn't provide functional features until the all the patches of this patch series. When merging this patch series, this patch can be moved to the end.
As first step TDX VM support, return that TDX VM type supported to device model, e.g. qemu. The callback to create guest TD is vm_init callback for KVM_CREATE_VM. Add a place holder function and call a function to initialize TDX module on demand because in that callback VMX is enabled by hardware_enable callback (vmx_hardware_enable).
--- arch/x86/kvm/vmx/main.c | 18 ++++++++++++++++-- arch/x86/kvm/vmx/tdx.c | 6 ++++++ arch/x86/kvm/vmx/vmx.c | 5 ----- arch/x86/kvm/vmx/x86_ops.h | 3 ++- 4 files changed, 24 insertions(+), 8 deletions(-)
arch/x86/kvm/vmx/main.c +16 -2
@@ -10,6 +10,12 @@static bool __read_mostly enable_tdx =IS_ENABLED (CONFIG_INTEL_TDX_HOST );module_param_named (tdx, enable_tdx, bool,0444 ); +static bool vt_is_vm_type_supported (unsigned long type) +{ +return type ==KVM_X86_DEFAULT_VM || + (enable_tdx &&tdx_is_vm_type_supported (type)); +} +static __init int vt_hardware_setup (void ) {int ret;
@@ -33,6 +39,14 @@ static int __init vt_post_hardware_enable_setup(void)return 0 ; } +static int vt_vm_init (struct kvm *kvm) +{ +if (is_td (kvm)) +return -EOPNOTSUPP ;/* Not ready to create guest TD yet. */ + +return vmx_vm_init (kvm); +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,
@@ -43,9 +57,9 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .hardware_disable = vmx_hardware_disable, .has_emulated_msr = vmx_has_emulated_msr, - .is_vm_type_supported = vmx_is_vm_type_supported, + .is_vm_type_supported = vt_is_vm_type_supported, .vm_size = sizeof(struct kvm_vmx), - .vm_init = vmx_vm_init, + .vm_init = vt_vm_init, .vm_destroy = vmx_vm_destroy, .vcpu_precreate = vmx_vcpu_precreate,
arch/x86/kvm/vmx/tdx.c +6 -0
@@ -73,6 +73,12 @@ int __init tdx_module_setup(void)return 0 ; } +bool tdx_is_vm_type_supported (unsigned long type) +{ +/* enable_tdx check is done by the caller. */ +return type ==KVM_X86_TDX_VM ; +} +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {u32 max_pa;
arch/x86/kvm/vmx/vmx.c +0 -5
@@ -7281,11 +7281,6 @@ int vmx_vcpu_create(struct kvm_vcpu *vcpu)return err; } -bool vmx_is_vm_type_supported (unsigned long type) -{ -return type ==KVM_X86_DEFAULT_VM ; -} -#define L1TF_MSG_SMT "L1TF CPU bug present and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"#define L1TF_MSG_L1D "L1TF CPU bug present and virtualization mitigation disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"
arch/x86/kvm/vmx/x86_ops.h +2 -1
@@ -25,7 +25,6 @@ void vmx_hardware_unsetup(void);int vmx_check_processor_compatibility (void );int vmx_hardware_enable (void );void vmx_hardware_disable (void ); -bool vmx_is_vm_type_supported (unsigned long type);int vmx_vm_init (struct kvm *kvm);void vmx_vm_destroy (struct kvm *kvm);int vmx_vcpu_precreate (struct kvm *kvm);
@@ -131,8 +130,10 @@ void vmx_setup_mce(struct kvm_vcpu *vcpu);#ifdef CONFIG_INTEL_TDX_HOST int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops); +bool tdx_is_vm_type_supported (unsigned long type);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; } +static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; }#endif #endif /* __KVM_X86_VMX_X86_OPS_H */
Signature · 1 line
2.25.1
Re: [PATCH v7 013/102] KVM: TDX: Make TDX VM type supported
Quoted 8 lines · On Mon, Jun 27, 2022 at 02:53:05PM -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
NOTE: This patch is in position of the patch series for developers to be able to test codes during the middle of the patch series although this patch series doesn't provide functional features until the all the patches of this patch series. When merging this patch series, this patch can be moved to the end.
Quoted 5 lines
As first step TDX VM support, return that TDX VM type supported to device model, e.g. qemu. The callback to create guest TD is
vm_initcallback forKVM_CREATE_VM. Add a place holder function and call a function to initialize TDX module on demand because in that callback VMX is enabled byhardware_enablecallback (vmx_hardware_enable).
if the "initialize TDX module on demand" means calling tdx_init() then it's already done in kvm_init() -> kvm_arch_post_hardware_enable_setup from patch 11, so may need commit messsage update here.
Quoted 112 lines
Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/vmx/main.c | 18 ++++++++++++++++-- arch/x86/kvm/vmx/tdx.c | 6 ++++++ arch/x86/kvm/vmx/vmx.c | 5 ----- arch/x86/kvm/vmx/x86_ops.h | 3 ++- 4 files changed, 24 insertions(+), 8 deletions(-)arch/x86/kvm/vmx/main.c +16
-2@@ -10,6 +10,12 @@static bool __read_mostly enable_tdx =IS_ENABLED (CONFIG_INTEL_TDX_HOST );module_param_named (tdx, enable_tdx, bool,0444 ); +static bool vt_is_vm_type_supported (unsigned long type) +{ +return type ==KVM_X86_DEFAULT_VM || + (enable_tdx &&tdx_is_vm_type_supported (type)); +} +static __init int vt_hardware_setup (void ) {int ret;@@ -33,6 +39,14 @@ static int __init vt_post_hardware_enable_setup(void)return 0 ; } +static int vt_vm_init (struct kvm *kvm) +{ +if (is_td (kvm)) +return -EOPNOTSUPP ;/* Not ready to create guest TD yet. */ + +return vmx_vm_init (kvm); +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,@@ -43,9 +57,9 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .hardware_disable = vmx_hardware_disable, .has_emulated_msr = vmx_has_emulated_msr, - .is_vm_type_supported = vmx_is_vm_type_supported, + .is_vm_type_supported = vt_is_vm_type_supported, .vm_size = sizeof(struct kvm_vmx), - .vm_init = vmx_vm_init, + .vm_init = vt_vm_init, .vm_destroy = vmx_vm_destroy, .vcpu_precreate = vmx_vcpu_precreate,arch/x86/kvm/vmx/tdx.c +6
-0@@ -73,6 +73,12 @@ int __init tdx_module_setup(void)return 0 ; } +bool tdx_is_vm_type_supported (unsigned long type) +{ +/* enable_tdx check is done by the caller. */ +return type ==KVM_X86_TDX_VM ; +} +int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {u32 max_pa;arch/x86/kvm/vmx/vmx.c +0
-5@@ -7281,11 +7281,6 @@ int vmx_vcpu_create(struct kvm_vcpu *vcpu)return err; } -bool vmx_is_vm_type_supported (unsigned long type) -{ -return type ==KVM_X86_DEFAULT_VM ; -} -#define L1TF_MSG_SMT "L1TF CPU bug present and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"#define L1TF_MSG_L1D "L1TF CPU bug present and virtualization mitigation disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/l1tf.html for details.\n"arch/x86/kvm/vmx/x86_ops.h +2
-2@@ -25,7 +25,6 @@ void vmx_hardware_unsetup(void);int vmx_check_processor_compatibility (void );int vmx_hardware_enable (void );void vmx_hardware_disable (void ); -bool vmx_is_vm_type_supported (unsigned long type);int vmx_vm_init (struct kvm *kvm);void vmx_vm_destroy (struct kvm *kvm);int vmx_vcpu_precreate (struct kvm *kvm);@@ -131,8 +130,10 @@ void vmx_setup_mce(struct kvm_vcpu *vcpu);#ifdef CONFIG_INTEL_TDX_HOST int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops); +bool tdx_is_vm_type_supported (unsigned long type);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; } +static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; }#endif #endif /* __KVM_X86_VMX_X86_OPS_H */ --2.25.1
Re: [PATCH v7 013/102] KVM: TDX: Make TDX VM type supported
Quoted 15 lines · Yuan Yao
Quoted 8 lines · On Mon, Jun 27, 2022 at 02:53:05PM -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
NOTE: This patch is in position of the patch series for developers to be able to test codes during the middle of the patch series although this patch series doesn't provide functional features until the all the patches of this patch series. When merging this patch series, this patch can be moved to the end.
Quoted 5 lines
As first step TDX VM support, return that TDX VM type supported to device model, e.g. qemu. The callback to create guest TD is
vm_initcallback forKVM_CREATE_VM. Add a place holder function and call a function to initialize TDX module on demand because in that callback VMX is enabled byhardware_enablecallback (vmx_hardware_enable).
Quoted 4 lines
if the "initialize TDX module on demand" means calling
tdx_init()then it's already done inkvm_init()->kvm_arch_post_hardware_enable_setupfrom patch 11, so may need commit messsage update here.
Somehow I missed to delete those lines. Will remove "Add a place ...".
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 14/102 The start of TDX KVM patch series: TDX architectural definitions
In reply to [email protected]From: Isaku Yamahata <[email protected]>
This empty commit is to mark the start of patch series of TDX architectural definitions.
--- .../virt/kvm/intel-tdx-layer-status.rst | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/virt/kvm/intel-tdx-layer-status.rst
Documentation/virt/kvm/intel-tdx-layer-status.rst new file +29 -0
@@ -0,0 +1,29 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=================================== +Intel Trust Dodmain Extensions(TDX) +=================================== + +Layer status +============ +What qemu can do +---------------- +- TDX VM TYPE is exposed to Qemu. +- Qemu can try to create VM of TDX VM type and then fails. + +Patch Layer status +------------------ + Patch layer Status +* TDX, VMX coexistence: Applied +* TDX architectural definitions: Applying +* TD VM creation/destruction: Not yet +* TD vcpu creation/destruction: Not yet +* TDX EPT violation: Not yet +* TD finalization: Not yet +* TD vcpu enter/exit: Not yet +* TD vcpu interrupts/exit/hypercall: Not yet + +* KVM MMU GPA shared bits: Not yet +* KVM TDP refactoring for TDX: Not yet +* KVM TDP MMU hooks: Not yet +* KVM TDP MMU MapGPA: Not yet
Signature · 1 line
2.25.1
PATCH v7 15/102 KVM: TDX: Define TDX architectural definitions
In reply to [email protected]From: Isaku Yamahata <[email protected]>
Define architectural definitions for KVM to issue the TDX SEAMCALLs.
Structures and values that are architecturally defined in the TDX module specifications the chapter of ABI Reference.
--- arch/x86/kvm/vmx/tdx_arch.h | 157 ++++++++++++++++++++++++++++++++++++ 1 file changed, 157 insertions(+) create mode 100644 arch/x86/kvm/vmx/tdx_arch.h
arch/x86/kvm/vmx/tdx_arch.h new file +157 -0
@@ -0,0 +1,157 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* architectural constants/data definitions for TDX SEAMCALLs */ + +#ifndef __KVM_X86_TDX_ARCH_H +#define __KVM_X86_TDX_ARCH_H + +#include <linux/types.h> + +/* +* TDX SEAMCALL API function leaves +*/ +#define TDH_VP_ENTER 0 +#define TDH_MNG_ADDCX 1 +#define TDH_MEM_PAGE_ADD 2 +#define TDH_MEM_SEPT_ADD 3 +#define TDH_VP_ADDCX 4 +#define TDH_MEM_PAGE_RELOCATE 5 +#define TDH_MEM_PAGE_AUG 6 +#define TDH_MEM_RANGE_BLOCK 7 +#define TDH_MNG_KEY_CONFIG 8 +#define TDH_MNG_CREATE 9 +#define TDH_VP_CREATE 10 +#define TDH_MNG_RD 11 +#define TDH_MR_EXTEND 16 +#define TDH_MR_FINALIZE 17 +#define TDH_VP_FLUSH 18 +#define TDH_MNG_VPFLUSHDONE 19 +#define TDH_MNG_KEY_FREEID 20 +#define TDH_MNG_INIT 21 +#define TDH_VP_INIT 22 +#define TDH_VP_RD 26 +#define TDH_MNG_KEY_RECLAIMID 27 +#define TDH_PHYMEM_PAGE_RECLAIM 28 +#define TDH_MEM_PAGE_REMOVE 29 +#define TDH_MEM_SEPT_REMOVE 30 +#define TDH_MEM_TRACK 38 +#define TDH_MEM_RANGE_UNBLOCK 39 +#define TDH_PHYMEM_CACHE_WB 40 +#define TDH_PHYMEM_PAGE_WBINVD 41 +#define TDH_VP_WR 43 +#define TDH_SYS_LP_SHUTDOWN 44 + +#define TDG_VP_VMCALL_GET_TD_VM_CALL_INFO 0x10000 +#define TDG_VP_VMCALL_MAP_GPA 0x10001 +#define TDG_VP_VMCALL_GET_QUOTE 0x10002 +#define TDG_VP_VMCALL_REPORT_FATAL_ERROR 0x10003 +#define TDG_VP_VMCALL_SETUP_EVENT_NOTIFY_INTERRUPT 0x10004 + +/* TDX control structure (TDR/TDCS/TDVPS) field access codes */ +#define TDX_NON_ARCH BIT_ULL(63) +#define TDX_CLASS_SHIFT 56 +#define TDX_FIELD_MASK GENMASK_ULL(31, 0) + +#define __BUILD_TDX_FIELD (non_arch, class, field) \ + (((non_arch) ? TDX_NON_ARCH : 0) | \ + ((u64)(class) << TDX_CLASS_SHIFT) | \ + ((u64)(field) & TDX_FIELD_MASK)) + +#define BUILD_TDX_FIELD (class, field) \ + __BUILD_TDX_FIELD(false, (class), (field)) + +#define BUILD_TDX_FIELD_NON_ARCH (class, field) \ + __BUILD_TDX_FIELD(true, (class), (field)) + + +/* @field is the VMCS field encoding */ +#define TDVPS_VMCS (field) BUILD_TDX_FIELD(0, (field)) + +enum tdx_guest_other_state { +TD_VCPU_STATE_DETAILS_NON_ARCH =0x100 , +}; + +union tdx_vcpu_state_details { +struct { +u64 vmxip :1 ; +u64 reserved :63 ; + }; +u64 full; +}; + +/* @field is any of enum tdx_guest_other_state */ +#define TDVPS_STATE (field) BUILD_TDX_FIELD(17, (field)) +#define TDVPS_STATE_NON_ARCH (field) BUILD_TDX_FIELD_NON_ARCH(17, (field)) + +/* Management class fields */ +enum tdx_guest_management { +TD_VCPU_PEND_NMI =11 , +}; + +/* @field is any of enum tdx_guest_management */ +#define TDVPS_MANAGEMENT (field) BUILD_TDX_FIELD(32, (field)) + +enum tdx_tdcs_execution_control { +TD_TDCS_EXEC_TSC_OFFSET =10 , +}; + +/* @field is any of enum tdx_tdcs_execution_control */ +#define TDCS_EXEC (field) BUILD_TDX_FIELD(17, (field)) + +#define TDX_EXTENDMR_CHUNKSIZE 256 + +struct tdx_cpuid_value { +u32 eax; +u32 ebx; +u32 ecx; +u32 edx; +} __packed; + +#define TDX_TD_ATTRIBUTE_DEBUG BIT_ULL(0) +#define TDX_TD_ATTRIBUTE_PKS BIT_ULL(30) +#define TDX_TD_ATTRIBUTE_KL BIT_ULL(31) +#define TDX_TD_ATTRIBUTE_PERFMON BIT_ULL(63) + +/* +* TD_PARAMS is provided as an input to TDH_MNG_INIT, the size of which is 1024B. +*/ +struct td_params { +u64 attributes; +u64 xfam; +u32 max_vcpus; +u32 reserved0; + +u64 eptp_controls; +u64 exec_controls; +u16 tsc_frequency; +u8 reserved1[38 ]; + +u64 mrconfigid[6 ]; +u64 mrowner[6 ]; +u64 mrownerconfig[6 ]; +u64 reserved2[4 ]; + +union { +struct tdx_cpuid_value cpuid_values[0 ]; +u8 reserved3[768 ]; + }; +} __packed__aligned(1024) ; + +/* +* Guest uses MAX_PA for GPAW when set. +* 0: GPA.SHARED bit is GPA[47] +* 1: GPA.SHARED bit is GPA[51] +*/ +#define TDX_EXEC_CONTROL_MAX_GPAW BIT_ULL(0) + +/* +* TDX requires the frequency to be defined in units of 25MHz, which is the +* frequency of the core crystal clock on TDX-capable platforms, i.e. the TDX +* module can only program frequencies that are multiples of 25MHz. The +* frequency must be between 100mhz and 10ghz (inclusive). +*/ +#define TDX_TSC_KHZ_TO_25MHZ (tsc_in_khz) ((tsc_in_khz) / (25 * 1000)) +#define TDX_TSC_25MHZ_TO_KHZ (tsc_in_25mhz) ((tsc_in_25mhz) * (25 * 1000)) +#define TDX_MIN_TSC_FREQUENCY_KHZ (100 * 1000) +#define TDX_MAX_TSC_FREQUENCY_KHZ (10 * 1000 * 1000) + +#endif /* __KVM_X86_TDX_ARCH_H */
Signature · 1 line
2.25.1
PATCH v7 16/102 KVM: TDX: Add TDX "architectural" error codes
In reply to [email protected]From: Sean Christopherson <[email protected]>
Add error codes for the TDX SEAMCALLs both for TDX VMM side for TDH SEAMCALL and TDX guest side for TDG.VP.VMCALL. KVM issues the TDX SEAMCALLs and checks its error code. KVM handles hypercall from the TDX guest and may return an error. So error code for the TDX guest is also needed.
TDX SEAMCALL uses bits 31:0 to return more information, so these error codes will only exactly match RAX[63:32]. Error codes for TDG.VP.VMCALL is defined by TDX Guest-Host-Communication interface spec.
--- arch/x86/kvm/vmx/tdx_errno.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 arch/x86/kvm/vmx/tdx_errno.h
arch/x86/kvm/vmx/tdx_errno.h new file +29 -0
@@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* architectural status code for SEAMCALL */ + +#ifndef __KVM_X86_TDX_ERRNO_H +#define __KVM_X86_TDX_ERRNO_H + +#define TDX_SEAMCALL_STATUS_MASK 0xFFFFFFFF00000000ULL + +/* +* TDX SEAMCALL Status Codes (returned in RAX) +*/ +#define TDX_SUCCESS 0x0000000000000000ULL +#define TDX_NON_RECOVERABLE_VCPU 0x4000000100000000ULL +#define TDX_INTERRUPTED_RESUMABLE 0x8000000300000000ULL +#define TDX_LIFECYCLE_STATE_INCORRECT 0xC000060700000000ULL +#define TDX_VCPU_NOT_ASSOCIATED 0x8000070200000000ULL +#define TDX_KEY_GENERATION_FAILED 0x8000080000000000ULL +#define TDX_KEY_STATE_INCORRECT 0xC000081100000000ULL +#define TDX_KEY_CONFIGURED 0x0000081500000000ULL +#define TDX_EPT_WALK_FAILED 0xC0000B0000000000ULL + +/* +* TDG.VP.VMCALL Status Codes (returned in R10) +*/ +#define TDG_VP_VMCALL_SUCCESS 0x0000000000000000ULL +#define TDG_VP_VMCALL_INVALID_OPERAND 0x8000000000000000ULL +#define TDG_VP_VMCALL_TDREPORT_FAILED 0x8000000000000001ULL + +#endif /* __KVM_X86_TDX_ERRNO_H */
Signature · 1 line
2.25.1
PATCH v7 17/102 KVM: TDX: Add C wrapper functions for SEAMCALLs to the TDX module
In reply to [email protected]From: Isaku Yamahata <[email protected]>
A VMM interacts with the TDX module using a new instruction (SEAMCALL). A TDX VMM uses SEAMCALLs where a VMX VMM would have directly interacted with VMX instructions. For instance, a TDX VMM does not have full access to the VM control structure corresponding to VMX VMCS. Instead, a VMM induces the TDX module to act on behalf via SEAMCALLs.
Export __seamcall and define C wrapper functions for SEAMCALLs for readability. Some SEAMCALL APIs donates pages to TDX module or guest TD. The pages are encrypted with TDX private host key id set in high bits of physical address. If any modified cache lines may exit for these pages, flush them to memory by clflush_cache_range().
--- arch/x86/include/asm/tdx.h | 2 + arch/x86/kvm/vmx/tdx_ops.h | 185 +++++++++++++++++++++++++++++++ arch/x86/virt/vmx/tdx/seamcall.S | 2 + 3 files changed, 189 insertions(+) create mode 100644 arch/x86/kvm/vmx/tdx_ops.h
arch/x86/include/asm/tdx.h +2 -0
@@ -144,6 +144,8 @@ struct tdsysinfo_struct {bool platform_tdx_enabled (void );int tdx_init (void );const struct tdsysinfo_struct *tdx_get_sysinfo (void ); +u64 __seamcall (u64 op,u64 rcx,u64 rdx,u64 r8,u64 r9, +struct tdx_module_output *out);#else /* !CONFIG_INTEL_TDX_HOST */ static inline bool platform_tdx_enabled (void ) {return false; }static inline int tdx_init (void ) {return -ENODEV ; }
arch/x86/kvm/vmx/tdx_ops.h new file +185 -0
185 lines not on this page · raw message
arch/x86/virt/vmx/tdx/seamcall.S +2 -0
@@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ #include <linux/linkage.h> +#include <asm/export.h> #include <asm/frame.h> #include "tdxcall.S"
@@ -50,3 +51,4 @@ SYM_FUNC_START(__seamcall) FRAME_END RET SYM_FUNC_END(__seamcall) +EXPORT_SYMBOL_GPL(__seamcall)
Signature · 1 line
2.25.1
PATCH v7 18/102 KVM: TDX: Add helper functions to print TDX SEAMCALL error
In reply to [email protected]From: Isaku Yamahata <[email protected]>
Add helper functions to print out errors from the TDX module in a uniform manner.
--- arch/x86/kvm/Makefile | 2 +- arch/x86/kvm/vmx/tdx_error.c | 22 ++++++++++++++++++++++ arch/x86/kvm/vmx/tdx_ops.h | 3 +++ 3 files changed, 26 insertions(+), 1 deletion(-) create mode 100644 arch/x86/kvm/vmx/tdx_error.c
arch/x86/kvm/Makefile +1 -1
@@ -24,7 +24,7 @@ kvm-$(CONFIG_KVM_XEN) += xen.o kvm-intel-y += vmx/vmx.o vmx/vmenter.o vmx/pmu_intel.o vmx/vmcs12.o \ vmx/evmcs.o vmx/nested.o vmx/posted_intr.o vmx/main.o kvm-intel-$(CONFIG_X86_SGX_KVM) += vmx/sgx.o -kvm-intel-$(CONFIG_INTEL_TDX_HOST) += vmx/tdx.o +kvm-intel-$(CONFIG_INTEL_TDX_HOST) += vmx/tdx.o vmx/tdx_error.o kvm-amd-y += svm/svm.o svm/vmenter.o svm/pmu.o svm/nested.o svm/avic.o svm/sev.o
arch/x86/kvm/vmx/tdx_error.c new file +22 -0
@@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* functions to record TDX SEAMCALL error */ + +#include <linux/kernel.h> +#include <linux/bug.h> + +#include "tdx_ops.h" + +void pr_tdx_error (u64 op,u64 error_code,const struct tdx_module_output *out) +{ +if (!out) { +pr_err_ratelimited ("SEAMCALL[%lld] failed: 0x%llx\n" , + op, error_code); +return ; + } + +pr_err_ratelimited ( +"SEAMCALL[%lld] failed: 0x%llx " +"RCX 0x%llx, RDX 0x%llx, R8 0x%llx, R9 0x%llx, R10 0x%llx, R11 0x%llx\n" , + op, error_code, + out->rcx, out->rdx, out->r8, out->r9, out->r10, out->r11); +}
arch/x86/kvm/vmx/tdx_ops.h +3 -0
@@ -9,12 +9,15 @@#include <asm/cacheflush.h> #include <asm/asm.h> #include <asm/kvm_host.h> +#include <asm/tdx.h> #include "tdx_errno.h" #include "tdx_arch.h" #ifdef CONFIG_INTEL_TDX_HOST +void pr_tdx_error (u64 op,u64 error_code,const struct tdx_module_output *out); +static inline u64 tdh_mng_addcx (hpa_t tdr,hpa_t addr) {clflush_cache_range (__va (addr),PAGE_SIZE );
Signature · 1 line
2.25.1
PATCH v7 19/102 The start of TDX KVM patch series: TD VM creation/destruction
In reply to [email protected]From: Isaku Yamahata <[email protected]>
This empty commit is to mark the start of patch series of TD VM creation/destruction.
--- Documentation/virt/kvm/intel-tdx-layer-status.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Documentation/virt/kvm/intel-tdx-layer-status.rst +2 -2
@@ -15,8 +15,8 @@ Patch Layer status ------------------ Patch layer Status * TDX, VMX coexistence: Applied -* TDX architectural definitions: Applying -* TD VM creation/destruction: Not yet +* TDX architectural definitions: Applied +* TD VM creation/destruction: Applying * TD vcpu creation/destruction: Not yet * TDX EPT violation: Not yet * TD finalization: Not yet
Signature · 1 line
2.25.1
PATCH v7 20/102 KVM: TDX: Stub in tdx.h with structs, accessors, and VMCS helpers
In reply to [email protected]From: Sean Christopherson <[email protected]>
Stub in kvm_tdx, vcpu_tdx, and their various accessors. TDX defines SEAMCALL APIs to access TDX control structures corresponding to the VMX VMCS. Introduce helper accessors to hide its SEAMCALL ABI details.
--- arch/x86/kvm/vmx/tdx.h | 103 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 101 insertions(+), 2 deletions(-)
arch/x86/kvm/vmx/tdx.h +101 -2
@@ -3,16 +3,29 @@#define __KVM_X86_TDX_H#ifdef CONFIG_INTEL_TDX_HOST + +#include "tdx_ops.h" +int tdx_module_setup (void ); +struct tdx_td_page { +unsigned long va; +hpa_t pa; +bool added; +}; +struct kvm_tdx {struct kvm kvm; -/* TDX specific members follow. */ + +struct tdx_td_page tdr; +struct tdx_td_page *tdcs; };struct vcpu_tdx {struct kvm_vcpu vcpu; -/* TDX specific members follow. */ + +struct tdx_td_page tdvpr; +struct tdx_td_page *tdvpx; };static inline bool is_td (struct kvm *kvm)
@@ -34,6 +47,92 @@ static inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu) { return container_of(vcpu, struct vcpu_tdx, vcpu); } + +static __always_inline void tdvps_vmcs_check(u32 field, u8 bits) +{ +BUILD_BUG_ON_MSG (__builtin_constant_p (field) && (field) &0x1 , +"Read/Write to TD VMCS *_HIGH fields not supported" ); + +BUILD_BUG_ON (bits !=16 && bits !=32 && bits !=64 ); + +BUILD_BUG_ON_MSG (bits !=64 &&__builtin_constant_p (field) && + (((field) &0x6000 ) ==0x2000 || + ((field) &0x6000 ) ==0x6000 ), +"Invalid TD VMCS access for 64-bit field" ); +BUILD_BUG_ON_MSG (bits !=32 &&__builtin_constant_p (field) && + ((field) &0x6000 ) ==0x4000 , +"Invalid TD VMCS access for 32-bit field" ); +BUILD_BUG_ON_MSG (bits !=16 &&__builtin_constant_p (field) && + ((field) &0x6000 ) ==0x0000 , +"Invalid TD VMCS access for 16-bit field" ); +} + +static __always_inline void tdvps_state_non_arch_check(u64 field, u8 bits) {} +static __always_inline void tdvps_management_check(u64 field, u8 bits) {} + +#define TDX_BUILD_TDVPS_ACCESSORS (bits, uclass, lclass) \ +static __always_inline u##bits td_##lclass##_read##bits(struct vcpu_tdx *tdx, \ + u32 field) \ +{ \ + struct tdx_module_output out; \ + u64 err; \ + \ + tdvps_##lclass##_check(field, bits); \ + err = tdh_vp_rd(tdx->tdvpr.pa, TDVPS_##uclass(field), &out); \ + if (unlikely(err)) { \ + pr_err("TDH_VP_RD["#uclass".0x%x] failed: 0x%llx\n", \ + field, err); \ + return 0; \ + } \ + return (u##bits)out.r8; \ +} \ +static __always_inline void td_##lclass##_write##bits(struct vcpu_tdx *tdx, \ + u32 field, u##bits val) \ +{ \ + struct tdx_module_output out; \ + u64 err; \ + \ + tdvps_##lclass##_check(field, bits); \ + err = tdh_vp_wr(tdx->tdvpr.pa, TDVPS_##uclass(field), val, \ + GENMASK_ULL(bits - 1, 0), &out); \ + if (unlikely(err)) \ + pr_err("TDH_VP_WR["#uclass".0x%x] = 0x%llx failed: 0x%llx\n", \ + field, (u64)val, err); \ +} \ +static __always_inline void td_##lclass##_setbit##bits(struct vcpu_tdx *tdx, \ + u32 field, u64 bit) \ +{ \ + struct tdx_module_output out; \ + u64 err; \ + \ + tdvps_##lclass##_check(field, bits); \ + err = tdh_vp_wr(tdx->tdvpr.pa, TDVPS_##uclass(field), bit, bit, \ + &out); \ + if (unlikely(err)) \ + pr_err("TDH_VP_WR["#uclass".0x%x] |= 0x%llx failed: 0x%llx\n", \ + field, bit, err); \ +} \ +static __always_inline void td_##lclass##_clearbit##bits(struct vcpu_tdx *tdx, \ + u32 field, u64 bit) \ +{ \ + struct tdx_module_output out; \ + u64 err; \ + \ + tdvps_##lclass##_check(field, bits); \ + err = tdh_vp_wr(tdx->tdvpr.pa, TDVPS_##uclass(field), 0, bit, \ + &out); \ + if (unlikely(err)) \ + pr_err("TDH_VP_WR["#uclass".0x%x] &= ~0x%llx failed: 0x%llx\n", \ + field, bit, err); \ +} + +TDX_BUILD_TDVPS_ACCESSORS (16 ,VMCS , vmcs); +TDX_BUILD_TDVPS_ACCESSORS (32 ,VMCS , vmcs); +TDX_BUILD_TDVPS_ACCESSORS (64 ,VMCS , vmcs); + +TDX_BUILD_TDVPS_ACCESSORS (64 ,STATE_NON_ARCH , state_non_arch); +TDX_BUILD_TDVPS_ACCESSORS (8 ,MANAGEMENT , management); +#else static inline int tdx_module_setup (void ) {return -ENODEV ; };
Signature · 1 line
2.25.1
PATCH v7 21/102 x86/cpu: Add helper functions to allocate/free TDX private host key id
In reply to [email protected]From: Isaku Yamahata <[email protected]>
TDX private host key id is assigned to guest TD. The memory controller encrypts guest TD memory with the assigned TDX private host key id (HIKD). Add helper functions to allocate/free TDX private host key id so that TDX KVM manage it.
Also export the global TDX private host key id that is used to encrypt TDX module, its memory and some dynamic data (TDR). When VMM releasing encrypted page to reuse it, the page needs to be flushed with the used host key id. VMM needs the global TDX private host key id to flush such pages TDX module accesses with the global TDX private host key id.
--- arch/x86/include/asm/tdx.h | 7 +++++++ arch/x86/virt/vmx/tdx/tdx.c | 33 ++++++++++++++++++++++++++++++++- 2 files changed, 39 insertions(+), 1 deletion(-)
arch/x86/include/asm/tdx.h +7 -0
@@ -144,6 +144,10 @@ struct tdsysinfo_struct {bool platform_tdx_enabled (void );int tdx_init (void );const struct tdsysinfo_struct *tdx_get_sysinfo (void ); +u32 tdx_get_global_keyid (void ); +int tdx_keyid_alloc (void ); +void tdx_keyid_free (int keyid); +u64 __seamcall (u64 op,u64 rcx,u64 rdx,u64 r8,u64 r9,struct tdx_module_output *out);#else /* !CONFIG_INTEL_TDX_HOST */
@@ -151,6 +155,9 @@ static inline bool platform_tdx_enabled(void) { return false; }static inline int tdx_init (void ) {return -ENODEV ; }struct tdsysinfo_struct ;static inline const struct tdsysinfo_struct *tdx_get_sysinfo (void ) {return NULL ; } +static inline u32 tdx_get_global_keyid (void ) {return 0 ; }; +static inline int tdx_keyid_alloc (void ) {return -EOPNOTSUPP ; } +static inline void tdx_keyid_free (int keyid) { }#endif /* CONFIG_INTEL_TDX_HOST */ #endif /* !__ASSEMBLY__ */
arch/x86/virt/vmx/tdx/tdx.c +32 -1
@@ -57,7 +57,13 @@ static struct cmr_info tdx_cmr_array[MAX_CMRS] __aligned(CMR_INFO_ARRAY_ALIGNMENstatic int tdx_cmr_num;/* TDX module global KeyID. Used in TDH.SYS.CONFIG ABI. */ -static u32 tdx_global_keyid; +static u32 __read_mostly tdx_global_keyid; + +u32 tdx_get_global_keyid (void ) +{ +return tdx_global_keyid; +} +EXPORT_SYMBOL_GPL (tdx_get_global_keyid);/* Detect whether CPU supports SEAM */ static int detect_seam (void )
@@ -81,6 +87,31 @@ static int detect_seam(void)return 0 ; } +/* TDX KeyID pool */ +static DEFINE_IDA (tdx_keyid_pool); + +int tdx_keyid_alloc (void ) +{ +if (WARN_ON_ONCE (!tdx_keyid_start || !tdx_keyid_num)) +return -EINVAL ; + +/* The first keyID is reserved for the global key. */ +return ida_alloc_range (&tdx_keyid_pool, tdx_keyid_start +1 , + tdx_keyid_start + tdx_keyid_num -1 , +GFP_KERNEL ); +} +EXPORT_SYMBOL_GPL (tdx_keyid_alloc); + +void tdx_keyid_free (int keyid) +{ +/* keyid = 0 is reserved. */ +if (!keyid || keyid <=0 ) +return ; + +ida_free (&tdx_keyid_pool, keyid); +} +EXPORT_SYMBOL_GPL (tdx_keyid_free); +static int detect_tdx_keyids (void ) {u64 keyid_part;
Signature · 1 line
2.25.1
PATCH v7 22/102 KVM: TDX: create/destroy VM structure
In reply to [email protected]From: Sean Christopherson <[email protected]>
As the first step to create TDX guest, create/destroy VM struct. Assign TDX private Host Key ID (HKID) to the TDX guest for memory encryption and allocate extra pages for the TDX guest. On destruction, free allocated pages, and HKID.
Before tearing down private page tables, TDX requires some resources of the guest TD to be destroyed (i.e. keyID must have been reclaimed, etc). Add flush_shadow_all_private callback before tearing down private page tables for it.
Add a second kvm_x86_ops hook in kvm_arch_destroy_vm() to support TDX's destruction path, which needs to first put the VM into a teardown state, then free per-vCPU resources, and finally free per-VM resources.
--- arch/x86/include/asm/kvm-x86-ops.h | 2 + arch/x86/include/asm/kvm_host.h | 2 + arch/x86/kvm/vmx/main.c | 34 ++- arch/x86/kvm/vmx/tdx.c | 376 +++++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 2 + arch/x86/kvm/vmx/tdx_errno.h | 2 +- arch/x86/kvm/vmx/x86_ops.h | 11 + arch/x86/kvm/x86.c | 8 + 8 files changed, 433 insertions(+), 4 deletions(-)
arch/x86/include/asm/kvm-x86-ops.h +2 -0
@@ -21,7 +21,9 @@ KVM_X86_OP(has_emulated_msr) KVM_X86_OP(vcpu_after_set_cpuid) KVM_X86_OP(is_vm_type_supported) KVM_X86_OP(vm_init) +KVM_X86_OP_OPTIONAL(flush_shadow_all_private) KVM_X86_OP_OPTIONAL(vm_destroy) +KVM_X86_OP_OPTIONAL(vm_free) KVM_X86_OP_OPTIONAL_RET0(vcpu_precreate) KVM_X86_OP(vcpu_create) KVM_X86_OP(vcpu_free)
arch/x86/include/asm/kvm_host.h +2 -0
@@ -1438,7 +1438,9 @@ struct kvm_x86_ops {bool (*is_vm_type_supported)(unsigned long vm_type);unsigned int vm_size;int (*vm_init)(struct kvm *kvm); +void (*flush_shadow_all_private)(struct kvm *kvm);void (*vm_destroy)(struct kvm *kvm); +void (*vm_free)(struct kvm *kvm);/* Create, but do not attach this VCPU */ int (*vcpu_precreate)(struct kvm *kvm);
arch/x86/kvm/vmx/main.c +31 -3
@@ -39,18 +39,44 @@ static int __init vt_post_hardware_enable_setup(void)return 0 ; } +static void vt_hardware_unsetup (void ) +{ +tdx_hardware_unsetup (); +vmx_hardware_unsetup (); +} +static int vt_vm_init (struct kvm *kvm) {if (is_td (kvm)) -return -EOPNOTSUPP ;/* Not ready to create guest TD yet. */ +return tdx_vm_init (kvm);return vmx_vm_init (kvm); } +static void vt_flush_shadow_all_private (struct kvm *kvm) +{ +if (is_td (kvm)) +return tdx_mmu_release_hkid (kvm); +} + +static void vt_vm_destroy (struct kvm *kvm) +{ +if (is_td (kvm)) +return ; + +vmx_vm_destroy (kvm); +} + +static void vt_vm_free (struct kvm *kvm) +{ +if (is_td (kvm)) +return tdx_vm_free (kvm); +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" , - .hardware_unsetup = vmx_hardware_unsetup, + .hardware_unsetup = vt_hardware_unsetup, .check_processor_compatibility = vmx_check_processor_compatibility, .hardware_enable = vmx_hardware_enable,
@@ -60,7 +86,9 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .is_vm_type_supported = vt_is_vm_type_supported, .vm_size = sizeof(struct kvm_vmx), .vm_init = vt_vm_init, - .vm_destroy = vmx_vm_destroy, + .flush_shadow_all_private = vt_flush_shadow_all_private, + .vm_destroy = vt_vm_destroy, + .vm_free = vt_vm_free, .vcpu_precreate = vmx_vcpu_precreate, .vcpu_create = vmx_vcpu_create,
arch/x86/kvm/vmx/tdx.c +376 -0
407 lines not on this page · raw message
arch/x86/kvm/vmx/tdx.h +2 -0
@@ -19,6 +19,8 @@ struct kvm_tdx {struct tdx_td_page tdr;struct tdx_td_page *tdcs; + +int hkid; };struct vcpu_tdx {
arch/x86/kvm/vmx/tdx_errno.h +1 -1
@@ -12,11 +12,11 @@#define TDX_SUCCESS 0x0000000000000000ULL#define TDX_NON_RECOVERABLE_VCPU 0x4000000100000000ULL#define TDX_INTERRUPTED_RESUMABLE 0x8000000300000000ULL -#define TDX_LIFECYCLE_STATE_INCORRECT 0xC000060700000000ULL#define TDX_VCPU_NOT_ASSOCIATED 0x8000070200000000ULL#define TDX_KEY_GENERATION_FAILED 0x8000080000000000ULL#define TDX_KEY_STATE_INCORRECT 0xC000081100000000ULL#define TDX_KEY_CONFIGURED 0x0000081500000000ULL +#define TDX_NO_HKID_READY_TO_WBCACHE 0x0000082100000000ULL#define TDX_EPT_WALK_FAILED 0xC0000B0000000000ULL/*
arch/x86/kvm/vmx/x86_ops.h +11 -0
@@ -131,9 +131,20 @@ void vmx_setup_mce(struct kvm_vcpu *vcpu);#ifdef CONFIG_INTEL_TDX_HOST int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops);bool tdx_is_vm_type_supported (unsigned long type); +void tdx_hardware_unsetup (void ); + +int tdx_vm_init (struct kvm *kvm); +void tdx_mmu_release_hkid (struct kvm *kvm); +void tdx_vm_free (struct kvm *kvm);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; } +static inline void tdx_hardware_unsetup (void ) {} + +static inline int tdx_vm_init (struct kvm *kvm) {return -EOPNOTSUPP ; } +static inline void tdx_mmu_release_hkid (struct kvm *kvm) {} +static inline void tdx_flush_shadow_all_private (struct kvm *kvm) {} +static inline void tdx_vm_free (struct kvm *kvm) {}#endif #endif /* __KVM_X86_VMX_X86_OPS_H */
arch/x86/kvm/x86.c +8 -0
@@ -12057,6 +12057,7 @@ void kvm_arch_destroy_vm(struct kvm *kvm)kvm_page_track_cleanup (kvm);kvm_xen_destroy_vm (kvm);kvm_hv_destroy_vm (kvm); +static_call_cond (kvm_x86_vm_free)(kvm); }static void memslot_rmap_free (struct kvm_memory_slot *slot)
@@ -12321,6 +12322,13 @@ void kvm_arch_commit_memory_region(struct kvm *kvm,void kvm_arch_flush_shadow_all (struct kvm *kvm) { +/* +* kvm_mmu_zap_all() zaps both private and shared page tables. Before +* tearing down private page tables, TDX requires some TD resources to +* be destroyed (i.e. keyID must have been reclaimed, etc). Invoke +* kvm_x86_flush_shadow_all_private() for this. +*/ +static_call_cond (kvm_x86_flush_shadow_all_private)(kvm);kvm_mmu_zap_all (kvm); }
Signature · 1 line
2.25.1
Re: [PATCH v7 022/102] KVM: TDX: create/destroy VM structure
Quoted 494 lines · On Mon, Jun 27, 2022 at 02:53:14PM -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
As the first step to create TDX guest, create/destroy VM struct. Assign TDX private Host Key ID (HKID) to the TDX guest for memory encryption and allocate extra pages for the TDX guest. On destruction, free allocated pages, and HKID.
Before tearing down private page tables, TDX requires some resources of the guest TD to be destroyed (i.e. keyID must have been reclaimed, etc). Add
flush_shadow_all_privatecallback before tearing down private page tables for it.Add a second
kvm_x86_opshook inkvm_arch_destroy_vm()to support TDX's destruction path, which needs to first put the VM into a teardown state, then free per-vCPU resources, and finally free per-VM resources.Co-developed-by Kai Huang <[email protected]>Signed-off-by Kai Huang <[email protected]>Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/kvm-x86-ops.h | 2 + arch/x86/include/asm/kvm_host.h | 2 + arch/x86/kvm/vmx/main.c | 34 ++- arch/x86/kvm/vmx/tdx.c | 376 +++++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 2 + arch/x86/kvm/vmx/tdx_errno.h | 2 +- arch/x86/kvm/vmx/x86_ops.h | 11 + arch/x86/kvm/x86.c | 8 + 8 files changed, 433 insertions(+), 4 deletions(-)arch/x86/include/asm/kvm-x86-ops.h +2
-0@@ -21,7 +21,9 @@ KVM_X86_OP(has_emulated_msr) KVM_X86_OP(vcpu_after_set_cpuid) KVM_X86_OP(is_vm_type_supported) KVM_X86_OP(vm_init) +KVM_X86_OP_OPTIONAL(flush_shadow_all_private) KVM_X86_OP_OPTIONAL(vm_destroy) +KVM_X86_OP_OPTIONAL(vm_free) KVM_X86_OP_OPTIONAL_RET0(vcpu_precreate) KVM_X86_OP(vcpu_create) KVM_X86_OP(vcpu_free)arch/x86/include/asm/kvm_host.h +2
-0@@ -1438,7 +1438,9 @@ struct kvm_x86_ops {bool (*is_vm_type_supported)(unsigned long vm_type);unsigned int vm_size;int (*vm_init)(struct kvm *kvm); +void (*flush_shadow_all_private)(struct kvm *kvm);void (*vm_destroy)(struct kvm *kvm); +void (*vm_free)(struct kvm *kvm);/* Create, but do not attach this VCPU */ int (*vcpu_precreate)(struct kvm *kvm);arch/x86/kvm/vmx/main.c +31
-3@@ -39,18 +39,44 @@ static int __init vt_post_hardware_enable_setup(void)return 0 ; } +static void vt_hardware_unsetup (void ) +{ +tdx_hardware_unsetup (); +vmx_hardware_unsetup (); +} +static int vt_vm_init (struct kvm *kvm) {if (is_td (kvm)) -return -EOPNOTSUPP ;/* Not ready to create guest TD yet. */ +return tdx_vm_init (kvm);return vmx_vm_init (kvm); } +static void vt_flush_shadow_all_private (struct kvm *kvm) +{ +if (is_td (kvm)) +return tdx_mmu_release_hkid (kvm); +} + +static void vt_vm_destroy (struct kvm *kvm) +{ +if (is_td (kvm)) +return ; + +vmx_vm_destroy (kvm); +} + +static void vt_vm_free (struct kvm *kvm) +{ +if (is_td (kvm)) +return tdx_vm_free (kvm); +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" , - .hardware_unsetup = vmx_hardware_unsetup, + .hardware_unsetup = vt_hardware_unsetup, .check_processor_compatibility = vmx_check_processor_compatibility, .hardware_enable = vmx_hardware_enable,@@ -60,7 +86,9 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .is_vm_type_supported = vt_is_vm_type_supported, .vm_size = sizeof(struct kvm_vmx), .vm_init = vt_vm_init, - .vm_destroy = vmx_vm_destroy, + .flush_shadow_all_private = vt_flush_shadow_all_private, + .vm_destroy = vt_vm_destroy, + .vm_free = vt_vm_free, .vcpu_precreate = vmx_vcpu_precreate, .vcpu_create = vmx_vcpu_create,arch/x86/kvm/vmx/tdx.c +358
-0@@ -31,9 +31,367 @@ struct tdx_capabilities {struct tdx_cpuid_config cpuid_configs[TDX_MAX_NR_CPUID_CONFIGS ]; }; +/* +* Key id globally used by TDX module: TDX module maps TDR with this TDX global +* key id. TDR includes key id assigned to the TD. Then TDX module maps other +* TD-related pages with the assigned key id. TDR requires this TDX global key +* id for cache flush unlike other TD-related pages. +*/ +static u32 tdx_global_keyid__read_mostly ; +/* Capabilities of KVM + the TDX module. */ static struct tdx_capabilities tdx_caps; +/* +* Some TDX SEAMCALLs (TDH.MNG.CREATE, TDH.PHYMEM.CACHE.WB, +* TDH.MNG.KEY.RECLAIMID, TDH.MNG.KEY.FREEID etc) tries to acquire a global lock +* internally in TDX module. If failed, TDX_OPERAND_BUSY is returned without +* spinning or waiting due to a constraint on execution time. It's caller's +* responsibility to avoid race (or retry on TDX_OPERAND_BUSY). Use this mutex +* to avoid race in TDX module because the kernel knows better about scheduling. +*/ +static DEFINE_MUTEX (tdx_lock); +static struct mutex *tdx_mng_key_config_lock; + +static __always_inline hpa_t set_hkid_to_hpa(hpa_t pa, u16 hkid) +{ + pa &= ~hkid_mask; + pa |= (u64 )hkid << hkid_start_pos; + +return pa; +} + +static inline bool is_td_created (struct kvm_tdx *kvm_tdx) +{ +return kvm_tdx->tdr.added; +} + +static inline void tdx_hkid_free (struct kvm_tdx *kvm_tdx) +{ +tdx_keyid_free (kvm_tdx->hkid); + kvm_tdx->hkid =-1 ; +} + +static inline bool is_hkid_assigned (struct kvm_tdx *kvm_tdx) +{ +return kvm_tdx->hkid >0 ; +} + +static void tdx_clear_page (unsigned long page) +{ +const void *zero_page = (const void *)__va (page_to_phys (ZERO_PAGE (0 ))); +unsigned long i; + +/* +* Zeroing the page is only necessary for systems with MKTME-i: +* when re-assign one page from old keyid to a new keyid, MOVDIR64B is +* required to clear/write the page with new keyid to prevent integrity +* error when read on the page with new keyid. +*/ +if (!static_cpu_has (X86_FEATURE_MOVDIR64B )) +return ; + +for (i =0 ; i <4096 ; i +=64 ) +/* MOVDIR64B [rdx], es:rdi */ + asm (".byte 0x66, 0x0f, 0x38, 0xf8, 0x3a" + : :"d" (zero_page),"D" (page + i) :"memory" ); +} + +static int tdx_reclaim_page (unsigned long va,hpa_t pa,bool do_wb,u16 hkid) +{ +struct tdx_module_output out; +u64 err; + + err =tdh_phymem_page_reclaim (pa, &out); +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_PHYMEM_PAGE_RECLAIM , err, &out); +return -EIO ; + } + +if (do_wb) { + err =tdh_phymem_page_wbinvd (set_hkid_to_hpa (pa, hkid)); +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_PHYMEM_PAGE_WBINVD , err,NULL ); +return -EIO ; + } + } + +tdx_clear_page (va); +return 0 ; +} + +static int tdx_alloc_td_page (struct tdx_td_page *page) +{ + page->va =__get_free_page (GFP_KERNEL_ACCOUNT ); +if (!page->va) +return -ENOMEM ; + + page->pa =__pa (page->va); +return 0 ; +} + +static void tdx_mark_td_page_added (struct tdx_td_page *page) +{ +WARN_ON_ONCE (page->added); + page->added = true; +} + +static void tdx_reclaim_td_page (struct tdx_td_page *page) +{ +if (page->added) { +/* +* TDCX are being reclaimed. TDX module maps TDCX with HKID +* assigned to the TD. Here the cache associated to the TD +* was already flushed by TDH.PHYMEM.CACHE.WB before here, So +* cache doesn't need to be flushed again. +*/ +if (tdx_reclaim_page (page->va, page->pa, false,0 )) +return ; + + page->added = false; + } +free_page (page->va); +} + +static int tdx_do_tdh_phymem_cache_wb (void *param) +{ +u64 err =0 ; + +do { + err =tdh_phymem_cache_wb (!!err); + }while (err ==TDX_INTERRUPTED_RESUMABLE ); + +/* Other thread may have done for us. */ +if (err ==TDX_NO_HKID_READY_TO_WBCACHE ) + err =TDX_SUCCESS ; +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_PHYMEM_CACHE_WB , err,NULL ); +return -EIO ; + } + +return 0 ; +} + +void tdx_mmu_release_hkid (struct kvm *kvm) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (kvm); +cpumask_var_t packages; +bool cpumask_allocated; +u64 err; +int ret; +int i; + +if (!is_hkid_assigned (kvm_tdx)) +return ; + +if (!is_td_created (kvm_tdx)) + goto free_hkid; + + cpumask_allocated =zalloc_cpumask_var (&packages,GFP_KERNEL ); +cpus_read_lock (); +for_each_online_cpu (i) { +if (cpumask_allocated && +cpumask_test_and_set_cpu (topology_physical_package_id (i), + packages)) +continue ; + +/* +* We can destroy multiple the guest TDs simultaneously. +* Prevent tdh_phymem_cache_wb from returning TDX_BUSY by +* serialization. +*/ +mutex_lock (&tdx_lock); + ret =smp_call_on_cpu (i, tdx_do_tdh_phymem_cache_wb,NULL ,1 ); +mutex_unlock (&tdx_lock); +if (ret) +break ; + } +cpus_read_unlock (); +free_cpumask_var (packages); + +mutex_lock (&tdx_lock); + err =tdh_mng_key_freeid (kvm_tdx->tdr.pa); +mutex_unlock (&tdx_lock); +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_MNG_KEY_FREEID , err,NULL ); +pr_err ("tdh_mng_key_freeid failed. HKID %d is leaked.\n" , + kvm_tdx->hkid); +return ; + } + +free_hkid: +tdx_hkid_free (kvm_tdx); +} + +void tdx_vm_free (struct kvm *kvm) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (kvm); +int i; + +/* Can't reclaim or free TD pages if teardown failed. */ +if (is_hkid_assigned (kvm_tdx)) +return ; + +for (i =0 ; i < tdx_caps.tdcs_nr_pages; i++) +tdx_reclaim_td_page (&kvm_tdx->tdcs[i]); +kfree (kvm_tdx->tdcs); + +/* +* TDX module maps TDR with TDX global HKID. TDX module may access TDR +* while operating on TD (Especially reclaiming TDCS). Cache flush with +* TDX global HKID is needed. +*/ +if (kvm_tdx->tdr.added && +tdx_reclaim_page (kvm_tdx->tdr.va, kvm_tdx->tdr.pa, true, + tdx_global_keyid)) +return ; + +free_page (kvm_tdx->tdr.va); +} + +static int tdx_do_tdh_mng_key_config (void *param) +{ +hpa_t *tdr_p = param; +u64 err; + +do { + err =tdh_mng_key_config (*tdr_p); + +/* +* If it failed to generate a random key, retry it because this +* is typically caused by an entropy error of the CPU's random +* number generator. +*/ + }while (err ==TDX_KEY_GENERATION_FAILED ); + +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_MNG_KEY_CONFIG , err,NULL ); +return -EIO ; + } + +return 0 ; +} + +int tdx_vm_init (struct kvm *kvm) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (kvm); +cpumask_var_t packages; +int ret, i; +u64 err; + +/* vCPUs can't be created until after KVM_TDX_INIT_VM. */ + kvm->max_vcpus =0 ; + + kvm_tdx->hkid =tdx_keyid_alloc (); +if (kvm_tdx->hkid <0 ) +return -EBUSY ; + + ret =tdx_alloc_td_page (&kvm_tdx->tdr); +if (ret) + goto free_hkid; + + kvm_tdx->tdcs =kcalloc (tdx_caps.tdcs_nr_pages,sizeof (*kvm_tdx->tdcs), +GFP_KERNEL_ACCOUNT ); +if (!kvm_tdx->tdcs) + goto free_tdr; +for (i =0 ; i < tdx_caps.tdcs_nr_pages; i++) { + ret =tdx_alloc_td_page (&kvm_tdx->tdcs[i]); +if (ret) + goto free_tdcs; + } + +/* +* Acquire global lock to avoid TDX_OPERAND_BUSY: +* TDH.MNG.CREATE and other APIs try to lock the global Key Owner +* Table (KOT) to track the assigned TDX private HKID. It doesn't spin +* to acquire the lock, returns TDX_OPERAND_BUSY instead, and let the +* caller to handle the contention. This is because of time limitation +* usable inside the TDX module and OS/VMM knows better about process +* scheduling. +* +* APIs to acquire the lock of KOT: +* TDH.MNG.CREATE, TDH.MNG.KEY.FREEID, TDH.MNG.VPFLUSHDONE, and +* TDH.PHYMEM.CACHE.WB. +*/ +mutex_lock (&tdx_lock); + err =tdh_mng_create (kvm_tdx->tdr.pa, kvm_tdx->hkid); +mutex_unlock (&tdx_lock); +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_MNG_CREATE , err,NULL ); + ret = -EIO ; + goto free_tdcs; + } +tdx_mark_td_page_added (&kvm_tdx->tdr); + +if (!zalloc_cpumask_var (&packages,GFP_KERNEL )) { + ret = -ENOMEM ; + goto free_tdcs; + } +cpus_read_lock (); +for_each_online_cpu (i) { +int pkg =topology_physical_package_id (i); + +if (cpumask_test_and_set_cpu (pkg, packages)) +continue ; + +/* +* Program the memory controller in the package with an +* encryption key associated to a TDX private host key id +* assigned to this TDR. Concurrent operations on same memory +* controller results in TDX_OPERAND_BUSY. Avoid this race by +* mutex. +*/ +mutex_lock (&tdx_mng_key_config_lock[pkg]); + ret =smp_call_on_cpu (i, tdx_do_tdh_mng_key_config, + &kvm_tdx->tdr.pa, true); +mutex_unlock (&tdx_mng_key_config_lock[pkg]); +if (ret) +break ; + } +cpus_read_unlock (); +free_cpumask_var (packages); +if (ret) + goto teardown; + +for (i =0 ; i < tdx_caps.tdcs_nr_pages; i++) { + err =tdh_mng_addcx (kvm_tdx->tdr.pa, kvm_tdx->tdcs[i].pa); +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_MNG_ADDCX , err,NULL ); + ret = -EIO ; + goto teardown; + } +tdx_mark_td_page_added (&kvm_tdx->tdcs[i]); + } + +/* +* Note, TDH_MNG_INIT cannot be invoked here. TDH_MNG_INIT requires a dedicated +* ioctl() to define the configure CPUID values for the TD. +*/ +return 0 ; + +/* +* The sequence for freeing resources from a partially initialized TD +* varies based on where in the initialization flow failure occurred. +* Simply use the full teardown and destroy, which naturally play nice +* with partial initialization. +*/ +teardown: +tdx_mmu_release_hkid (kvm); +tdx_vm_free (kvm); +return ret; + +free_tdcs: +/* @i points at the TDCS page that failed allocation. */ +for (--i; i >=0 ; i--) +free_page (kvm_tdx->tdcs[i].va); +kfree (kvm_tdx->tdcs); +free_tdr: +free_page (kvm_tdx->tdr.va); +free_hkid: +tdx_hkid_free (kvm_tdx); +return ret; +} +int __init tdx_module_setup (void ) {const struct tdsysinfo_struct *tdsysinfo;
arch/x86/kvm/vmx/tdx.c int __init tdx_module_setup(void) · line 409
Quoted 4 lines
arch/x86/kvm/vmx/tdx.c +1
-0@@ -48,6 +406,8 @@ int __init tdx_module_setup(void)return ret; } + tdx_global_keyid =tdx_get_global_keyid ();
I remember there's another static variable also named "tdx_global_keyid" in arch/x86/virt/vmx/tdx/tdx.c ? We can just use tdx_get_global_keyid() here without introducing another static variable.
Quoted 123 lines
arch/x86/kvm/vmx/tdx.c +17
-0+ tdsysinfo =tdx_get_sysinfo ();if (tdsysinfo->num_cpuid_config >TDX_MAX_NR_CPUID_CONFIGS )return -EIO ;@@ -81,7 +441,9 @@ bool tdx_is_vm_type_supported(unsigned long type)int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops) { +int max_pkgs;u32 max_pa; +int i;if (!enable_ept) {pr_warn ("Cannot enable TDX with EPT disabled\n" );@@ -97,6 +459,14 @@ int __init tdx_hardware_setup(struct kvm_x86_ops *x86_ops)if (WARN_ON_ONCE (x86_ops->tlb_remote_flush))return -EIO ; + max_pkgs =topology_max_packages (); + tdx_mng_key_config_lock =kcalloc (max_pkgs,sizeof (*tdx_mng_key_config_lock), +GFP_KERNEL ); +if (!tdx_mng_key_config_lock) +return -ENOMEM ; +for (i =0 ; i < max_pkgs; i++) +mutex_init (&tdx_mng_key_config_lock[i]); + max_pa =cpuid_eax (0x80000008 ) &0xff ; hkid_start_pos = boot_cpu_data.x86_phys_bits; hkid_mask =GENMASK_ULL (max_pa -1 , hkid_start_pos);@@ -105,3 +475,9 @@ int __init tdx_hardware_setup(struct kvm_x86_ops *x86_ops)return 0 ; } + +void tdx_hardware_unsetup (void ) +{ +/* kfree accepts NULL. */ +kfree (tdx_mng_key_config_lock); +}arch/x86/kvm/vmx/tdx.h +2
-0@@ -19,6 +19,8 @@ struct kvm_tdx {struct tdx_td_page tdr;struct tdx_td_page *tdcs; + +int hkid; };struct vcpu_tdx {arch/x86/kvm/vmx/tdx_errno.h +1
-1@@ -12,11 +12,11 @@#define TDX_SUCCESS 0x0000000000000000ULL#define TDX_NON_RECOVERABLE_VCPU 0x4000000100000000ULL#define TDX_INTERRUPTED_RESUMABLE 0x8000000300000000ULL -#define TDX_LIFECYCLE_STATE_INCORRECT 0xC000060700000000ULL#define TDX_VCPU_NOT_ASSOCIATED 0x8000070200000000ULL#define TDX_KEY_GENERATION_FAILED 0x8000080000000000ULL#define TDX_KEY_STATE_INCORRECT 0xC000081100000000ULL#define TDX_KEY_CONFIGURED 0x0000081500000000ULL +#define TDX_NO_HKID_READY_TO_WBCACHE 0x0000082100000000ULL#define TDX_EPT_WALK_FAILED 0xC0000B0000000000ULL/* arch/x86/kvm/vmx/x86_ops.h +11
-0@@ -131,9 +131,20 @@ void vmx_setup_mce(struct kvm_vcpu *vcpu);#ifdef CONFIG_INTEL_TDX_HOST int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops);bool tdx_is_vm_type_supported (unsigned long type); +void tdx_hardware_unsetup (void ); + +int tdx_vm_init (struct kvm *kvm); +void tdx_mmu_release_hkid (struct kvm *kvm); +void tdx_vm_free (struct kvm *kvm);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; } +static inline void tdx_hardware_unsetup (void ) {} + +static inline int tdx_vm_init (struct kvm *kvm) {return -EOPNOTSUPP ; } +static inline void tdx_mmu_release_hkid (struct kvm *kvm) {} +static inline void tdx_flush_shadow_all_private (struct kvm *kvm) {} +static inline void tdx_vm_free (struct kvm *kvm) {}#endif #endif /* __KVM_X86_VMX_X86_OPS_H */ arch/x86/kvm/x86.c +8
-1@@ -12057,6 +12057,7 @@ void kvm_arch_destroy_vm(struct kvm *kvm)kvm_page_track_cleanup (kvm);kvm_xen_destroy_vm (kvm);kvm_hv_destroy_vm (kvm); +static_call_cond (kvm_x86_vm_free)(kvm); }static void memslot_rmap_free (struct kvm_memory_slot *slot)@@ -12321,6 +12322,13 @@ void kvm_arch_commit_memory_region(struct kvm *kvm,void kvm_arch_flush_shadow_all (struct kvm *kvm) { +/* +* kvm_mmu_zap_all() zaps both private and shared page tables. Before +* tearing down private page tables, TDX requires some TD resources to +* be destroyed (i.e. keyID must have been reclaimed, etc). Invoke +* kvm_x86_flush_shadow_all_private() for this. +*/ +static_call_cond (kvm_x86_flush_shadow_all_private)(kvm);kvm_mmu_zap_all (kvm); } --2.25.1
Re: [PATCH v7 022/102] KVM: TDX: create/destroy VM structure
Quoted 5 lines · Yuan Yao
Quoted 4 lines · On Mon, Jun 27, 2022 at 02:53:14PM -0700, [email protected] wrote:
arch/x86/kvm/vmx/tdx.c +0
-0
...
Quoted 7 lines
Quoted 7 lines
int
__inittdx_module_setup(void)
{arch/x86/kvm/vmx/tdx.c +0
-0const struct tdsysinfo_struct *tdsysinfo;@@ -48,6 +406,8 @@ int __init tdx_module_setup(void)return ret; }
Quoted 6 lines
arch/x86/kvm/vmx/tdx.c int __init tdx_module_setup(void) · line 409
Quoted 1 line
arch/x86/kvm/vmx/tdx.c +1
-0+ tdx_global_keyid =tdx_get_global_keyid ();I remember there's another static variable also named "
tdx_global_keyid" inarch/x86/virt/vmx/tdx/tdx.c? We can just usetdx_get_global_keyid()here without introducing another static variable.
Hmm, it can be done by exporting the variable itself.
static inline int tdx_keyid_alloc(void) { return -EOPNOTSUPP; } static inline void tdx_keyid_free(int keyid) { }
arch/x86/kvm/vmx/tdx.c +0 -10
@@ -43,14 +43,6 @@ struct tdx_capabilities {struct tdx_cpuid_config cpuid_configs[TDX_MAX_NR_CPUID_CONFIGS ]; }; -/* -* Key id globally used by TDX module: TDX module maps TDR with this TDX global -* key id. TDR includes key id assigned to the TD. Then TDX module maps other -* TD-related pages with the assigned key id. TDR requires this TDX global key -* id for cache flush unlike other TD-related pages. -*/ -static u32 tdx_global_keyid__read_mostly ; -/* Capabilities of KVM + the TDX module. */ static struct tdx_capabilities tdx_caps;
@@ -3572,8 +3564,6 @@ int __init tdx_module_setup(void)return ret; } - tdx_global_keyid =tdx_get_global_keyid (); - tdsysinfo =tdx_get_sysinfo ();if (tdsysinfo->num_cpuid_config >TDX_MAX_NR_CPUID_CONFIGS )return -EIO ;
arch/x86/virt/vmx/tdx/tdx.c +2 -7
@@ -65,13 +65,8 @@ static struct cmr_info tdx_cmr_array[MAX_CMRS] __aligned(CMR_INFO_ARRAY_ALIGNMENstatic int tdx_cmr_num;/* TDX module global KeyID. Used in TDH.SYS.CONFIG ABI. */ -static u32 __read_mostly tdx_global_keyid; - -u32 tdx_get_global_keyid (void ) -{ -return tdx_global_keyid; -} -EXPORT_SYMBOL_GPL (tdx_get_global_keyid); +u32 tdx_global_keyid__ro_after_init ; +EXPORT_SYMBOL_GPL (tdx_global_keyid);u32 tdx_get_num_keyid (void ) {
Signature · 1 line
Isaku Yamahata <[email protected]>
Sean Christopherson
maintainerRe: [PATCH v7 022/102] KVM: TDX: create/destroy VM structure
In reply to [email protected]arch/x86/kvm/vmx/tdx.c struct tdx_capabilities { · line 287
Quoted 13 lines · On Mon, Jun 27, 2022, [email protected] wrote:
arch/x86/kvm/vmx/tdx.c +13
-0+int tdx_vm_init (struct kvm *kvm) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (kvm); +cpumask_var_t packages; +int ret, i; +u64 err; + +/* vCPUs can't be created until after KVM_TDX_INIT_VM. */ + kvm->max_vcpus =0 ; + + kvm_tdx->hkid =tdx_keyid_alloc (); +if (kvm_tdx->hkid <0 ) +return -EBUSY ;
We (Google) have been working through potential flows for intrahost (copyless) migration, and one of the things that came up is that allocating the HKID during KVM_CREATE_VM will be problematic as HKID are a relatively scarce resource. E.g. if all key IDs are in use, then creating a destination TDX VM will be impossible even though intrahost migration can create succeed since the "new" would reuse the source's HKID.
Allocating the various pages is also annoying, e.g. they'd have to be freed, but not as directly problematic.
SEV (all flavors) has a similar problem with ASIDs. The solution for SEV was to not allocate an ASID during KVM_CREATE_VM and instead "activate" SEV during KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM.
I think we should prepare for a similar future for TDX and move the HKID allocation and all dependent resource allocation to KVM_TDX_INIT_VM. AFAICT (and remember), this should be a fairly simple code movement, but I'd prefer it be done before merging TDX so that if it's not so simple, e.g. requires another sub-ioctl, then we don't have to try and tweak KVM's ABI to enable intrahost migration.
Quoted 14 lines
arch/x86/kvm/vmx/tdx.c +14
-0+ + ret =tdx_alloc_td_page (&kvm_tdx->tdr); +if (ret) + goto free_hkid; + + kvm_tdx->tdcs =kcalloc (tdx_caps.tdcs_nr_pages,sizeof (*kvm_tdx->tdcs), +GFP_KERNEL_ACCOUNT ); +if (!kvm_tdx->tdcs) + goto free_tdr; +for (i =0 ; i < tdx_caps.tdcs_nr_pages; i++) { + ret =tdx_alloc_td_page (&kvm_tdx->tdcs[i]); +if (ret) + goto free_tdcs; + }
Re: [PATCH v7 022/102] KVM: TDX: create/destroy VM structure
Quoted 29 lines · Sean Christopherson
arch/x86/kvm/vmx/tdx.c struct tdx_capabilities { · line 287
Quoted 13 lines · On Mon, Jun 27, 2022, [email protected] wrote:
arch/x86/kvm/vmx/tdx.c +13
-0+int tdx_vm_init (struct kvm *kvm) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (kvm); +cpumask_var_t packages; +int ret, i; +u64 err; + +/* vCPUs can't be created until after KVM_TDX_INIT_VM. */ + kvm->max_vcpus =0 ; + + kvm_tdx->hkid =tdx_keyid_alloc (); +if (kvm_tdx->hkid <0 ) +return -EBUSY ;We (Google) have been working through potential flows for intrahost (copyless) migration, and one of the things that came up is that allocating the HKID during
KVM_CREATE_VMwill be problematic as HKID are a relatively scarce resource. E.g. if all key IDs are in use, then creating a destination TDX VM will be impossible even though intrahost migration can create succeed since the "new" would reuse the source's HKID.Allocating the various pages is also annoying, e.g. they'd have to be freed, but not as directly problematic.
SEV (all flavors) has a similar problem with ASIDs. The solution for SEV was to not allocate an ASID during
KVM_CREATE_VMand instead "activate" SEV duringKVM_CAP_VM_MOVE_ENC_CONTEXT_FROM.
Quoted 5 lines
I think we should prepare for a similar future for TDX and move the HKID allocation and all dependent resource allocation to
KVM_TDX_INIT_VM. AFAICT (and remember), this should be a fairly simple code movement, but I'd prefer it be done before merging TDX so that if it's not so simple, e.g. requires another sub-ioctl, then we don't have to try and tweak KVM's ABI to enable intrahost migration.
The simple code movement works here. The TDX related initialization/allocation can simply be moved to KVM_TDX_INIT_VM and KVM_TDX_INIT_VCPU.
I'll update them with the next respin.
Thanks,
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 23/102 KVM: TDX: x86: Add ioctl to get TDX systemwide parameters
In reply to [email protected]From: Sean Christopherson <[email protected]>
Implement a system-scoped ioctl to get system-wide parameters for TDX.
--- arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 1 + arch/x86/include/uapi/asm/kvm.h | 48 +++++++++++++++++++++++++++ arch/x86/kvm/vmx/main.c | 2 ++ arch/x86/kvm/vmx/tdx.c | 46 +++++++++++++++++++++++++ arch/x86/kvm/vmx/x86_ops.h | 2 ++ arch/x86/kvm/x86.c | 6 ++++ tools/arch/x86/include/uapi/asm/kvm.h | 48 +++++++++++++++++++++++++++ 8 files changed, 154 insertions(+)
arch/x86/include/asm/kvm-x86-ops.h +1 -0
@@ -117,6 +117,7 @@ KVM_X86_OP(smi_allowed) KVM_X86_OP(enter_smm) KVM_X86_OP(leave_smm) KVM_X86_OP(enable_smi_window) +KVM_X86_OP_OPTIONAL(dev_mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_register_region) KVM_X86_OP_OPTIONAL(mem_enc_unregister_region)
arch/x86/include/asm/kvm_host.h +1 -0
@@ -1591,6 +1591,7 @@ struct kvm_x86_ops {int (*leave_smm)(struct kvm_vcpu *vcpu,const char *smstate);void (*enable_smi_window)(struct kvm_vcpu *vcpu); +int (*dev_mem_enc_ioctl)(void __user *argp);int (*mem_enc_ioctl)(struct kvm *kvm,void __user *argp);int (*mem_enc_register_region)(struct kvm *kvm,struct kvm_enc_region *argp);int (*mem_enc_unregister_region)(struct kvm *kvm,struct kvm_enc_region *argp);
arch/x86/include/uapi/asm/kvm.h +48 -0
52 lines not on this page · raw message
arch/x86/kvm/vmx/main.c +2 -0
@@ -212,6 +212,8 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .complete_emulated_msr = kvm_complete_insn_gp, .vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector, + + .dev_mem_enc_ioctl = tdx_dev_ioctl, };struct kvm_x86_init_ops vt_init_ops__initdata = {
arch/x86/kvm/vmx/tdx.c +46 -0
52 lines not on this page · raw message
arch/x86/kvm/vmx/x86_ops.h +2 -0
@@ -132,6 +132,7 @@ void vmx_setup_mce(struct kvm_vcpu *vcpu);int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops);bool tdx_is_vm_type_supported (unsigned long type);void tdx_hardware_unsetup (void ); +int tdx_dev_ioctl (void __user *argp);int tdx_vm_init (struct kvm *kvm);void tdx_mmu_release_hkid (struct kvm *kvm);
@@ -140,6 +141,7 @@ void tdx_vm_free(struct kvm *kvm);static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; }static inline void tdx_hardware_unsetup (void ) {} +static inline int tdx_dev_ioctl (void __user *argp) {return -EOPNOTSUPP ; };static inline int tdx_vm_init (struct kvm *kvm) {return -EOPNOTSUPP ; }static inline void tdx_mmu_release_hkid (struct kvm *kvm) {}
arch/x86/kvm/x86.c +6 -0
@@ -4565,6 +4565,12 @@ long kvm_arch_dev_ioctl(struct file *filp,break ; r =kvm_x86_dev_has_attr (&attr);break ; +case KVM_MEMORY_ENCRYPT_OP : + r = -EINVAL ; +if (!kvm_x86_ops.dev_mem_enc_ioctl) + goto out; + r =static_call (kvm_x86_dev_mem_enc_ioctl)(argp); +break ; }default : r = -EINVAL ;
tools/arch/x86/include/uapi/asm/kvm.h +48 -0
52 lines not on this page · raw message
Signature · 1 line
2.25.1
Re: [PATCH v7 023/102] KVM: TDX: x86: Add ioctl to get TDX systemwide parameters
Quoted 193 lines · On Mon, Jun 27, 2022 at 02:53:15PM -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
Implement a system-scoped ioctl to get system-wide parameters for TDX.
Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 1 + arch/x86/include/uapi/asm/kvm.h | 48 +++++++++++++++++++++++++++ arch/x86/kvm/vmx/main.c | 2 ++ arch/x86/kvm/vmx/tdx.c | 46 +++++++++++++++++++++++++ arch/x86/kvm/vmx/x86_ops.h | 2 ++ arch/x86/kvm/x86.c | 6 ++++ tools/arch/x86/include/uapi/asm/kvm.h | 48 +++++++++++++++++++++++++++ 8 files changed, 154 insertions(+)arch/x86/include/asm/kvm-x86-ops.h +1
-0@@ -117,6 +117,7 @@ KVM_X86_OP(smi_allowed) KVM_X86_OP(enter_smm) KVM_X86_OP(leave_smm) KVM_X86_OP(enable_smi_window) +KVM_X86_OP_OPTIONAL(dev_mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_register_region) KVM_X86_OP_OPTIONAL(mem_enc_unregister_region)arch/x86/include/asm/kvm_host.h +1
-0@@ -1591,6 +1591,7 @@ struct kvm_x86_ops {int (*leave_smm)(struct kvm_vcpu *vcpu,const char *smstate);void (*enable_smi_window)(struct kvm_vcpu *vcpu); +int (*dev_mem_enc_ioctl)(void __user *argp);int (*mem_enc_ioctl)(struct kvm *kvm,void __user *argp);int (*mem_enc_register_region)(struct kvm *kvm,struct kvm_enc_region *argp);int (*mem_enc_unregister_region)(struct kvm *kvm,struct kvm_enc_region *argp);arch/x86/include/uapi/asm/kvm.h +48
-0@@ -534,4 +534,52 @@ struct kvm_pmu_event_filter {#define KVM_X86_DEFAULT_VM 0#define KVM_X86_TDX_VM 1 +/* Trust Domain eXtension sub-ioctl() commands. */ +enum kvm_tdx_cmd_id { +KVM_TDX_CAPABILITIES =0 , + +KVM_TDX_CMD_NR_MAX , +}; + +struct kvm_tdx_cmd { +/* enum kvm_tdx_cmd_id */ +__u32 id; +/* flags for sub-commend. If sub-command doesn't use this, set zero. */ +__u32 flags; +/* +* data for each sub-command. An immediate or a pointer to the actual +* data in process virtual address. If sub-command doesn't use it, +* set zero. +*/ +__u64 data; +/* +* Auxiliary error code. The sub-command may return TDX SEAMCALL +* status code in addition to -Exxx. +* Defined for consistency with struct kvm_sev_cmd. +*/ +__u64 error; +/* Reserved: Defined for consistency with struct kvm_sev_cmd. */ +__u64 unused; +}; + +struct kvm_tdx_cpuid_config { +__u32 leaf; +__u32 sub_leaf; +__u32 eax; +__u32 ebx; +__u32 ecx; +__u32 edx; +}; + +struct kvm_tdx_capabilities { +__u64 attrs_fixed0; +__u64 attrs_fixed1; +__u64 xfam_fixed0; +__u64 xfam_fixed1; + +__u32 nr_cpuid_configs; +__u32 padding; +struct kvm_tdx_cpuid_config cpuid_configs[0 ]; +}; +#endif /* _ASM_X86_KVM_H */ arch/x86/kvm/vmx/main.c +2
-0@@ -212,6 +212,8 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .complete_emulated_msr = kvm_complete_insn_gp, .vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector, + + .dev_mem_enc_ioctl = tdx_dev_ioctl, };struct kvm_x86_init_ops vt_init_ops__initdata = {arch/x86/kvm/vmx/tdx.c +46
-0@@ -392,6 +392,52 @@ int tdx_vm_init(struct kvm *kvm)return ret; } +int tdx_dev_ioctl (void __user *argp) +{ +struct kvm_tdx_capabilities __user *user_caps; +struct kvm_tdx_capabilities caps; +struct kvm_tdx_cmd cmd; + +BUILD_BUG_ON (sizeof (struct kvm_tdx_cpuid_config ) != +sizeof (struct tdx_cpuid_config )); + +if (copy_from_user (&cmd, argp,sizeof (cmd))) +return -EFAULT ; +if (cmd.flags || cmd.error || cmd.unused) +return -EINVAL ; +/* +* Currently only KVM_TDX_CAPABILITIES is defined for system-scoped +* mem_enc_ioctl(). +*/ +if (cmd.id !=KVM_TDX_CAPABILITIES ) +return -EINVAL ; + + user_caps = (void __user *)cmd.data; +if (copy_from_user (&caps, user_caps,sizeof (caps))) +return -EFAULT ; + +if (caps.nr_cpuid_configs < tdx_caps.nr_cpuid_configs) +return -E2BIG ; + + caps = (struct kvm_tdx_capabilities ) { + .attrs_fixed0 = tdx_caps.attrs_fixed0, + .attrs_fixed1 = tdx_caps.attrs_fixed1, + .xfam_fixed0 = tdx_caps.xfam_fixed0, + .xfam_fixed1 = tdx_caps.xfam_fixed1, + .nr_cpuid_configs = tdx_caps.nr_cpuid_configs, + .padding =0 , + }; + +if (copy_to_user (user_caps, &caps,sizeof (caps))) +return -EFAULT ; +if (copy_to_user (user_caps->cpuid_configs, &tdx_caps.cpuid_configs, + tdx_caps.nr_cpuid_configs * +sizeof (struct tdx_cpuid_config ))) +return -EFAULT ; + +return 0 ; +} +int __init tdx_module_setup (void ) {const struct tdsysinfo_struct *tdsysinfo;arch/x86/kvm/vmx/x86_ops.h +2
-0@@ -132,6 +132,7 @@ void vmx_setup_mce(struct kvm_vcpu *vcpu);int __init tdx_hardware_setup (struct kvm_x86_ops *x86_ops);bool tdx_is_vm_type_supported (unsigned long type);void tdx_hardware_unsetup (void ); +int tdx_dev_ioctl (void __user *argp);int tdx_vm_init (struct kvm *kvm);void tdx_mmu_release_hkid (struct kvm *kvm);@@ -140,6 +141,7 @@ void tdx_vm_free(struct kvm *kvm);static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; }static inline void tdx_hardware_unsetup (void ) {} +static inline int tdx_dev_ioctl (void __user *argp) {return -EOPNOTSUPP ; };static inline int tdx_vm_init (struct kvm *kvm) {return -EOPNOTSUPP ; }static inline void tdx_mmu_release_hkid (struct kvm *kvm) {}arch/x86/kvm/x86.c +0
-0
arch/x86/kvm/x86.c long kvm_arch_dev_ioctl(struct file *filp, · line 4573
Quoted 9 lines
arch/x86/kvm/x86.c +6
-0@@ -4565,6 +4565,12 @@ long kvm_arch_dev_ioctl(struct file *filp,break ; r =kvm_x86_dev_has_attr (&attr);break ; +case KVM_MEMORY_ENCRYPT_OP : + r = -EINVAL ; +if (!kvm_x86_ops.dev_mem_enc_ioctl) + goto out; + r =static_call (kvm_x86_dev_mem_enc_ioctl)(argp); +break ;
Incorrect indention and please move it out of
case KVM_HAS_DEVICE_ATTR: {
}
Quoted 63 lines
arch/x86/kvm/x86.c +0
-0}default : r = -EINVAL ;tools/arch/x86/include/uapi/asm/kvm.h +48
-1@@ -528,4 +528,52 @@ struct kvm_pmu_event_filter {#define KVM_X86_DEFAULT_VM 0#define KVM_X86_TDX_VM 1 +/* Trust Domain eXtension sub-ioctl() commands. */ +enum kvm_tdx_cmd_id { +KVM_TDX_CAPABILITIES =0 , + +KVM_TDX_CMD_NR_MAX , +}; + +struct kvm_tdx_cmd { +/* enum kvm_tdx_cmd_id */ +__u32 id; +/* flags for sub-commend. If sub-command doesn't use this, set zero. */ +__u32 flags; +/* +* data for each sub-command. An immediate or a pointer to the actual +* data in process virtual address. If sub-command doesn't use it, +* set zero. +*/ +__u64 data; +/* +* Auxiliary error code. The sub-command may return TDX SEAMCALL +* status code in addition to -Exxx. +* Defined for consistency with struct kvm_sev_cmd. +*/ +__u64 error; +/* Reserved: Defined for consistency with struct kvm_sev_cmd. */ +__u64 unused; +}; + +struct kvm_tdx_cpuid_config { +__u32 leaf; +__u32 sub_leaf; +__u32 eax; +__u32 ebx; +__u32 ecx; +__u32 edx; +}; + +struct kvm_tdx_capabilities { +__u64 attrs_fixed0; +__u64 attrs_fixed1; +__u64 xfam_fixed0; +__u64 xfam_fixed1; + +__u32 nr_cpuid_configs; +__u32 padding; +struct kvm_tdx_cpuid_config cpuid_configs[0 ]; +}; +#endif /* _ASM_X86_KVM_H */ --2.25.1
PATCH v7 24/102 KVM: TDX: Add place holder for TDX VM specific mem_enc_op ioctl
In reply to [email protected]From: Isaku Yamahata <[email protected]>
Add a place holder function for TDX specific VM-scoped ioctl as mem_enc_op. TDX specific sub-commands will be added to retrieve/pass TDX specific parameters.
KVM_MEMORY_ENCRYPT_OP was introduced for VM-scoped operations specific for guest state-protected VM. It defined subcommands for technology-specific operations under KVM_MEMORY_ENCRYPT_OP. Despite its name, the subcommands are not limited to memory encryption, but various technology-specific operations are defined. It's natural to repurpose KVM_MEMORY_ENCRYPT_OP for TDX specific operations and define subcommands.
TDX requires VM-scoped, and VCPU-scoped TDX-specific operations for device model, for example, qemu. Getting system-wide parameters, TDX-specific VM initialization, and TDX-specific vCPU initialization. Which requires KVM vCPU-scoped operations in addition to the existing VM-scoped operations.
--- arch/x86/kvm/vmx/main.c | 9 +++++++++ arch/x86/kvm/vmx/tdx.c | 26 ++++++++++++++++++++++++++ arch/x86/kvm/vmx/x86_ops.h | 4 ++++ 3 files changed, 39 insertions(+)
arch/x86/kvm/vmx/main.c +9 -0
@@ -73,6 +73,14 @@ static void vt_vm_free(struct kvm *kvm)return tdx_vm_free (kvm); } +static int vt_mem_enc_ioctl (struct kvm *kvm,void __user *argp) +{ +if (!is_td (kvm)) +return -ENOTTY ; + +return tdx_vm_ioctl (kvm, argp); +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,
@@ -214,6 +222,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector, .dev_mem_enc_ioctl = tdx_dev_ioctl, + .mem_enc_ioctl = vt_mem_enc_ioctl, };struct kvm_x86_init_ops vt_init_ops__initdata = {
arch/x86/kvm/vmx/tdx.c +26 -0
@@ -438,6 +438,32 @@ int tdx_dev_ioctl(void __user *argp)return 0 ; } +int tdx_vm_ioctl (struct kvm *kvm,void __user *argp) +{ +struct kvm_tdx_cmd tdx_cmd; +int r; + +if (copy_from_user (&tdx_cmd, argp,sizeof (struct kvm_tdx_cmd ))) +return -EFAULT ; +if (tdx_cmd.error || tdx_cmd.unused) +return -EINVAL ; + +mutex_lock (&kvm->lock); + +switch (tdx_cmd.id) { +default : + r = -EINVAL ; + goto out; + } + +if (copy_to_user (argp, &tdx_cmd,sizeof (struct kvm_tdx_cmd ))) + r = -EFAULT ; + +out: +mutex_unlock (&kvm->lock); +return r; +} +int __init tdx_module_setup (void ) {const struct tdsysinfo_struct *tdsysinfo;
arch/x86/kvm/vmx/x86_ops.h +4 -0
@@ -137,6 +137,8 @@ int tdx_dev_ioctl(void __user *argp);int tdx_vm_init (struct kvm *kvm);void tdx_mmu_release_hkid (struct kvm *kvm);void tdx_vm_free (struct kvm *kvm); + +int tdx_vm_ioctl (struct kvm *kvm,void __user *argp);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; }
@@ -147,6 +149,8 @@ static inline int tdx_vm_init(struct kvm *kvm) { return -EOPNOTSUPP; }static inline void tdx_mmu_release_hkid (struct kvm *kvm) {}static inline void tdx_flush_shadow_all_private (struct kvm *kvm) {}static inline void tdx_vm_free (struct kvm *kvm) {} + +static inline int tdx_vm_ioctl (struct kvm *kvm,void __user *argp) {return -EOPNOTSUPP ; }#endif #endif /* __KVM_X86_VMX_X86_OPS_H */
Signature · 1 line
2.25.1
Re: [PATCH v7 024/102] KVM: TDX: Add place holder for TDX VM specific mem_enc_op ioctl
Quoted 13 lines · On Mon, Jun 27, 2022 at 02:53:16PM -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
Add a place holder function for TDX specific VM-scoped ioctl as
mem_enc_op. TDX specific sub-commands will be added to retrieve/pass TDX specific parameters.
KVM_MEMORY_ENCRYPT_OPwas introduced for VM-scoped operations specific for guest state-protected VM. It defined subcommands for technology-specific operations underKVM_MEMORY_ENCRYPT_OP. Despite its name, the subcommands are not limited to memory encryption, but various technology-specific operations are defined. It's natural to repurposeKVM_MEMORY_ENCRYPT_OPfor TDX specific operations and define subcommands.
Quoted 4 lines
TDX requires VM-scoped, and VCPU-scoped TDX-specific operations for device model, for example, qemu. Getting system-wide parameters, TDX-specific VM initialization, and TDX-specific vCPU initialization. Which requires KVM vCPU-scoped operations in addition to the existing VM-scoped operations.
Suggest to no need talking about vcpu scope operations here, because they're not available in this patch, we can talk about them in the patch which introduces them.
Quoted 97 lines
Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/vmx/main.c | 9 +++++++++ arch/x86/kvm/vmx/tdx.c | 26 ++++++++++++++++++++++++++ arch/x86/kvm/vmx/x86_ops.h | 4 ++++ 3 files changed, 39 insertions(+)arch/x86/kvm/vmx/main.c +9
-0@@ -73,6 +73,14 @@ static void vt_vm_free(struct kvm *kvm)return tdx_vm_free (kvm); } +static int vt_mem_enc_ioctl (struct kvm *kvm,void __user *argp) +{ +if (!is_td (kvm)) +return -ENOTTY ; + +return tdx_vm_ioctl (kvm, argp); +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,@@ -214,6 +222,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector, .dev_mem_enc_ioctl = tdx_dev_ioctl, + .mem_enc_ioctl = vt_mem_enc_ioctl, };struct kvm_x86_init_ops vt_init_ops__initdata = {arch/x86/kvm/vmx/tdx.c +26
-0@@ -438,6 +438,32 @@ int tdx_dev_ioctl(void __user *argp)return 0 ; } +int tdx_vm_ioctl (struct kvm *kvm,void __user *argp) +{ +struct kvm_tdx_cmd tdx_cmd; +int r; + +if (copy_from_user (&tdx_cmd, argp,sizeof (struct kvm_tdx_cmd ))) +return -EFAULT ; +if (tdx_cmd.error || tdx_cmd.unused) +return -EINVAL ; + +mutex_lock (&kvm->lock); + +switch (tdx_cmd.id) { +default : + r = -EINVAL ; + goto out; + } + +if (copy_to_user (argp, &tdx_cmd,sizeof (struct kvm_tdx_cmd ))) + r = -EFAULT ; + +out: +mutex_unlock (&kvm->lock); +return r; +} +int __init tdx_module_setup (void ) {const struct tdsysinfo_struct *tdsysinfo;arch/x86/kvm/vmx/x86_ops.h +4
-1@@ -137,6 +137,8 @@ int tdx_dev_ioctl(void __user *argp);int tdx_vm_init (struct kvm *kvm);void tdx_mmu_release_hkid (struct kvm *kvm);void tdx_vm_free (struct kvm *kvm); + +int tdx_vm_ioctl (struct kvm *kvm,void __user *argp);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; }@@ -147,6 +149,8 @@ static inline int tdx_vm_init(struct kvm *kvm) { return -EOPNOTSUPP; }static inline void tdx_mmu_release_hkid (struct kvm *kvm) {}static inline void tdx_flush_shadow_all_private (struct kvm *kvm) {}static inline void tdx_vm_free (struct kvm *kvm) {} + +static inline int tdx_vm_ioctl (struct kvm *kvm,void __user *argp) {return -EOPNOTSUPP ; }#endif #endif /* __KVM_X86_VMX_X86_OPS_H */ --2.25.1
PATCH v7 25/102 KVM: TDX: initialize VM with TDX specific parameters
In reply to [email protected]From: Xiaoyao Li <[email protected]>
TDX requires additional parameters for TDX VM for confidential execution to protect its confidentiality of its memory contents and its CPU state from any other software, including VMM. When creating guest TD VM before creating vcpu, the number of vcpu, TSC frequency (that is same among vcpus. and it can't be changed.) CPUIDs which is emulated by the TDX module. It means guest can trust those CPUIDs. and sha384 values for measurement.
Add new subcommand, KVM_TDX_INIT_VM, to pass parameters for TDX guest. It assigns encryption key to the TDX guest for memory encryption. TDX encrypts memory per-guest bases. It assigns device model passes per-VM parameters for the TDX guest. The maximum number of vcpus, tsc frequency (TDX guest has fised VM-wide TSC frequency. not per-vcpu. The TDX guest can not change it.), attributes (production or debug), available extended features (which is reflected into guest XCR0, IA32_XSS MSR), cpuids, sha384 measurements, and etc.
This subcommand is called before creating vcpu and KVM_SET_CPUID2, i.e. cpuids configurations aren't available yet. So CPUIDs configuration values needs to be passed in struct kvm_init_vm. It's device model responsibility to make this cpuid config for KVM_TDX_INIT_VM and KVM_SET_CPUID2.
--- arch/x86/include/asm/kvm_host.h | 2 + arch/x86/include/asm/tdx.h | 3 + arch/x86/include/uapi/asm/kvm.h | 33 +++++ arch/x86/kvm/vmx/tdx.c | 206 ++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 23 +++ tools/arch/x86/include/uapi/asm/kvm.h | 33 +++++ 6 files changed, 300 insertions(+)
arch/x86/include/asm/kvm_host.h +2 -0
@@ -1338,6 +1338,8 @@ struct kvm_arch {* the global KVM_MAX_VCPU_IDS may lead to significant memory waste. */ u32 max_vcpu_ids; + +gfn_t gfn_shared_mask; };struct kvm_vm_stat {
arch/x86/include/asm/tdx.h +3 -0
@@ -89,6 +89,9 @@ static inline long tdx_kvm_hypercall(unsigned int nr, unsigned long p1,#endif /* CONFIG_INTEL_TDX_GUEST && CONFIG_KVM_GUEST */ #ifdef CONFIG_INTEL_TDX_HOST + +/* -1 indicates CPUID leaf with no sub-leaves. */ +#define TDX_CPUID_NO_SUBLEAF ((u32)-1) struct tdx_cpuid_config { u32 leaf; u32 sub_leaf;
arch/x86/include/uapi/asm/kvm.h +33 -0
@@ -537,6 +537,7 @@ struct kvm_pmu_event_filter {/* Trust Domain eXtension sub-ioctl() commands. */ enum kvm_tdx_cmd_id {KVM_TDX_CAPABILITIES =0 , +KVM_TDX_INIT_VM ,KVM_TDX_CMD_NR_MAX , };
@@ -582,4 +583,36 @@ struct kvm_tdx_capabilities { struct kvm_tdx_cpuid_config cpuid_configs[0]; }; +struct kvm_tdx_init_vm { +__u64 attributes; +__u32 max_vcpus; +__u32 padding; +__u64 mrconfigid[6 ];/* sha384 digest */ +__u64 mrowner[6 ];/* sha384 digest */ +__u64 mrownerconfig[6 ];/* sha348 digest */ +union { +/* +* KVM_TDX_INIT_VM is called before vcpu creation, thus before +* KVM_SET_CPUID2. CPUID configurations needs to be passed. +* +* This configuration supersedes KVM_SET_CPUID{,2}. +* The user space VMM, e.g. qemu, should make them consistent +* with this values. +* sizeof(struct kvm_cpuid_entry2) * KVM_MAX_CPUID_ENTRIES(256) +* = 8KB. +*/ +struct { +struct kvm_cpuid2 cpuid; +/* 8KB with KVM_MAX_CPUID_ENTRIES. */ +struct kvm_cpuid_entry2 entries[]; + }; +/* +* For future extensibility. +* The size(struct kvm_tdx_init_vm) = 16KB. +* This should be enough given sizeof(TD_PARAMS) = 1024 +*/ +__u64 reserved[2028 ]; + }; +}; +#endif /* _ASM_X86_KVM_H */
arch/x86/kvm/vmx/tdx.c +206 -0
218 lines not on this page · raw message
arch/x86/kvm/vmx/tdx.h +23 -0
@@ -20,7 +20,12 @@ struct kvm_tdx {struct tdx_td_page tdr;struct tdx_td_page *tdcs; +u64 attributes; +u64 xfam;int hkid; + +u64 tsc_offset; +unsigned long tsc_khz; };struct vcpu_tdx {
@@ -50,6 +55,11 @@ static inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu) return container_of(vcpu, struct vcpu_tdx, vcpu); } +static inline bool is_td_initialized (struct kvm *kvm) +{ +return !!kvm->max_vcpus; +} + static __always_inline void tdvps_vmcs_check(u32 field, u8 bits) { BUILD_BUG_ON_MSG(__builtin_constant_p(field) && (field) & 0x1,
@@ -135,6 +145,19 @@ TDX_BUILD_TDVPS_ACCESSORS(64, VMCS, vmcs);TDX_BUILD_TDVPS_ACCESSORS (64 ,STATE_NON_ARCH , state_non_arch);TDX_BUILD_TDVPS_ACCESSORS (8 ,MANAGEMENT , management); +static __always_inline u64 td_tdcs_exec_read64(struct kvm_tdx *kvm_tdx, u32 field) +{ +struct tdx_module_output out; +u64 err; + + err =tdh_mng_rd (kvm_tdx->tdr.pa,TDCS_EXEC (field), &out); +if (unlikely (err)) { +pr_err ("TDH_MNG_RD[EXEC.0x%x] failed: 0x%llx\n" , field, err); +return 0 ; + } +return out.r8; +} +#else static inline int tdx_module_setup (void ) {return -ENODEV ; };
tools/arch/x86/include/uapi/asm/kvm.h +33 -0
@@ -531,6 +531,7 @@ struct kvm_pmu_event_filter {/* Trust Domain eXtension sub-ioctl() commands. */ enum kvm_tdx_cmd_id {KVM_TDX_CAPABILITIES =0 , +KVM_TDX_INIT_VM ,KVM_TDX_CMD_NR_MAX , };
@@ -576,4 +577,36 @@ struct kvm_tdx_capabilities { struct kvm_tdx_cpuid_config cpuid_configs[0]; }; +struct kvm_tdx_init_vm { +__u64 attributes; +__u32 max_vcpus; +__u32 tsc_khz; +__u64 mrconfigid[6 ];/* sha384 digest */ +__u64 mrowner[6 ];/* sha384 digest */ +__u64 mrownerconfig[6 ];/* sha348 digest */ +union { +/* +* KVM_TDX_INIT_VM is called before vcpu creation, thus before +* KVM_SET_CPUID2. CPUID configurations needs to be passed. +* +* This configuration supersedes KVM_SET_CPUID{,2}. +* The user space VMM, e.g. qemu, should make them consistent +* with this values. +* sizeof(struct kvm_cpuid_entry2) * KVM_MAX_CPUID_ENTRIES(256) +* = 8KB. +*/ +struct { +struct kvm_cpuid2 cpuid; +/* 8KB with KVM_MAX_CPUID_ENTRIES. */ +struct kvm_cpuid_entry2 entries[]; + }; +/* +* For future extensibility. +* The size(struct kvm_tdx_init_vm) = 16KB. +* This should be enough given sizeof(TD_PARAMS) = 1024 +*/ +__u64 reserved[2028 ]; + }; +}; +#endif /* _ASM_X86_KVM_H */
Signature · 1 line
2.25.1
Re: [PATCH v7 025/102] KVM: TDX: initialize VM with TDX specific parameters
Quoted 40 lines · On 6/28/2022 5:53 AM, [email protected] wrote:
From: Xiaoyao Li <[email protected]>
TDX requires additional parameters for TDX VM for confidential execution to protect its confidentiality of its memory contents and its CPU state from any other software, including VMM. When creating guest TD VM before creating vcpu, the number of vcpu, TSC frequency (that is same among vcpus. and it can't be changed.) CPUIDs which is emulated by the TDX module. It means guest can trust those CPUIDs. and sha384 values for measurement.
Add new subcommand,
KVM_TDX_INIT_VM, to pass parameters for TDX guest. It assigns encryption key to the TDX guest for memory encryption. TDX encrypts memory per-guest bases. It assigns device model passes per-VM parameters for the TDX guest. The maximum number of vcpus, tsc frequency (TDX guest has fised VM-wide TSC frequency. not per-vcpu. The TDX guest can not change it.), attributes (production or debug), available extended features (which is reflected into guest XCR0,IA32_XSSMSR), cpuids, sha384 measurements, and etc.This subcommand is called before creating vcpu and
KVM_SET_CPUID2, i.e. cpuids configurations aren't available yet. So CPUIDs configuration values needs to be passed in structkvm_init_vm. It's device model responsibility to make this cpuid config forKVM_TDX_INIT_VMandKVM_SET_CPUID2.Signed-off-by Xiaoyao Li <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/kvm_host.h | 2 + arch/x86/include/asm/tdx.h | 3 + arch/x86/include/uapi/asm/kvm.h | 33 +++++ arch/x86/kvm/vmx/tdx.c | 206 ++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 23 +++ tools/arch/x86/include/uapi/asm/kvm.h | 33 +++++ 6 files changed, 300 insertions(+)arch/x86/include/asm/kvm_host.h +0
-0
arch/x86/include/asm/kvm_host.h struct kvm_arch { · line 1342
Quoted 5 lines
arch/x86/include/asm/kvm_host.h +2
-0@@ -1338,6 +1338,8 @@ struct kvm_arch {* the global KVM_MAX_VCPU_IDS may lead to significant memory waste. */ u32 max_vcpu_ids; + +gfn_t gfn_shared_mask;
I think it's better to put in a seperate patch or the patch that consumes it.
Quoted 2 lines
arch/x86/include/asm/kvm_host.h +0
-0};
...
Quoted 9 lines
arch/x86/kvm/vmx/tdx.c +1
-0@@ -438,6 +438,209 @@ int tdx_dev_ioctl(void __user *argp)return 0 ; } +/*
arch/x86/kvm/vmx/tdx.c int tdx_dev_ioctl(void __user *argp) · line 451
Quoted 10 lines
arch/x86/kvm/vmx/tdx.c +10
-0+* cpuid entry lookup in TDX cpuid config way. +* The difference is how to specify index(subleaves). +* Specify index to TDX_CPUID_NO_SUBLEAF for CPUID leaf with no-subleaves. +*/ +static const struct kvm_cpuid_entry2 *tdx_find_cpuid_entry ( +const struct kvm_cpuid2 *cpuid,u32 function,u32 index) +{ +int i; + +
superfluous line
Quoted 4 lines
arch/x86/kvm/vmx/tdx.c +4
-0+/* In TDX CPU CONFIG, TDX_CPUID_NO_SUBLEAF means index = 0. */ +if (index ==TDX_CPUID_NO_SUBLEAF ) + index =0 ; +
arch/x86/kvm/vmx/tdx.c int tdx_dev_ioctl(void __user *argp) · line 465
Quoted 10 lines
arch/x86/kvm/vmx/tdx.c +10
-0+for (i =0 ; i < cpuid->nent; i++) { +const struct kvm_cpuid_entry2 *e = &cpuid->entries[i]; + +if (e->function == function && + (e->index == index || + !(e->flags &KVM_CPUID_FLAG_SIGNIFCANT_INDEX ))) +return e; + } +return NULL ; +}
no need for kvm_tdx->tsc_khz field. We have kvm->arch.default_tsc_khz. It seems kvm_tdx->tsc_khz is not used in the following patches.
...
Quoted 12 lines
arch/x86/kvm/vmx/tdx.c +12
-0+ + kvm_tdx->tsc_offset =td_tdcs_exec_read64 (kvm_tdx,TD_TDCS_EXEC_TSC_OFFSET ); + kvm_tdx->attributes = td_params->attributes; + kvm_tdx->xfam = td_params->xfam; + kvm_tdx->tsc_khz =TDX_TSC_25MHZ_TO_KHZ (td_params->tsc_frequency); + kvm->max_vcpus = td_params->max_vcpus; + +if (td_params->exec_controls &TDX_EXEC_CONTROL_MAX_GPAW ) + kvm->arch.gfn_shared_mask =gpa_to_gfn (BIT_ULL (51 )); +else + kvm->arch.gfn_shared_mask =gpa_to_gfn (BIT_ULL (47 )); +
....
Quoted 13 lines
tools/arch/x86/include/uapi/asm/kvm.h +1
-0@@ -531,6 +531,7 @@ struct kvm_pmu_event_filter {/* Trust Domain eXtension sub-ioctl() commands. */ enum kvm_tdx_cmd_id {KVM_TDX_CAPABILITIES =0 , +KVM_TDX_INIT_VM ,KVM_TDX_CMD_NR_MAX , };
tools/arch/x86/include/uapi/asm/kvm.h struct kvm_tdx_capabilities { · line 583
Quoted 7 lines
tools/arch/x86/include/uapi/asm/kvm.h +4
-0@@ -576,4 +577,36 @@ struct kvm_tdx_capabilities {struct kvm_tdx_cpuid_config cpuid_configs[0 ]; }; +struct kvm_tdx_init_vm { +__u64 attributes; +__u32 max_vcpus; +__u32 tsc_khz;
it needs to align with arch/x86/include/uapi/asm/kvm.h that @tsc_khz needs to be removed.
Re: [PATCH v7 025/102] KVM: TDX: initialize VM with TDX specific parameters
Quoted 122 lines · Xiaoyao Li
Quoted 40 lines · On 6/28/2022 5:53 AM, [email protected] wrote:
From: Xiaoyao Li <[email protected]>
TDX requires additional parameters for TDX VM for confidential execution to protect its confidentiality of its memory contents and its CPU state from any other software, including VMM. When creating guest TD VM before creating vcpu, the number of vcpu, TSC frequency (that is same among vcpus. and it can't be changed.) CPUIDs which is emulated by the TDX module. It means guest can trust those CPUIDs. and sha384 values for measurement.
Add new subcommand,
KVM_TDX_INIT_VM, to pass parameters for TDX guest. It assigns encryption key to the TDX guest for memory encryption. TDX encrypts memory per-guest bases. It assigns device model passes per-VM parameters for the TDX guest. The maximum number of vcpus, tsc frequency (TDX guest has fised VM-wide TSC frequency. not per-vcpu. The TDX guest can not change it.), attributes (production or debug), available extended features (which is reflected into guest XCR0,IA32_XSSMSR), cpuids, sha384 measurements, and etc.This subcommand is called before creating vcpu and
KVM_SET_CPUID2, i.e. cpuids configurations aren't available yet. So CPUIDs configuration values needs to be passed in structkvm_init_vm. It's device model responsibility to make this cpuid config forKVM_TDX_INIT_VMandKVM_SET_CPUID2.Signed-off-by Xiaoyao Li <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/kvm_host.h | 2 + arch/x86/include/asm/tdx.h | 3 + arch/x86/include/uapi/asm/kvm.h | 33 +++++ arch/x86/kvm/vmx/tdx.c | 206 ++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 23 +++ tools/arch/x86/include/uapi/asm/kvm.h | 33 +++++ 6 files changed, 300 insertions(+)arch/x86/include/asm/kvm_host.h +0
-0arch/x86/include/asm/kvm_host.h struct kvm_arch { · line 1342
Quoted 5 lines
arch/x86/include/asm/kvm_host.h +2
-0@@ -1338,6 +1338,8 @@ struct kvm_arch {* the global KVM_MAX_VCPU_IDS may lead to significant memory waste. */ u32 max_vcpu_ids; + +gfn_t gfn_shared_mask;I think it's better to put in a seperate patch or the patch that consumes it.
Quoted 1 line
arch/x86/include/asm/kvm_host.h +0
-0};...
Quoted 8 lines
arch/x86/kvm/vmx/tdx.c +1
-0@@ -438,6 +438,209 @@ int tdx_dev_ioctl(void __user *argp)return 0 ; } +/* arch/x86/kvm/vmx/tdx.c int tdx_dev_ioctl(void __user *argp) · line 450
Quoted 10 lines
arch/x86/kvm/vmx/tdx.c +10
-0+* cpuid entry lookup in TDX cpuid config way. +* The difference is how to specify index(subleaves). +* Specify index to TDX_CPUID_NO_SUBLEAF for CPUID leaf with no-subleaves. +*/ +static const struct kvm_cpuid_entry2 *tdx_find_cpuid_entry ( +const struct kvm_cpuid2 *cpuid,u32 function,u32 index) +{ +int i; + +superfluous line
Quoted 4 lines
arch/x86/kvm/vmx/tdx.c +4
-0+/* In TDX CPU CONFIG, TDX_CPUID_NO_SUBLEAF means index = 0. */ +if (index ==TDX_CPUID_NO_SUBLEAF ) + index =0 ; +arch/x86/kvm/vmx/tdx.c int tdx_dev_ioctl(void __user *argp) · line 464
Quoted 10 lines
arch/x86/kvm/vmx/tdx.c +10
-0+for (i =0 ; i < cpuid->nent; i++) { +const struct kvm_cpuid_entry2 *e = &cpuid->entries[i]; + +if (e->function == function && + (e->index == index || + !(e->flags &KVM_CPUID_FLAG_SIGNIFCANT_INDEX ))) +return e; + } +return NULL ; +}no need for
kvm_tdx->tsc_khzfield. We havekvm->arch.default_tsc_khz. It seemskvm_tdx->tsc_khzis not used in the following patches....
Quoted 12 lines
arch/x86/kvm/vmx/tdx.c +12
-0+ + kvm_tdx->tsc_offset =td_tdcs_exec_read64 (kvm_tdx,TD_TDCS_EXEC_TSC_OFFSET ); + kvm_tdx->attributes = td_params->attributes; + kvm_tdx->xfam = td_params->xfam; + kvm_tdx->tsc_khz =TDX_TSC_25MHZ_TO_KHZ (td_params->tsc_frequency); + kvm->max_vcpus = td_params->max_vcpus; + +if (td_params->exec_controls &TDX_EXEC_CONTROL_MAX_GPAW ) + kvm->arch.gfn_shared_mask =gpa_to_gfn (BIT_ULL (51 )); +else + kvm->arch.gfn_shared_mask =gpa_to_gfn (BIT_ULL (47 )); +....
Quoted 13 lines
tools/arch/x86/include/uapi/asm/kvm.h +1
-0@@ -531,6 +531,7 @@ struct kvm_pmu_event_filter {/* Trust Domain eXtension sub-ioctl() commands. */ enum kvm_tdx_cmd_id {KVM_TDX_CAPABILITIES =0 , +KVM_TDX_INIT_VM ,KVM_TDX_CMD_NR_MAX , };@@ -576,4 +577,36 @@ struct kvm_tdx_capabilities {struct kvm_tdx_cpuid_config cpuid_configs[0 ];
Quoted 8 lines
tools/arch/x86/include/uapi/asm/kvm.h struct kvm_tdx_capabilities { · line 582
Quoted 5 lines
tools/arch/x86/include/uapi/asm/kvm.h +4
-0}; +struct kvm_tdx_init_vm { +__u64 attributes; +__u32 max_vcpus; +__u32 tsc_khz;it needs to align with
arch/x86/include/uapi/asm/kvm.hthat @tsc_khz needs to be removed.
Thanks, I fixed this patch as follows.
arch/x86/include/asm/kvm_host.h +0 -2
@@ -1338,8 +1338,6 @@ struct kvm_arch {* the global KVM_MAX_VCPU_IDS may lead to significant memory waste. */ u32 max_vcpu_ids; - -gfn_t gfn_shared_mask; };struct kvm_vm_stat {
arch/x86/kvm/vmx/tdx.c +0 -2
@@ -441,7 +441,6 @@ static const struct kvm_cpuid_entry2 *tdx_find_cpuid_entry( {int i; -/* In TDX CPU CONFIG, TDX_CPUID_NO_SUBLEAF means index = 0. */ if (index ==TDX_CPUID_NO_SUBLEAF ) index =0 ;
@@ -619,7 +618,6 @@ static int tdx_td_init(struct kvm *kvm, struct kvm_tdx_cmd *cmd) kvm_tdx->tsc_offset =td_tdcs_exec_read64 (kvm_tdx,TD_TDCS_EXEC_TSC_OFFSET ); kvm_tdx->attributes = td_params->attributes; kvm_tdx->xfam = td_params->xfam; - kvm_tdx->tsc_khz =TDX_TSC_25MHZ_TO_KHZ (td_params->tsc_frequency); kvm->max_vcpus = td_params->max_vcpus;if (td_params->exec_controls &TDX_EXEC_CONTROL_MAX_GPAW )
arch/x86/kvm/vmx/tdx.h +0 -1
@@ -25,7 +25,6 @@ struct kvm_tdx {int hkid;u64 tsc_offset; -unsigned long tsc_khz; };struct vcpu_tdx {
tools/arch/x86/include/uapi/asm/kvm.h +1 -1
@@ -581,7 +581,7 @@ struct kvm_tdx_capabilities {struct kvm_tdx_init_vm {__u64 attributes;__u32 max_vcpus; -__u32 tsc_khz; +__u32 padding;__u64 mrconfigid[6 ];/* sha384 digest */ __u64 mrowner[6 ];/* sha384 digest */ __u64 mrownerconfig[6 ];/* sha348 digest */
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 26/102 KVM: TDX: Make pmu_intel.c ignore guest TD case
In reply to [email protected]From: Isaku Yamahata <[email protected]>
Because TDX KVM doesn't support PMU yet (it's future work of TDX KVM support as another patch series) and pmu_intel.c touches vmx specific structure in vcpu initialization, as workaround add dummy structure to struct vcpu_tdx and pmu_intel.c can ignore TDX case.
--- arch/x86/kvm/vmx/pmu_intel.c | 39 +++++++++++++++++++++++++++++++++++- arch/x86/kvm/vmx/pmu_intel.h | 28 ++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 7 +++++++ arch/x86/kvm/vmx/vmx.c | 2 +- arch/x86/kvm/vmx/vmx.h | 22 +------------------- 5 files changed, 75 insertions(+), 23 deletions(-) create mode 100644 arch/x86/kvm/vmx/pmu_intel.h
arch/x86/kvm/vmx/pmu_intel.c +38 -1
@@ -17,6 +17,7 @@#include "lapic.h" #include "nested.h" #include "pmu.h" +#include "tdx.h" #define MSR_PMC_FULL_WIDTH_BIT (MSR_IA32_PMC0 - MSR_IA32_PERFCTR0)
@@ -35,6 +36,26 @@ static struct kvm_event_hw_type_mapping intel_arch_events[] = {/* mapping between fixed pmc index and intel_arch_events array */ static int fixed_pmc_events[] = {1 ,0 ,7 }; +struct lbr_desc *vcpu_to_lbr_desc (struct kvm_vcpu *vcpu) +{ +#ifdef CONFIG_INTEL_TDX_HOST +if (is_td_vcpu (vcpu)) +return &to_tdx (vcpu)->lbr_desc; +#endif + +return &to_vmx (vcpu)->lbr_desc; +} + +struct x86_pmu_lbr *vcpu_to_lbr_records (struct kvm_vcpu *vcpu) +{ +#ifdef CONFIG_INTEL_TDX_HOST +if (is_td_vcpu (vcpu)) +return &to_tdx (vcpu)->lbr_desc.records; +#endif + +return &to_vmx (vcpu)->lbr_desc.records; +} +static void reprogram_fixed_counters (struct kvm_pmu *pmu,u64 data) {struct kvm_pmc *pmc;
@@ -171,10 +192,20 @@ static inline struct kvm_pmc *get_fw_gp_pmc(struct kvm_pmu *pmu, u32 msr)return get_gp_pmc (pmu, msr,MSR_IA32_PMC0 ); } +bool intel_pmu_lbr_is_compatible (struct kvm_vcpu *vcpu) +{ +if (is_td_vcpu (vcpu)) +return false; +return cpuid_model_is_consistent (vcpu); +} +bool intel_pmu_lbr_is_enabled (struct kvm_vcpu *vcpu) {struct x86_pmu_lbr *lbr =vcpu_to_lbr_records (vcpu); +if (is_td_vcpu (vcpu)) +return false; +return lbr->nr && (vcpu_get_perf_capabilities (vcpu) &PMU_CAP_LBR_FMT ); }
@@ -294,6 +325,9 @@ int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu) PERF_SAMPLE_BRANCH_USER, }; +if (WARN_ON (is_td_vcpu (vcpu))) +return 0 ; +if (unlikely (lbr_desc->event)) {__set_bit (INTEL_PMC_IDX_FIXED_VLBR , pmu->pmc_in_use);return 0 ;
@@ -602,7 +636,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)nested_vmx_pmu_refresh (vcpu,intel_is_valid_msr (vcpu,MSR_CORE_PERF_GLOBAL_CTRL , false)); -if (cpuid_model_is_consistent (vcpu)) +if (intel_pmu_lbr_is_compatible (vcpu))x86_perf_get_lbr (&lbr_desc->records);else lbr_desc->records.nr =0 ;
@@ -661,6 +695,9 @@ static void intel_pmu_reset(struct kvm_vcpu *vcpu)struct kvm_pmc *pmc =NULL ;int i; +if (is_td_vcpu (vcpu)) +return ; +for (i =0 ; i <INTEL_PMC_MAX_GENERIC ; i++) { pmc = &pmu->gp_counters[i];
arch/x86/kvm/vmx/pmu_intel.h new file +28 -0
@@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __KVM_X86_VMX_PMU_INTEL_H +#define __KVM_X86_VMX_PMU_INTEL_H + +struct lbr_desc *vcpu_to_lbr_desc (struct kvm_vcpu *vcpu); +struct x86_pmu_lbr *vcpu_to_lbr_records (struct kvm_vcpu *vcpu); + +bool intel_pmu_lbr_is_compatible (struct kvm_vcpu *vcpu); +bool intel_pmu_lbr_is_enabled (struct kvm_vcpu *vcpu); +int intel_pmu_create_guest_lbr_event (struct kvm_vcpu *vcpu); + +struct lbr_desc { +/* Basic info about guest LBR records. */ +struct x86_pmu_lbr records; + +/* +* Emulate LBR feature via passthrough LBR registers when the +* per-vcpu guest LBR event is scheduled on the current pcpu. +* +* The records may be inaccurate if the host reclaims the LBR. +*/ +struct perf_event *event; + +/* True if LBRs are marked as not intercepted in the MSR bitmap */ +bool msr_passthrough; +}; + +#endif /* __KVM_X86_VMX_PMU_INTEL_H */
arch/x86/kvm/vmx/tdx.h +7 -0
@@ -4,6 +4,7 @@#ifdef CONFIG_INTEL_TDX_HOST +#include "pmu_intel.h" #include "tdx_ops.h" int tdx_module_setup (void );
@@ -33,6 +34,12 @@ struct vcpu_tdx {struct tdx_td_page tdvpr;struct tdx_td_page *tdvpx; + +/* +* Dummy to make pmu_intel not corrupt memory. +* TODO: Support PMU for TDX. Future work. +*/ +struct lbr_desc lbr_desc; };static inline bool is_td (struct kvm *kvm)
arch/x86/kvm/vmx/vmx.c +1 -1
@@ -2246,7 +2246,7 @@ int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)if ((data &PMU_CAP_LBR_FMT ) != (vmx_get_perf_capabilities () &PMU_CAP_LBR_FMT ))return 1 ; -if (!cpuid_model_is_consistent (vcpu)) +if (!intel_pmu_lbr_is_compatible (vcpu))return 1 ; }if (data &PERF_CAP_PEBS_FORMAT ) {
arch/x86/kvm/vmx/vmx.h +1 -21
@@ -10,6 +10,7 @@#include "capabilities.h" #include "kvm_cache_regs.h" #include "posted_intr.h" +#include "pmu_intel.h" #include "vmcs.h" #include "vmx_ops.h" #include "cpuid.h"
@@ -91,31 +92,10 @@ union vmx_exit_reason {u32 full; }; -#define vcpu_to_lbr_desc (vcpu) (&to_vmx(vcpu)->lbr_desc) -#define vcpu_to_lbr_records (vcpu) (&to_vmx(vcpu)->lbr_desc.records) -void intel_pmu_cross_mapped_check (struct kvm_pmu *pmu); -bool intel_pmu_lbr_is_enabled (struct kvm_vcpu *vcpu); -int intel_pmu_create_guest_lbr_event (struct kvm_vcpu *vcpu);void vmx_passthrough_lbr_msrs (struct kvm_vcpu *vcpu); -struct lbr_desc { -/* Basic info about guest LBR records. */ -struct x86_pmu_lbr records; - -/* -* Emulate LBR feature via passthrough LBR registers when the -* per-vcpu guest LBR event is scheduled on the current pcpu. -* -* The records may be inaccurate if the host reclaims the LBR. -*/ -struct perf_event *event; - -/* True if LBRs are marked as not intercepted in the MSR bitmap */ -bool msr_passthrough; -}; -/* * The nested_vmx structure is part of vcpu_vmx, and holds information we need * for correct emulation of VMX (i.e., nested VMX) on this vcpu.
Signature · 1 line
2.25.1
PATCH v7 27/102 The start of TDX KVM patch series: TD vcpu creation/destruction
In reply to [email protected]From: Isaku Yamahata <[email protected]>
This empty commit is to mark the start of patch series of TD vcpu creation/destruction.
--- Documentation/virt/kvm/intel-tdx-layer-status.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
Documentation/virt/kvm/intel-tdx-layer-status.rst +3 -3
@@ -9,15 +9,15 @@ Layer status What qemu can do ---------------- - TDX VM TYPE is exposed to Qemu. -- Qemu can try to create VM of TDX VM type and then fails. +- Qemu can create/destroy guest of TDX vm type. Patch Layer status ------------------ Patch layer Status * TDX, VMX coexistence: Applied * TDX architectural definitions: Applied -* TD VM creation/destruction: Applying -* TD vcpu creation/destruction: Not yet +* TD VM creation/destruction: Applied +* TD vcpu creation/destruction: Applying * TDX EPT violation: Not yet * TD finalization: Not yet * TD vcpu enter/exit: Not yet
Signature · 1 line
2.25.1
PATCH v7 28/102 KVM: TDX: allocate/free TDX vcpu structure
In reply to [email protected]From: Isaku Yamahata <[email protected]>
The next step of TDX guest creation is to create vcpu. Allocate TDX vcpu structures, initialize it. Allocate pages of TDX vcpu for the TDX module.
In the case of the conventional case, cpuid is empty at the initialization. and cpuid is configured after the vcpu initialization. Because TDX supports only X2APIC mode, cpuid is forcibly initialized to support X2APIC on the vcpu initialization.
--- arch/x86/kvm/vmx/tdx.c | 135 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 135 insertions(+)
arch/x86/kvm/vmx/tdx.c +135 -0
@@ -6,6 +6,7 @@#include "capabilities.h" #include "x86_ops.h" #include "tdx.h" +#include "x86.h" #undef pr_fmt#define pr_fmt (fmt) "tdx: " fmt
@@ -61,6 +62,11 @@ static __always_inline hpa_t set_hkid_to_hpa(hpa_t pa, u16 hkid)return pa; } +static inline bool is_td_vcpu_created (struct vcpu_tdx *tdx) +{ +return tdx->tdvpr.added; +} +static inline bool is_td_created (struct kvm_tdx *kvm_tdx) {return kvm_tdx->tdr.added;
@@ -392,6 +398,135 @@ int tdx_vm_init(struct kvm *kvm)return ret; } +int tdx_vcpu_create (struct kvm_vcpu *vcpu) +{ +struct vcpu_tdx *tdx =to_tdx (vcpu); +int ret, i; + +/* TDX only supports x2APIC, which requires an in-kernel local APIC. */ +if (!vcpu->arch.apic) +return -EINVAL ; + +fpstate_set_confidential (&vcpu->arch.guest_fpu); + + ret =tdx_alloc_td_page (&tdx->tdvpr); +if (ret) +return ret; + + tdx->tdvpx =kcalloc (tdx_caps.tdvpx_nr_pages,sizeof (*tdx->tdvpx), +GFP_KERNEL_ACCOUNT ); +if (!tdx->tdvpx) { + ret = -ENOMEM ; + goto free_tdvpr; + } +for (i =0 ; i < tdx_caps.tdvpx_nr_pages; i++) { + ret =tdx_alloc_td_page (&tdx->tdvpx[i]); +if (ret) + goto free_tdvpx; + } + + vcpu->arch.efer =EFER_SCE |EFER_LME |EFER_LMA |EFER_NX ; + + vcpu->arch.cr0_guest_owned_bits =-1ul ; + vcpu->arch.cr4_guest_owned_bits =-1ul ; + + vcpu->arch.tsc_offset =to_kvm_tdx (vcpu->kvm)->tsc_offset; + vcpu->arch.l1_tsc_offset = vcpu->arch.tsc_offset; + vcpu->arch.guest_state_protected = + !(to_kvm_tdx (vcpu->kvm)->attributes &TDX_TD_ATTRIBUTE_DEBUG ); + +return 0 ; + +free_tdvpx: +/* @i points at the TDVPX page that failed allocation. */ +for (--i; i >=0 ; i--) +free_page (tdx->tdvpx[i].va); +kfree (tdx->tdvpx); +free_tdvpr: +free_page (tdx->tdvpr.va); + +return ret; +} + +void tdx_vcpu_free (struct kvm_vcpu *vcpu) +{ +struct vcpu_tdx *tdx =to_tdx (vcpu); +int i; + +/* Can't reclaim or free pages if teardown failed. */ +if (is_hkid_assigned (to_kvm_tdx (vcpu->kvm))) +return ; + +for (i =0 ; i < tdx_caps.tdvpx_nr_pages; i++) +tdx_reclaim_td_page (&tdx->tdvpx[i]); +kfree (tdx->tdvpx); +tdx_reclaim_td_page (&tdx->tdvpr); +} + +void tdx_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (vcpu->kvm); +struct vcpu_tdx *tdx =to_tdx (vcpu); +struct msr_data apic_base_msr; +u64 err; +int i; + +/* TDX doesn't support INIT event. */ +if (WARN_ON (init_event)) + goto td_bugged; +if (WARN_ON (is_td_vcpu_created (tdx))) + goto td_bugged; + + err =tdh_vp_create (kvm_tdx->tdr.pa, tdx->tdvpr.pa); +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_VP_CREATE , err,NULL ); + goto td_bugged; + } +tdx_mark_td_page_added (&tdx->tdvpr); + +for (i =0 ; i < tdx_caps.tdvpx_nr_pages; i++) { + err =tdh_vp_addcx (tdx->tdvpr.pa, tdx->tdvpx[i].pa); +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_VP_ADDCX , err,NULL ); + goto td_bugged; + } +tdx_mark_td_page_added (&tdx->tdvpx[i]); + } + +if (!vcpu->arch.cpuid_entries) { +/* +* On cpu creation, cpuid entry is blank. Forcibly enable +* X2APIC feature to allow X2APIC. +*/ +struct kvm_cpuid_entry2 *e; + + e =kvmalloc_array (1 ,sizeof (*e),GFP_KERNEL_ACCOUNT ); + *e = (struct kvm_cpuid_entry2 ) { + .function =1 ,/* Features for X2APIC */ + .index =0 , + .eax =0 , + .ebx =0 , + .ecx =1ULL <<21 ,/* X2APIC */ + .edx =0 , + }; + vcpu->arch.cpuid_entries = e; + vcpu->arch.cpuid_nent =1 ; + } + apic_base_msr.data =APIC_DEFAULT_PHYS_BASE |LAPIC_MODE_X2APIC ; +if (kvm_vcpu_is_reset_bsp (vcpu)) + apic_base_msr.data |=MSR_IA32_APICBASE_BSP ; + apic_base_msr.host_initiated = true; +if (WARN_ON (kvm_set_apic_base (vcpu, &apic_base_msr))) + goto td_bugged; + + vcpu->arch.mp_state =KVM_MP_STATE_RUNNABLE ; + +return ; + +td_bugged: + vcpu->kvm->vm_bugged = true; +} +int tdx_dev_ioctl (void __user *argp) {struct kvm_tdx_capabilities __user *user_caps;
Signature · 1 line
2.25.1
Sean Christopherson
maintainerRe: [PATCH v7 028/102] KVM: TDX: allocate/free TDX vcpu structure
Quoted 16 lines · On Mon, Jun 27, 2022, [email protected] wrote:
arch/x86/kvm/vmx/tdx.c +16
-0+int tdx_vcpu_create (struct kvm_vcpu *vcpu) +{ +struct vcpu_tdx *tdx =to_tdx (vcpu); +int ret, i; + +/* TDX only supports x2APIC, which requires an in-kernel local APIC. */ +if (!vcpu->arch.apic) +return -EINVAL ; + +fpstate_set_confidential (&vcpu->arch.guest_fpu); + + ret =tdx_alloc_td_page (&tdx->tdvpr); +if (ret) +return ret; + + tdx->tdvpx = kcalloc(tdx_caps.tdvpx_nr_pages, sizeof(*tdx->tdvpx),
arch/x86/kvm/vmx/tdx.c int tdx_vm_init(struct kvm *kvm) · line 426
Quoted 10 lines
arch/x86/kvm/vmx/tdx.c +10
-0+ GFP_KERNEL_ACCOUNT); +if (!tdx->tdvpx) { + ret = -ENOMEM ; + goto free_tdvpr; + } +for (i =0 ; i < tdx_caps.tdvpx_nr_pages; i++) { + ret =tdx_alloc_td_page (&tdx->tdvpx[i]); +if (ret) + goto free_tdvpx; + }
Similar to HKID allocation for intrahost migration, can the TDVPX allocations be moved to KVM_TDX_INIT_VCPU?
PATCH v7 29/102 KVM: TDX: allocate/free TDX vcpu structure
In reply to [email protected]From: Isaku Yamahata <[email protected]>
The next step of TDX guest creation is to create vcpu. Allocate TDX vcpu structures, initialize it. Allocate pages of TDX vcpu for the TDX module.
In the case of the conventional case, cpuid is empty at the initialization. and cpuid is configured after the vcpu initialization. Because TDX supports only X2APIC mode, cpuid is forcibly initialized to support X2APIC on the vcpu initialization.
--- arch/x86/kvm/vmx/main.c | 40 ++++++++++++++++++++++++++++++++++---- arch/x86/kvm/vmx/x86_ops.h | 8 ++++++++ 2 files changed, 44 insertions(+), 4 deletions(-)
arch/x86/kvm/vmx/main.c +36 -4
@@ -73,6 +73,38 @@ static void vt_vm_free(struct kvm *kvm)return tdx_vm_free (kvm); } +static int vt_vcpu_precreate (struct kvm *kvm) +{ +if (is_td (kvm)) +return 0 ; + +return vmx_vcpu_precreate (kvm); +} + +static int vt_vcpu_create (struct kvm_vcpu *vcpu) +{ +if (is_td_vcpu (vcpu)) +return tdx_vcpu_create (vcpu); + +return vmx_vcpu_create (vcpu); +} + +static void vt_vcpu_free (struct kvm_vcpu *vcpu) +{ +if (is_td_vcpu (vcpu)) +return tdx_vcpu_free (vcpu); + +return vmx_vcpu_free (vcpu); +} + +static void vt_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event) +{ +if (is_td_vcpu (vcpu)) +return tdx_vcpu_reset (vcpu, init_event); + +return vmx_vcpu_reset (vcpu, init_event); +} +static int vt_mem_enc_ioctl (struct kvm *kvm,void __user *argp) {if (!is_td (kvm))
@@ -98,10 +130,10 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .vm_destroy = vt_vm_destroy, .vm_free = vt_vm_free, - .vcpu_precreate = vmx_vcpu_precreate, - .vcpu_create = vmx_vcpu_create, - .vcpu_free = vmx_vcpu_free, - .vcpu_reset = vmx_vcpu_reset, + .vcpu_precreate = vt_vcpu_precreate, + .vcpu_create = vt_vcpu_create, + .vcpu_free = vt_vcpu_free, + .vcpu_reset = vt_vcpu_reset, .prepare_switch_to_guest = vmx_prepare_switch_to_guest, .vcpu_load = vmx_vcpu_load,
arch/x86/kvm/vmx/x86_ops.h +8 -0
@@ -138,6 +138,10 @@ int tdx_vm_init(struct kvm *kvm);void tdx_mmu_release_hkid (struct kvm *kvm);void tdx_vm_free (struct kvm *kvm); +int tdx_vcpu_create (struct kvm_vcpu *vcpu); +void tdx_vcpu_free (struct kvm_vcpu *vcpu); +void tdx_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event); +int tdx_vm_ioctl (struct kvm *kvm,void __user *argp);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }
@@ -150,6 +154,10 @@ static inline void tdx_mmu_release_hkid(struct kvm *kvm) {}static inline void tdx_flush_shadow_all_private (struct kvm *kvm) {}static inline void tdx_vm_free (struct kvm *kvm) {} +static inline int tdx_vcpu_create (struct kvm_vcpu *vcpu) {return -EOPNOTSUPP ; } +static inline void tdx_vcpu_free (struct kvm_vcpu *vcpu) {} +static inline void tdx_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event) {} +static inline int tdx_vm_ioctl (struct kvm *kvm,void __user *argp) {return -EOPNOTSUPP ; }#endif
Signature · 1 line
2.25.1
Re: [PATCH v7 029/102] KVM: TDX: allocate/free TDX vcpu structure
Quoted 9 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
The next step of TDX guest creation is to create vcpu. Allocate TDX vcpu structures, initialize it. Allocate pages of TDX vcpu for the TDX module.
In the case of the conventional case, cpuid is empty at the initialization. and cpuid is configured after the vcpu initialization. Because TDX supports only X2APIC mode, cpuid is forcibly initialized to support X2APIC on the vcpu initialization.
The patch title and commit message of this patch are identical to the previous patch.
What happened? Did you forget to squash two patches together?
Quoted 91 lines
Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/vmx/main.c | 40 ++++++++++++++++++++++++++++++++++---- arch/x86/kvm/vmx/x86_ops.h | 8 ++++++++ 2 files changed, 44 insertions(+), 4 deletions(-)arch/x86/kvm/vmx/main.c +36
-4@@ -73,6 +73,38 @@ static void vt_vm_free(struct kvm *kvm)return tdx_vm_free (kvm); } +static int vt_vcpu_precreate (struct kvm *kvm) +{ +if (is_td (kvm)) +return 0 ; + +return vmx_vcpu_precreate (kvm); +} + +static int vt_vcpu_create (struct kvm_vcpu *vcpu) +{ +if (is_td_vcpu (vcpu)) +return tdx_vcpu_create (vcpu); + +return vmx_vcpu_create (vcpu); +} + +static void vt_vcpu_free (struct kvm_vcpu *vcpu) +{ +if (is_td_vcpu (vcpu)) +return tdx_vcpu_free (vcpu); + +return vmx_vcpu_free (vcpu); +} + +static void vt_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event) +{ +if (is_td_vcpu (vcpu)) +return tdx_vcpu_reset (vcpu, init_event); + +return vmx_vcpu_reset (vcpu, init_event); +} +static int vt_mem_enc_ioctl (struct kvm *kvm,void __user *argp) {if (!is_td (kvm))@@ -98,10 +130,10 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .vm_destroy = vt_vm_destroy, .vm_free = vt_vm_free, - .vcpu_precreate = vmx_vcpu_precreate, - .vcpu_create = vmx_vcpu_create, - .vcpu_free = vmx_vcpu_free, - .vcpu_reset = vmx_vcpu_reset, + .vcpu_precreate = vt_vcpu_precreate, + .vcpu_create = vt_vcpu_create, + .vcpu_free = vt_vcpu_free, + .vcpu_reset = vt_vcpu_reset, .prepare_switch_to_guest = vmx_prepare_switch_to_guest, .vcpu_load = vmx_vcpu_load,arch/x86/kvm/vmx/x86_ops.h +8
-0@@ -138,6 +138,10 @@ int tdx_vm_init(struct kvm *kvm);void tdx_mmu_release_hkid (struct kvm *kvm);void tdx_vm_free (struct kvm *kvm); +int tdx_vcpu_create (struct kvm_vcpu *vcpu); +void tdx_vcpu_free (struct kvm_vcpu *vcpu); +void tdx_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event); +int tdx_vm_ioctl (struct kvm *kvm,void __user *argp);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }@@ -150,6 +154,10 @@ static inline void tdx_mmu_release_hkid(struct kvm *kvm) {}static inline void tdx_flush_shadow_all_private (struct kvm *kvm) {}static inline void tdx_vm_free (struct kvm *kvm) {} +static inline int tdx_vcpu_create (struct kvm_vcpu *vcpu) {return -EOPNOTSUPP ; } +static inline void tdx_vcpu_free (struct kvm_vcpu *vcpu) {} +static inline void tdx_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event) {} +static inline int tdx_vm_ioctl (struct kvm *kvm,void __user *argp) {return -EOPNOTSUPP ; }#endif
Re: [PATCH v7 029/102] KVM: TDX: allocate/free TDX vcpu structure
Quoted 11 lines · Kai Huang
Quoted 9 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
The next step of TDX guest creation is to create vcpu. Allocate TDX vcpu structures, initialize it. Allocate pages of TDX vcpu for the TDX module.
In the case of the conventional case, cpuid is empty at the initialization. and cpuid is configured after the vcpu initialization. Because TDX supports only X2APIC mode, cpuid is forcibly initialized to support X2APIC on the vcpu initialization.
Quoted 4 lines
The patch title and commit message of this patch are identical to the previous patch.
What happened? Did you forget to squash two patches together?
Forgot to squash this patch into the previous patch. Will fix it.
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 30/102 KVM: TDX: Do TDX specific vcpu initialization
In reply to [email protected]From: Sean Christopherson <[email protected]>
TD guest vcpu need to be configured before ready to run which requests addtional information from Device model (e.g. qemu), one 64bit value is passed to vcpu's RCX as an initial value. Repurpose KVM_MEMORY_ENCRYPT_OP to vcpu-scope and add new sub-commands KVM_TDX_INIT_VCPU under it for such additional vcpu configuration.
Add callback for kvm vCPU-scoped operations of KVM_MEMORY_ENCRYPT_OP and add a new subcommand, KVM_TDX_INIT_VCPU, for further vcpu initialization.
--- arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 1 + arch/x86/include/uapi/asm/kvm.h | 1 + arch/x86/kvm/vmx/main.c | 9 +++++++ arch/x86/kvm/vmx/tdx.c | 36 +++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 4 +++ arch/x86/kvm/vmx/x86_ops.h | 2 ++ arch/x86/kvm/x86.c | 6 +++++ tools/arch/x86/include/uapi/asm/kvm.h | 1 + 9 files changed, 61 insertions(+)
arch/x86/include/asm/kvm-x86-ops.h +1 -0
@@ -119,6 +119,7 @@ KVM_X86_OP(leave_smm) KVM_X86_OP(enable_smi_window) KVM_X86_OP_OPTIONAL(dev_mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_ioctl) +KVM_X86_OP_OPTIONAL(vcpu_mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_register_region) KVM_X86_OP_OPTIONAL(mem_enc_unregister_region) KVM_X86_OP_OPTIONAL(vm_copy_enc_context_from)
arch/x86/include/asm/kvm_host.h +1 -0
@@ -1595,6 +1595,7 @@ struct kvm_x86_ops {int (*dev_mem_enc_ioctl)(void __user *argp);int (*mem_enc_ioctl)(struct kvm *kvm,void __user *argp); +int (*vcpu_mem_enc_ioctl)(struct kvm_vcpu *vcpu,void __user *argp);int (*mem_enc_register_region)(struct kvm *kvm,struct kvm_enc_region *argp);int (*mem_enc_unregister_region)(struct kvm *kvm,struct kvm_enc_region *argp);int (*vm_copy_enc_context_from)(struct kvm *kvm,unsigned int source_fd);
arch/x86/include/uapi/asm/kvm.h +1 -0
@@ -538,6 +538,7 @@ struct kvm_pmu_event_filter {enum kvm_tdx_cmd_id {KVM_TDX_CAPABILITIES =0 ,KVM_TDX_INIT_VM , +KVM_TDX_INIT_VCPU ,KVM_TDX_CMD_NR_MAX , };
arch/x86/kvm/vmx/main.c +9 -0
@@ -113,6 +113,14 @@ static int vt_mem_enc_ioctl(struct kvm *kvm, void __user *argp)return tdx_vm_ioctl (kvm, argp); } +static int vt_vcpu_mem_enc_ioctl (struct kvm_vcpu *vcpu,void __user *argp) +{ +if (!is_td_vcpu (vcpu)) +return -EINVAL ; + +return tdx_vcpu_ioctl (vcpu, argp); +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,
@@ -255,6 +263,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .dev_mem_enc_ioctl = tdx_dev_ioctl, .mem_enc_ioctl = vt_mem_enc_ioctl, + .vcpu_mem_enc_ioctl = vt_vcpu_mem_enc_ioctl, };struct kvm_x86_init_ops vt_init_ops__initdata = {
arch/x86/kvm/vmx/tdx.c +36 -0
@@ -83,6 +83,11 @@ static inline bool is_hkid_assigned(struct kvm_tdx *kvm_tdx)return kvm_tdx->hkid >0 ; } +static inline bool is_td_finalized (struct kvm_tdx *kvm_tdx) +{ +return kvm_tdx->finalized; +} +static void tdx_clear_page (unsigned long page) {const void *zero_page = (const void *)__va (page_to_phys (ZERO_PAGE (0 )));
@@ -805,6 +810,37 @@ int tdx_vm_ioctl(struct kvm *kvm, void __user *argp)return r; } +int tdx_vcpu_ioctl (struct kvm_vcpu *vcpu,void __user *argp) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (vcpu->kvm); +struct vcpu_tdx *tdx =to_tdx (vcpu); +struct kvm_tdx_cmd cmd; +u64 err; + +if (tdx->initialized) +return -EINVAL ; + +if (!is_td_initialized (vcpu->kvm) ||is_td_finalized (kvm_tdx)) +return -EINVAL ; + +if (copy_from_user (&cmd, argp,sizeof (cmd))) +return -EFAULT ; + +if (cmd.error || cmd.unused) +return -EINVAL ; +if (cmd.flags || cmd.id !=KVM_TDX_INIT_VCPU ) +return -EINVAL ; + + err =tdh_vp_init (tdx->tdvpr.pa, cmd.data); +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_VP_INIT , err,NULL ); +return -EIO ; + } + + tdx->initialized = true; +return 0 ; +} +int __init tdx_module_setup (void ) {const struct tdsysinfo_struct *tdsysinfo;
arch/x86/kvm/vmx/tdx.h +4 -0
@@ -25,6 +25,8 @@ struct kvm_tdx {u64 xfam;int hkid; +bool finalized; +u64 tsc_offset;unsigned long tsc_khz; };
@@ -35,6 +37,8 @@ struct vcpu_tdx {struct tdx_td_page tdvpr;struct tdx_td_page *tdvpx; +bool initialized; +/* * Dummy to make pmu_intel not corrupt memory. * TODO: Support PMU for TDX. Future work.
arch/x86/kvm/vmx/x86_ops.h +2 -0
@@ -143,6 +143,7 @@ void tdx_vcpu_free(struct kvm_vcpu *vcpu);void tdx_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event);int tdx_vm_ioctl (struct kvm *kvm,void __user *argp); +int tdx_vcpu_ioctl (struct kvm_vcpu *vcpu,void __user *argp);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; }
@@ -159,6 +160,7 @@ static inline void tdx_vcpu_free(struct kvm_vcpu *vcpu) {}static inline void tdx_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event) {}static inline int tdx_vm_ioctl (struct kvm *kvm,void __user *argp) {return -EOPNOTSUPP ; } +static inline int tdx_vcpu_ioctl (struct kvm_vcpu *vcpu,void __user *argp) {return -EOPNOTSUPP ; }#endif #endif /* __KVM_X86_VMX_X86_OPS_H */
arch/x86/kvm/x86.c +6 -0
@@ -5778,6 +5778,12 @@ long kvm_arch_vcpu_ioctl(struct file *filp,case KVM_SET_DEVICE_ATTR : r =kvm_vcpu_ioctl_device_attr (vcpu, ioctl, argp);break ; +case KVM_MEMORY_ENCRYPT_OP : + r = -ENOTTY ; +if (!kvm_x86_ops.vcpu_mem_enc_ioctl) + goto out; + r = kvm_x86_ops.vcpu_mem_enc_ioctl (vcpu, argp); +break ;default : r = -EINVAL ; }
tools/arch/x86/include/uapi/asm/kvm.h +1 -0
@@ -532,6 +532,7 @@ struct kvm_pmu_event_filter {enum kvm_tdx_cmd_id {KVM_TDX_CAPABILITIES =0 ,KVM_TDX_INIT_VM , +KVM_TDX_INIT_VCPU ,KVM_TDX_CMD_NR_MAX , };
Signature · 1 line
2.25.1
Re: [PATCH v7 030/102] KVM: TDX: Do TDX specific vcpu initialization
Quoted 106 lines · On Mon, Jun 27, 2022 at 02:53:22PM -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
TD guest vcpu need to be configured before ready to run which requests addtional information from Device model (e.g. qemu), one 64bit value is passed to vcpu's RCX as an initial value. Repurpose
KVM_MEMORY_ENCRYPT_OPto vcpu-scope and add new sub-commandsKVM_TDX_INIT_VCPUunder it for such additional vcpu configuration.Add callback for kvm vCPU-scoped operations of
KVM_MEMORY_ENCRYPT_OPand add a new subcommand,KVM_TDX_INIT_VCPU, for further vcpu initialization.Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 1 + arch/x86/include/uapi/asm/kvm.h | 1 + arch/x86/kvm/vmx/main.c | 9 +++++++ arch/x86/kvm/vmx/tdx.c | 36 +++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 4 +++ arch/x86/kvm/vmx/x86_ops.h | 2 ++ arch/x86/kvm/x86.c | 6 +++++ tools/arch/x86/include/uapi/asm/kvm.h | 1 + 9 files changed, 61 insertions(+)arch/x86/include/asm/kvm-x86-ops.h +1
-0@@ -119,6 +119,7 @@ KVM_X86_OP(leave_smm) KVM_X86_OP(enable_smi_window) KVM_X86_OP_OPTIONAL(dev_mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_ioctl) +KVM_X86_OP_OPTIONAL(vcpu_mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_register_region) KVM_X86_OP_OPTIONAL(mem_enc_unregister_region) KVM_X86_OP_OPTIONAL(vm_copy_enc_context_from)arch/x86/include/asm/kvm_host.h +1
-0@@ -1595,6 +1595,7 @@ struct kvm_x86_ops {int (*dev_mem_enc_ioctl)(void __user *argp);int (*mem_enc_ioctl)(struct kvm *kvm,void __user *argp); +int (*vcpu_mem_enc_ioctl)(struct kvm_vcpu *vcpu,void __user *argp);int (*mem_enc_register_region)(struct kvm *kvm,struct kvm_enc_region *argp);int (*mem_enc_unregister_region)(struct kvm *kvm,struct kvm_enc_region *argp);int (*vm_copy_enc_context_from)(struct kvm *kvm,unsigned int source_fd);arch/x86/include/uapi/asm/kvm.h +1
-0@@ -538,6 +538,7 @@ struct kvm_pmu_event_filter {enum kvm_tdx_cmd_id {KVM_TDX_CAPABILITIES =0 ,KVM_TDX_INIT_VM , +KVM_TDX_INIT_VCPU ,KVM_TDX_CMD_NR_MAX , };arch/x86/kvm/vmx/main.c +9
-0@@ -113,6 +113,14 @@ static int vt_mem_enc_ioctl(struct kvm *kvm, void __user *argp)return tdx_vm_ioctl (kvm, argp); } +static int vt_vcpu_mem_enc_ioctl (struct kvm_vcpu *vcpu,void __user *argp) +{ +if (!is_td_vcpu (vcpu)) +return -EINVAL ; + +return tdx_vcpu_ioctl (vcpu, argp); +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,@@ -255,6 +263,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .dev_mem_enc_ioctl = tdx_dev_ioctl, .mem_enc_ioctl = vt_mem_enc_ioctl, + .vcpu_mem_enc_ioctl = vt_vcpu_mem_enc_ioctl, };struct kvm_x86_init_ops vt_init_ops__initdata = {arch/x86/kvm/vmx/tdx.c +5
-0@@ -83,6 +83,11 @@ static inline bool is_hkid_assigned(struct kvm_tdx *kvm_tdx)return kvm_tdx->hkid >0 ; } +static inline bool is_td_finalized (struct kvm_tdx *kvm_tdx) +{ +return kvm_tdx->finalized; +} +static void tdx_clear_page (unsigned long page) {const void *zero_page = (const void *)__va (page_to_phys (ZERO_PAGE (0 )));@@ -805,6 +810,37 @@ int tdx_vm_ioctl(struct kvm *kvm, void __user *argp)return r;
arch/x86/kvm/vmx/tdx.c int tdx_vm_ioctl(struct kvm *kvm, void __user *argp) · line 820
Quoted 10 lines
arch/x86/kvm/vmx/tdx.c +8
-0} +int tdx_vcpu_ioctl (struct kvm_vcpu *vcpu,void __user *argp) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (vcpu->kvm); +struct vcpu_tdx *tdx =to_tdx (vcpu); +struct kvm_tdx_cmd cmd; +u64 err; + +if (tdx->initialized)
Minor: How about "tdx_vcpu->initialized" ? there's "is_td_initialized()" below, the "tdx" here may lead guys to treat it as whole td vm until they confirmed it's type again.
Quoted 100 lines
arch/x86/kvm/vmx/tdx.c +23
-0+return -EINVAL ; + +if (!is_td_initialized (vcpu->kvm) ||is_td_finalized (kvm_tdx)) +return -EINVAL ; + +if (copy_from_user (&cmd, argp,sizeof (cmd))) +return -EFAULT ; + +if (cmd.error || cmd.unused) +return -EINVAL ; +if (cmd.flags || cmd.id !=KVM_TDX_INIT_VCPU ) +return -EINVAL ; + + err =tdh_vp_init (tdx->tdvpr.pa, cmd.data); +if (WARN_ON_ONCE (err)) { +pr_tdx_error (TDH_VP_INIT , err,NULL ); +return -EIO ; + } + + tdx->initialized = true; +return 0 ; +} +int __init tdx_module_setup (void ) {const struct tdsysinfo_struct *tdsysinfo;arch/x86/kvm/vmx/tdx.h +4
-0@@ -25,6 +25,8 @@ struct kvm_tdx {u64 xfam;int hkid; +bool finalized; +u64 tsc_offset;unsigned long tsc_khz; };@@ -35,6 +37,8 @@ struct vcpu_tdx {struct tdx_td_page tdvpr;struct tdx_td_page *tdvpx; +bool initialized; +/* * Dummy to make pmu_intel not corrupt memory. * TODO: Support PMU for TDX. Future work. arch/x86/kvm/vmx/x86_ops.h +2
-0@@ -143,6 +143,7 @@ void tdx_vcpu_free(struct kvm_vcpu *vcpu);void tdx_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event);int tdx_vm_ioctl (struct kvm *kvm,void __user *argp); +int tdx_vcpu_ioctl (struct kvm_vcpu *vcpu,void __user *argp);#else static inline int tdx_hardware_setup (struct kvm_x86_ops *x86_ops) {return 0 ; }static inline bool tdx_is_vm_type_supported (unsigned long type) {return false; }@@ -159,6 +160,7 @@ static inline void tdx_vcpu_free(struct kvm_vcpu *vcpu) {}static inline void tdx_vcpu_reset (struct kvm_vcpu *vcpu,bool init_event) {}static inline int tdx_vm_ioctl (struct kvm *kvm,void __user *argp) {return -EOPNOTSUPP ; } +static inline int tdx_vcpu_ioctl (struct kvm_vcpu *vcpu,void __user *argp) {return -EOPNOTSUPP ; }#endif #endif /* __KVM_X86_VMX_X86_OPS_H */ arch/x86/kvm/x86.c +6
-0@@ -5778,6 +5778,12 @@ long kvm_arch_vcpu_ioctl(struct file *filp,case KVM_SET_DEVICE_ATTR : r =kvm_vcpu_ioctl_device_attr (vcpu, ioctl, argp);break ; +case KVM_MEMORY_ENCRYPT_OP : + r = -ENOTTY ; +if (!kvm_x86_ops.vcpu_mem_enc_ioctl) + goto out; + r = kvm_x86_ops.vcpu_mem_enc_ioctl (vcpu, argp); +break ;default : r = -EINVAL ; }tools/arch/x86/include/uapi/asm/kvm.h +1
-1@@ -532,6 +532,7 @@ struct kvm_pmu_event_filter {enum kvm_tdx_cmd_id {KVM_TDX_CAPABILITIES =0 ,KVM_TDX_INIT_VM , +KVM_TDX_INIT_VCPU ,KVM_TDX_CMD_NR_MAX , }; --2.25.1
Re: [PATCH v7 030/102] KVM: TDX: Do TDX specific vcpu initialization
Quoted 109 lines · Yuan Yao
Quoted 108 lines · On Mon, Jun 27, 2022 at 02:53:22PM -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
TD guest vcpu need to be configured before ready to run which requests addtional information from Device model (e.g. qemu), one 64bit value is passed to vcpu's RCX as an initial value. Repurpose
KVM_MEMORY_ENCRYPT_OPto vcpu-scope and add new sub-commandsKVM_TDX_INIT_VCPUunder it for such additional vcpu configuration.Add callback for kvm vCPU-scoped operations of
KVM_MEMORY_ENCRYPT_OPand add a new subcommand,KVM_TDX_INIT_VCPU, for further vcpu initialization.Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/kvm-x86-ops.h | 1 + arch/x86/include/asm/kvm_host.h | 1 + arch/x86/include/uapi/asm/kvm.h | 1 + arch/x86/kvm/vmx/main.c | 9 +++++++ arch/x86/kvm/vmx/tdx.c | 36 +++++++++++++++++++++++++++ arch/x86/kvm/vmx/tdx.h | 4 +++ arch/x86/kvm/vmx/x86_ops.h | 2 ++ arch/x86/kvm/x86.c | 6 +++++ tools/arch/x86/include/uapi/asm/kvm.h | 1 + 9 files changed, 61 insertions(+)arch/x86/include/asm/kvm-x86-ops.h +1
-0@@ -119,6 +119,7 @@ KVM_X86_OP(leave_smm) KVM_X86_OP(enable_smi_window) KVM_X86_OP_OPTIONAL(dev_mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_ioctl) +KVM_X86_OP_OPTIONAL(vcpu_mem_enc_ioctl) KVM_X86_OP_OPTIONAL(mem_enc_register_region) KVM_X86_OP_OPTIONAL(mem_enc_unregister_region) KVM_X86_OP_OPTIONAL(vm_copy_enc_context_from)arch/x86/include/asm/kvm_host.h +1
-0@@ -1595,6 +1595,7 @@ struct kvm_x86_ops {int (*dev_mem_enc_ioctl)(void __user *argp);int (*mem_enc_ioctl)(struct kvm *kvm,void __user *argp); +int (*vcpu_mem_enc_ioctl)(struct kvm_vcpu *vcpu,void __user *argp);int (*mem_enc_register_region)(struct kvm *kvm,struct kvm_enc_region *argp);int (*mem_enc_unregister_region)(struct kvm *kvm,struct kvm_enc_region *argp);int (*vm_copy_enc_context_from)(struct kvm *kvm,unsigned int source_fd);arch/x86/include/uapi/asm/kvm.h +1
-0@@ -538,6 +538,7 @@ struct kvm_pmu_event_filter {enum kvm_tdx_cmd_id {KVM_TDX_CAPABILITIES =0 ,KVM_TDX_INIT_VM , +KVM_TDX_INIT_VCPU ,KVM_TDX_CMD_NR_MAX , };arch/x86/kvm/vmx/main.c +9
-0@@ -113,6 +113,14 @@ static int vt_mem_enc_ioctl(struct kvm *kvm, void __user *argp)return tdx_vm_ioctl (kvm, argp); } +static int vt_vcpu_mem_enc_ioctl (struct kvm_vcpu *vcpu,void __user *argp) +{ +if (!is_td_vcpu (vcpu)) +return -EINVAL ; + +return tdx_vcpu_ioctl (vcpu, argp); +} +struct kvm_x86_ops vt_x86_ops__initdata = { .name ="kvm_intel" ,@@ -255,6 +263,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .dev_mem_enc_ioctl = tdx_dev_ioctl, .mem_enc_ioctl = vt_mem_enc_ioctl, + .vcpu_mem_enc_ioctl = vt_vcpu_mem_enc_ioctl, };struct kvm_x86_init_ops vt_init_ops__initdata = {arch/x86/kvm/vmx/tdx.c +5
-0@@ -83,6 +83,11 @@ static inline bool is_hkid_assigned(struct kvm_tdx *kvm_tdx)return kvm_tdx->hkid >0 ; } +static inline bool is_td_finalized (struct kvm_tdx *kvm_tdx) +{ +return kvm_tdx->finalized; +} +static void tdx_clear_page (unsigned long page) {const void *zero_page = (const void *)__va (page_to_phys (ZERO_PAGE (0 )));@@ -805,6 +810,37 @@ int tdx_vm_ioctl(struct kvm *kvm, void __user *argp)return r; }
Quoted 12 lines
arch/x86/kvm/vmx/tdx.c int tdx_vm_ioctl(struct kvm *kvm, void __user *argp) · line 820
Quoted 8 lines
arch/x86/kvm/vmx/tdx.c +8
-0+int tdx_vcpu_ioctl (struct kvm_vcpu *vcpu,void __user *argp) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (vcpu->kvm); +struct vcpu_tdx *tdx =to_tdx (vcpu); +struct kvm_tdx_cmd cmd; +u64 err; + +if (tdx->initialized)Minor: How about "
tdx_vcpu->initialized" ? there's "is_td_initialized()" below, the "tdx" here may lead guys to treat it as whole td vm until they confirmed it's type again.
I think you man tdx->vcpu_initialized. If so, makes sense. I'll rename it.
Signature · 1 line
Isaku Yamahata <[email protected]>
Re: [PATCH v7 030/102] KVM: TDX: Do TDX specific vcpu initialization
Quoted 3 lines · Isaku Yamahata
On Fri, Jul 08, 2022 at 10:14:43AM +0800,
Yuan Yao <[email protected]> wrote:
...
Quoted 13 lines
Quoted 4 lines
Quoted 4 lines
arch/x86/kvm/vmx/tdx.c +4
-0+int tdx_vcpu_ioctl (struct kvm_vcpu *vcpu,void __user *argp) +{ +struct kvm_tdx *kvm_tdx =to_kvm_tdx (vcpu->kvm); +struct vcpu_tdx *tdx =to_tdx (vcpu);Quoted 8 lines
arch/x86/kvm/vmx/tdx.c int tdx_vm_ioctl(struct kvm *kvm, void __user *argp) · line 820
Quoted 4 lines
arch/x86/kvm/vmx/tdx.c +4
-0+struct kvm_tdx_cmd cmd; +u64 err; + +if (tdx->initialized)Minor: How about "
tdx_vcpu->initialized" ? there's "is_td_initialized()" below, the "tdx" here may lead guys to treat it as whole td vm until they confirmed it's type again.
Quoted 1 line
I think you man
tdx->vcpu_initialized. If so, makes sense. I'll rename it.
IMO, no need to do so.
All around tdx.c, "tdx" is the brief pointer name, just like "vmx" used in vmx.c. People will get used to it.
PATCH v7 31/102 The start of TDX KVM patch series: KVM MMU GPA shared bits
In reply to [email protected]From: Isaku Yamahata <[email protected]>
This empty commit is to mark the start of patch series of KVM MMU GPA shared bits.
--- Documentation/virt/kvm/intel-tdx-layer-status.rst | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
Documentation/virt/kvm/intel-tdx-layer-status.rst +3 -2
@@ -10,6 +10,7 @@ What qemu can do ---------------- - TDX VM TYPE is exposed to Qemu. - Qemu can create/destroy guest of TDX vm type. +- Qemu can create/destroy vcpu of TDX vm type. Patch Layer status ------------------
@@ -17,13 +18,13 @@ Patch Layer status * TDX, VMX coexistence: Applied * TDX architectural definitions: Applied * TD VM creation/destruction: Applied -* TD vcpu creation/destruction: Applying +* TD vcpu creation/destruction: Applied * TDX EPT violation: Not yet * TD finalization: Not yet * TD vcpu enter/exit: Not yet * TD vcpu interrupts/exit/hypercall: Not yet -* KVM MMU GPA shared bits: Not yet +* KVM MMU GPA shared bits: Applying * KVM TDP refactoring for TDX: Not yet * KVM TDP MMU hooks: Not yet * KVM TDP MMU MapGPA: Not yet
Signature · 1 line
2.25.1
PATCH v7 32/102 KVM: x86/mmu: introduce config for PRIVATE KVM MMU
In reply to [email protected]From: Isaku Yamahata <[email protected]>
To Keep the case of non TDX intact, introduce a new config option for private KVM MMU support. At the moment, this is synonym for CONFIG_INTEL_TDX_HOST && CONFIG_KVM_INTEL. The new flag make it clear that the config is only for x86 KVM MMU.
--- arch/x86/kvm/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)
arch/x86/kvm/Kconfig +4 -0
@@ -129,4 +129,8 @@ config KVM_XEN config KVM_EXTERNAL_WRITE_TRACKING bool +config KVM_MMU_PRIVATE + def_bool y + depends on INTEL_TDX_HOST && KVM_INTEL + endif # VIRTUALIZATION
Signature · 1 line
2.25.1
Re: [PATCH v7 032/102] KVM: x86/mmu: introduce config for PRIVATE KVM MMU
Quoted 6 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
To Keep the case of non TDX intact, introduce a new config option for private KVM MMU support. At the moment, this is synonym for
CONFIG_INTEL_TDX_HOST&&CONFIG_KVM_INTEL. The new flag make it clear that the config is only for x86 KVM MMU.
What is the "new flag"?
Quoted 19 lines
Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)arch/x86/kvm/Kconfig +4
-0@@ -129,4 +129,8 @@ config KVM_XEN config KVM_EXTERNAL_WRITE_TRACKING bool +config KVM_MMU_PRIVATE + def_bool y + depends on INTEL_TDX_HOST && KVM_INTEL + endif # VIRTUALIZATION
Re: [PATCH v7 032/102] KVM: x86/mmu: introduce config for PRIVATE KVM MMU
Quoted 9 lines · Kai Huang
Quoted 6 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Isaku Yamahata <[email protected]>
To Keep the case of non TDX intact, introduce a new config option for private KVM MMU support. At the moment, this is synonym for
CONFIG_INTEL_TDX_HOST&&CONFIG_KVM_INTEL. The new flag make it clear that the config is only for x86 KVM MMU.What is the "new flag"?
Oops. flags should be "config". Will fix it. Thanks for pointing it out.
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 33/102 KVM: x86/mmu: Add address conversion functions for TDX shared bits
In reply to [email protected]From: Rick Edgecombe <[email protected]>
TDX repurposes one GPA bits (51 bit or 47 bit based on configuration) to indicate the GPA is private(if cleared) or shared (if set) with VMM. If GPA.shared is set, GPA is converted existing conventional EPT pointed by EPTP. If GPA.shared bit is cleared, GPA is converted by Secure-EPT(S-EPT) TDX module manages. VMM has to issue SEAM call to TDX module to operate on S-EPT. e.g. populating/zapping guest page or shadow page by TDH.PAGE.{ADD, REMOVE} for guest page, TDH.PAGE.SEPT.{ADD, REMOVE} S-EPT etc.
Several hooks needs to be added to KVM MMU to support TDX. Add a function to check if KVM MMU is running for TDX and several functions for address conversation between private-GPA and shared-GPA.
--- arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/kvm/mmu.h | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+)
arch/x86/include/asm/kvm_host.h +2 -0
@@ -1339,7 +1339,9 @@ struct kvm_arch {*/ u32 max_vcpu_ids; +#ifdef CONFIG_KVM_MMU_PRIVATE gfn_t gfn_shared_mask; +#endif };struct kvm_vm_stat {
arch/x86/kvm/mmu.h +32 -0
@@ -286,4 +286,36 @@ static inline gpa_t kvm_translate_gpa(struct kvm_vcpu *vcpu,return gpa;return translate_nested_gpa (vcpu, gpa, access, exception); } + +static inline gfn_t kvm_gfn_shared_mask (const struct kvm *kvm) +{ +#ifdef CONFIG_KVM_MMU_PRIVATE +return kvm->arch.gfn_shared_mask; +#else +return 0 ; +#endif +} + +static inline gfn_t kvm_gfn_shared (const struct kvm *kvm,gfn_t gfn) +{ +return gfn |kvm_gfn_shared_mask (kvm); +} + +static inline gfn_t kvm_gfn_private (const struct kvm *kvm,gfn_t gfn) +{ +return gfn & ~kvm_gfn_shared_mask (kvm); +} + +static inline gpa_t kvm_gpa_private (const struct kvm *kvm,gpa_t gpa) +{ +return gpa & ~gfn_to_gpa (kvm_gfn_shared_mask (kvm)); +} + +static inline bool kvm_is_private_gpa (const struct kvm *kvm,gpa_t gpa) +{ +gfn_t mask =kvm_gfn_shared_mask (kvm); + +return mask && !(gpa_to_gfn (gpa) & mask); +} +#endif
Signature · 1 line
2.25.1
Re: [PATCH v7 033/102] KVM: x86/mmu: Add address conversion functions for TDX shared bits
Quoted 1 line · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Rick Edgecombe <[email protected]>
I don't think this is appropriate any more. You can add Co-developed-by I guess.
Quoted 5 lines
TDX repurposes one GPA bits (51 bit or 47 bit based on configuration) to indicate the GPA is private(if cleared) or shared (if set) with VMM. If GPA.shared is set, GPA is converted existing conventional EPT pointed by EPTP. If GPA.shared bit is cleared, GPA is converted by Secure-EPT(S-EPT)
Not sure whether Secure EPT has even been mentioned before in this series. If not, perhaps better to explain it here. Or not sure whether you need to mention S-EPT at all.
Quoted 1 line
TDX module manages. VMM has to issue SEAM call to TDX module to operate on
SEAM call -> SEAMCALL
Quoted 2 lines
S-EPT. e.g. populating/zapping guest page or shadow page by TDH.PAGE.{ADD, REMOVE} for guest page, TDH.PAGE.SEPT.{ADD, REMOVE} S-EPT etc.
Not sure why you want to mention those particular SEAMCALLs.
Quoted 2 lines
Several hooks needs to be added to KVM MMU to support TDX. Add a function
needs -> need.
Not sure why you need first sentence at all.
But I do think you should mention adding per-VM scope 'gfn_shared_mask' thing.
Quoted 14 lines
to check if KVM MMU is running for TDX and several functions for address conversation between private-GPA and shared-GPA.
Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/kvm/mmu.h | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+)arch/x86/include/asm/kvm_host.h +0
-0
arch/x86/include/asm/kvm_host.h struct kvm_arch { · line 1344
Quoted 6 lines
arch/x86/include/asm/kvm_host.h +2
-0@@ -1339,7 +1339,9 @@ struct kvm_arch {*/ u32 max_vcpu_ids; +#ifdef CONFIG_KVM_MMU_PRIVATE gfn_t gfn_shared_mask; +#endif
As Xiaoyao said, please introduce gfn_shared_mask in this patch.
And by applying this patch, nothing will prevent you to turn on INTEL_TDX_HOST and KVM_INTEL, which also turns on KVM_MMU_PRIVATE.
So 'kvm_arch::gfn_shared_mask' is guaranteed to be 0? If not, can legal (shared) GFN for normal VM be potentially treated as private?
If yes, perhaps explicitly call out in changelog so people don't need to worry about?
Quoted 44 lines
arch/x86/include/asm/kvm_host.h +0
-0};struct kvm_vm_stat {arch/x86/kvm/mmu.h +32
-0@@ -286,4 +286,36 @@ static inline gpa_t kvm_translate_gpa(struct kvm_vcpu *vcpu,return gpa;return translate_nested_gpa (vcpu, gpa, access, exception); } + +static inline gfn_t kvm_gfn_shared_mask (const struct kvm *kvm) +{ +#ifdef CONFIG_KVM_MMU_PRIVATE +return kvm->arch.gfn_shared_mask; +#else +return 0 ; +#endif +} + +static inline gfn_t kvm_gfn_shared (const struct kvm *kvm,gfn_t gfn) +{ +return gfn |kvm_gfn_shared_mask (kvm); +} + +static inline gfn_t kvm_gfn_private (const struct kvm *kvm,gfn_t gfn) +{ +return gfn & ~kvm_gfn_shared_mask (kvm); +} + +static inline gpa_t kvm_gpa_private (const struct kvm *kvm,gpa_t gpa) +{ +return gpa & ~gfn_to_gpa (kvm_gfn_shared_mask (kvm)); +} + +static inline bool kvm_is_private_gpa (const struct kvm *kvm,gpa_t gpa) +{ +gfn_t mask =kvm_gfn_shared_mask (kvm); + +return mask && !(gpa_to_gfn (gpa) & mask); +} +#endif
Re: [PATCH v7 033/102] KVM: x86/mmu: Add address conversion functions for TDX shared bits
Quoted 5 lines · Kai Huang
Quoted 1 line · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Rick Edgecombe <[email protected]>
I don't think this is appropriate any more. You can add Co-developed-by I guess.
Makes sense.
Quoted 51 lines
Quoted 5 lines
TDX repurposes one GPA bits (51 bit or 47 bit based on configuration) to indicate the GPA is private(if cleared) or shared (if set) with VMM. If GPA.shared is set, GPA is converted existing conventional EPT pointed by EPTP. If GPA.shared bit is cleared, GPA is converted by Secure-EPT(S-EPT)
Not sure whether Secure EPT has even been mentioned before in this series. If not, perhaps better to explain it here. Or not sure whether you need to mention S-EPT at all.
Quoted 1 line
TDX module manages. VMM has to issue SEAM call to TDX module to operate on
SEAM call -> SEAMCALL
Quoted 2 lines
S-EPT. e.g. populating/zapping guest page or shadow page by TDH.PAGE.{ADD, REMOVE} for guest page, TDH.PAGE.SEPT.{ADD, REMOVE} S-EPT etc.
Not sure why you want to mention those particular SEAMCALLs.
Quoted 2 lines
Several hooks needs to be added to KVM MMU to support TDX. Add a function
needs -> need.
Not sure why you need first sentence at all.
But I do think you should mention adding per-VM scope '
gfn_shared_mask' thing.Quoted 14 lines
to check if KVM MMU is running for TDX and several functions for address conversation between private-GPA and shared-GPA.
Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/kvm/mmu.h | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+)arch/x86/include/asm/kvm_host.h +0
-0arch/x86/include/asm/kvm_host.h struct kvm_arch { · line 1344
Quoted 6 lines
arch/x86/include/asm/kvm_host.h +2
-0@@ -1339,7 +1339,9 @@ struct kvm_arch {*/ u32 max_vcpu_ids; +#ifdef CONFIG_KVM_MMU_PRIVATE gfn_t gfn_shared_mask; +#endif As Xiaoyao said, please introduce
gfn_shared_maskin this patch.
Quoted 8 lines
And by applying this patch, nothing will prevent you to turn on
INTEL_TDX_HOSTandKVM_INTEL, which also turns onKVM_MMU_PRIVATE.So '
kvm_arch::gfn_shared_mask' is guaranteed to be 0? If not, can legal (shared) GFN for normal VM be potentially treated as private?If yes, perhaps explicitly call out in changelog so people don't need to worry about?
struct kvm that includes struct kvm_arch is guaranteed to be zero.
Here is the updated commit message.
Author: Isaku Yamahata <[email protected]> Date: Tue Jul 12 00:10:13 2022 -0700
KVM: x86/mmu: Add address conversion functions for TDX shared bit of GPA
TDX repurposes one GPA bit (51 bit or 47 bit based on configuration) to indicate the GPA is private(if cleared) or shared (if set) with VMM. If GPA.shared is set, GPA is converted existing conventional EPT pointed by EPTP. If GPA.shared bit is cleared, GPA is converted by TDX module. VMM has to issue SEAMCALLs to operate.
Add a member to remember GPA shared bit for each guest TDs, add address conversion functions between private GPA and shared GPA and test if GPA is private.
Because struct kvm_arch (or struct kvm which includes struct kvm_arch. See kvm_arch_alloc_vm() that passes __GPF_ZERO) is zero-cleared when allocated, the new member to remember GPA shared bit is guaranteed to be zero with this patch unless it's initialized explicitly.
Signature · 1 line
Isaku Yamahata <[email protected]>
Re: [PATCH v7 033/102] KVM: x86/mmu: Add address conversion functions for TDX shared bits
Quoted 18 lines
Quoted 10 lines
And by applying this patch, nothing will prevent you to turn on
INTEL_TDX_HOSTandKVM_INTEL, which also turns onKVM_MMU_PRIVATE.So '
kvm_arch::gfn_shared_mask' is guaranteed to be 0? If not, can legal (shared) GFN for normal VM be potentially treated as private?If yes, perhaps explicitly call out in changelog so people don't need to worry about?
struct kvm that includes struct
kvm_archis guaranteed to be zero.Here is the updated commit message.
Author: Isaku Yamahata <[email protected]> Date: Tue Jul 12 00:10:13 2022 -0700
Quoted 7 lines
KVM: x86/mmu: Add address conversion functions for TDX shared bit of GPA
TDX repurposes one GPA bit (51 bit or 47 bit based on configuration) to indicate the GPA is private(if cleared) or shared (if set) with VMM. If GPA.shared is set, GPA is converted existing conventional EPT pointed by EPTP. If GPA.shared bit is cleared, GPA is converted by TDX module. VMM has to issue SEAMCALLs to operate.
Sorry what does "GPA is converted ..." mean?
Signature · 2 lines
Thanks, -Kai
Re: [PATCH v7 033/102] KVM: x86/mmu: Add address conversion functions for TDX shared bits
Quoted 20 lines · Kai Huang
Quoted 20 lines
Quoted 10 lines
And by applying this patch, nothing will prevent you to turn on
INTEL_TDX_HOSTandKVM_INTEL, which also turns onKVM_MMU_PRIVATE.So '
kvm_arch::gfn_shared_mask' is guaranteed to be 0? If not, can legal (shared) GFN for normal VM be potentially treated as private?If yes, perhaps explicitly call out in changelog so people don't need to worry about?
struct kvm that includes struct
kvm_archis guaranteed to be zero.Here is the updated commit message.
Author: Isaku Yamahata <[email protected]> Date: Tue Jul 12 00:10:13 2022 -0700KVM: x86/mmu: Add address conversion functions for TDX shared bit of GPA
Quoted 7 lines
Quoted 5 lines
TDX repurposes one GPA bit (51 bit or 47 bit based on configuration) to indicate the GPA is private(if cleared) or shared (if set) with VMM. If GPA.shared is set, GPA is converted existing conventional EPT pointed by EPTP. If GPA.shared bit is cleared, GPA is converted by TDX module. VMM has to issue SEAMCALLs to operate.
Sorry what does "GPA is converted ..." mean?
Oops. typo. I meant GPA is covered by ...
Signature · 1 line
Isaku Yamahata <[email protected]>
PATCH v7 34/102 The start of TDX KVM patch series: KVM TDP refactoring for TDX
In reply to [email protected]From: Isaku Yamahata <[email protected]>
This empty commit is to mark the start of patch series of KVM TDP refactoring for TDX.
--- Documentation/virt/kvm/intel-tdx-layer-status.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Documentation/virt/kvm/intel-tdx-layer-status.rst +2 -2
@@ -24,7 +24,7 @@ Patch Layer status * TD vcpu enter/exit: Not yet * TD vcpu interrupts/exit/hypercall: Not yet -* KVM MMU GPA shared bits: Applying -* KVM TDP refactoring for TDX: Not yet +* KVM MMU GPA shared bits: Applied +* KVM TDP refactoring for TDX: Applying * KVM TDP MMU hooks: Not yet * KVM TDP MMU MapGPA: Not yet
Signature · 1 line
2.25.1
PATCH v7 35/102 KVM: x86/mmu: Explicitly check for MMIO spte in fast page fault
In reply to [email protected]From: Sean Christopherson <[email protected]>
Explicitly check for an MMIO spte in the fast page fault flow. TDX will use a not-present entry for MMIO sptes, which can be mistaken for an access-tracked spte since both have SPTE_SPECIAL_MASK set.
MMIO sptes are handled in handle_mmio_page_fault for non-TDX VMs, so this patch does not affect them. TDX will handle MMIO emulation through a hypercall instead.
--- arch/x86/kvm/mmu/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/x86/kvm/mmu/mmu.c +1 -1
@@ -3163,7 +3163,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)else sptep =fast_pf_get_last_sptep (vcpu, fault->addr, &spte); -if (!is_shadow_present_pte (spte)) +if (!is_shadow_present_pte (spte) ||is_mmio_spte (spte))break ; sp =sptep_to_sp (sptep);
Signature · 1 line
2.25.1
Re: [PATCH v7 035/102] KVM: x86/mmu: Explicitly check for MMIO spte in fast page fault
Quoted 5 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
Explicitly check for an MMIO spte in the fast page fault flow. TDX will use a not-present entry for MMIO sptes, which can be mistaken for an access-tracked spte since both have
SPTE_SPECIAL_MASKset.
SPTE_SPECIAL_MASK has been removed in latest KVM code. The changelog needs update.
In fact, if I understand correctly, I don't think this changelog is correct:
The existing code doesn't check is_mmio_spte() because:
1) If MMIO caching is enabled, MMIO fault is always handled in handle_mmio_page_fault() before reaching here;
2) If MMIO caching is disabled, is_shadow_present_pte() always returns false for MMIO spte, and is_mmio_spte() also always return false for MMIO spte, so there's no need check here.
"A non-present entry for MMIO spte" doesn't necessarily mean is_shadow_present_pte() will return true for it, and there's no explanation at all that for TDX guest a MMIO spte could reach here and is_shadow_present_pte() returns true for it.
If this patch is ever needed, it should come with or after the patch (patches) that handles MMIO fault for TD guest.
Hi Sean, Paolo,
Did I miss anything?
Quoted 24 lines
MMIO sptes are handled in
handle_mmio_page_faultfor non-TDX VMs, so this patch does not affect them. TDX will handle MMIO emulation through a hypercall instead.Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/mmu/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)arch/x86/kvm/mmu/mmu.c +1
-1@@ -3163,7 +3163,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)else sptep =fast_pf_get_last_sptep (vcpu, fault->addr, &spte); -if (!is_shadow_present_pte (spte)) +if (!is_shadow_present_pte (spte) ||is_mmio_spte (spte))break ; sp =sptep_to_sp (sptep);
Re: [PATCH v7 035/102] KVM: x86/mmu: Explicitly check for MMIO spte in fast page fault
Quoted 9 lines · Kai Huang
Quoted 5 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
Explicitly check for an MMIO spte in the fast page fault flow. TDX will use a not-present entry for MMIO sptes, which can be mistaken for an access-tracked spte since both have
SPTE_SPECIAL_MASKset.
SPTE_SPECIAL_MASKhas been removed in latest KVM code. The changelog needs update.
It was renamed to SPTE_TDP_AD_MASK. not removed.
Quoted 7 lines
In fact, if I understand correctly, I don't think this changelog is correct:
The existing code doesn't check
is_mmio_spte()because:1) If MMIO caching is enabled, MMIO fault is always handled in
handle_mmio_page_fault()before reaching here;
Quoted 8 lines
2) If MMIO caching is disabled,
is_shadow_present_pte()always returns false for MMIO spte, andis_mmio_spte()also always return false for MMIO spte, so there's no need check here."A non-present entry for MMIO spte" doesn't necessarily mean
is_shadow_present_pte()will return true for it, and there's no explanation at all that for TDX guest a MMIO spte could reach here andis_shadow_present_pte()returns true for it.
Although it was needed, I noticed the following commit made this patch unnecessary. So I'll drop this patch. Kudos to Sean.
edea7c4fc215c7ee1cc98363b016ad505cbac9f7
"KVM: x86/mmu: Use a dedicated bit to track shadow/MMU-present SPTEs"
Signature · 1 line
Isaku Yamahata <[email protected]>
Re: [PATCH v7 035/102] KVM: x86/mmu: Explicitly check for MMIO spte in fast page fault
Quoted 7 lines
Although it was needed, I noticed the following commit made this patch unnecessary. So I'll drop this patch. Kudos to Sean.
edea7c4fc215c7ee1cc98363b016ad505cbac9f7
"KVM: x86/mmu: Use a dedicated bit to track shadow/MMU-present SPTEs"
Yes is_shadow_present_pte() always return false for MMIO so this patch isn't needed anymore.
PATCH v7 36/102 KVM: x86/mmu: Allow non-zero value for non-present SPTE
In reply to [email protected]From: Sean Christopherson <[email protected]>
TDX introduced a new ETP, Secure-EPT, in addition to the existing EPT. Secure-EPT maps protected guest memory, which is called private. Since Secure-EPT page tables is also protected, those page tables is also called private. The existing EPT is often called shared EPT to distinguish from Secure-EPT. And also page tables for share EPT is also called shared.
Virtualization Exception, #VE, is a new processor exception in VMX non-root operation. In certain virtualizatoin-related conditions, #VE is injected into guest instead of exiting from guest to VMM so that guest is given a chance to inspect it. One important one is EPT violation. When "ETP-violation #VE" VM-execution is set, "#VE suppress bit" in EPT entry is cleared, #VE is injected instead of EPT violation.
Because guest memory is protected with TDX, VMM can't parse instructions in the guest memory. Instead, MMIO hypercall is used for guest to pass necessary information to VMM.
To make unmodified device driver work, guest TD expects #VE on accessing shared GPA. The #VE handler converts MMIO access into MMIO hypercall with the EPT entry of enabled "#VE" by clearing "suppress #VE" bit. Before VMM enabling #VE, it needs to figure out the given GPA is for MMIO by EPT violation. So the execution flow looks like
- Allocate unused shared EPT entry with suppress #VE bit set.
- EPT violation on that GPA.
- VMM figures out the faulted GPA is for MMIO.
- VMM clears the suppress #VE bit.
- Guest TD gets #VE, and converts MMIO access into MMIO hypercall.
- If the GPA maps guest memory, VMM resolves it with guest pages.
For both cases, SPTE needs suppress #VE" bit set initially when it is allocated or zapped, therefore non-zero non-present value for SPTE needs to be allowed.
This change requires to update FNAME(sync_page) for shadow EPT. "if(!sp->spte[i])" in FNAME(sync_page) means that the spte entry is the initial value. With the introduction of shadow_nonpresent_value which can be non-zero, it doesn't hold any more. Replace zero check with "!is_shadow_present_pte() && !is_mmio_spte()".
When "if (!spt[i])" doesn't hold, but the entry value is shadow_nonpresent_value, the entry is wrongly synchronized from non-present to non-present with (wrongly) pfn changed and tries to remove rmap wrongly and BUG_ON() is hit.
TDP MMU uses REMOVED_SPTE = 0x5a0ULL as special constant to indicate the intermediate value to indicate one thread is operating on it and the value should be semi-arbitrary value. For TDX (more correctly to use #VE), the value should include suppress #VE value which is SHADOW_NONPRESENT_VALUE. Rename REMOVED_SPTE to __REMOVED_SPTE and define REMOVED_SPTE as SHADOW_NONPRESENT_VALUE | REMOVED_SPTE to set suppress #VE bit.
--- arch/x86/kvm/mmu/mmu.c | 55 ++++++++++++++++++++++++++++++---- arch/x86/kvm/mmu/paging_tmpl.h | 3 +- arch/x86/kvm/mmu/spte.c | 5 +++- arch/x86/kvm/mmu/spte.h | 37 ++++++++++++++++++++--- arch/x86/kvm/mmu/tdp_mmu.c | 23 +++++++++----- 5 files changed, 105 insertions(+), 18 deletions(-)
arch/x86/kvm/mmu/mmu.c +50 -5
@@ -668,6 +668,44 @@ static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) } } +static inline void kvm_init_shadow_page (void *page) +{ +#ifdef CONFIG_X86_64 +int ign; + +WARN_ON_ONCE (shadow_nonpresent_value !=SHADOW_NONPRESENT_VALUE ); + asmvolatile ( +"rep stosq\n\t" + :"=c" (ign),"=D" (page) + :"a" (SHADOW_NONPRESENT_VALUE ),"c" (4096 /8 ),"D" (page) + :"memory" + ); +#else +BUG (); +#endif +} + +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache; +int start, end, i, r; +bool is_tdp_mmu =is_tdp_mmu_enabled (vcpu->kvm); + +if (is_tdp_mmu && shadow_nonpresent_value) + start =kvm_mmu_memory_cache_nr_free_objects (mc); + + r =kvm_mmu_topup_memory_cache (mc,PT64_ROOT_MAX_LEVEL ); +if (r) +return r; + +if (is_tdp_mmu && shadow_nonpresent_value) { + end =kvm_mmu_memory_cache_nr_free_objects (mc); +for (i = start; i < end; i++) +kvm_init_shadow_page (mc->objects[i]); + } +return 0 ; +} +static int mmu_topup_memory_caches (struct kvm_vcpu *vcpu,bool maybe_indirect) {int r;
@@ -677,8 +715,7 @@ static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);if (r)return r; - r =kvm_mmu_topup_memory_cache (&vcpu->arch.mmu_shadow_page_cache, -PT64_ROOT_MAX_LEVEL ); + r =mmu_topup_shadow_page_cache (vcpu);if (r)return r;if (maybe_indirect) {
@@ -5521,9 +5558,16 @@ void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,* what is used by the kernel for any given HVA, i.e. the kernel's * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). */ -if (tdp_enabled) +if (tdp_enabled) { +/* +* For TDP MMU, always set bit 63 for TDX support. See the +* comment on SHADOW_NONPRESENT_VALUE. +*/ +#ifdef CONFIG_X86_64 + shadow_nonpresent_value =SHADOW_NONPRESENT_VALUE ; +#endif max_huge_page_level = tdp_huge_page_level; -else if (boot_cpu_has (X86_FEATURE_GBPAGES )) + }else if (boot_cpu_has (X86_FEATURE_GBPAGES )) max_huge_page_level =PG_LEVEL_1G ;else max_huge_page_level =PG_LEVEL_2M ;
@@ -5654,7 +5698,8 @@ int kvm_mmu_create(struct kvm_vcpu *vcpu) vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; - vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; +if (!(is_tdp_mmu_enabled (vcpu->kvm) && shadow_nonpresent_value)) + vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; vcpu->arch.mmu = &vcpu->arch.root_mmu; vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
arch/x86/kvm/mmu/paging_tmpl.h +2 -1
@@ -1031,7 +1031,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)gpa_t pte_gpa;gfn_t gfn; -if (!sp->spt[i]) +if (!is_shadow_present_pte (sp->spt[i]) && + !is_mmio_spte (sp->spt[i]))continue ; pte_gpa = first_pte_gpa + i *sizeof (pt_element_t);
arch/x86/kvm/mmu/spte.c +4 -1
@@ -36,6 +36,9 @@ u64 __read_mostly shadow_present_mask;u64 __read_mostly shadow_me_value;u64 __read_mostly shadow_me_mask;u64 __read_mostly shadow_acc_track_mask; +#ifdef CONFIG_X86_64 +u64 __read_mostly shadow_nonpresent_value; +#endif u64 __read_mostly shadow_nonpresent_or_rsvd_mask;u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask;
@@ -360,7 +363,7 @@ void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask)* not set any RWX bits. */ if (WARN_ON ((mmio_value & mmio_mask) != mmio_value) || -WARN_ON (mmio_value && (REMOVED_SPTE & mmio_mask) == mmio_value)) +WARN_ON (mmio_value && (__REMOVED_SPTE & mmio_mask) == mmio_value)) mmio_value =0 ;if (!mmio_value)
arch/x86/kvm/mmu/spte.h +33 -4
@@ -140,6 +140,19 @@ static_assert(MMIO_SPTE_GEN_LOW_BITS == 8 && MMIO_SPTE_GEN_HIGH_BITS == 11);#define MMIO_SPTE_GEN_MASK GENMASK_ULL(MMIO_SPTE_GEN_LOW_BITS + MMIO_SPTE_GEN_HIGH_BITS - 1, 0) +/* +* non-present SPTE value for both VMX and SVM for TDP MMU. +* For SVM NPT, for non-present spte (bit 0 = 0), other bits are ignored. +* For VMX EPT, bit 63 is ignored if #VE is disabled. +* bit 63 is #VE suppress if #VE is enabled. +*/ +#ifdef CONFIG_X86_64 +#define SHADOW_NONPRESENT_VALUE BIT_ULL(63) +static_assert (!(SHADOW_NONPRESENT_VALUE &SPTE_MMU_PRESENT_MASK )); +#else +#define SHADOW_NONPRESENT_VALUE 0ULL +#endif +extern u64 __read_mostly shadow_host_writable_mask;extern u64 __read_mostly shadow_mmu_writable_mask;extern u64 __read_mostly shadow_nx_mask;
@@ -154,6 +167,12 @@ extern u64 __read_mostly shadow_present_mask;extern u64 __read_mostly shadow_me_value;extern u64 __read_mostly shadow_me_mask; +#ifdef CONFIG_X86_64 +extern u64 __read_mostly shadow_nonpresent_value; +#else +#define shadow_nonpresent_value 0ULL +#endif +/* * SPTEs in MMUs without A/D bits are marked with SPTE_TDP_AD_DISABLED_MASK; * shadow_acc_track_mask is the set of bits to be cleared in non-accessed
@@ -174,9 +193,12 @@ extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask;/* * If a thread running without exclusive control of the MMU lock must perform a -* multi-part operation on an SPTE, it can set the SPTE to REMOVED_SPTE as a +* multi-part operation on an SPTE, it can set the SPTE to __REMOVED_SPTE as a * non-present intermediate value. Other threads which encounter this value -* should not modify the SPTE. +* should not modify the SPTE. For the case that TDX is enabled, +* SHADOW_NONPRESENT_VALUE, which is "suppress #VE" bit set because TDX module +* always enables "EPT violation #VE". The bit is ignored by non-TDX case as +* present bit (bit 0) is cleared. * * Use a semi-arbitrary value that doesn't set RWX bits, i.e. is not-present on * bot AMD and Intel CPUs, and doesn't set PFN bits, i.e. doesn't create a L1TF
@@ -184,10 +206,17 @@ extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask;* * Only used by the TDP MMU. */ -#define REMOVED_SPTE 0x5a0ULL +#define __REMOVED_SPTE 0x5a0ULL/* Removed SPTEs must not be misconstrued as shadow present PTEs. */ -static_assert (!(REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); +static_assert (!(__REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); +static_assert (!(__REMOVED_SPTE &SHADOW_NONPRESENT_VALUE )); + +/* +* See above comment around __REMOVED_SPTE. REMOVED_SPTE is the actual +* intermediate value set to the removed SPET. it sets the "suppress #VE" bit. +*/ +#define REMOVED_SPTE (SHADOW_NONPRESENT_VALUE | __REMOVED_SPTE)static inline bool is_removed_spte (u64 spte) {
arch/x86/kvm/mmu/tdp_mmu.c +16 -7
@@ -692,8 +692,16 @@ static inline int tdp_mmu_zap_spte_atomic(struct kvm *kvm,* overwrite the special removed SPTE value. No bookkeeping is needed * here since the SPTE is going from non-present to non-present. Use * the raw write helper to avoid an unnecessary check on volatile bits. +* +* Set non-present value to SHADOW_NONPRESENT_VALUE, rather than 0. +* It is because when TDX is enabled, TDX module always +* enables "EPT-violation #VE", so KVM needs to set +* "suppress #VE" bit in EPT table entries, in order to get +* real EPT violation, rather than TDVMCALL. KVM sets +* SHADOW_NONPRESENT_VALUE (which sets "suppress #VE" bit) so it +* can be set when EPT table entries are zapped. */ -__kvm_tdp_mmu_write_spte (iter->sptep,0 ); +__kvm_tdp_mmu_write_spte (iter->sptep,SHADOW_NONPRESENT_VALUE );return 0 ; }
@@ -870,8 +878,8 @@ static void __tdp_mmu_zap_root(struct kvm *kvm, struct kvm_mmu_page *root,continue ;if (!shared) -tdp_mmu_set_spte (kvm, &iter,0 ); -else if (tdp_mmu_set_spte_atomic (kvm, &iter,0 )) +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); +else if (tdp_mmu_set_spte_atomic (kvm, &iter,SHADOW_NONPRESENT_VALUE )) goto retry; } }
@@ -927,8 +935,9 @@ bool kvm_tdp_mmu_zap_sp(struct kvm *kvm, struct kvm_mmu_page *sp)if (WARN_ON_ONCE (!is_shadow_present_pte (old_spte)))return false; -__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte,0 , - sp->gfn, sp->role.level +1 , true, true); +__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte, +SHADOW_NONPRESENT_VALUE , sp->gfn, sp->role.level +1 , + true, true);return true; }
@@ -965,7 +974,7 @@ static bool tdp_mmu_zap_leafs(struct kvm *kvm, struct kvm_mmu_page *root, !is_last_spte(iter.old_spte, iter.level))continue ; -tdp_mmu_set_spte (kvm, &iter,0 ); +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); flush = true; }
@@ -1330,7 +1339,7 @@ static bool set_spte_gfn(struct kvm *kvm, struct tdp_iter *iter,* invariant that the PFN of a present * leaf SPTE can never change. * See __handle_changed_spte(). */ -tdp_mmu_set_spte (kvm, iter,0 ); +tdp_mmu_set_spte (kvm, iter,SHADOW_NONPRESENT_VALUE );if (!pte_write (range->pte)) { new_spte = kvm_mmu_changed_pte_notifier_make_spte(iter->old_spte,
Signature · 1 line
2.25.1
Re: [PATCH v7 036/102] KVM: x86/mmu: Allow non-zero value for non-present SPTE
Quoted 7 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
TDX introduced a new ETP, Secure-EPT, in addition to the existing EPT. Secure-EPT maps protected guest memory, which is called private. Since Secure-EPT page tables is also protected, those page tables is also called private. The existing EPT is often called shared EPT to distinguish from Secure-EPT. And also page tables for share EPT is also called shared.
Does this patch has anything to do with secure-EPT?
Quoted 2 lines
Virtualization Exception, #VE, is a new processor exception in VMX non-root
#VE isn't new. It's already in pre-TDX public spec AFAICT.
Quoted 5 lines
operation. In certain virtualizatoin-related conditions, #VE is injected into guest instead of exiting from guest to VMM so that guest is given a chance to inspect it. One important one is EPT violation. When "ETP-violation #VE" VM-execution is set, "#VE suppress bit" in EPT entry is cleared, #VE is injected instead of EPT violation.
We already know such fact based on pre-TDX public spec. Instead of repeating it here, why not focusing on saying what's new in TDX, so your below paragraph of setting a non-zero value for non-present SPTE can be justified?
Quoted 11 lines
Because guest memory is protected with TDX, VMM can't parse instructions in the guest memory. Instead, MMIO hypercall is used for guest to pass necessary information to VMM.
To make unmodified device driver work, guest TD expects #VE on accessing shared GPA. The #VE handler converts MMIO access into MMIO hypercall with the EPT entry of enabled "#VE" by clearing "suppress #VE" bit. Before VMM enabling #VE, it needs to figure out the given GPA is for MMIO by EPT violation.
As I said above, before here, you need to explain in TDX VMCS is controlled by the TDX module and it always sets the "EPT-violation #VE" in execution control bit.
Quoted 13 lines
So the execution flow looks like
- Allocate unused shared EPT entry with suppress #VE bit set.
- EPT violation on that GPA.
- VMM figures out the faulted GPA is for MMIO.
- VMM clears the suppress #VE bit.
- Guest TD gets #VE, and converts MMIO access into MMIO hypercall.
- If the GPA maps guest memory, VMM resolves it with guest pages.For both cases, SPTE needs suppress #VE" bit set initially when it is allocated or zapped, therefore non-zero non-present value for SPTE needs to be allowed.
Quoted 5 lines
This change requires to update
FNAME(sync_page)for shadow EPT. "if(!sp->spte[i])" inFNAME(sync_page)means that the spte entry is the initial value. With the introduction ofshadow_nonpresent_valuewhich can be non-zero, it doesn't hold any more. Replace zero check with "!is_shadow_present_pte() && !is_mmio_spte()".
I don't think you need to mention above paragraph. It's absolutely unclear how is_mmio_spte() will be impacted by this patch by reading above paragraphs.
From the "execution flow" you mentioned above, you will change MMIO fault from EPT misconfiguration to EPT violation (in order to get #VE), so theoretically you may effectively disable MMIO caching, in which case, if I understand correctly, is_mmio_spte() always returns false.
I guess you can just change to check:
if (sp->spte[i] != shadow_nonpresent_value)
Anyway, IMO you can just comment in the code.
After all, what is shadow_nonpresent_value, given you haven't explained what it is?
Quoted 5 lines
When "if (!spt[i])" doesn't hold, but the entry value is
shadow_nonpresent_value, the entry is wrongly synchronized from non-present to non-present with (wrongly) pfn changed and tries to remove rmap wrongly andBUG_ON()is hit.
Ditto.
Quoted 5 lines
TDP MMU uses
REMOVED_SPTE=0x5a0ULLas special constant to indicate the intermediate value to indicate one thread is operating on it and the value should be semi-arbitrary value. For TDX (more correctly to use #VE), the value should include suppress #VE value which isSHADOW_NONPRESENT_VALUE.
What is SHADOW_NONPRESENT_VALUE?
Quoted 2 lines
Rename
REMOVED_SPTEto__REMOVED_SPTEand defineREMOVED_SPTEasSHADOW_NONPRESENT_VALUE|REMOVED_SPTEto set suppress #VE bit.
Ditto. IMHO you don't even need to mention REMOVED_SPTE in changelog.
Quoted 44 lines
Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/mmu/mmu.c | 55 ++++++++++++++++++++++++++++++---- arch/x86/kvm/mmu/paging_tmpl.h | 3 +- arch/x86/kvm/mmu/spte.c | 5 +++- arch/x86/kvm/mmu/spte.h | 37 ++++++++++++++++++++--- arch/x86/kvm/mmu/tdp_mmu.c | 23 +++++++++----- 5 files changed, 105 insertions(+), 18 deletions(-)arch/x86/kvm/mmu/mmu.c +25
-0@@ -668,6 +668,44 @@ static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) } } +static inline void kvm_init_shadow_page (void *page) +{ +#ifdef CONFIG_X86_64 +int ign; + +WARN_ON_ONCE (shadow_nonpresent_value !=SHADOW_NONPRESENT_VALUE ); + asmvolatile ( +"rep stosq\n\t" + :"=c" (ign),"=D" (page) + :"a" (SHADOW_NONPRESENT_VALUE ),"c" (4096 /8 ),"D" (page) + :"memory" + ); +#else +BUG (); +#endif +} + +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache; +int start, end, i, r; +bool is_tdp_mmu =is_tdp_mmu_enabled (vcpu->kvm); + +if (is_tdp_mmu && shadow_nonpresent_value) + start =kvm_mmu_memory_cache_nr_free_objects (mc);
arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 705
Quoted 10 lines
arch/x86/kvm/mmu/mmu.c +10
-0+ + r =kvm_mmu_topup_memory_cache (mc,PT64_ROOT_MAX_LEVEL ); +if (r) +return r; + +if (is_tdp_mmu && shadow_nonpresent_value) { + end =kvm_mmu_memory_cache_nr_free_objects (mc); +for (i = start; i < end; i++) +kvm_init_shadow_page (mc->objects[i]); + }
I think you can just extend this to legacy MMU too, but not only TDP MMU.
After all, before this patch, where have you declared that TDX only supports TDP MMU? This is only enforced in:
[PATCH v7 043/102] KVM: x86/mmu: Focibly use TDP MMU for TDX
Which is 7 patches later.
Also, shadow_nonpresent_value is only used in couple of places, while SHADOW_NONPRESENT_VALUE is used directly in more places. Does it make more sense to always use shadow_nonpresent_value, instead of using SHADOW_NONPRESENT_VALUE?
Similar to other shadow values, we can provide a function to let caller (VMX/SVM) to decide whether it wants to use non-zero for non-present SPTE.
void kvm_mmu_set_non_present_value(u64 value)
{
shadow_nonpresent_value = value;
}Quoted 19 lines
arch/x86/kvm/mmu/mmu.c +4
-2+return 0 ; +} +static int mmu_topup_memory_caches (struct kvm_vcpu *vcpu,bool maybe_indirect) {int r;@@ -677,8 +715,7 @@ static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);if (r)return r; - r =kvm_mmu_topup_memory_cache (&vcpu->arch.mmu_shadow_page_cache, -PT64_ROOT_MAX_LEVEL ); + r =mmu_topup_shadow_page_cache (vcpu);if (r)return r;if (maybe_indirect) {@@ -5521,9 +5558,16 @@ void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,* what is used by the kernel for any given HVA, i.e. the kernel's * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust().
arch/x86/kvm/mmu/mmu.c void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, · line 5568
Quoted 10 lines
arch/x86/kvm/mmu/mmu.c +8
-1*/ -if (tdp_enabled) +if (tdp_enabled) { +/* +* For TDP MMU, always set bit 63 for TDX support. See the +* comment on SHADOW_NONPRESENT_VALUE. +*/ +#ifdef CONFIG_X86_64 + shadow_nonpresent_value =SHADOW_NONPRESENT_VALUE ; +#endif
'tdp_enabled' doesn't mean TDP MMU, right?
Quoted 21 lines
arch/x86/kvm/mmu/mmu.c +3
-2max_huge_page_level = tdp_huge_page_level; - else if (boot_cpu_has(X86_FEATURE_GBPAGES)) + }else if (boot_cpu_has (X86_FEATURE_GBPAGES )) max_huge_page_level =PG_LEVEL_1G ;else max_huge_page_level =PG_LEVEL_2M ;@@ -5654,7 +5698,8 @@ int kvm_mmu_create(struct kvm_vcpu *vcpu) vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; - vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; +if (!(is_tdp_mmu_enabled (vcpu->kvm) && shadow_nonpresent_value)) + vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; vcpu->arch.mmu = &vcpu->arch.root_mmu; vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;arch/x86/kvm/mmu/paging_tmpl.h +0
-0
arch/x86/kvm/mmu/paging_tmpl.h static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) · line 1036
Quoted 7 lines
arch/x86/kvm/mmu/paging_tmpl.h +2
-1@@ -1031,7 +1031,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)gpa_t pte_gpa;gfn_t gfn; -if (!sp->spt[i]) +if (!is_shadow_present_pte (sp->spt[i]) && + !is_mmio_spte (sp->spt[i]))continue ;
As I said in the changelog, I don't think this is correct.
I guess you can just change to check:
if (sp->spte[i] != shadow_nonpresent_value)
Quoted 78 lines
arch/x86/kvm/mmu/paging_tmpl.h +0
-0pte_gpa = first_pte_gpa + i *sizeof (pt_element_t);arch/x86/kvm/mmu/spte.c +4
-1@@ -36,6 +36,9 @@ u64 __read_mostly shadow_present_mask;u64 __read_mostly shadow_me_value;u64 __read_mostly shadow_me_mask;u64 __read_mostly shadow_acc_track_mask; +#ifdef CONFIG_X86_64 +u64 __read_mostly shadow_nonpresent_value; +#endif u64 __read_mostly shadow_nonpresent_or_rsvd_mask;u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask;@@ -360,7 +363,7 @@ void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask)* not set any RWX bits. */ if (WARN_ON ((mmio_value & mmio_mask) != mmio_value) || -WARN_ON (mmio_value && (REMOVED_SPTE & mmio_mask) == mmio_value)) +WARN_ON (mmio_value && (__REMOVED_SPTE & mmio_mask) == mmio_value)) mmio_value =0 ;if (!mmio_value)arch/x86/kvm/mmu/spte.h +24
-2@@ -140,6 +140,19 @@ static_assert(MMIO_SPTE_GEN_LOW_BITS == 8 && MMIO_SPTE_GEN_HIGH_BITS == 11);#define MMIO_SPTE_GEN_MASK GENMASK_ULL(MMIO_SPTE_GEN_LOW_BITS + MMIO_SPTE_GEN_HIGH_BITS - 1, 0) +/* +* non-present SPTE value for both VMX and SVM for TDP MMU. +* For SVM NPT, for non-present spte (bit 0 = 0), other bits are ignored. +* For VMX EPT, bit 63 is ignored if #VE is disabled. +* bit 63 is #VE suppress if #VE is enabled. +*/ +#ifdef CONFIG_X86_64 +#define SHADOW_NONPRESENT_VALUE BIT_ULL(63) +static_assert (!(SHADOW_NONPRESENT_VALUE &SPTE_MMU_PRESENT_MASK )); +#else +#define SHADOW_NONPRESENT_VALUE 0ULL +#endif +extern u64 __read_mostly shadow_host_writable_mask;extern u64 __read_mostly shadow_mmu_writable_mask;extern u64 __read_mostly shadow_nx_mask;@@ -154,6 +167,12 @@ extern u64 __read_mostly shadow_present_mask;extern u64 __read_mostly shadow_me_value;extern u64 __read_mostly shadow_me_mask; +#ifdef CONFIG_X86_64 +extern u64 __read_mostly shadow_nonpresent_value; +#else +#define shadow_nonpresent_value 0ULL +#endif +/* * SPTEs in MMUs without A/D bits are marked with SPTE_TDP_AD_DISABLED_MASK; * shadow_acc_track_mask is the set of bits to be cleared in non-accessed @@ -174,9 +193,12 @@ extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask;/* * If a thread running without exclusive control of the MMU lock must perform a -* multi-part operation on an SPTE, it can set the SPTE to REMOVED_SPTE as a +* multi-part operation on an SPTE, it can set the SPTE to __REMOVED_SPTE as a * non-present intermediate value. Other threads which encounter this value -* should not modify the SPTE. +* should not modify the SPTE. For the case that TDX is enabled, +* SHADOW_NONPRESENT_VALUE, which is "suppress #VE" bit set because TDX module +* always enables "EPT violation #VE". The bit is ignored by non-TDX case as +* present bit (bit 0) is cleared. * * Use a semi-arbitrary value that doesn't set RWX bits, i.e. is not-present on * bot AMD and Intel CPUs, and doesn't set PFN bits, i.e. doesn't create a L1TF
arch/x86/kvm/mmu/spte.h extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask; · line 213
Quoted 10 lines
arch/x86/kvm/mmu/spte.h +3
-2@@ -184,10 +206,17 @@ extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask;* * Only used by the TDP MMU. */ -#define REMOVED_SPTE 0x5a0ULL +#define __REMOVED_SPTE 0x5a0ULL/* Removed SPTEs must not be misconstrued as shadow present PTEs. */ -static_assert (!(REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); +static_assert (!(__REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); +static_assert (!(__REMOVED_SPTE &SHADOW_NONPRESENT_VALUE ));
I don't think you need this. My understanding of the reason REMOVED_SPTE is checked against SPTE_MMU_PRESENT_MASK is because they both at low 12 bits. SHADOW_NONPRESENT_VALUE is bit 63 so it's not possible to conflict with REMOVED_SPTE, which by comment only uses low bits.
Quoted 72 lines
arch/x86/kvm/mmu/spte.h +6
-0+ +/* +* See above comment around __REMOVED_SPTE. REMOVED_SPTE is the actual +* intermediate value set to the removed SPET. it sets the "suppress #VE" bit. +*/ +#define REMOVED_SPTE (SHADOW_NONPRESENT_VALUE | __REMOVED_SPTE)static inline bool is_removed_spte (u64 spte) {arch/x86/kvm/mmu/tdp_mmu.c +16
-7@@ -692,8 +692,16 @@ static inline int tdp_mmu_zap_spte_atomic(struct kvm *kvm,* overwrite the special removed SPTE value. No bookkeeping is needed * here since the SPTE is going from non-present to non-present. Use * the raw write helper to avoid an unnecessary check on volatile bits. +* +* Set non-present value to SHADOW_NONPRESENT_VALUE, rather than 0. +* It is because when TDX is enabled, TDX module always +* enables "EPT-violation #VE", so KVM needs to set +* "suppress #VE" bit in EPT table entries, in order to get +* real EPT violation, rather than TDVMCALL. KVM sets +* SHADOW_NONPRESENT_VALUE (which sets "suppress #VE" bit) so it +* can be set when EPT table entries are zapped. */ -__kvm_tdp_mmu_write_spte (iter->sptep,0 ); +__kvm_tdp_mmu_write_spte (iter->sptep,SHADOW_NONPRESENT_VALUE );return 0 ; }@@ -870,8 +878,8 @@ static void __tdp_mmu_zap_root(struct kvm *kvm, struct kvm_mmu_page *root,continue ;if (!shared) -tdp_mmu_set_spte (kvm, &iter,0 ); -else if (tdp_mmu_set_spte_atomic (kvm, &iter,0 )) +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); +else if (tdp_mmu_set_spte_atomic (kvm, &iter,SHADOW_NONPRESENT_VALUE )) goto retry; } }@@ -927,8 +935,9 @@ bool kvm_tdp_mmu_zap_sp(struct kvm *kvm, struct kvm_mmu_page *sp)if (WARN_ON_ONCE (!is_shadow_present_pte (old_spte)))return false; -__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte,0 , - sp->gfn, sp->role.level +1 , true, true); +__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte, +SHADOW_NONPRESENT_VALUE , sp->gfn, sp->role.level +1 , + true, true);return true; }@@ -965,7 +974,7 @@ static bool tdp_mmu_zap_leafs(struct kvm *kvm, struct kvm_mmu_page *root, !is_last_spte(iter.old_spte, iter.level))continue ; -tdp_mmu_set_spte (kvm, &iter,0 ); +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); flush = true; }@@ -1330,7 +1339,7 @@ static bool set_spte_gfn(struct kvm *kvm, struct tdp_iter *iter,* invariant that the PFN of a present * leaf SPTE can never change. * See __handle_changed_spte(). */ -tdp_mmu_set_spte (kvm, iter,0 ); +tdp_mmu_set_spte (kvm, iter,SHADOW_NONPRESENT_VALUE );if (!pte_write (range->pte)) { new_spte = kvm_mmu_changed_pte_notifier_make_spte(iter->old_spte,
Re: [PATCH v7 036/102] KVM: x86/mmu: Allow non-zero value for non-present SPTE
Quoted 22 lines · Kai Huang
Quoted 7 lines · On Mon, 2022-06-27 at 14:53 -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
TDX introduced a new ETP, Secure-EPT, in addition to the existing EPT. Secure-EPT maps protected guest memory, which is called private. Since Secure-EPT page tables is also protected, those page tables is also called private. The existing EPT is often called shared EPT to distinguish from Secure-EPT. And also page tables for share EPT is also called shared.
Does this patch has anything to do with secure-EPT?
Quoted 2 lines
Virtualization Exception, #VE, is a new processor exception in VMX non-root
#VE isn't new. It's already in pre-TDX public spec AFAICT.
Quoted 5 lines
operation. In certain virtualizatoin-related conditions, #VE is injected into guest instead of exiting from guest to VMM so that guest is given a chance to inspect it. One important one is EPT violation. When "ETP-violation #VE" VM-execution is set, "#VE suppress bit" in EPT entry is cleared, #VE is injected instead of EPT violation.
Quoted 3 lines
We already know such fact based on pre-TDX public spec. Instead of repeating it here, why not focusing on saying what's new in TDX, so your below paragraph of setting a non-zero value for non-present SPTE can be justified?
Ok, will drop those two paragraph above.
Quoted 42 lines
Quoted 10 lines
Because guest memory is protected with TDX, VMM can't parse instructions in the guest memory. Instead, MMIO hypercall is used for guest to pass necessary information to VMM.
To make unmodified device driver work, guest TD expects #VE on accessing shared GPA. The #VE handler converts MMIO access into MMIO hypercall with the EPT entry of enabled "#VE" by clearing "suppress #VE" bit. Before VMM enabling #VE, it needs to figure out the given GPA is for MMIO by EPT violation.
As I said above, before here, you need to explain in TDX VMCS is controlled by the TDX module and it always sets the "EPT-violation #VE" in execution control bit.
Quoted 13 lines
So the execution flow looks like
- Allocate unused shared EPT entry with suppress #VE bit set.
- EPT violation on that GPA.
- VMM figures out the faulted GPA is for MMIO.
- VMM clears the suppress #VE bit.
- Guest TD gets #VE, and converts MMIO access into MMIO hypercall.
- If the GPA maps guest memory, VMM resolves it with guest pages.For both cases, SPTE needs suppress #VE" bit set initially when it is allocated or zapped, therefore non-zero non-present value for SPTE needs to be allowed.
Quoted 5 lines
This change requires to update
FNAME(sync_page)for shadow EPT. "if(!sp->spte[i])" inFNAME(sync_page)means that the spte entry is the initial value. With the introduction ofshadow_nonpresent_valuewhich can be non-zero, it doesn't hold any more. Replace zero check with "!is_shadow_present_pte() && !is_mmio_spte()".I don't think you need to mention above paragraph. It's absolutely unclear how
is_mmio_spte()will be impacted by this patch by reading above paragraphs.From the "execution flow" you mentioned above, you will change MMIO fault from EPT misconfiguration to EPT violation (in order to get #VE), so theoretically you may effectively disable MMIO caching, in which case, if I understand correctly,
is_mmio_spte()always returns false.
Quoted 8 lines
I guess you can just change to check:
if (sp->spte[i] != shadow_nonpresent_value)Anyway, IMO you can just comment in the code.
After all, what is
shadow_nonpresent_value, given you haven't explained what it is?
I'll drop the paragraph and add a comment on the code.
Quoted 82 lines
Quoted 4 lines
TDP MMU uses
REMOVED_SPTE=0x5a0ULLas special constant to indicate the intermediate value to indicate one thread is operating on it and the value should be semi-arbitrary value. For TDX (more correctly to use #VE), the value should include suppress #VE value which isSHADOW_NONPRESENT_VALUE.What is
SHADOW_NONPRESENT_VALUE?Quoted 2 lines
Rename
REMOVED_SPTEto__REMOVED_SPTEand defineREMOVED_SPTEasSHADOW_NONPRESENT_VALUE|REMOVED_SPTEto set suppress #VE bit.Ditto. IMHO you don't even need to mention
REMOVED_SPTEin changelog.Quoted 43 lines
Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/mmu/mmu.c | 55 ++++++++++++++++++++++++++++++---- arch/x86/kvm/mmu/paging_tmpl.h | 3 +- arch/x86/kvm/mmu/spte.c | 5 +++- arch/x86/kvm/mmu/spte.h | 37 ++++++++++++++++++++--- arch/x86/kvm/mmu/tdp_mmu.c | 23 +++++++++----- 5 files changed, 105 insertions(+), 18 deletions(-)arch/x86/kvm/mmu/mmu.c +25
-0@@ -668,6 +668,44 @@ static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) } } +static inline void kvm_init_shadow_page (void *page) +{ +#ifdef CONFIG_X86_64 +int ign; + +WARN_ON_ONCE (shadow_nonpresent_value !=SHADOW_NONPRESENT_VALUE ); + asmvolatile ( +"rep stosq\n\t" + :"=c" (ign),"=D" (page) + :"a" (SHADOW_NONPRESENT_VALUE ),"c" (4096 /8 ),"D" (page) + :"memory" + ); +#else +BUG (); +#endif +} + +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache; +int start, end, i, r; +bool is_tdp_mmu =is_tdp_mmu_enabled (vcpu->kvm); + +if (is_tdp_mmu && shadow_nonpresent_value) + start =kvm_mmu_memory_cache_nr_free_objects (mc);arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 705
Quoted 10 lines
arch/x86/kvm/mmu/mmu.c +10
-0+ + r =kvm_mmu_topup_memory_cache (mc,PT64_ROOT_MAX_LEVEL ); +if (r) +return r; + +if (is_tdp_mmu && shadow_nonpresent_value) { + end =kvm_mmu_memory_cache_nr_free_objects (mc); +for (i = start; i < end; i++) +kvm_init_shadow_page (mc->objects[i]); + }I think you can just extend this to legacy MMU too, but not only TDP MMU.
After all, before this patch, where have you declared that TDX only supports TDP MMU? This is only enforced in:
[PATCH v7 043/102] KVM: x86/mmu: Focibly use TDP MMU for TDX
Which is 7 patches later.
Also,
shadow_nonpresent_valueis only used in couple of places, whileSHADOW_NONPRESENT_VALUEis used directly in more places. Does it make more sense to always useshadow_nonpresent_value, instead of usingSHADOW_NONPRESENT_VALUE?
Quoted 7 lines
Similar to other shadow values, we can provide a function to let caller (VMX/SVM) to decide whether it wants to use non-zero for non-present SPTE.
void kvm_mmu_set_non_present_value(u64 value) { shadow_nonpresent_value = value; }
As you pointed out, those logic is independent of TDP MMU or legacy MMU. So I'll remove is_tdp_mmu.I'll drop shadwo_nonpresent_value and use SHADWO_NONPRESENT_VALUE.
Signature · 1 line
Isaku Yamahata <[email protected]>
Re: [PATCH v7 036/102] KVM: x86/mmu: Allow non-zero value for non-present SPTE
In reply to [email protected]Quoted 143 lines · On Mon, Jun 27, 2022 at 02:53:28PM -0700, [email protected] wrote:
From: Sean Christopherson <[email protected]>
TDX introduced a new ETP, Secure-EPT, in addition to the existing EPT. Secure-EPT maps protected guest memory, which is called private. Since Secure-EPT page tables is also protected, those page tables is also called private. The existing EPT is often called shared EPT to distinguish from Secure-EPT. And also page tables for share EPT is also called shared.
Virtualization Exception, #VE, is a new processor exception in VMX non-root operation. In certain virtualizatoin-related conditions, #VE is injected into guest instead of exiting from guest to VMM so that guest is given a chance to inspect it. One important one is EPT violation. When "ETP-violation #VE" VM-execution is set, "#VE suppress bit" in EPT entry is cleared, #VE is injected instead of EPT violation.
Because guest memory is protected with TDX, VMM can't parse instructions in the guest memory. Instead, MMIO hypercall is used for guest to pass necessary information to VMM.
To make unmodified device driver work, guest TD expects #VE on accessing shared GPA. The #VE handler converts MMIO access into MMIO hypercall with the EPT entry of enabled "#VE" by clearing "suppress #VE" bit. Before VMM enabling #VE, it needs to figure out the given GPA is for MMIO by EPT violation. So the execution flow looks like
- Allocate unused shared EPT entry with suppress #VE bit set.
- EPT violation on that GPA.
- VMM figures out the faulted GPA is for MMIO.
- VMM clears the suppress #VE bit.
- Guest TD gets #VE, and converts MMIO access into MMIO hypercall.
- If the GPA maps guest memory, VMM resolves it with guest pages.For both cases, SPTE needs suppress #VE" bit set initially when it is allocated or zapped, therefore non-zero non-present value for SPTE needs to be allowed.
This change requires to update
FNAME(sync_page)for shadow EPT. "if(!sp->spte[i])" inFNAME(sync_page)means that the spte entry is the initial value. With the introduction ofshadow_nonpresent_valuewhich can be non-zero, it doesn't hold any more. Replace zero check with "!is_shadow_present_pte() && !is_mmio_spte()".When "if (!spt[i])" doesn't hold, but the entry value is
shadow_nonpresent_value, the entry is wrongly synchronized from non-present to non-present with (wrongly) pfn changed and tries to remove rmap wrongly andBUG_ON()is hit.TDP MMU uses
REMOVED_SPTE=0x5a0ULLas special constant to indicate the intermediate value to indicate one thread is operating on it and the value should be semi-arbitrary value. For TDX (more correctly to use #VE), the value should include suppress #VE value which isSHADOW_NONPRESENT_VALUE. RenameREMOVED_SPTEto__REMOVED_SPTEand defineREMOVED_SPTEasSHADOW_NONPRESENT_VALUE|REMOVED_SPTEto set suppress #VE bit.Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/mmu/mmu.c | 55 ++++++++++++++++++++++++++++++---- arch/x86/kvm/mmu/paging_tmpl.h | 3 +- arch/x86/kvm/mmu/spte.c | 5 +++- arch/x86/kvm/mmu/spte.h | 37 ++++++++++++++++++++--- arch/x86/kvm/mmu/tdp_mmu.c | 23 +++++++++----- 5 files changed, 105 insertions(+), 18 deletions(-)arch/x86/kvm/mmu/mmu.c +48
-4@@ -668,6 +668,44 @@ static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) } } +static inline void kvm_init_shadow_page (void *page) +{ +#ifdef CONFIG_X86_64 +int ign; + +WARN_ON_ONCE (shadow_nonpresent_value !=SHADOW_NONPRESENT_VALUE ); + asmvolatile ( +"rep stosq\n\t" + :"=c" (ign),"=D" (page) + :"a" (SHADOW_NONPRESENT_VALUE ),"c" (4096 /8 ),"D" (page) + :"memory" + ); +#else +BUG (); +#endif +} + +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache; +int start, end, i, r; +bool is_tdp_mmu =is_tdp_mmu_enabled (vcpu->kvm); + +if (is_tdp_mmu && shadow_nonpresent_value) + start =kvm_mmu_memory_cache_nr_free_objects (mc); + + r =kvm_mmu_topup_memory_cache (mc,PT64_ROOT_MAX_LEVEL ); +if (r) +return r; + +if (is_tdp_mmu && shadow_nonpresent_value) { + end =kvm_mmu_memory_cache_nr_free_objects (mc); +for (i = start; i < end; i++) +kvm_init_shadow_page (mc->objects[i]); + } +return 0 ; +} +static int mmu_topup_memory_caches (struct kvm_vcpu *vcpu,bool maybe_indirect) {int r;@@ -677,8 +715,7 @@ static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);if (r)return r; - r =kvm_mmu_topup_memory_cache (&vcpu->arch.mmu_shadow_page_cache, -PT64_ROOT_MAX_LEVEL ); + r =mmu_topup_shadow_page_cache (vcpu);if (r)return r;if (maybe_indirect) {@@ -5521,9 +5558,16 @@ void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,* what is used by the kernel for any given HVA, i.e. the kernel's * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust(). */ -if (tdp_enabled) +if (tdp_enabled) { +/* +* For TDP MMU, always set bit 63 for TDX support. See the +* comment on SHADOW_NONPRESENT_VALUE. +*/ +#ifdef CONFIG_X86_64 + shadow_nonpresent_value =SHADOW_NONPRESENT_VALUE ; +#endif max_huge_page_level = tdp_huge_page_level; -else if (boot_cpu_has (X86_FEATURE_GBPAGES )) + }else if (boot_cpu_has (X86_FEATURE_GBPAGES )) max_huge_page_level =PG_LEVEL_1G ;else max_huge_page_level =PG_LEVEL_2M ;
arch/x86/kvm/mmu/mmu.c int kvm_mmu_create(struct kvm_vcpu *vcpu) · line 5702
Quoted 6 lines
arch/x86/kvm/mmu/mmu.c +2
-1@@ -5654,7 +5698,8 @@ int kvm_mmu_create(struct kvm_vcpu *vcpu) vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; - vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; +if (!(is_tdp_mmu_enabled (vcpu->kvm) && shadow_nonpresent_value)) + vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO;
I'm not sure why skip this for TDX, arch.mmu_shadow_page_cache is still used for allocating sp->spt which used to track the S-EPT in kvm for tdx guest. Anything I missed for this ?
Quoted 178 lines
arch/x86/kvm/mmu/mmu.c +0
-0vcpu->arch.mmu = &vcpu->arch.root_mmu; vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;arch/x86/kvm/mmu/paging_tmpl.h +2
-1@@ -1031,7 +1031,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)gpa_t pte_gpa;gfn_t gfn; -if (!sp->spt[i]) +if (!is_shadow_present_pte (sp->spt[i]) && + !is_mmio_spte (sp->spt[i]))continue ; pte_gpa = first_pte_gpa + i *sizeof (pt_element_t);arch/x86/kvm/mmu/spte.c +4
-1@@ -36,6 +36,9 @@ u64 __read_mostly shadow_present_mask;u64 __read_mostly shadow_me_value;u64 __read_mostly shadow_me_mask;u64 __read_mostly shadow_acc_track_mask; +#ifdef CONFIG_X86_64 +u64 __read_mostly shadow_nonpresent_value; +#endif u64 __read_mostly shadow_nonpresent_or_rsvd_mask;u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask;@@ -360,7 +363,7 @@ void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask)* not set any RWX bits. */ if (WARN_ON ((mmio_value & mmio_mask) != mmio_value) || -WARN_ON (mmio_value && (REMOVED_SPTE & mmio_mask) == mmio_value)) +WARN_ON (mmio_value && (__REMOVED_SPTE & mmio_mask) == mmio_value)) mmio_value =0 ;if (!mmio_value)arch/x86/kvm/mmu/spte.h +33
-4@@ -140,6 +140,19 @@ static_assert(MMIO_SPTE_GEN_LOW_BITS == 8 && MMIO_SPTE_GEN_HIGH_BITS == 11);#define MMIO_SPTE_GEN_MASK GENMASK_ULL(MMIO_SPTE_GEN_LOW_BITS + MMIO_SPTE_GEN_HIGH_BITS - 1, 0) +/* +* non-present SPTE value for both VMX and SVM for TDP MMU. +* For SVM NPT, for non-present spte (bit 0 = 0), other bits are ignored. +* For VMX EPT, bit 63 is ignored if #VE is disabled. +* bit 63 is #VE suppress if #VE is enabled. +*/ +#ifdef CONFIG_X86_64 +#define SHADOW_NONPRESENT_VALUE BIT_ULL(63) +static_assert (!(SHADOW_NONPRESENT_VALUE &SPTE_MMU_PRESENT_MASK )); +#else +#define SHADOW_NONPRESENT_VALUE 0ULL +#endif +extern u64 __read_mostly shadow_host_writable_mask;extern u64 __read_mostly shadow_mmu_writable_mask;extern u64 __read_mostly shadow_nx_mask;@@ -154,6 +167,12 @@ extern u64 __read_mostly shadow_present_mask;extern u64 __read_mostly shadow_me_value;extern u64 __read_mostly shadow_me_mask; +#ifdef CONFIG_X86_64 +extern u64 __read_mostly shadow_nonpresent_value; +#else +#define shadow_nonpresent_value 0ULL +#endif +/* * SPTEs in MMUs without A/D bits are marked with SPTE_TDP_AD_DISABLED_MASK; * shadow_acc_track_mask is the set of bits to be cleared in non-accessed @@ -174,9 +193,12 @@ extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask;/* * If a thread running without exclusive control of the MMU lock must perform a -* multi-part operation on an SPTE, it can set the SPTE to REMOVED_SPTE as a +* multi-part operation on an SPTE, it can set the SPTE to __REMOVED_SPTE as a * non-present intermediate value. Other threads which encounter this value -* should not modify the SPTE. +* should not modify the SPTE. For the case that TDX is enabled, +* SHADOW_NONPRESENT_VALUE, which is "suppress #VE" bit set because TDX module +* always enables "EPT violation #VE". The bit is ignored by non-TDX case as +* present bit (bit 0) is cleared. * * Use a semi-arbitrary value that doesn't set RWX bits, i.e. is not-present on * bot AMD and Intel CPUs, and doesn't set PFN bits, i.e. doesn't create a L1TF @@ -184,10 +206,17 @@ extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask;* * Only used by the TDP MMU. */ -#define REMOVED_SPTE 0x5a0ULL +#define __REMOVED_SPTE 0x5a0ULL/* Removed SPTEs must not be misconstrued as shadow present PTEs. */ -static_assert (!(REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); +static_assert (!(__REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); +static_assert (!(__REMOVED_SPTE &SHADOW_NONPRESENT_VALUE )); + +/* +* See above comment around __REMOVED_SPTE. REMOVED_SPTE is the actual +* intermediate value set to the removed SPET. it sets the "suppress #VE" bit. +*/ +#define REMOVED_SPTE (SHADOW_NONPRESENT_VALUE | __REMOVED_SPTE)static inline bool is_removed_spte (u64 spte) {arch/x86/kvm/mmu/tdp_mmu.c +16
-8@@ -692,8 +692,16 @@ static inline int tdp_mmu_zap_spte_atomic(struct kvm *kvm,* overwrite the special removed SPTE value. No bookkeeping is needed * here since the SPTE is going from non-present to non-present. Use * the raw write helper to avoid an unnecessary check on volatile bits. +* +* Set non-present value to SHADOW_NONPRESENT_VALUE, rather than 0. +* It is because when TDX is enabled, TDX module always +* enables "EPT-violation #VE", so KVM needs to set +* "suppress #VE" bit in EPT table entries, in order to get +* real EPT violation, rather than TDVMCALL. KVM sets +* SHADOW_NONPRESENT_VALUE (which sets "suppress #VE" bit) so it +* can be set when EPT table entries are zapped. */ -__kvm_tdp_mmu_write_spte (iter->sptep,0 ); +__kvm_tdp_mmu_write_spte (iter->sptep,SHADOW_NONPRESENT_VALUE );return 0 ; }@@ -870,8 +878,8 @@ static void __tdp_mmu_zap_root(struct kvm *kvm, struct kvm_mmu_page *root,continue ;if (!shared) -tdp_mmu_set_spte (kvm, &iter,0 ); -else if (tdp_mmu_set_spte_atomic (kvm, &iter,0 )) +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); +else if (tdp_mmu_set_spte_atomic (kvm, &iter,SHADOW_NONPRESENT_VALUE )) goto retry; } }@@ -927,8 +935,9 @@ bool kvm_tdp_mmu_zap_sp(struct kvm *kvm, struct kvm_mmu_page *sp)if (WARN_ON_ONCE (!is_shadow_present_pte (old_spte)))return false; -__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte,0 , - sp->gfn, sp->role.level +1 , true, true); +__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte, +SHADOW_NONPRESENT_VALUE , sp->gfn, sp->role.level +1 , + true, true);return true; }@@ -965,7 +974,7 @@ static bool tdp_mmu_zap_leafs(struct kvm *kvm, struct kvm_mmu_page *root, !is_last_spte(iter.old_spte, iter.level))continue ; -tdp_mmu_set_spte (kvm, &iter,0 ); +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); flush = true; }@@ -1330,7 +1339,7 @@ static bool set_spte_gfn(struct kvm *kvm, struct tdp_iter *iter,* invariant that the PFN of a present * leaf SPTE can never change. * See __handle_changed_spte(). */ -tdp_mmu_set_spte (kvm, iter,0 ); +tdp_mmu_set_spte (kvm, iter,SHADOW_NONPRESENT_VALUE );if (!pte_write (range->pte)) { new_spte = kvm_mmu_changed_pte_notifier_make_spte(iter->old_spte, --2.25.1
Sean Christopherson
maintainerRe: [PATCH v7 036/102] KVM: x86/mmu: Allow non-zero value for non-present SPTE
Please trim replies.
Quoted 9 lines · Yuan Yao
Quoted 8 lines · On Mon, Jun 27, 2022 at 02:53:28PM -0700, [email protected] wrote:
arch/x86/kvm/mmu/mmu.c +0
-0@@ -668,6 +668,44 @@ static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) } }
Quoted 8 lines
arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 678
Quoted 8 lines
arch/x86/kvm/mmu/mmu.c +8
-0+static inline void kvm_init_shadow_page (void *page) +{ +#ifdef CONFIG_X86_64 +int ign; + +WARN_ON_ONCE (shadow_nonpresent_value !=SHADOW_NONPRESENT_VALUE ); + asmvolatile ( + "rep stosq\n\t"
I have a slight preference for:
asm volatile ("rep stosq\n\t"
<align here>
);so that searching for "asm" or "asm volatile" shows the "rep stosq" in the result without needed to capture the next line.
Quoted 7 lines
arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 685
Quoted 7 lines
arch/x86/kvm/mmu/mmu.c +7
-0+ : "=c"(ign), "=D"(page) + : "a"(SHADOW_NONPRESENT_VALUE), "c"(4096/8), "D"(page) + : "memory" + ); +#else +BUG (); +#endif
Rather than put the #ifdef here, split mmu_topup_shadow_page_cache() on 64-bit versus 32-bit. Then this BUG() goes away and we don't get slapped on the wrist by Linus :-)
Quoted 6 lines
Quoted 6 lines
arch/x86/kvm/mmu/mmu.c +6
-0+} + +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache; +int start, end, i, r;
Quoted 8 lines
arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 699
Quoted 8 lines
arch/x86/kvm/mmu/mmu.c +8
-0+bool is_tdp_mmu =is_tdp_mmu_enabled (vcpu->kvm); + +if (is_tdp_mmu && shadow_nonpresent_value) + start =kvm_mmu_memory_cache_nr_free_objects (mc); + + r =kvm_mmu_topup_memory_cache (mc,PT64_ROOT_MAX_LEVEL ); +if (r) +return r;
Bailing immediately is wrong. If kvm_mmu_topup_memory_cache() fails after allocating at least one page, then KVM needs to initialize those pages, otherwise it will leave uninitialized pages in the cache. If userspace frees up memory in response to the -ENOMEM and resumes the vCPU, KVM will consume uninitialized data.
Quoted 2 lines
arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 701
Quoted 2 lines
arch/x86/kvm/mmu/mmu.c +2
-0+ +if (is_tdp_mmu && shadow_nonpresent_value) {
So I'm pretty sure I effectively suggested keeping shadow_nonpresent_value, but seeing it in code, I really don't like it. It's an unnecessary check on every SPT allocation, and it's misleading because it suggests shadow_nonpresent_value might be zero when the TDP MMU is enabled.
My vote is to drop shadow_nonpresent_value and then rename kvm_init_shadow_page() to make it clear that it's specific to the TDP MMU.
So this? Completely untested.
#ifdef CONFIG_X86_64
static void kvm_init_tdp_mmu_shadow_page(void *page)
{
int ign;
asm volatile ("rep stosq\n\t"
: "=c"(ign), "=D"(page)
: "a"(SHADOW_NONPRESENT_VALUE), "c"(4096/8), "D"(page)
: "memory"
);
}static int mmu_topup_shadow_page_cache(struct kvm_vcpu *vcpu)
{
struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache;
bool is_tdp_mmu = is_tdp_mmu_enabled(vcpu->kvm);
int start, end, i, r;
if (is_tdp_mmu)
start = kvm_mmu_memory_cache_nr_free_objects(mc);
r = kvm_mmu_topup_memory_cache(mc, PT64_ROOT_MAX_LEVEL);
/*
* Note, topup may have allocated objects even if it failed to allocate
* the minimum number of objects required to make forward progress _at
* this time_. Initialize newly allocated objects even on failure, as
* userspace can free memory and rerun the vCPU in response to -ENOMEM.
*/
if (is_tdp_mmu) {
end = kvm_mmu_memory_cache_nr_free_objects(mc);
for (i = start; i < end; i++)
kvm_init_tdp_mmu_shadow_page(mc->objects[i]);
}
return r;
}
#else
static int mmu_topup_shadow_page_cache(struct kvm_vcpu *vcpu)
{
return kvm_mmu_topup_memory_cache(vcpu->arch.mmu_shadow_page_cache,
PT64_ROOT_MAX_LEVEL);
}#endif /* CONFIG_X86_64 */
Quoted 7 lines
Quoted 7 lines
arch/x86/kvm/mmu/mmu.c +7
-0+ end =kvm_mmu_memory_cache_nr_free_objects (mc); +for (i = start; i < end; i++) +kvm_init_shadow_page (mc->objects[i]); + } +return 0 ; +} +
...
Quoted 11 lines
arch/x86/kvm/mmu/mmu.c int kvm_mmu_create(struct kvm_vcpu *vcpu) · line 5702
Quoted 7 lines
arch/x86/kvm/mmu/mmu.c +2
-1@@ -5654,7 +5698,8 @@ int kvm_mmu_create(struct kvm_vcpu *vcpu) vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; - vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; +if (!(is_tdp_mmu_enabled (vcpu->kvm) && shadow_nonpresent_value)) + vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO;I'm not sure why skip this for TDX, arch.mmu_shadow_page_cache is still used for allocating
sp->sptwhich used to track the S-EPT in kvm for tdx guest. Anything I missed for this ?
Shared EPTEs need to be initialized with SUPPRESS_VE=1, otherwise not-present EPT violations would be reflected into the guest by hardware as #VE exceptions. This is handled by initializing page allocations via kvm_init_shadow_page() during cache topup if shadow_nonpresent_value is non-zero. In that case, telling the page allocation to zero-initialize the page would be wasted effort.
The initialization is harmless for S-EPT entries because KVM's copy of the S-EPT isn't consumed by hardware, and because under the hood S-EPT entries should never #VE (I forget if this is enforced by hardware or if the TDX module sets SUPPRESS_VE).
Re: [PATCH v7 036/102] KVM: x86/mmu: Allow non-zero value for non-present SPTE
Quoted 147 lines · Sean Christopherson
Please trim replies.
Quoted 9 lines · Yuan Yao
Quoted 8 lines · On Mon, Jun 27, 2022 at 02:53:28PM -0700, [email protected] wrote:
arch/x86/kvm/mmu/mmu.c +0
-0@@ -668,6 +668,44 @@ static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) } }Quoted 8 lines
arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 678
Quoted 8 lines
arch/x86/kvm/mmu/mmu.c +8
-0+static inline void kvm_init_shadow_page (void *page) +{ +#ifdef CONFIG_X86_64 +int ign; + +WARN_ON_ONCE (shadow_nonpresent_value !=SHADOW_NONPRESENT_VALUE ); + asmvolatile ( + "rep stosq\n\t"I have a slight preference for:
asm volatile ("rep stosq\n\t" <align here> );so that searching for "asm" or "asm volatile" shows the "rep stosq" in the result without needed to capture the next line.
Quoted 7 lines
arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 685
Quoted 7 lines
arch/x86/kvm/mmu/mmu.c +7
-0+ : "=c"(ign), "=D"(page) + : "a"(SHADOW_NONPRESENT_VALUE), "c"(4096/8), "D"(page) + : "memory" + ); +#else +BUG (); +#endif Rather than put the #ifdef here, split
mmu_topup_shadow_page_cache()on 64-bit versus 32-bit. Then thisBUG()goes away and we don't get slapped on the wrist by Linus :-)Quoted 6 lines
Quoted 6 lines
arch/x86/kvm/mmu/mmu.c +6
-0+} + +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache; +int start, end, i, r;Quoted 8 lines
arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 699
Quoted 8 lines
arch/x86/kvm/mmu/mmu.c +8
-0+bool is_tdp_mmu =is_tdp_mmu_enabled (vcpu->kvm); + +if (is_tdp_mmu && shadow_nonpresent_value) + start =kvm_mmu_memory_cache_nr_free_objects (mc); + + r =kvm_mmu_topup_memory_cache (mc,PT64_ROOT_MAX_LEVEL ); +if (r) +return r;Bailing immediately is wrong. If
kvm_mmu_topup_memory_cache()fails after allocating at least one page, then KVM needs to initialize those pages, otherwise it will leave uninitialized pages in the cache. If userspace frees up memory in response to the-ENOMEMand resumes the vCPU, KVM will consume uninitialized data.Quoted 2 lines
arch/x86/kvm/mmu/mmu.c static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) · line 701
Quoted 2 lines
arch/x86/kvm/mmu/mmu.c +2
-0+ +if (is_tdp_mmu && shadow_nonpresent_value) {So I'm pretty sure I effectively suggested keeping
shadow_nonpresent_value, but seeing it in code, I really don't like it. It's an unnecessary check on every SPT allocation, and it's misleading because it suggestsshadow_nonpresent_valuemight be zero when the TDP MMU is enabled.My vote is to drop
shadow_nonpresent_valueand then renamekvm_init_shadow_page()to make it clear that it's specific to the TDP MMU.So this? Completely untested.
#ifdef
CONFIG_X86_64
static voidkvm_init_tdp_mmu_shadow_page(void *page){ int ign; asm volatile ("rep stosq\n\t" : "=c"(ign), "=D"(page) : "a"(SHADOW_NONPRESENT_VALUE), "c"(4096/8), "D"(page) : "memory" ); }static int
mmu_topup_shadow_page_cache(struct kvm_vcpu *vcpu){ struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache; bool is_tdp_mmu = is_tdp_mmu_enabled(vcpu->kvm); int start, end, i, r; if (is_tdp_mmu) start = kvm_mmu_memory_cache_nr_free_objects(mc); r = kvm_mmu_topup_memory_cache(mc, PT64_ROOT_MAX_LEVEL); /* * Note, topup may have allocated objects even if it failed to allocate * the minimum number of objects required to make forward progress _at * this time_. Initialize newly allocated objects even on failure, as * userspace can free memory and rerun the vCPU in response to -ENOMEM. */ if (is_tdp_mmu) { end = kvm_mmu_memory_cache_nr_free_objects(mc); for (i = start; i < end; i++) kvm_init_tdp_mmu_shadow_page(mc->objects[i]); } return r; } #else static int mmu_topup_shadow_page_cache(struct kvm_vcpu *vcpu) { return kvm_mmu_topup_memory_cache(vcpu->arch.mmu_shadow_page_cache, PT64_ROOT_MAX_LEVEL); }#endif /*
CONFIG_X86_64*/Quoted 7 lines
Quoted 7 lines
arch/x86/kvm/mmu/mmu.c +7
-0+ end =kvm_mmu_memory_cache_nr_free_objects (mc); +for (i = start; i < end; i++) +kvm_init_shadow_page (mc->objects[i]); + } +return 0 ; +} +...
Quoted 11 lines
arch/x86/kvm/mmu/mmu.c int kvm_mmu_create(struct kvm_vcpu *vcpu) · line 5702
Quoted 7 lines
arch/x86/kvm/mmu/mmu.c +2
-1@@ -5654,7 +5698,8 @@ int kvm_mmu_create(struct kvm_vcpu *vcpu) vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; - vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; +if (!(is_tdp_mmu_enabled (vcpu->kvm) && shadow_nonpresent_value)) + vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO;I'm not sure why skip this for TDX, arch.mmu_shadow_page_cache is still used for allocating
sp->sptwhich used to track the S-EPT in kvm for tdx guest. Anything I missed for this ?Shared EPTEs need to be initialized with SUPPRESS_VE=1, otherwise not-present EPT violations would be reflected into the guest by hardware as #VE exceptions. This is handled by initializing page allocations via
kvm_init_shadow_page()during cache topup ifshadow_nonpresent_valueis non-zero. In that case, telling the page allocation to zero-initialize the page would be wasted effort.
Quoted 3 lines
The initialization is harmless for S-EPT entries because KVM's copy of the S-EPT isn't consumed by hardware, and because under the hood S-EPT entries should never #VE (I forget if this is enforced by hardware or if the TDX module sets
SUPPRESS_VE).
Ah I see, you're right, thanks for the explanation! I think with changes you suggested above the __GFP_ZERO can be removed from mmu_shadow_page_cache for VMs which is_tdp_mmu_enabled() is true:
arch/x86/kvm/mmu/mmu.c +2 -2
@@ -6483,8 +6483,8 @@ int kvm_mmu_create(struct kvm_vcpu *vcpu) vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; -if (!(tdp_enabled && shadow_nonpresent_value)) - vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; + if (!(is_tdp_mmu_enabled(vcpu->kvm)) + vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; vcpu->arch.mmu = &vcpu->arch.root_mmu; vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
Sean Christopherson
maintainerRe: [PATCH v7 036/102] KVM: x86/mmu: Allow non-zero value for non-present SPTE
Quoted 12 lines · Yuan Yao
Quoted 11 lines · Sean Christopherson
Please trim replies.
Quoted 3 lines
I'm not sure why skip this for TDX, arch.mmu_shadow_page_cache is still used for allocating
sp->sptwhich used to track the S-EPT in kvm for tdx guest. Anything I missed for this ?Shared EPTEs need to be initialized with SUPPRESS_VE=1, otherwise not-present EPT violations would be reflected into the guest by hardware as #VE exceptions. This is handled by initializing page allocations via
kvm_init_shadow_page()during cache topup ifshadow_nonpresent_valueis non-zero. In that case, telling the page allocation to zero-initialize the page would be wasted effort.
Quoted 7 lines
Quoted 3 lines
The initialization is harmless for S-EPT entries because KVM's copy of the S-EPT isn't consumed by hardware, and because under the hood S-EPT entries should never #VE (I forget if this is enforced by hardware or if the TDX module sets
SUPPRESS_VE).Ah I see, you're right, thanks for the explanation! I think with changes you suggested above the
__GFP_ZEROcan be removed frommmu_shadow_page_cachefor VMs whichis_tdp_mmu_enabled()is true:
Yep.
Quoted 15 lines
arch/x86/kvm/mmu/mmu.c +2
-2@@ -6483,8 +6483,8 @@ int kvm_mmu_create(struct kvm_vcpu *vcpu) vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; -if (!(tdp_enabled && shadow_nonpresent_value)) - vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; + if (!(is_tdp_mmu_enabled(vcpu->kvm)) + vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; vcpu->arch.mmu = &vcpu->arch.root_mmu; vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
Re: [PATCH v7 036/102] KVM: x86/mmu: Allow non-zero value for non-present SPTE
In reply to [email protected]Thanks for review. Now here is the updated version.
From f1ee540d62ba13511b2c7d3db7662e32bd263e48 Mon Sep 17 00:00:00 2001
Message-Id: <f1ee540d62ba13511b2c7d3db7662e32bd263e48.1657823906.git.isaku.yamahata@intel.com>
In-Reply-To: <3941849bf08a55cfbbe69b222f0fd0dac7c5ee53.1657823906.git.isaku.yamahata@intel.com>
References: <3941849bf08a55cfbbe69b222f0fd0dac7c5ee53.1657823906.git.isaku.yamahata@intel.com>
From: Sean Christopherson <[email protected]>
Date: Mon, 29 Jul 2019 19:23:46 -0700
Subject: [PATCH 036/304] KVM: x86/mmu: Allow non-zero value for non-present
SPTE
TDX introduced a new ETP, Secure-EPT, in addition to the existing EPT. Secure-EPT maps protected guest memory, which is called private. Since Secure-EPT page tables is also protected, those page tables is also called private. The existing EPT is often called shared EPT to distinguish from Secure-EPT. And also page tables for shared EPT is also called shared.
TDX module enables #VE injection by setting "EPT-violation #VE" in secondary processor-based VM-execution controls of TD VMCS. It also sets "suppress #VE" bit in Secure-EPT so that EPT violation on Secure-EPT causes exit to VMM.
Because guest memory is protected with TDX, VMM can't parse instructions in the guest memory. Instead, MMIO hypercall is used for guest TD to pass necessary information to VMM. To make unmodified device driver work, guest TD expects #VE on accessing shared GPA for MMIO. The #VE handler of guest TD converts MMIO access into MMIO hypercall. To trigger #VE in guest TD, VMM needs to clear "suppress #VE" bit in shared EPT entry that corresponds to MMIO address.
So the execution flow related for MMIO is as follows
- TDX module sets "EPT-violation #VE" in secondary processor-based VM-execution controls of TD VMCS.
- Allocate page for shared EPT PML4E page. Shared EPT entries are initialized with suppress #VE bit set. Update the EPTP pointer.
- TD accesses a GPA for MMIO to trigger EPT violation. It exits to VMM with EPT violation due to suppress #VE bit of EPT entries of PML4E page.
- VMM figures out the faulted GPA is for MMIO
- start shared EPT page table walk.
- Allocate non-leaf EPT pages for the shared EPT.
- Allocate leaf EPT page for the shared EPT and initialize EPT entries with suppress #VE bit set.
- VMM clears the suppress #VE bit for faulted GPA for MMIO. Please notice the leaf EPT page has 512 SPTE and other 511 SPTE entries need to keep "suppress #VE" bit set because GPAs for those SPTEs are not known to be MMIO. (It requires further lookups.)
If GPA is a guest page, link the guest page from the leaf SPTE entry.
- resume TD vcpu.
- Guest TD gets #VE, and converts MMIO access into MMIO hypercall.
- If the GPA maps guest memory, VMM resolves it with guest pages.
SPTEs for shared EPT need suppress #VE" bit set initially when it is allocated or zapped, therefore non-zero non-present value for SPTE needs to be allowed.
TDP MMU uses REMOVED_SPTE = 0x5a0ULL as special constant to indicate the intermediate value to indicate one thread is operating on it and the value should be semi-arbitrary value. For TDX (more exactly to use #VE), the value should include suppress #VE bit. Rename REMOVED_SPTE to __REMOVED_SPTE and define REMOVED_SPTE as (REMOVED_SPTE | "suppress #VE") bit.
For simplicity, "suppress #VE" bit is set unconditionally for X86_64 for non-present SPTE. Because "suppress #VE" bit (bit position of 63) for non-present SPTE is ignored for non-TD case (AMD CPUs or Intel VMX case with "EPT-violation #VE" cleared), the functionality shouldn't change.
--- arch/x86/kvm/mmu/mmu.c | 71 ++++++++++++++++++++++++++++++++-- arch/x86/kvm/mmu/paging_tmpl.h | 3 +- arch/x86/kvm/mmu/spte.c | 5 ++- arch/x86/kvm/mmu/spte.h | 28 +++++++++++++- arch/x86/kvm/mmu/tdp_mmu.c | 23 +++++++---- 5 files changed, 116 insertions(+), 14 deletions(-)
arch/x86/kvm/mmu/mmu.c +68 -3
@@ -668,6 +668,55 @@ static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) } } +#ifdef CONFIG_X86_64 +static inline void kvm_init_shadow_page (void *page) +{ +int ign; + +/* +* AMD: "suppress #VE" bit is ignored +* Intel non-TD(VMX): "suppress #VE" bit is ignored because +* EPT_VIOLATION_VE isn't set. +* guest TD: TDX module sets EPT_VIOLATION_VE +* conventional SEPT: "suppress #VE" bit must be set to get EPT violation +* private SEPT: "suppress #VE" bit is ignored. CPU doesn't walk it +* +* For simplicity, unconditionally initialize SPET to set "suppress #VE". +*/ + asmvolatile ("rep stosq\n\t" + :"=c" (ign),"=D" (page) + :"a" (SHADOW_NONPRESENT_VALUE ),"c" (4096 /8 ),"D" (page) + :"memory" + ); +} + +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache; +int start, end, i, r; + + start =kvm_mmu_memory_cache_nr_free_objects (mc); + r =kvm_mmu_topup_memory_cache (mc,PT64_ROOT_MAX_LEVEL ); + +/* +* Note, topup may have allocated objects even if it failed to allocate +* the minimum number of objects required to make forward progress _at +* this time_. Initialize newly allocated objects even on failure, as +* userspace can free memory and rerun the vCPU in response to -ENOMEM. +*/ + end =kvm_mmu_memory_cache_nr_free_objects (mc); +for (i = start; i < end; i++) +kvm_init_shadow_page (mc->objects[i]); +return r; +} +#else +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +return kvm_mmu_topup_memory_cache (vcpu->arch.mmu_shadow_page_cache, +PT64_ROOT_MAX_LEVEL ); +} +#endif /* CONFIG_X86_64 */ +static int mmu_topup_memory_caches (struct kvm_vcpu *vcpu,bool maybe_indirect) {int r;
@@ -677,8 +726,7 @@ static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);if (r)return r; - r =kvm_mmu_topup_memory_cache (&vcpu->arch.mmu_shadow_page_cache, -PT64_ROOT_MAX_LEVEL ); + r =mmu_topup_shadow_page_cache (vcpu);if (r)return r;if (maybe_indirect) {
@@ -5654,7 +5702,24 @@ int kvm_mmu_create(struct kvm_vcpu *vcpu) vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; - vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; +/* +* When X86_64, initial SEPT entries are initialized with +* SHADOW_NONPRESENT_VALUE. Otherwise zeroed. See +* mmu_topup_shadow_page_cache(). +* +* Shared EPTEs need to be initialized with SUPPRESS_VE=1, otherwise +* not-present EPT violations would be reflected into the guest by +* hardware as #VE exceptions. This is handled by initializing page +* allocations via kvm_init_shadow_page() during cache topup. +* In that case, telling the page allocation to zero-initialize the page +* would be wasted effort. +* +* The initialization is harmless for S-EPT entries because KVM's copy +* of the S-EPT isn't consumed by hardware, and because under the hood +* S-EPT entries should never #VE. +*/ +if (!IS_ENABLED (X86_64 )) + vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; vcpu->arch.mmu = &vcpu->arch.root_mmu; vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
arch/x86/kvm/mmu/paging_tmpl.h +2 -1
@@ -1031,7 +1031,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)gpa_t pte_gpa;gfn_t gfn; -if (!sp->spt[i]) +/* spt[i] has initial value of shadow page table allocation */ +if (sp->spt[i] !=SHADOW_NONPRESENT_VALUE )continue ; pte_gpa = first_pte_gpa + i *sizeof (pt_element_t);
arch/x86/kvm/mmu/spte.c +4 -1
@@ -36,6 +36,9 @@ u64 __read_mostly shadow_present_mask;u64 __read_mostly shadow_me_value;u64 __read_mostly shadow_me_mask;u64 __read_mostly shadow_acc_track_mask; +#ifdef CONFIG_X86_64 +u64 __read_mostly shadow_nonpresent_value; +#endif u64 __read_mostly shadow_nonpresent_or_rsvd_mask;u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask;
@@ -360,7 +363,7 @@ void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask)* not set any RWX bits. */ if (WARN_ON ((mmio_value & mmio_mask) != mmio_value) || -WARN_ON (mmio_value && (REMOVED_SPTE & mmio_mask) == mmio_value)) +WARN_ON (mmio_value && (__REMOVED_SPTE & mmio_mask) == mmio_value)) mmio_value =0 ;if (!mmio_value)
arch/x86/kvm/mmu/spte.h +26 -2
@@ -140,6 +140,19 @@ static_assert(MMIO_SPTE_GEN_LOW_BITS == 8 && MMIO_SPTE_GEN_HIGH_BITS == 11);#define MMIO_SPTE_GEN_MASK GENMASK_ULL(MMIO_SPTE_GEN_LOW_BITS + MMIO_SPTE_GEN_HIGH_BITS - 1, 0) +/* +* non-present SPTE value for both VMX and SVM for TDP MMU. +* For SVM NPT, for non-present spte (bit 0 = 0), other bits are ignored. +* For VMX EPT, bit 63 is ignored if #VE is disabled. +* bit 63 is #VE suppress if #VE is enabled. +*/ +#ifdef CONFIG_X86_64 +#define SHADOW_NONPRESENT_VALUE BIT_ULL(63) +static_assert (!(SHADOW_NONPRESENT_VALUE &SPTE_MMU_PRESENT_MASK )); +#else +#define SHADOW_NONPRESENT_VALUE 0ULL +#endif +extern u64 __read_mostly shadow_host_writable_mask;extern u64 __read_mostly shadow_mmu_writable_mask;extern u64 __read_mostly shadow_nx_mask;
@@ -178,16 +191,27 @@ extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask;* non-present intermediate value. Other threads which encounter this value * should not modify the SPTE. * +* For X86_64 case, SHADOW_NONPRESENT_VALUE, "suppress #VE" bit, is set because +* "EPT violation #VE" in the secondary VM execution control may be enabled. +* Because TDX module sets "EPT violation #VE" for TD, "suppress #VE" bit for +* the conventional EPT needs to be set. +* * Use a semi-arbitrary value that doesn't set RWX bits, i.e. is not-present on * bot AMD and Intel CPUs, and doesn't set PFN bits, i.e. doesn't create a L1TF * vulnerability. Use only low bits to avoid 64-bit immediates. * * Only used by the TDP MMU. */ -#define REMOVED_SPTE 0x5a0ULL +#define __REMOVED_SPTE 0x5a0ULL/* Removed SPTEs must not be misconstrued as shadow present PTEs. */ -static_assert (!(REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); +static_assert (!(__REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); + +/* +* See above comment around __REMOVED_SPTE. REMOVED_SPTE is the actual +* intermediate value set to the removed SPET. it sets the "suppress #VE" bit. +*/ +#define REMOVED_SPTE (SHADOW_NONPRESENT_VALUE | __REMOVED_SPTE)static inline bool is_removed_spte (u64 spte) {
arch/x86/kvm/mmu/tdp_mmu.c +16 -7
@@ -692,8 +692,16 @@ static inline int tdp_mmu_zap_spte_atomic(struct kvm *kvm,* overwrite the special removed SPTE value. No bookkeeping is needed * here since the SPTE is going from non-present to non-present. Use * the raw write helper to avoid an unnecessary check on volatile bits. +* +* Set non-present value to SHADOW_NONPRESENT_VALUE, rather than 0. +* It is because when TDX is enabled, TDX module always +* enables "EPT-violation #VE", so KVM needs to set +* "suppress #VE" bit in EPT table entries, in order to get +* real EPT violation, rather than TDVMCALL. KVM sets +* SHADOW_NONPRESENT_VALUE (which sets "suppress #VE" bit) so it +* can be set when EPT table entries are zapped. */ -__kvm_tdp_mmu_write_spte (iter->sptep,0 ); +__kvm_tdp_mmu_write_spte (iter->sptep,SHADOW_NONPRESENT_VALUE );return 0 ; }
@@ -870,8 +878,8 @@ static void __tdp_mmu_zap_root(struct kvm *kvm, struct kvm_mmu_page *root,continue ;if (!shared) -tdp_mmu_set_spte (kvm, &iter,0 ); -else if (tdp_mmu_set_spte_atomic (kvm, &iter,0 )) +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); +else if (tdp_mmu_set_spte_atomic (kvm, &iter,SHADOW_NONPRESENT_VALUE )) goto retry; } }
@@ -927,8 +935,9 @@ bool kvm_tdp_mmu_zap_sp(struct kvm *kvm, struct kvm_mmu_page *sp)if (WARN_ON_ONCE (!is_shadow_present_pte (old_spte)))return false; -__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte,0 , - sp->gfn, sp->role.level +1 , true, true); +__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte, +SHADOW_NONPRESENT_VALUE , sp->gfn, sp->role.level +1 , + true, true);return true; }
@@ -965,7 +974,7 @@ static bool tdp_mmu_zap_leafs(struct kvm *kvm, struct kvm_mmu_page *root, !is_last_spte(iter.old_spte, iter.level))continue ; -tdp_mmu_set_spte (kvm, &iter,0 ); +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); flush = true; }
@@ -1330,7 +1339,7 @@ static bool set_spte_gfn(struct kvm *kvm, struct tdp_iter *iter,* invariant that the PFN of a present * leaf SPTE can never change. * See __handle_changed_spte(). */ -tdp_mmu_set_spte (kvm, iter,0 ); +tdp_mmu_set_spte (kvm, iter,SHADOW_NONPRESENT_VALUE );if (!pte_write (range->pte)) { new_spte = kvm_mmu_changed_pte_notifier_make_spte(iter->old_spte,
Signature · 6 lines
2.25.1 -- Isaku Yamahata <[email protected]>
Re: [PATCH v7 036/102] KVM: x86/mmu: Allow non-zero value for non-present SPTE
Quoted 11 lines · Isaku Yamahata
Thanks for review. Now here is the updated version.
From
f1ee540d62ba13511b2c7d3db7662e32bd263e48Mon Sep 17 00:00:00 2001
Message-Id: <f1ee540d62ba13511b2c7d3db7662e32bd263e48.1657823906.git.isaku.yamahata@intel.com>
In-Reply-To: <3941849bf08a55cfbbe69b222f0fd0dac7c5ee53.1657823906.git.isaku.yamahata@intel.com>
References: <3941849bf08a55cfbbe69b222f0fd0dac7c5ee53.1657823906.git.isaku.yamahata@intel.com>
From: Sean Christopherson <[email protected]>
Date: Mon, 29 Jul 2019 19:23:46 -0700
Subject: [PATCH 036/304] KVM: x86/mmu: Allow non-zero value for non-present
SPTE
Quoted 5 lines
TDX introduced a new ETP, Secure-EPT, in addition to the existing EPT. Secure-EPT maps protected guest memory, which is called private. Since Secure-EPT page tables is also protected, those page tables is also called private. The existing EPT is often called shared EPT to distinguish from Secure-EPT. And also page tables for shared EPT is also called shared.
AFAICT secure-EPT isn't quite directly related here, so I don't think you should spend the paragraph on it. The first paragraph should state the problem and catch reviewer's eyeball.
Quoted 27 lines
TDX module enables #VE injection by setting "EPT-violation #VE" in secondary processor-based VM-execution controls of TD VMCS. It also sets "suppress #VE" bit in Secure-EPT so that EPT violation on Secure-EPT causes exit to VMM.
Because guest memory is protected with TDX, VMM can't parse instructions in the guest memory. Instead, MMIO hypercall is used for guest TD to pass necessary information to VMM. To make unmodified device driver work, guest TD expects #VE on accessing shared GPA for MMIO. The #VE handler of guest TD converts MMIO access into MMIO hypercall. To trigger #VE in guest TD, VMM needs to clear "suppress #VE" bit in shared EPT entry that corresponds to MMIO address.
So the execution flow related for MMIO is as follows
- TDX module sets "EPT-violation #VE" in secondary processor-based VM-execution controls of TD VMCS.
- Allocate page for shared EPT PML4E page. Shared EPT entries are initialized with suppress #VE bit set. Update the EPTP pointer.
- TD accesses a GPA for MMIO to trigger EPT violation. It exits to VMM with EPT violation due to suppress #VE bit of EPT entries of PML4E page.
- VMM figures out the faulted GPA is for MMIO
- start shared EPT page table walk.
- Allocate non-leaf EPT pages for the shared EPT.
- Allocate leaf EPT page for the shared EPT and initialize EPT entries with suppress #VE bit set.
Quoted 8 lines
- VMM clears the suppress #VE bit for faulted GPA for MMIO. Please notice the leaf EPT page has 512 SPTE and other 511 SPTE entries need to keep "suppress #VE" bit set because GPAs for those SPTEs are not known to be MMIO. (It requires further lookups.)
If GPA is a guest page, link the guest page from the leaf SPTE entry.
- resume TD vcpu.
- Guest TD gets #VE, and converts MMIO access into MMIO hypercall.
- If the GPA maps guest memory, VMM resolves it with guest pages.
Too many details IMHO.
Also, you forgot to mention the non-zero value for non-present SPTE is not just for MMIO, but also for shared memory.
How about below?
For TD guest, the current way to emulate MMIO doesn't work any more, as KVM is not able to access the private memory of TD guest and do the emulation. Instead, TD guest expects to receive #VE when it accesses the MMIO and then it can explicitly makes hypercall to KVM to get the expected information.
To achieve this, the TDX module always enables "EPT-violation #VE" in the VMCS control. And accordingly, KVM needs to configure the MMIO spte to trigger EPT violation (instead of misconfiguration) and at the same time, also clear the "suppress #VE" bit so the TD guest can get the #VE instead of causing actual EPT violation to KVM.
In order for KVM to be able to have chance to set up the correct SPTE for MMIO for TD guest, the default non-present SPTE must have the "suppress #VE" bit set so KVM can get a real EPT violation for the first time when TD guest accesses the MMIO.
Also, when TD guest accesses the actual shared memory, it should continue to trigger EPT violation to the KVM instead of receiving the #VE (the TDX module guarantees KVM will receive EPT violation for private memory access). This means for the shared memory, the SPTE also must have the "suppress #VE" bit set for the non-present SPTE.
Add support to allow a non-zero value for the non-present SPTE (i.e. when the page table is firstly allocated, and when the SPTE is zapped) to allow setting "suppress #VE" bit for the non-present SPTE.
Introduce a new macro SHADOW_NONPRESENT_VALUE to be the "suppress #VE" bit. Unconditionally set the "suppress #VE" bit (which is bit 63) for both AMD and Intel as: 1) AMD hardware doesn't use this bit; 2) for normal VMX guest, KVM never enables the "EPT-violation #VE" in VMCS control and "suppress #VE" bit is ignored by hardware.
(if you want to set SHADOW_NONPRESENT_VALUE only for TDP MMU then continue to describe, but I don't see this is done in your below patch)
Quoted 11 lines
SPTEs for shared EPT need suppress #VE" bit set initially when it is allocated or zapped, therefore non-zero non-present value for SPTE needs to be allowed.
TDP MMU uses
REMOVED_SPTE=0x5a0ULLas special constant to indicate the intermediate value to indicate one thread is operating on it and the value should be semi-arbitrary value. For TDX (more exactly to use #VE), the value should include suppress #VE bit. RenameREMOVED_SPTEto__REMOVED_SPTEand defineREMOVED_SPTEas (REMOVED_SPTE| "suppress #VE") bit.
IMHO REMOVED_SPTE is implementation details so it's OK to not mention in changelog.
Quoted 212 lines
For simplicity, "suppress #VE" bit is set unconditionally for
X86_64for non-present SPTE. Because "suppress #VE" bit (bit position of 63) for non-present SPTE is ignored for non-TD case (AMD CPUs or Intel VMX case with "EPT-violation #VE" cleared), the functionality shouldn't change.Signed-off-by Sean Christopherson <[email protected]>Signed-off-by Isaku Yamahata <[email protected]>--- arch/x86/kvm/mmu/mmu.c | 71 ++++++++++++++++++++++++++++++++-- arch/x86/kvm/mmu/paging_tmpl.h | 3 +- arch/x86/kvm/mmu/spte.c | 5 ++- arch/x86/kvm/mmu/spte.h | 28 +++++++++++++- arch/x86/kvm/mmu/tdp_mmu.c | 23 +++++++---- 5 files changed, 116 insertions(+), 14 deletions(-)arch/x86/kvm/mmu/mmu.c +68
-3@@ -668,6 +668,55 @@ static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu) } } +#ifdef CONFIG_X86_64 +static inline void kvm_init_shadow_page (void *page) +{ +int ign; + +/* +* AMD: "suppress #VE" bit is ignored +* Intel non-TD(VMX): "suppress #VE" bit is ignored because +* EPT_VIOLATION_VE isn't set. +* guest TD: TDX module sets EPT_VIOLATION_VE +* conventional SEPT: "suppress #VE" bit must be set to get EPT violation +* private SEPT: "suppress #VE" bit is ignored. CPU doesn't walk it +* +* For simplicity, unconditionally initialize SPET to set "suppress #VE". +*/ + asmvolatile ("rep stosq\n\t" + :"=c" (ign),"=D" (page) + :"a" (SHADOW_NONPRESENT_VALUE ),"c" (4096 /8 ),"D" (page) + :"memory" + ); +} + +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +struct kvm_mmu_memory_cache *mc = &vcpu->arch.mmu_shadow_page_cache; +int start, end, i, r; + + start =kvm_mmu_memory_cache_nr_free_objects (mc); + r =kvm_mmu_topup_memory_cache (mc,PT64_ROOT_MAX_LEVEL ); + +/* +* Note, topup may have allocated objects even if it failed to allocate +* the minimum number of objects required to make forward progress _at +* this time_. Initialize newly allocated objects even on failure, as +* userspace can free memory and rerun the vCPU in response to -ENOMEM. +*/ + end =kvm_mmu_memory_cache_nr_free_objects (mc); +for (i = start; i < end; i++) +kvm_init_shadow_page (mc->objects[i]); +return r; +} +#else +static int mmu_topup_shadow_page_cache (struct kvm_vcpu *vcpu) +{ +return kvm_mmu_topup_memory_cache (vcpu->arch.mmu_shadow_page_cache, +PT64_ROOT_MAX_LEVEL ); +} +#endif /* CONFIG_X86_64 */ +static int mmu_topup_memory_caches (struct kvm_vcpu *vcpu,bool maybe_indirect) {int r;@@ -677,8 +726,7 @@ static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect) 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);if (r)return r; - r =kvm_mmu_topup_memory_cache (&vcpu->arch.mmu_shadow_page_cache, -PT64_ROOT_MAX_LEVEL ); + r =mmu_topup_shadow_page_cache (vcpu);if (r)return r;if (maybe_indirect) {@@ -5654,7 +5702,24 @@ int kvm_mmu_create(struct kvm_vcpu *vcpu) vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache; vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO; - vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; +/* +* When X86_64, initial SEPT entries are initialized with +* SHADOW_NONPRESENT_VALUE. Otherwise zeroed. See +* mmu_topup_shadow_page_cache(). +* +* Shared EPTEs need to be initialized with SUPPRESS_VE=1, otherwise +* not-present EPT violations would be reflected into the guest by +* hardware as #VE exceptions. This is handled by initializing page +* allocations via kvm_init_shadow_page() during cache topup. +* In that case, telling the page allocation to zero-initialize the page +* would be wasted effort. +* +* The initialization is harmless for S-EPT entries because KVM's copy +* of the S-EPT isn't consumed by hardware, and because under the hood +* S-EPT entries should never #VE. +*/ +if (!IS_ENABLED (X86_64 )) + vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO; vcpu->arch.mmu = &vcpu->arch.root_mmu; vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;arch/x86/kvm/mmu/paging_tmpl.h +2
-1@@ -1031,7 +1031,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)gpa_t pte_gpa;gfn_t gfn; -if (!sp->spt[i]) +/* spt[i] has initial value of shadow page table allocation */ +if (sp->spt[i] !=SHADOW_NONPRESENT_VALUE )continue ; pte_gpa = first_pte_gpa + i *sizeof (pt_element_t);arch/x86/kvm/mmu/spte.c +4
-1@@ -36,6 +36,9 @@ u64 __read_mostly shadow_present_mask;u64 __read_mostly shadow_me_value;u64 __read_mostly shadow_me_mask;u64 __read_mostly shadow_acc_track_mask; +#ifdef CONFIG_X86_64 +u64 __read_mostly shadow_nonpresent_value; +#endif u64 __read_mostly shadow_nonpresent_or_rsvd_mask;u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask;@@ -360,7 +363,7 @@ void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask)* not set any RWX bits. */ if (WARN_ON ((mmio_value & mmio_mask) != mmio_value) || -WARN_ON (mmio_value && (REMOVED_SPTE & mmio_mask) == mmio_value)) +WARN_ON (mmio_value && (__REMOVED_SPTE & mmio_mask) == mmio_value)) mmio_value =0 ;if (!mmio_value)arch/x86/kvm/mmu/spte.h +26
-2@@ -140,6 +140,19 @@ static_assert(MMIO_SPTE_GEN_LOW_BITS == 8 && MMIO_SPTE_GEN_HIGH_BITS == 11);#define MMIO_SPTE_GEN_MASK GENMASK_ULL(MMIO_SPTE_GEN_LOW_BITS + MMIO_SPTE_GEN_HIGH_BITS - 1, 0) +/* +* non-present SPTE value for both VMX and SVM for TDP MMU. +* For SVM NPT, for non-present spte (bit 0 = 0), other bits are ignored. +* For VMX EPT, bit 63 is ignored if #VE is disabled. +* bit 63 is #VE suppress if #VE is enabled. +*/ +#ifdef CONFIG_X86_64 +#define SHADOW_NONPRESENT_VALUE BIT_ULL(63) +static_assert (!(SHADOW_NONPRESENT_VALUE &SPTE_MMU_PRESENT_MASK )); +#else +#define SHADOW_NONPRESENT_VALUE 0ULL +#endif +extern u64 __read_mostly shadow_host_writable_mask;extern u64 __read_mostly shadow_mmu_writable_mask;extern u64 __read_mostly shadow_nx_mask;@@ -178,16 +191,27 @@ extern u64 __read_mostly shadow_nonpresent_or_rsvd_mask;* non-present intermediate value. Other threads which encounter this value * should not modify the SPTE. * +* For X86_64 case, SHADOW_NONPRESENT_VALUE, "suppress #VE" bit, is set because +* "EPT violation #VE" in the secondary VM execution control may be enabled. +* Because TDX module sets "EPT violation #VE" for TD, "suppress #VE" bit for +* the conventional EPT needs to be set. +* * Use a semi-arbitrary value that doesn't set RWX bits, i.e. is not-present on * bot AMD and Intel CPUs, and doesn't set PFN bits, i.e. doesn't create a L1TF * vulnerability. Use only low bits to avoid 64-bit immediates. * * Only used by the TDP MMU. */ -#define REMOVED_SPTE 0x5a0ULL +#define __REMOVED_SPTE 0x5a0ULL/* Removed SPTEs must not be misconstrued as shadow present PTEs. */ -static_assert (!(REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); +static_assert (!(__REMOVED_SPTE &SPTE_MMU_PRESENT_MASK )); + +/* +* See above comment around __REMOVED_SPTE. REMOVED_SPTE is the actual +* intermediate value set to the removed SPET. it sets the "suppress #VE" bit. +*/ +#define REMOVED_SPTE (SHADOW_NONPRESENT_VALUE | __REMOVED_SPTE)static inline bool is_removed_spte (u64 spte) {arch/x86/kvm/mmu/tdp_mmu.c +1
-0@@ -692,8 +692,16 @@ static inline int tdp_mmu_zap_spte_atomic(struct kvm *kvm,* overwrite the special removed SPTE value. No bookkeeping is needed * here since the SPTE is going from non-present to non-present. Use * the raw write helper to avoid an unnecessary check on volatile bits. +*
arch/x86/kvm/mmu/tdp_mmu.c static inline int tdp_mmu_zap_spte_atomic(struct kvm *kvm, · line 704
Quoted 10 lines
arch/x86/kvm/mmu/tdp_mmu.c +8
-1+* Set non-present value to SHADOW_NONPRESENT_VALUE, rather than 0. +* It is because when TDX is enabled, TDX module always +* enables "EPT-violation #VE", so KVM needs to set +* "suppress #VE" bit in EPT table entries, in order to get +* real EPT violation, rather than TDVMCALL. KVM sets +* SHADOW_NONPRESENT_VALUE (which sets "suppress #VE" bit) so it +* can be set when EPT table entries are zapped. */ -__kvm_tdp_mmu_write_spte (iter->sptep,0 ); +__kvm_tdp_mmu_write_spte (iter->sptep,SHADOW_NONPRESENT_VALUE );
Since you also always set SHADOW_NONPRESENT_VALUE to SPTE for legacy MMU when the page table is firstly allocated, it also makes sense to set it when SPTE is zapped for legacy MMU.
This part is missing in this patch.
Quoted 49 lines
arch/x86/kvm/mmu/tdp_mmu.c +7
-6return 0 ; }@@ -870,8 +878,8 @@ static void __tdp_mmu_zap_root(struct kvm *kvm, struct kvm_mmu_page *root,continue ;if (!shared) -tdp_mmu_set_spte (kvm, &iter,0 ); -else if (tdp_mmu_set_spte_atomic (kvm, &iter,0 )) +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); +else if (tdp_mmu_set_spte_atomic (kvm, &iter,SHADOW_NONPRESENT_VALUE )) goto retry; } }@@ -927,8 +935,9 @@ bool kvm_tdp_mmu_zap_sp(struct kvm *kvm, struct kvm_mmu_page *sp)if (WARN_ON_ONCE (!is_shadow_present_pte (old_spte)))return false; -__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte,0 , - sp->gfn, sp->role.level +1 , true, true); +__tdp_mmu_set_spte (kvm,kvm_mmu_page_as_id (sp), sp->ptep, old_spte, +SHADOW_NONPRESENT_VALUE , sp->gfn, sp->role.level +1 , + true, true);return true; }@@ -965,7 +974,7 @@ static bool tdp_mmu_zap_leafs(struct kvm *kvm, struct kvm_mmu_page *root, !is_last_spte(iter.old_spte, iter.level))continue ; -tdp_mmu_set_spte (kvm, &iter,0 ); +tdp_mmu_set_spte (kvm, &iter,SHADOW_NONPRESENT_VALUE ); flush = true; }@@ -1330,7 +1339,7 @@ static bool set_spte_gfn(struct kvm *kvm, struct tdp_iter *iter,* invariant that the PFN of a present * leaf SPTE can never change. * See __handle_changed_spte(). */ -tdp_mmu_set_spte (kvm, iter,0 ); +tdp_mmu_set_spte (kvm, iter,SHADOW_NONPRESENT_VALUE );if (!pte_write (range->pte)) { new_spte = kvm_mmu_changed_pte_notifier_make_spte(iter->old_spte,Signature · 1 line
2.25.1
Re: [PATCH v7 036/102] KVM: x86/mmu: Allow non-zero value for non-present SPTE
In reply to Isaku Yamahataarch/x86/kvm/mmu/spte.c u64 __read_mostly shadow_present_mask; · line 41
Quoted 10 lines
arch/x86/kvm/mmu/spte.c +3
-0@@ -36,6 +36,9 @@ u64 __read_mostly shadow_present_mask;u64 __read_mostly shadow_me_value;u64 __read_mostly shadow_me_mask;u64 __read_mostly shadow_acc_track_mask; +#ifdef CONFIG_X86_64 +u64 __read_mostly shadow_nonpresent_value; +#endif
Is this ever used?
arch/x86/kvm/mmu/spte.c void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask) · line 367
Quoted 10 lines
arch/x86/kvm/mmu/spte.c +1
-1u64 __read_mostly shadow_nonpresent_or_rsvd_mask;u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask;@@ -360,7 +363,7 @@ void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask)* not set any RWX bits. */ if (WARN_ON ((mmio_value & mmio_mask) != mmio_value) || -WARN_ON (mmio_value && (REMOVED_SPTE & mmio_mask) == mmio_value)) +WARN_ON (mmio_value && (__REMOVED_SPTE & mmio_mask) == mmio_value)) mmio_value =0 ;
This chunk doesn't look right, or necessary. We need mmio_mask/mmio_value which causes EPT violation but with "suppress #VE" bit clear.
So, actually, we want to make sure SHADOW_NONPRESENT_VALUE is *NOT* in mmio_mask and mmio_value. Using (REMOVED_SPTE & mmio_mask) == mmio_value can actually ensure SHADOW_NONPRESENT_VALUE is never set in MMIO spte, correct? So I think using REMOVED_SPTE is fine.
Or maybe additionally adding a explicit check is even better:
if (WARN_ON(mmio_mask & SHADOW_NONPRESENT_VALUE)) mmio_value = 0;
But this change maybe should be in another patch which deals setting up per-VM mmio_mask/mmio_value anyway. This patch, instead, focuses on allowing non-zero value for non-present SPTE.