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rng: npcm: add Arbel NPCM8XX support

PATCH In review Tomer Maimon 3 participants 5 messages Sep 29, 2022 – Oct 21, 2022

Subsystems (4)
Device tree bindings Crypto API Hardware random number generator core Arm/nuvoton npcm architecture
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Tomer Maimon

author maintainer
#0 lore raw

v2 cover rng: npcm: add Arbel NPCM8XX support

This patch set adds Arbel NPCM8XX Random Number Generator(RNG) support to RNG NPCM driver.

The NPCM8XX RNG uses different prescalar clock value.

The NPCM RNG driver was tested on the NPCM845 evaluation board.

Addressed comments from:
- Krzysztof Kozlowski: https://www.spinics.net/lists/kernel/msg4523771.html

			https://www.spinics.net/lists/kernel/msg4523585.html

Changes since version 1:
- Fix dt-binding document warning.
- Use driver data to handle architecture specific clock prescaler.

Tomer Maimon (2):
dt-bindings: rng: nuvoton,npcm-rng: Add npcm845 compatible string
hwrng: npcm: Add NPCM8XX support

 .../devicetree/bindings/rng/nuvoton,npcm-rng.yaml  |  4 +++-
 drivers/char/hw_random/npcm-rng.c                  | 14 ++++++++++----
 2 files changed, 13 insertions(+), 5 deletions(-)
Signature · 1 line
2.33.0
author maintainer
#1 lore raw

PATCH v2 1/2 dt-bindings: rng: nuvoton,npcm-rng: Add npcm845 compatible string

Add a compatible string for Nuvoton BMC NPCM845 RNG.

Signed-off-by Tomer Maimon <[email protected]>
---
 Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml +3 -1
index abd134c9d400..e8e4ab1e5b95 100644
@@ -16,7 +16,9 @@ maintainers:
 
 properties:
   compatible:
-    const: nuvoton,npcm750-rng
+    enum:
+      - nuvoton,npcm750-rng
+      - nuvoton,npcm845-rng
 
   reg:
     maxItems: 1
Signature · 1 line
2.33.0
author maintainer
#3 lore raw

PATCH v2 2/2 hwrng: npcm: Add NPCM8XX support

In reply to Tomer Maimon

Adding RNG NPCM8XX support to NPCM RNG driver.
RNG NPCM8XX uses a different clock prescaler.

As part of adding NPCM8XX support:
- Add NPCM8XX specific compatible string.
- Add data to handle architecture specific clock prescaler.

Signed-off-by Tomer Maimon <[email protected]>
---
 drivers/char/hw_random/npcm-rng.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)
drivers/char/hw_random/npcm-rng.c +10 -4
index 1ec5f267a656..5bf7f370f985 100644
@@ -13,11 +13,13 @@
 #include <linux/delay.h>
 #include <linux/of_irq.h>
 #include <linux/pm_runtime.h>
+#include <linux/of_device.h>
 
 #define NPCM_RNGCS_REG		0x00	/* Control and status register */
 #define NPCM_RNGD_REG		0x04	/* Data register */
 #define NPCM_RNGMODE_REG	0x08	/* Mode register */
 
+#define NPCM_RNG_CLK_SET_62_5MHZ	BIT(2) /* 60-80 MHz */
 #define NPCM_RNG_CLK_SET_25MHZ	GENMASK(4, 3) /* 20-25 MHz */
 #define NPCM_RNG_DATA_VALID	BIT(1)
 #define NPCM_RNG_ENABLE		BIT(0)

@@ -31,14 +33,14 @@
 struct npcm_rng {
 	void __iomem *base;
 	struct hwrng rng;
+	u32 clkp;
 };
 
 static int npcm_rng_init(struct hwrng *rng)
 {
 	struct npcm_rng *priv = to_npcm_rng(rng);
 
-	writel(NPCM_RNG_CLK_SET_25MHZ | NPCM_RNG_ENABLE,
-	       priv->base + NPCM_RNGCS_REG);
+	writel(priv->clkp | NPCM_RNG_ENABLE, priv->base + NPCM_RNGCS_REG);
 
 	return 0;
 }

@@ -47,7 +49,7 @@ static void npcm_rng_cleanup(struct hwrng *rng)
 {
 	struct npcm_rng *priv = to_npcm_rng(rng);
 
-	writel(NPCM_RNG_CLK_SET_25MHZ, priv->base + NPCM_RNGCS_REG);
+	writel(priv->clkp, priv->base + NPCM_RNGCS_REG);
 }
 
 static int npcm_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)

@@ -110,6 +112,7 @@ static int npcm_rng_probe(struct platform_device *pdev)
 	priv->rng.read = npcm_rng_read;
 	priv->rng.priv = (unsigned long)&pdev->dev;
 	priv->rng.quality = 1000;
+	priv->clkp = (u32)(uintptr_t)of_device_get_match_data(&pdev->dev);
 
 	writel(NPCM_RNG_M1ROSEL, priv->base + NPCM_RNGMODE_REG);
 

@@ -162,7 +165,10 @@ static const struct dev_pm_ops npcm_rng_pm_ops = {
 };
 
 static const struct of_device_id rng_dt_id[] __maybe_unused = {
-	{ .compatible = "nuvoton,npcm750-rng",  },
+	{ .compatible = "nuvoton,npcm750-rng",
+		.data = (void *)NPCM_RNG_CLK_SET_25MHZ },
+	{ .compatible = "nuvoton,npcm845-rng",
+		.data = (void *)NPCM_RNG_CLK_SET_62_5MHZ },
 	{},
 };
 MODULE_DEVICE_TABLE(of, rng_dt_id);
Signature · 1 line
2.33.0
maintainer
#4 lore raw
In reply to Tomer Maimon
Quoted 15 lines · Tomer Maimon

This patch set adds Arbel NPCM8XX Random Number Generator(RNG) support to RNG NPCM driver.

The NPCM8XX RNG uses different prescalar clock value.

The NPCM RNG driver was tested on the NPCM845 evaluation board.

Addressed comments from:
- Krzysztof Kozlowski: https://www.spinics.net/lists/kernel/msg4523771.html

			https://www.spinics.net/lists/kernel/msg4523585.html

Changes since version 1:
- Fix dt-binding document warning.
- Use driver data to handle architecture specific clock prescaler.

Quoted 10 lines

Tomer Maimon (2):
dt-bindings: rng: nuvoton,npcm-rng: Add npcm845 compatible string
hwrng: npcm: Add NPCM8XX support

 .../devicetree/bindings/rng/nuvoton,npcm-rng.yaml  |  4 +++-
 drivers/char/hw_random/npcm-rng.c                  | 14 ++++++++++----
 2 files changed, 13 insertions(+), 5 deletions(-)
Signature · 1 line
2.33.0

All applied. Thanks.

Signature · 3 lines
Email: Herbert Xu <[email protected]>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt