LoongArch: Add built-in dtb support
Subsystems (2)
v2 cover LoongArch: Add built-in dtb support
Hi all:
This patchset introduces LoongArch's built-in dtb support.
As we know, the Loongson-2K family supports DT. Inevitably, some systems do not provide a useful device tree to the kernel at boot time. Chasing around bootloaders for these systems is a headache, so we just keep a device tree table in the kernel, keyed by the dts filename, that contains the relevant DTBs.
Thanks.
-----
V2:
patch(1/7):
- Drop model and clock-frequency properties;
- Add clocks property;
- Rewrite the description.
patch(2/7):
- Add the proper compatibles for boards.
patch(4/7)(5/7)(6/7):
- Format commit message head;
- Drop undocumented compatible, such as pci_bridge compatible;
- Distinguish the attributes, put SoC-related into DTSI and
board-related into DTS;
- Check DTS with 'make dtbs_check W=1'.
patch(7/7)
- New patch;
- Parses Molde name and CPU MHz from the DTS attribute.
Link to V1:
https://lore.kernel.org/loongarch/[email protected]/
Binbin Zhou (7):
dt-bindings: loongarch: Add CPU bindings for LoongArch
dt-bindings: loongarch: Add Loongson SoC boards compatibles
LoongArch: Allow device trees to be built into the kernel
LoongArch: dts: DeviceTree for Loongson-2K0500
LoongArch: dts: DeviceTree for Loongson-2K1000
LoongArch: dts: DeviceTree for Loongson-2K2000
LoongArch: Parsing CPU-related information from DTS
.../devicetree/bindings/loongarch/boards.yaml | 34 ++ .../devicetree/bindings/loongarch/cpus.yaml | 60 +++ arch/loongarch/Kconfig | 16 + arch/loongarch/Makefile | 10 +- arch/loongarch/boot/dts/Makefile | 7 +- .../boot/dts/loongson-2k0500-ref.dts | 115 ++++++ arch/loongarch/boot/dts/loongson-2k0500.dtsi | 244 +++++++++++++ .../boot/dts/loongson-2k1000-ref.dts | 217 +++++++++++ arch/loongarch/boot/dts/loongson-2k1000.dtsi | 345 ++++++++++++++++++ .../boot/dts/loongson-2k2000-ref.dts | 89 +++++ arch/loongarch/boot/dts/loongson-2k2000.dtsi | 257 +++++++++++++ arch/loongarch/kernel/env.c | 33 ++ arch/loongarch/kernel/setup.c | 9 +- 13 files changed, 1430 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yaml create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yaml create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi create mode 100644 arch/loongarch/boot/dts/loongson-2k1000-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k1000.dtsi create mode 100644 arch/loongarch/boot/dts/loongson-2k2000-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k2000.dtsi
Signature · 1 line
2.39.3
PATCH v2 1/7 dt-bindings: loongarch: Add CPU bindings for LoongArch
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>
--- .../devicetree/bindings/loongarch/cpus.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yaml
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +60 -0
@@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + This document describes the list of LoongArch CPU cores that support FDT, + it describe the layout of CPUs in a system through the "cpus" node. + +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + device_type: true + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/loongson,ls2k-clk.h> + + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + + cpu@1 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <1>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + }; + +...
Signature · 1 line
2.39.3
Re: [PATCH v2 1/7] dt-bindings: loongarch: Add CPU bindings for LoongArch
Quoted 40 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +25
-0@@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + This document describes the list of LoongArch CPU cores that support FDT, + it describe the layout of CPUs in a system through the "cpus" node. + +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + clocks:
Documentation/devicetree/bindings/loongarch/cpus.yaml line 35
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +10
-0+ maxItems: 1 + + device_type: true + +required: + - compatible + - reg + - clocks + +additionalProperties: false
How come you didn't add the reference to the common cpu schema?
Thanks,
Conor.
Quoted 28 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +25
-0+ +examples: + - | + #include <dt-bindings/clock/loongson,ls2k-clk.h> + + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + + cpu@1 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <1>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + }; + +...Signature · 1 line
2.39.3
Re: [PATCH v2 1/7] dt-bindings: loongarch: Add CPU bindings for LoongArch
Hi Conor:
Thanks for the reply.
Quoted 46 lines · Conor Dooley
Quoted 44 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +29
-0@@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + This document describes the list of LoongArch CPU cores that support FDT, + it describe the layout of CPUs in a system through the "cpus" node. + +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + device_type: true +
Quoted 8 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml line 35
Quoted 6 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +6
-0+required: + - compatible + - reg + - clocks + +additionalProperties: falseHow come you didn't add the reference to the common cpu schema?
Do you mean:
allOf:
- $ref: /schemas/cpu.yaml#
Sorry, the file started out as a copy of mips/arm and then the related content, really didn't notice that part.
I will check again.
Also, shouldn't "additionalProperties: false" be changed to "unevaluatedProperties: false" synchronously?
Thanks.
Binbin
Quoted 32 lines
Thanks,
Conor.Quoted 28 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +25
-1+ +examples: + - | + #include <dt-bindings/clock/loongson,ls2k-clk.h> + + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + + cpu@1 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <1>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + }; + +... --2.39.3
Re: [PATCH v2 1/7] dt-bindings: loongarch: Add CPU bindings for LoongArch
Quoted 60 lines · Binbin Zhou
Hi Conor:
Thanks for the reply.
Quoted 46 lines · Conor Dooley
Quoted 44 lines · Binbin Zhou
Add the available CPUs in LoongArch binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/cpus.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/cpus.yamlDocumentation/devicetree/bindings/loongarch/cpus.yaml new file +29
-0@@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LoongArch CPUs + +maintainers: + - Binbin Zhou <[email protected]> + +description: + This document describes the list of LoongArch CPU cores that support FDT, + it describe the layout of CPUs in a system through the "cpus" node. + +properties: + compatible: + enum: + - loongson,la264 + - loongson,la364 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + device_type: true +Quoted 8 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml line 35
Quoted 6 lines
Documentation/devicetree/bindings/loongarch/cpus.yaml new file +6
-0+required: + - compatible + - reg + - clocks + +additionalProperties: falseHow come you didn't add the reference to the common cpu schema?
Quoted 3 lines
Do you mean:
allOf:
- $ref: /schemas/cpu.yaml#
Yes.
Quoted 6 lines
Sorry, the file started out as a copy of mips/arm and then the related content, really didn't notice that part.
I will check again.Also, shouldn't "additionalProperties: false" be changed to "unevaluatedProperties: false" synchronously?
To actually make use of the properties from there, yeah.
PATCH v2 2/7 dt-bindings: loongarch: Add Loongson SoC boards compatibles
In reply to Binbin ZhouAdd Loongson SoC boards binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>
--- .../devicetree/bindings/loongarch/boards.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yaml
Documentation/devicetree/bindings/loongarch/boards.yaml new file +34 -0
@@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SoC-based boards + +maintainers: + - Binbin Zhou <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Loongson-2K0500 processor based boards + items: + - const: loongson,ls2k0500-ref + - const: loongson,ls2k0500 + + - description: Loongson-2K1000 processor based boards + items: + - const: loongson,ls2k1000-ref + - const: loongson,ls2k1000 + + - description: Loongson-2K2000 processor based boards + items: + - const: loongson,ls2k2000-ref + - const: loongson,ls2k2000 + +additionalProperties: true + +...
Signature · 1 line
2.39.3
Re: [PATCH v2 2/7] dt-bindings: loongarch: Add Loongson SoC boards compatibles
Quoted 34 lines · Binbin Zhou
Add Loongson SoC boards binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/boards.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yamlDocumentation/devicetree/bindings/loongarch/boards.yaml new file +20
-0@@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SoC-based boards + +maintainers: + - Binbin Zhou <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Loongson-2K0500 processor based boards + items: + - const: loongson,ls2k0500-ref + - const: loongson,ls2k0500
Documentation/devicetree/bindings/loongarch/boards.yaml line 30
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/boards.yaml new file +10
-0+ + - description: Loongson-2K1000 processor based boards + items: + - const: loongson,ls2k1000-ref + - const: loongson,ls2k1000 + + - description: Loongson-2K2000 processor based boards + items: + - const: loongson,ls2k2000-ref + - const: loongson,ls2k2000
Do all of these SoCs just have a single reference/dev board?
Quoted 7 lines
Documentation/devicetree/bindings/loongarch/boards.yaml new file +4
-0+ +additionalProperties: true + +...Signature · 1 line
2.39.3
Re: [PATCH v2 2/7] dt-bindings: loongarch: Add Loongson SoC boards compatibles
Hi Conor:
Thanks for your reply.
Quoted 40 lines · Conor Dooley
Quoted 38 lines · Binbin Zhou
Add Loongson SoC boards binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/boards.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yamlDocumentation/devicetree/bindings/loongarch/boards.yaml new file +24
-0@@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SoC-based boards + +maintainers: + - Binbin Zhou <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Loongson-2K0500 processor based boards + items: + - const: loongson,ls2k0500-ref + - const: loongson,ls2k0500 + + - description: Loongson-2K1000 processor based boards + items: + - const: loongson,ls2k1000-ref
Quoted 8 lines
Documentation/devicetree/bindings/loongarch/boards.yaml line 30
Quoted 6 lines
Documentation/devicetree/bindings/loongarch/boards.yaml new file +6
-0+ - const: loongson,ls2k1000 + + - description: Loongson-2K2000 processor based boards + items: + - const: loongson,ls2k2000-ref + - const: loongson,ls2k2000Do all of these SoCs just have a single reference/dev board?
Yes, I have development boards for each Soc on hand now, and it has a relatively complete interface. My original idea was to use the development boards as examples to show you the Loongson-2K Soc. I'm sure more boards will be added in the future.
Thanks.
Binbin
Quoted 8 lines
Quoted 8 lines
Documentation/devicetree/bindings/loongarch/boards.yaml new file +4
-1+ +additionalProperties: true + +... --2.39.3
Re: [PATCH v2 2/7] dt-bindings: loongarch: Add Loongson SoC boards compatibles
Quoted 54 lines · Binbin Zhou
Hi Conor:
Thanks for your reply.
Quoted 40 lines · Conor Dooley
Quoted 38 lines · Binbin Zhou
Add Loongson SoC boards binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/boards.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yamlDocumentation/devicetree/bindings/loongarch/boards.yaml new file +24
-0@@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SoC-based boards + +maintainers: + - Binbin Zhou <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Loongson-2K0500 processor based boards + items: + - const: loongson,ls2k0500-ref + - const: loongson,ls2k0500 + + - description: Loongson-2K1000 processor based boards + items: + - const: loongson,ls2k1000-refQuoted 8 lines
Documentation/devicetree/bindings/loongarch/boards.yaml line 30
Quoted 6 lines
Documentation/devicetree/bindings/loongarch/boards.yaml new file +6
-0+ - const: loongson,ls2k1000 + + - description: Loongson-2K2000 processor based boards + items: + - const: loongson,ls2k2000-ref + - const: loongson,ls2k2000Do all of these SoCs just have a single reference/dev board?
Quoted 4 lines
Yes, I have development boards for each Soc on hand now, and it has a relatively complete interface. My original idea was to use the development boards as examples to show you the Loongson-2K Soc. I'm sure more boards will be added in the future.
My reason for asking was that "-ref" is quite generic, but if there is only one reference board produced by Loongson that's not a problem.
Conor Dooley
Reviewed-byRe: [PATCH v2 2/7] dt-bindings: loongarch: Add Loongson SoC boards compatibles
Quoted 55 lines · Conor Dooley
Quoted 54 lines · Binbin Zhou
Hi Conor:
Thanks for your reply.
Quoted 48 lines · Conor Dooley
Quoted 34 lines · Binbin Zhou
Add Loongson SoC boards binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/boards.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yamlDocumentation/devicetree/bindings/loongarch/boards.yaml new file +20
-0@@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SoC-based boards + +maintainers: + - Binbin Zhou <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Loongson-2K0500 processor based boards + items: + - const: loongson,ls2k0500-ref + - const: loongson,ls2k0500Documentation/devicetree/bindings/loongarch/boards.yaml line 30
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/boards.yaml new file +10
-0+ + - description: Loongson-2K1000 processor based boards + items: + - const: loongson,ls2k1000-ref + - const: loongson,ls2k1000 + + - description: Loongson-2K2000 processor based boards + items: + - const: loongson,ls2k2000-ref + - const: loongson,ls2k2000Do all of these SoCs just have a single reference/dev board?
Quoted 7 lines
Quoted 4 lines
Yes, I have development boards for each Soc on hand now, and it has a relatively complete interface. My original idea was to use the development boards as examples to show you the Loongson-2K Soc. I'm sure more boards will be added in the future.
My reason for asking was that "-ref" is quite generic, but if there is only one reference board produced by Loongson that's not a problem.
Whoops, I forgot to add this:
Reviewed-by Conor Dooley <[email protected]>
Thanks,
Conor.
Re: [PATCH v2 2/7] dt-bindings: loongarch: Add Loongson SoC boards compatibles
In reply to Binbin ZhouQuoted 34 lines · Binbin Zhou
Add Loongson SoC boards binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/boards.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yamlDocumentation/devicetree/bindings/loongarch/boards.yaml new file +20
-0@@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SoC-based boards + +maintainers: + - Binbin Zhou <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Loongson-2K0500 processor based boards + items: + - const: loongson,ls2k0500-ref + - const: loongson,ls2k0500
Documentation/devicetree/bindings/loongarch/boards.yaml line 30
Quoted 10 lines
Documentation/devicetree/bindings/loongarch/boards.yaml new file +10
-0+ + - description: Loongson-2K1000 processor based boards + items: + - const: loongson,ls2k1000-ref + - const: loongson,ls2k1000 + + - description: Loongson-2K2000 processor based boards + items: + - const: loongson,ls2k2000-ref + - const: loongson,ls2k2000
This probably is a sign all your bindings are using a bogus compatible. You were using compatibles like loongson,ls2k-clk so your SoC cannot be ls2k2000... or your compatible is bogus. The same for:
loongson,ls2k-pm, loongson,ls2k-dwmac, loongson,ls2k-i2c, loongson,ls2k-chipid, loongson,ls2k-gpio
Best regards,
Krzysztof
Re: [PATCH v2 2/7] dt-bindings: loongarch: Add Loongson SoC boards compatibles
Hi Krzysztof:
Thanks for your reply.
Quoted 44 lines · Krzysztof Kozlowski
Quoted 42 lines · Binbin Zhou
Add Loongson SoC boards binding with DT schema format using json-schema.
Signed-off-by Binbin Zhou <[email protected]>--- .../devicetree/bindings/loongarch/boards.yaml | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/loongarch/boards.yamlDocumentation/devicetree/bindings/loongarch/boards.yaml new file +28
-0@@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongarch/boards.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson SoC-based boards + +maintainers: + - Binbin Zhou <[email protected]> + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Loongson-2K0500 processor based boards + items: + - const: loongson,ls2k0500-ref + - const: loongson,ls2k0500 + + - description: Loongson-2K1000 processor based boards + items: + - const: loongson,ls2k1000-ref + - const: loongson,ls2k1000 + + - description: Loongson-2K2000 processor based boards + items:
Quoted 9 lines
Documentation/devicetree/bindings/loongarch/boards.yaml line 30
Quoted 2 lines
Documentation/devicetree/bindings/loongarch/boards.yaml new file +2
-0+ - const: loongson,ls2k2000-ref + - const: loongson,ls2k2000This probably is a sign all your bindings are using a bogus compatible. You were using compatibles like loongson,ls2k-clk so your SoC cannot be ls2k2000... or your compatible is bogus. The same for:
loongson,ls2k-pm, loongson,ls2k-dwmac, loongson,ls2k-i2c, loongson,ls2k-chipid, loongson,ls2k-gpio
I'm not sure I understand correctly, are you saying I should rename all these ls2k-xx compatibles to Soc-based compatible?
For example, loongson,ls2k-i2c should be renamed to something like this:
loongson,ls2k0500-i2c, loongson,ls2k-i2c loongson,ls2k1000-i2c, loongson,ls2k-i2c loongson,ls2k2000-i2c, loongson,ls2k-i2c
Even if their driver code is no different.
Thanks.
Binbin
Quoted 3 lines
Best regards,
Krzysztof
PATCH v2 3/7 LoongArch: Allow device trees to be built into the kernel
In reply to Binbin ZhouSome systems do not provide a useful device tree to the kernel at boot time. Let's keep a device tree table in the kernel, keyed by the dts filename, containing the relevant DTBs.
Signed-off-by Binbin Zhou <[email protected]>
Signed-off-by Huacai Chen <[email protected]>
--- arch/loongarch/Kconfig | 16 ++++++++++++++++ arch/loongarch/Makefile | 10 ++++++++-- arch/loongarch/boot/dts/Makefile | 3 +-- arch/loongarch/kernel/setup.c | 9 +++++++-- 4 files changed, 32 insertions(+), 6 deletions(-)
arch/loongarch/Kconfig +16 -0
@@ -326,6 +326,22 @@ config 64KB_3LEVEL endchoice +config BUILTIN_DTB + bool "Enable builtin dtb in kernel" + depends on OF + help + Some systems do not provide a useful device tree to the kernel at boot + time. Let's keep a device tree table in the kernel, keyed by the dts + filename, containing the relevant DTBs. + +config BUILTIN_DTB_NAME + string "Source file for LoongArch builtin dtb" + depends on BUILTIN_DTB + help + Base name (without suffix, relative to arch/loongarch/boot/dts/) + for the DTS file that will be used to produce the DTB linked into the + kernel. + config CMDLINE string "Built-in kernel command line" help
arch/loongarch/Makefile +8 -2
@@ -5,7 +5,8 @@ boot := arch/loongarch/boot -KBUILD_DEFCONFIG := loongson3_defconfig +KBUILD_DEFCONFIG := loongson3_defconfig +KBUILD_DTBS := dtbs image-name-y := vmlinux image-name-$(CONFIG_EFI_ZBOOT) := vmlinuz
@@ -140,11 +141,14 @@ PHONY += vdso_install vdso_install: $(Q)$(MAKE) $(build)=arch/loongarch/vdso $@ -all: $(notdir $(KBUILD_IMAGE)) +all: $(notdir $(KBUILD_IMAGE)) $(KBUILD_DTBS) vmlinux.elf vmlinux.efi vmlinuz.efi: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(bootvars-y) $(boot)/$@ +# device-trees +core-y += arch/loongarch/boot/dts/ + install: $(Q)install -D -m 755 $(KBUILD_IMAGE) $(INSTALL_PATH)/$(image-name-y)-$(KERNELRELEASE) $(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE)
@@ -152,5 +156,7 @@ install: define archhelp echo ' install - install kernel into $(INSTALL_PATH)' + echo ' dtbs - Device-tree blobs for enabled boards' + echo ' dtbs_install - Install dtbs to $(INSTALL_DTBS_PATH)' echo endef
arch/loongarch/boot/dts/Makefile +1 -2
@@ -1,4 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -dtstree := $(srctree)/$(src) -dtb-y := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) +obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/kernel/setup.c +7 -2
@@ -296,8 +296,13 @@ static void __init fdt_setup(void)if (acpi_os_get_root_pointer ())return ; -/* Look for a device tree configuration table entry */ - fdt_pointer =efi_fdt_pointer (); +/* We prefer to try to use built-in dtb, checking its legality first. */ +if (!fdt_check_header (__dtb_start)) + fdt_pointer = __dtb_start; +else +/* Fallback to efi dtb, when built-in dtb is not available. */ + fdt_pointer =efi_fdt_pointer (); +if (!fdt_pointer ||fdt_check_header (fdt_pointer))return ;
Signature · 1 line
2.39.3
PATCH v2 4/7 LoongArch: dts: DeviceTree for Loongson-2K0500
In reply to Binbin ZhouAdd DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.
Signed-off-by Binbin Zhou <[email protected]>
--- arch/loongarch/boot/dts/Makefile | 2 + .../boot/dts/loongson-2k0500-ref.dts | 115 +++++++++ arch/loongarch/boot/dts/loongson-2k0500.dtsi | 244 ++++++++++++++++++ 3 files changed, 361 insertions(+) create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsi
arch/loongarch/boot/dts/Makefile +2 -0
@@ -1,3 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb + obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +115 -0
115 lines not on this page · raw message
arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +244 -0
244 lines not on this page · raw message
Signature · 1 line
2.39.3
Re: [PATCH v2 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500
Quoted 67 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.
Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/Makefile | 2 + .../boot/dts/loongson-2k0500-ref.dts | 115 +++++++++ arch/loongarch/boot/dts/loongson-2k0500.dtsi | 244 ++++++++++++++++++ 3 files changed, 361 insertions(+) create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsiarch/loongarch/boot/dts/Makefile +2
-0@@ -1,3 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb + obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +39
-0@@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include "loongson-2k0500.dtsi" + +/ { + compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500"; + model = "Loongson-2K0500 Reference Board"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon"; + }; + + cpu_clk: cpu-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <500000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + };
arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 49
Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +10
-0+ }; + }; + + cpu0: cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0x0>; + clocks = <&cpu_clk>; + }; + };
I've not read this whole patch, but from a glance - why is the cpu node in the board file, not the soc one?
Re: [PATCH v2 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500
Hi Conor:
Thanks for your reply.
Quoted 74 lines · Conor Dooley
Quoted 72 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.
Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/Makefile | 2 + .../boot/dts/loongson-2k0500-ref.dts | 115 +++++++++ arch/loongarch/boot/dts/loongson-2k0500.dtsi | 244 ++++++++++++++++++ 3 files changed, 361 insertions(+) create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsiarch/loongarch/boot/dts/Makefile +2
-0@@ -1,3 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb + obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +44
-0@@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include "loongson-2k0500.dtsi" + +/ { + compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500"; + model = "Loongson-2K0500 Reference Board"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon"; + }; + + cpu_clk: cpu-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <500000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + }; + }; + + cpu0: cpu@0 { + compatible = "loongson,la264";
Quoted 8 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 49
Quoted 5 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +5
-0+ device_type = "cpu"; + reg = <0x0>; + clocks = <&cpu_clk>; + }; + };I've not read this whole patch, but from a glance - why is the cpu node in the board file, not the soc one?
I'm very sorry, that was my mistake. cpu node should really be part of soc, I'll put it in dtsi.
Thanks.
Binbin
Re: [PATCH v2 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500
In reply to Binbin ZhouQuoted 40 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.
Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/Makefile | 2 + .../boot/dts/loongson-2k0500-ref.dts | 115 +++++++++ arch/loongarch/boot/dts/loongson-2k0500.dtsi | 244 ++++++++++++++++++ 3 files changed, 361 insertions(+) create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsiarch/loongarch/boot/dts/Makefile +2
-0@@ -1,3 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb + obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +12
-0@@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include "loongson-2k0500.dtsi" + +/ { + compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500"; + model = "Loongson-2K0500 Reference Board";
arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 22
Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +10
-0+ + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon";
No earlycon in mainline. It's just development, not for products.
arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 28
Quoted 6 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +6
-0+ }; + + cpu_clk: cpu-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <500000000>;
Conor already commented on this...
Quoted 179 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +87
-0+ }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + }; + }; + + cpu0: cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0x0>; + clocks = <&cpu_clk>; + }; + }; + + memory@200000 { + device_type = "memory"; + reg = <0x0 0x200000 0x0 0xee00000>, /* 238 MB at 2 MB */ + <0x0 0x90000000 0x0 0x60000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x2000000>; + linux,cma-default; + }; + }; +}; + +&gmac0 { + status = "okay"; + + phy-mode = "rgmii"; + bus_id = <0x0>; +}; + +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + bus_id = <0x1>; +}; + +&i2c0 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + eeprom@57{ + compatible = "atmel,24c16"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&rtc0 { + status = "okay"; +};arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +86
-0@@ -0,0 +1,244 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + #address-cells = <2>; + #size-cells = <2>; + + ref_100m: clock-ref-100m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "ref_100m"; + }; + + cpuintc: interrupt-controller { + compatible = "loongson,cpu-interrupt-controller"; + #interrupt-cells = <1>; + interrupt-controller; + }; + + bus@10000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, + <0x0 0x2000000 0x0 0x2000000 0x0 0x2000000>, + <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>, + <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, + <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; + + isa@16400000 { + compatible = "isa"; + #size-cells = <1>; + #address-cells = <2>; + ranges = <1 0x0 0x0 0x16400000 0x4000>; + }; + + liointc0: interrupt-controller@1fe11400 { + compatible = "loongson,liointc-2.0"; + reg = <0x0 0x1fe11400 0x0 0x40>, + <0x0 0x1fe11040 0x0 0x8>; + reg-names = "main", "isr0"; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <2>; + interrupt-names = "int0"; + + loongson,parent_int_map = <0xffffffff>, /* int0 */ + <0x00000000>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + liointc1: interrupt-controller@1fe11440 { + compatible = "loongson,liointc-2.0"; + reg = <0x0 0x1fe11440 0x0 0x40>, + <0x0 0x1fe11048 0x0 0x8>; + reg-names = "main", "isr0"; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <4>; + interrupt-names = "int2"; + + loongson,parent_int_map = <0x00000000>, /* int0 */ + <0x00000000>, /* int1 */ + <0xffffffff>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + eiointc: interrupt-controller@1fe11600 { + compatible = "loongson,ls2k0500-eiointc"; + reg = <0x0 0x1fe11600 0x0 0xea00>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&cpuintc>;
arch/loongarch/boot/dts/loongson-2k0500.dtsi line 96
Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +10
-0+ interrupts = <3>; + }; + + gmac0: ethernet@1f020000 { + compatible = "snps,dwmac-3.70a"; + reg = <0x0 0x1f020000 0x0 0x10000>; + interrupt-parent = <&liointc0>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + status = "disable";
That's not a valid status. Run some basic checks on your DTS before submitting it (dtbs_check W=1)
Best regards,
Krzysztof
Re: [PATCH v2 4/7] LoongArch: dts: DeviceTree for Loongson-2K0500
Hi Krzysztof:
Thanks for your reply.
Quoted 46 lines · Krzysztof Kozlowski
Quoted 44 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K0500 processor, which integrates one 64-bit dual emission superscalar LA264 processor core.
Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/Makefile | 2 + .../boot/dts/loongson-2k0500-ref.dts | 115 +++++++++ arch/loongarch/boot/dts/loongson-2k0500.dtsi | 244 ++++++++++++++++++ 3 files changed, 361 insertions(+) create mode 100644 arch/loongarch/boot/dts/loongson-2k0500-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k0500.dtsiarch/loongarch/boot/dts/Makefile +2
-0@@ -1,3 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb + obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +16
-0@@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include "loongson-2k0500.dtsi" + +/ { + compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500"; + model = "Loongson-2K0500 Reference Board"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1;
Quoted 8 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 22
Quoted 6 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +6
-0+ serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon";No earlycon in mainline. It's just development, not for products.
I got it, I'll recheck the other dts and delete them.
Quoted 194 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts line 28
Quoted 7 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +6
-0+ }; + + cpu_clk: cpu-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <500000000>;Conor already commented on this...
Quoted 184 lines
arch/loongarch/boot/dts/loongson-2k0500-ref.dts new file +87
-0+ }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + }; + }; + + cpu0: cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0x0>; + clocks = <&cpu_clk>; + }; + }; + + memory@200000 { + device_type = "memory"; + reg = <0x0 0x200000 0x0 0xee00000>, /* 238 MB at 2 MB */ + <0x0 0x90000000 0x0 0x60000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x2000000>; + linux,cma-default; + }; + }; +}; + +&gmac0 { + status = "okay"; + + phy-mode = "rgmii"; + bus_id = <0x0>; +}; + +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + bus_id = <0x1>; +}; + +&i2c0 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + eeprom@57{ + compatible = "atmel,24c16"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&rtc0 { + status = "okay"; +};arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +91
-0@@ -0,0 +1,244 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + #address-cells = <2>; + #size-cells = <2>; + + ref_100m: clock-ref-100m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "ref_100m"; + }; + + cpuintc: interrupt-controller { + compatible = "loongson,cpu-interrupt-controller"; + #interrupt-cells = <1>; + interrupt-controller; + }; + + bus@10000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, + <0x0 0x2000000 0x0 0x2000000 0x0 0x2000000>, + <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>, + <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, + <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; + + isa@16400000 { + compatible = "isa"; + #size-cells = <1>; + #address-cells = <2>; + ranges = <1 0x0 0x0 0x16400000 0x4000>; + }; + + liointc0: interrupt-controller@1fe11400 { + compatible = "loongson,liointc-2.0"; + reg = <0x0 0x1fe11400 0x0 0x40>, + <0x0 0x1fe11040 0x0 0x8>; + reg-names = "main", "isr0"; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <2>; + interrupt-names = "int0"; + + loongson,parent_int_map = <0xffffffff>, /* int0 */ + <0x00000000>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + liointc1: interrupt-controller@1fe11440 { + compatible = "loongson,liointc-2.0"; + reg = <0x0 0x1fe11440 0x0 0x40>, + <0x0 0x1fe11048 0x0 0x8>; + reg-names = "main", "isr0"; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <4>; + interrupt-names = "int2"; + + loongson,parent_int_map = <0x00000000>, /* int0 */ + <0x00000000>, /* int1 */ + <0xffffffff>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + eiointc: interrupt-controller@1fe11600 { + compatible = "loongson,ls2k0500-eiointc"; + reg = <0x0 0x1fe11600 0x0 0xea00>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&cpuintc>; + interrupts = <3>; + }; + + gmac0: ethernet@1f020000 { + compatible = "snps,dwmac-3.70a";
Quoted 8 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi line 96
Quoted 5 lines
arch/loongarch/boot/dts/loongson-2k0500.dtsi new file +5
-0+ reg = <0x0 0x1f020000 0x0 0x10000>; + interrupt-parent = <&liointc0>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + status = "disable";That's not a valid status. Run some basic checks on your DTS before submitting it (
dtbs_checkW=1)
I actually checked them before committing (dtbs_check W=1), except for the warning about liointc, this needs another patch to fix:
https://lore.kernel.org/all/[email protected]/
Since mips Loongson-2k1000 is also needed for it, I'm submitting it separately.
Thanks.
Binbin
Quoted 5 lines
Best regards,
Krzysztof
PATCH v2 5/7 LoongArch: dts: DeviceTree for Loongson-2K1000
In reply to Binbin ZhouAdd DeviceTree file for Loongson-2K1000 processor, which integrates two 64-bit dual emission superscalar LA264 processor cores.
Signed-off-by Binbin Zhou <[email protected]>
--- arch/loongarch/boot/dts/Makefile | 3 +- .../boot/dts/loongson-2k1000-ref.dts | 217 +++++++++++ arch/loongarch/boot/dts/loongson-2k1000.dtsi | 345 ++++++++++++++++++ 3 files changed, 564 insertions(+), 1 deletion(-) create mode 100644 arch/loongarch/boot/dts/loongson-2k1000-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k1000.dtsi
arch/loongarch/boot/dts/Makefile +2 -1
@@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb \ + loongson-2k1000-ref.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +217 -0
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arch/loongarch/boot/dts/loongson-2k1000.dtsi new file +345 -0
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Signature · 1 line
2.39.3
Re: [PATCH v2 5/7] LoongArch: dts: DeviceTree for Loongson-2K1000
Quoted 98 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K1000 processor, which integrates two 64-bit dual emission superscalar LA264 processor cores.
Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/Makefile | 3 +- .../boot/dts/loongson-2k1000-ref.dts | 217 +++++++++++ arch/loongarch/boot/dts/loongson-2k1000.dtsi | 345 ++++++++++++++++++ 3 files changed, 564 insertions(+), 1 deletion(-) create mode 100644 arch/loongarch/boot/dts/loongson-2k1000-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k1000.dtsiarch/loongarch/boot/dts/Makefile +2
-1@@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb \ + loongson-2k1000-ref.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +68
-0@@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include "loongson-2k1000.dtsi" + +/ { + compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000"; + model = "Loongson-2K1000 Reference Board"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + }; + + cpu0: cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg= <0x0>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + + cpu1: cpu@1 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0x1>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + }; + + memory@200000 { + device_type = "memory"; + reg = <0x0 0x200000 0x0 0x6e00000>, + <0x0 0x08000000 0x0 0x7000000>, + <0x0 0x90000000 0x1 0xe0000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x2000000>;
arch/loongarch/boot/dts/loongson-2k1000-ref.dts line 78
Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +10
-0+ linux,cma-default; + }; + }; + + i2c-gpio-0 { + compatible = "i2c-gpio"; + scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <5>; /* ~100 kHz */ + status = "disabled";
Disabled node in board, without comment providing a reason, is useless. Drop the node or fix the status.
arch/loongarch/boot/dts/loongson-2k1000-ref.dts line 86
Quoted 8 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +8
-0+ }; + + i2c-gpio-1 { + compatible = "i2c-gpio"; + scl-gpios = <&gpio0 33 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio0 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <5>; /* ~100 kHz */ + status = "disabled";
Ditto
arch/loongarch/boot/dts/loongson-2k1000-ref.dts line 98
Quoted 12 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +12
-0+ }; +}; + +&gmac0 { + status = "okay"; + + phy-mode = "rgmii"; + phy-handle = <&phy0>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio";
compatible is always the first property.
Quoted 5 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +5
-0+ phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +};
arch/loongarch/boot/dts/loongson-2k1000-ref.dts line 113
Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +10
-0+ +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + phy-handle = <&phy1>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio";
compatible is always the first property.
Quoted 5 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +5
-0+ phy1: ethernet-phy@1 { + reg = <16>; + }; + }; +};
...
Quoted 239 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +1
-0+};arch/loongarch/boot/dts/loongson-2k1000.dtsi new file +232
-0@@ -0,0 +1,345 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/loongson,ls2k-clk.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + #address-cells = <2>; + #size-cells = <2>; + + ref_100m: clock-ref-100m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "ref_100m"; + }; + + cpuintc: interrupt-controller { + compatible = "loongson,cpu-interrupt-controller"; + #interrupt-cells = <1>; + interrupt-controller; + }; + + bus@10000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, + <0x0 0x2000000 0x0 0x2000000 0x0 0x2000000>, + <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>, + <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, + <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; + + dma-coherent; + + liointc0: interrupt-controller@1fe01400 { + compatible = "loongson,liointc-2.0"; + reg = <0x0 0x1fe01400 0x0 0x40>, + <0x0 0x1fe01040 0x0 0x8>, + <0x0 0x1fe01140 0x0 0x8>; + reg-names = "main", "isr0", "isr1"; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <2>; + interrupt-names = "int0"; + loongson,parent_int_map = <0xffffffff>, /* int0 */ + <0x00000000>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + liointc1: interrupt-controller@1fe01440 { + compatible = "loongson,liointc-2.0"; + reg = <0x0 0x1fe01440 0x0 0x40>, + <0x0 0x1fe01048 0x0 0x8>, + <0x0 0x1fe01148 0x0 0x8>; + reg-names = "main", "isr0", "isr1"; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <3>; + interrupt-names = "int1"; + loongson,parent_int_map = <0x00000000>, /* int0 */ + <0xffffffff>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + global-utilities@1fe00000 { + compatible = "loongson,ls2k-chipid"; + reg = <0x0 0x1fe00000 0x0 0x3ffc>; + little-endian; + }; + + pctrl: pinctrl@1fe00420 { + compatible = "loongson,ls2k-pinctrl"; + reg = <0x0 0x1fe00420 0x0 0x18>; + status = "disabled"; + }; + + clk: clock-controller@1fe00480 { + compatible = "loongson,ls2k-clk"; + reg = <0x0 0x1fe00480 0x0 0x58>; + #clock-cells = <1>; + clocks = <&ref_100m>; + clock-names = "ref_100m"; + status = "disabled"; + }; + + gpio0: gpio@1fe00500 { + compatible = "loongson,ls2k-gpio"; + reg = <0x0 0x1fe00500 0x0 0x38>; + ngpios = <64>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pctrl 0x0 0x0 15>, + <&pctrl 16 16 15>, + <&pctrl 32 32 10>, + <&pctrl 44 44 20>; + interrupt-parent = <&liointc1>; + interrupts = <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <>, + <>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>; + }; + + uart0: serial@1fe20000 { + compatible = "ns16550a"; + reg = <0x0 0x1fe20000 0x0 0x10>; + clock-frequency = <125000000>; + interrupt-parent = <&liointc0>; + interrupts = <0x0 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + status = "disabled"; + }; + + i2c2: i2c@1fe21000 { + compatible = "loongson,ls2k-i2c"; + reg = <0x0 0x1fe21000 0x0 0x8>; + interrupt-parent = <&liointc0>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + i2c3: i2c@1fe21800 { + compatible = "loongson,ls2k-i2c"; + reg = <0x0 0x1fe21800 0x0 0x8>; + interrupt-parent = <&liointc0>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + rtc0: rtc@1fe27800 { + compatible = "loongson,ls2k1000-rtc"; + reg = <0x0 0x1fe27800 0x0 0x100>; + interrupt-parent = <&liointc1>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + pcie@1a000000 { + compatible = "loongson,ls2k-pci"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + + reg = <0x0 0x1a000000 0x0 0x02000000>, + <0xfe 0x0 0x0 0x20000000>; + + ranges = <0x1000000 0x0 0x8000 0x0 0x18008000 0x0 0x8000>, + <0x2000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>; /* mem */ + + gmac0: ethernet@3,0 { + reg = <0x1800 0x0 0x0 0x0 0x0>; + interrupt-parent = <&liointc0>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, + <13 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_lpi"; + status = "disabled"; + }; + + gmac1: ethernet@3,1 { + reg = <0x1900 0x0 0x0 0x0 0x0>; + interrupt-parent = <&liointc0>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
arch/loongarch/boot/dts/loongson-2k1000.dtsi line 242
Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k1000.dtsi new file +10
-0+ <15 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_lpi"; + status = "disabled"; + }; + + ehci0: usb@4,1 { + reg = <0x2100 0x0 0x0 0x0 0x0>; + interrupt-parent = <&liointc1>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled";
All these PCI devices are part of SoC? The SoC?
Best regards,
Krzysztof
Re: [PATCH v2 5/7] LoongArch: dts: DeviceTree for Loongson-2K1000
Hi Krzysztof:
Thanks for your reply.
Quoted 105 lines · Krzysztof Kozlowski
Quoted 103 lines · Binbin Zhou
Add DeviceTree file for Loongson-2K1000 processor, which integrates two 64-bit dual emission superscalar LA264 processor cores.
Signed-off-by Binbin Zhou <[email protected]>--- arch/loongarch/boot/dts/Makefile | 3 +- .../boot/dts/loongson-2k1000-ref.dts | 217 +++++++++++ arch/loongarch/boot/dts/loongson-2k1000.dtsi | 345 ++++++++++++++++++ 3 files changed, 564 insertions(+), 1 deletion(-) create mode 100644 arch/loongarch/boot/dts/loongson-2k1000-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k1000.dtsiarch/loongarch/boot/dts/Makefile +2
-1@@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb +dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb \ + loongson-2k1000-ref.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +73
-0@@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include "loongson-2k1000.dtsi" + +/ { + compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000"; + model = "Loongson-2K1000 Reference Board"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + }; + + cpu0: cpu@0 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg= <0x0>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + + cpu1: cpu@1 { + compatible = "loongson,la264"; + device_type = "cpu"; + reg = <0x1>; + clocks = <&clk LOONGSON2_NODE_CLK>; + }; + }; + + memory@200000 { + device_type = "memory"; + reg = <0x0 0x200000 0x0 0x6e00000>, + <0x0 0x08000000 0x0 0x7000000>, + <0x0 0x90000000 0x1 0xe0000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x2000000>; + linux,cma-default; + }; + }; + + i2c-gpio-0 {
Quoted 8 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts line 78
Quoted 5 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +5
-0+ compatible = "i2c-gpio"; + scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <5>; /* ~100 kHz */ + status = "disabled";Disabled node in board, without comment providing a reason, is useless. Drop the node or fix the status.
I got it, I will check it again.
Quoted 12 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts line 86
Quoted 9 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +8
-0+ }; + + i2c-gpio-1 { + compatible = "i2c-gpio"; + scl-gpios = <&gpio0 33 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio0 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <5>; /* ~100 kHz */ + status = "disabled";Ditto
Quoted 14 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts line 98
Quoted 12 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +12
-0+ }; +}; + +&gmac0 { + status = "okay"; + + phy-mode = "rgmii"; + phy-handle = <&phy0>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio";compatible is always the first property.
OK...
Quoted 271 lines
Quoted 6 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +5
-0+ phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +};arch/loongarch/boot/dts/loongson-2k1000-ref.dts line 113
Quoted 10 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +10
-0+ +&gmac1 { + status = "okay"; + + phy-mode = "rgmii"; + phy-handle = <&phy1>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio";compatible is always the first property.
Quoted 5 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +5
-0+ phy1: ethernet-phy@1 { + reg = <16>; + }; + }; +};...
Quoted 244 lines
arch/loongarch/boot/dts/loongson-2k1000-ref.dts new file +1
-0+};arch/loongarch/boot/dts/loongson-2k1000.dtsi new file +237
-0@@ -0,0 +1,345 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Loongson Technology Corporation Limited + */ + +/dts-v1/; + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/loongson,ls2k-clk.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + #address-cells = <2>; + #size-cells = <2>; + + ref_100m: clock-ref-100m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "ref_100m"; + }; + + cpuintc: interrupt-controller { + compatible = "loongson,cpu-interrupt-controller"; + #interrupt-cells = <1>; + interrupt-controller; + }; + + bus@10000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, + <0x0 0x2000000 0x0 0x2000000 0x0 0x2000000>, + <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>, + <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>, + <0xfe 0x0 0xfe 0x0 0x0 0x40000000>; + + dma-coherent; + + liointc0: interrupt-controller@1fe01400 { + compatible = "loongson,liointc-2.0"; + reg = <0x0 0x1fe01400 0x0 0x40>, + <0x0 0x1fe01040 0x0 0x8>, + <0x0 0x1fe01140 0x0 0x8>; + reg-names = "main", "isr0", "isr1"; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <2>; + interrupt-names = "int0"; + loongson,parent_int_map = <0xffffffff>, /* int0 */ + <0x00000000>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + liointc1: interrupt-controller@1fe01440 { + compatible = "loongson,liointc-2.0"; + reg = <0x0 0x1fe01440 0x0 0x40>, + <0x0 0x1fe01048 0x0 0x8>, + <0x0 0x1fe01148 0x0 0x8>; + reg-names = "main", "isr0", "isr1"; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&cpuintc>; + interrupts = <3>; + interrupt-names = "int1"; + loongson,parent_int_map = <0x00000000>, /* int0 */ + <0xffffffff>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + }; + + global-utilities@1fe00000 { + compatible = "loongson,ls2k-chipid"; + reg = <0x0 0x1fe00000 0x0 0x3ffc>; + little-endian; + }; + + pctrl: pinctrl@1fe00420 { + compatible = "loongson,ls2k-pinctrl"; + reg = <0x0 0x1fe00420 0x0 0x18>; + status = "disabled"; + }; + + clk: clock-controller@1fe00480 { + compatible = "loongson,ls2k-clk"; + reg = <0x0 0x1fe00480 0x0 0x58>; + #clock-cells = <1>; + clocks = <&ref_100m>; + clock-names = "ref_100m"; + status = "disabled"; + }; + + gpio0: gpio@1fe00500 { + compatible = "loongson,ls2k-gpio"; + reg = <0x0 0x1fe00500 0x0 0x38>; + ngpios = <64>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pctrl 0x0 0x0 15>, + <&pctrl 16 16 15>, + <&pctrl 32 32 10>, + <&pctrl 44 44 20>; + interrupt-parent = <&liointc1>; + interrupts = <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <>, + <>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>; + }; + + uart0: serial@1fe20000 { + compatible = "ns16550a"; + reg = <0x0 0x1fe20000 0x0 0x10>; + clock-frequency = <125000000>; + interrupt-parent = <&liointc0>; + interrupts = <0x0 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + status = "disabled"; + }; + + i2c2: i2c@1fe21000 { + compatible = "loongson,ls2k-i2c"; + reg = <0x0 0x1fe21000 0x0 0x8>; + interrupt-parent = <&liointc0>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + i2c3: i2c@1fe21800 { + compatible = "loongson,ls2k-i2c"; + reg = <0x0 0x1fe21800 0x0 0x8>; + interrupt-parent = <&liointc0>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + rtc0: rtc@1fe27800 { + compatible = "loongson,ls2k1000-rtc"; + reg = <0x0 0x1fe27800 0x0 0x100>; + interrupt-parent = <&liointc1>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + pcie@1a000000 { + compatible = "loongson,ls2k-pci"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + + reg = <0x0 0x1a000000 0x0 0x02000000>, + <0xfe 0x0 0x0 0x20000000>; + + ranges = <0x1000000 0x0 0x8000 0x0 0x18008000 0x0 0x8000>, + <0x2000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>; /* mem */ + + gmac0: ethernet@3,0 { + reg = <0x1800 0x0 0x0 0x0 0x0>; + interrupt-parent = <&liointc0>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, + <13 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_lpi"; + status = "disabled"; + }; + + gmac1: ethernet@3,1 { + reg = <0x1900 0x0 0x0 0x0 0x0>; + interrupt-parent = <&liointc0>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>, + <15 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_lpi"; + status = "disabled"; + }; +
Quoted 8 lines
arch/loongarch/boot/dts/loongson-2k1000.dtsi line 242
Quoted 5 lines
arch/loongarch/boot/dts/loongson-2k1000.dtsi new file +5
-0+ ehci0: usb@4,1 { + reg = <0x2100 0x0 0x0 0x0 0x0>; + interrupt-parent = <&liointc1>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled";All these PCI devices are part of SoC? The SoC?
Yes, these PCI devices are SoC on-chip integrated.
They are connected to the IO interconnect module via a multi-stage interconnect bus.
Thanks.
Binbin
Quoted 4 lines
Best regards,
Krzysztof
PATCH v2 6/7 LoongArch: dts: DeviceTree for Loongson-2K2000
In reply to Binbin ZhouAdd DeviceTree file for Loongson-2K2000 processor, which integrates two 64-bit triple emission superscalar LA364 processor cores.
Signed-off-by Binbin Zhou <[email protected]>
--- arch/loongarch/boot/dts/Makefile | 3 +- .../boot/dts/loongson-2k2000-ref.dts | 89 ++++++ arch/loongarch/boot/dts/loongson-2k2000.dtsi | 257 ++++++++++++++++++ 3 files changed, 348 insertions(+), 1 deletion(-) create mode 100644 arch/loongarch/boot/dts/loongson-2k2000-ref.dts create mode 100644 arch/loongarch/boot/dts/loongson-2k2000.dtsi
arch/loongarch/boot/dts/Makefile +2 -1
@@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only dtb-$(CONFIG_MACH_LOONGSON64) = loongson-2k0500-ref.dtb \ - loongson-2k1000-ref.dtb + loongson-2k1000-ref.dtb \ + loongson-2k2000-ref.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
arch/loongarch/boot/dts/loongson-2k2000-ref.dts new file +89 -0
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arch/loongarch/boot/dts/loongson-2k2000.dtsi new file +257 -0
257 lines not on this page · raw message
Signature · 1 line
2.39.3
PATCH v2 7/7 LoongArch: Parsing CPU-related information from DTS
In reply to Binbin ZhouGenerally, we can get cpu-related information, such as model name, from /proc/cpuinfo. for DT-based systems, we need to parse the relevant information from DTS.
Signed-off-by Binbin Zhou <[email protected]>
Signed-off-by Hongliang Wang <[email protected]>
--- arch/loongarch/kernel/env.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+)
arch/loongarch/kernel/env.c +33 -0
@@ -5,13 +5,16 @@* Copyright (C) 2020-2022 Loongson Technology Corporation Limited */ #include <linux/acpi.h> +#include <linux/clk.h> #include <linux/efi.h> #include <linux/export.h> #include <linux/memblock.h> +#include <linux/of_clk.h> #include <asm/early_ioremap.h> #include <asm/bootinfo.h> #include <asm/loongson.h> #include <asm/setup.h> +#include <asm/time.h> u64 efi_system_table;struct loongson_system_configuration loongson_sysconf;
@@ -34,9 +37,39 @@ void __init init_environ(void) efi_system_table = fw_arg2; } +static int __init fdt_cpu_clk_init (void ) +{ +struct clk *clk; +struct device_node *np; + + np =of_get_cpu_node (0 ,NULL ); +if (!np) +return -ENODEV ; + + clk =of_clk_get (np,0 ); +if (IS_ERR (clk)) +return -ENODEV ; + + cpu_clock_freq =clk_get_rate (clk); +clk_put (clk); + +return 0 ; +} +late_initcall (fdt_cpu_clk_init); +static int __init init_cpu_fullname (void ) {int cpu; +char *prop; +struct device_node *root; + +/* Parsing cpuname from DTS model property */ + root =of_find_node_by_path ("/" ); +if (root) { +of_property_read_string (root,"model" , (const char **)&prop); +if (prop) + loongson_sysconf.cpuname =strsep (&prop," " ); + }if (loongson_sysconf.cpuname && !strncmp (loongson_sysconf.cpuname,"Loongson" ,8 )) {for (cpu =0 ; cpu <NR_CPUS ; cpu++)
Signature · 1 line
2.39.3