armada-370-xp irqchip updates round 2
Subsystems (2)
v2 cover armada-370-xp irqchip updates round 2
Hi Thomas, Andrew et al.
sending v2 of round 2 of changes for the armada-370-xp irqchip.
v1 at:
https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=867224
Changes since v1:
- added Andrew's R-b tags
- reordered and refactored some patches, mainly to address Andrew's comments to v1 patches
irqchip/armada-370-xp: Simplify ipi_resume() code irqchip/armada-370-xp: Use !virq instead of virq == 0
- added some new patches
Marek
Marek Behún (30):
irqchip/armada-370-xp: Drop _OFFS suffix from some register constants irqchip/armada-370-xp: Change register constant suffix from _MSK to
_MASK
irqchip/armada-370-xp: Change spaces to tabs irqchip/armada-370-xp: Use BIT() and GENMASK() macros irqchip/armada-370-xp: Cosmetic fix parentheses in register constant
definitions
irqchip/armada-370-xp: Change register constants prefix to MPIC_ irqchip/armada-370-xp: Use correct type for cpu variable irqchip/armada-370-xp: Simplify is_percpu_irq() code irqchip/armada-370-xp: Change to SPDX license identifier irqchip/armada-370-xp: Declare iterators in for loop irqchip/armada-370-xp: Rename variable for consistency irqchip/armada-370-xp: Use unsigned int type for virqs irqchip/armada-370-xp: Use !virq instead of virq == 0 in condition irqchip/armada-370-xp: Simplify ipi_resume() code irqchip/armada-370-xp: Improve indentation irqchip/armada-370-xp: Change symbol prefixes to mpic irqchip/armada-370-xp: Don't read number of supported interrupts
multiple times
irqchip/armada-370-xp: Use FIELD_GET() and named register constant irqchip/armada-370-xp: Refactor mpic_handle_msi_irq() code irqchip/armada-370-xp: Refactor handling IPI interrupts irqchip/armada-370-xp: Use consistent variable names for hwirqs irqchip/armada-370-xp: Use consistent types when iterating interrupts irqchip/armada-370-xp: Use consistent name for struct irq_data
variables
irqchip/armada-370-xp: Simplify mpic_reenable_percpu() and
mpic_resume()
irqchip/armada-370-xp: Drop unneeded curly brackets irqchip/armada-370-xp: Drop redundant continue irqchip/armada-370-xp: Rename variable for consistency irqchip/armada-370-xp: Use u32 type instead of unsigned long where
possieble
irqchip/armada-370-xp: Refactor initial memory regions mapping irqchip/armada-370-xp: Print error and return error code on
initialization failure
drivers/irqchip/irq-armada-370-xp.c | 729 ++++++++++++++-------------- 1 file changed, 357 insertions(+), 372 deletions(-)
Signature · 1 line
2.44.2
PATCH v2 1/30 irqchip/armada-370-xp: Drop _OFFS suffix from some register constants
Some register constants have the _OFFS suffix and some do not. Drop it to be more consistent.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 105 +++++++++++++--------------- 1 file changed, 48 insertions(+), 57 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +48 -57
@@ -66,15 +66,14 @@* device * * The "global interrupt mask/unmask" is modified using the -* ARMADA_370_XP_INT_SET_ENABLE_OFFS and -* ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS registers, which are relative -* to "main_int_base". +* ARMADA_370_XP_INT_SET_ENABLE and ARMADA_370_XP_INT_CLEAR_ENABLE +* registers, which are relative to "main_int_base". * * The "per-CPU mask/unmask" is modified using the -* ARMADA_370_XP_INT_SET_MASK_OFFS and -* ARMADA_370_XP_INT_CLEAR_MASK_OFFS registers, which are relative to -* "per_cpu_int_base". This base address points to a special address, -* which automatically accesses the registers of the current CPU. +* ARMADA_370_XP_INT_SET_MASK and ARMADA_370_XP_INT_CLEAR_MASK +* registers, which are relative to "per_cpu_int_base". This base +* address points to a special address, which automatically accesses +* the registers of the current CPU. * * The per-CPU mask/unmask can also be adjusted using the global * per-interrupt ARMADA_370_XP_INT_SOURCE_CTL register, which we use
@@ -118,21 +117,21 @@/* Registers relative to main_int_base */ #define ARMADA_370_XP_INT_CONTROL (0x00) -#define ARMADA_370_XP_SW_TRIG_INT_OFFS (0x04) -#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30) -#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34) +#define ARMADA_370_XP_SW_TRIG_INT (0x04) +#define ARMADA_370_XP_INT_SET_ENABLE (0x30) +#define ARMADA_370_XP_INT_CLEAR_ENABLE (0x34)#define ARMADA_370_XP_INT_SOURCE_CTL (irq) (0x100 + irq*4)#define ARMADA_370_XP_INT_SOURCE_CPU_MASK 0xF#define ARMADA_370_XP_INT_IRQ_FIQ_MASK (cpuid) ((BIT(0) | BIT(8)) << cpuid)/* Registers relative to per_cpu_int_base */ -#define ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS (0x08) -#define ARMADA_370_XP_IN_DRBEL_MSK_OFFS (0x0c) +#define ARMADA_370_XP_IN_DRBEL_CAUSE (0x08) +#define ARMADA_370_XP_IN_DRBEL_MSK (0x0c)#define ARMADA_375_PPI_CAUSE (0x10) -#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44) -#define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48) -#define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C) -#define ARMADA_370_XP_INT_FABRIC_MASK_OFFS (0x54) +#define ARMADA_370_XP_CPU_INTACK (0x44) +#define ARMADA_370_XP_INT_SET_MASK (0x48) +#define ARMADA_370_XP_INT_CLEAR_MASK (0x4C) +#define ARMADA_370_XP_INT_FABRIC_MASK (0x54)#define ARMADA_370_XP_INT_CAUSE_PERF (cpu) (1 << cpu)#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28)
@@ -220,11 +219,9 @@ static void armada_370_xp_irq_mask(struct irq_data *d)irq_hw_number_t hwirq =irqd_to_hwirq (d);if (!is_percpu_irq (hwirq)) -writel (hwirq, main_int_base + -ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS ); +writel (hwirq, main_int_base +ARMADA_370_XP_INT_CLEAR_ENABLE );else -writel (hwirq, per_cpu_int_base + -ARMADA_370_XP_INT_SET_MASK_OFFS ); +writel (hwirq, per_cpu_int_base +ARMADA_370_XP_INT_SET_MASK ); }static void armada_370_xp_irq_unmask (struct irq_data *d)
@@ -232,11 +229,9 @@ static void armada_370_xp_irq_unmask(struct irq_data *d)irq_hw_number_t hwirq =irqd_to_hwirq (d);if (!is_percpu_irq (hwirq)) -writel (hwirq, main_int_base + -ARMADA_370_XP_INT_SET_ENABLE_OFFS ); +writel (hwirq, main_int_base +ARMADA_370_XP_INT_SET_ENABLE );else -writel (hwirq, per_cpu_int_base + -ARMADA_370_XP_INT_CLEAR_MASK_OFFS ); +writel (hwirq, per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK ); }#ifdef CONFIG_PCI_MSI
@@ -329,19 +324,18 @@ static void armada_370_xp_msi_reenable_percpu(void)u32 reg;/* Enable MSI doorbell mask and combined cpu local interrupt */ - reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK_OFFS ); + reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); reg |=msi_doorbell_mask (); -writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK_OFFS ); +writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK );/* Unmask local doorbell interrupt */ -writel (1 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK_OFFS ); +writel (1 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK ); }static int armada_370_xp_msi_init (struct device_node *node,phys_addr_t main_int_phys_base) { - msi_doorbell_addr = main_int_phys_base + -ARMADA_370_XP_SW_TRIG_INT_OFFS ; + msi_doorbell_addr = main_int_phys_base +ARMADA_370_XP_SW_TRIG_INT ; armada_370_xp_msi_inner_domain = irq_domain_add_linear(NULL, msi_doorbell_size(),
@@ -362,7 +356,7 @@ static int armada_370_xp_msi_init(struct device_node *node,/* Unmask low 16 MSI irqs on non-IPI platforms */ if (!is_ipi_available ()) -writel (0 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK_OFFS ); +writel (0 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK );return 0 ; }
@@ -391,7 +385,7 @@ static void armada_xp_mpic_perf_init(void)/* Enable Performance Counter Overflow interrupts */ writel (ARMADA_370_XP_INT_CAUSE_PERF (cpuid), - per_cpu_int_base +ARMADA_370_XP_INT_FABRIC_MASK_OFFS ); + per_cpu_int_base +ARMADA_370_XP_INT_FABRIC_MASK ); }#ifdef CONFIG_SMP
@@ -400,17 +394,17 @@ static struct irq_domain *ipi_domain;static void armada_370_xp_ipi_mask (struct irq_data *d) {u32 reg; - reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK_OFFS ); + reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); reg &= ~BIT (d->hwirq); -writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK_OFFS ); +writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); }static void armada_370_xp_ipi_unmask (struct irq_data *d) {u32 reg; - reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK_OFFS ); + reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); reg |=BIT (d->hwirq); -writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK_OFFS ); +writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); } static void armada_370_xp_ipi_send_mask(struct irq_data *d,
@@ -431,12 +425,12 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d,/* submit softirq */ writel ((map <<8 ) | d->hwirq, main_int_base + -ARMADA_370_XP_SW_TRIG_INT_OFFS ); +ARMADA_370_XP_SW_TRIG_INT ); }static void armada_370_xp_ipi_ack (struct irq_data *d) { -writel (~BIT (d->hwirq), per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS ); +writel (~BIT (d->hwirq), per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE ); }static struct irq_chip ipi_irqchip = {
@@ -539,19 +533,19 @@ static void armada_xp_mpic_smp_cpu_init(void) nr_irqs = (control >>2 ) &0x3ff ;for (i =0 ; i < nr_irqs; i++) -writel (i, per_cpu_int_base +ARMADA_370_XP_INT_SET_MASK_OFFS ); +writel (i, per_cpu_int_base +ARMADA_370_XP_INT_SET_MASK );if (!is_ipi_available ())return ;/* Disable all IPIs */ -writel (0 , per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK_OFFS ); +writel (0 , per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK );/* Clear pending IPIs */ -writel (0 , per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS ); +writel (0 , per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE );/* Unmask IPI interrupt */ -writel (0 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK_OFFS ); +writel (0 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK ); }static void armada_xp_mpic_reenable_percpu (void )
@@ -622,9 +616,9 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,armada_370_xp_irq_mask (irq_get_irq_data (virq));if (!is_percpu_irq (hw))writel (hw, per_cpu_int_base + -ARMADA_370_XP_INT_CLEAR_MASK_OFFS ); +ARMADA_370_XP_INT_CLEAR_MASK );else -writel (hw, main_int_base +ARMADA_370_XP_INT_SET_ENABLE_OFFS ); +writel (hw, main_int_base +ARMADA_370_XP_INT_SET_ENABLE );irq_set_status_flags (virq,IRQ_LEVEL );if (is_percpu_irq (hw)) {
@@ -651,12 +645,10 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained) {u32 msimask, msinr; - msimask =readl_relaxed (per_cpu_int_base + -ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS ); + msimask =readl_relaxed (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE ); msimask &=msi_doorbell_mask (); -writel (~msimask, per_cpu_int_base + -ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS ); +writel (~msimask, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE );for (msinr =msi_doorbell_start (); msinr <msi_doorbell_end (); msinr++) {
@@ -712,7 +704,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) do { irqstat = readl_relaxed(per_cpu_int_base + - ARMADA_370_XP_CPU_INTACK_OFFS); + ARMADA_370_XP_CPU_INTACK); irqnr = irqstat & 0x3FF; if (irqnr > 1022)
@@ -735,7 +727,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs)int ipi; ipimask =readl_relaxed (per_cpu_int_base + -ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS ) +ARMADA_370_XP_IN_DRBEL_CAUSE ) &IPI_DOORBELL_MASK ;for_each_set_bit (ipi, &ipimask,IPI_DOORBELL_END )
@@ -748,8 +740,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs)static int armada_370_xp_mpic_suspend (void ) { - doorbell_mask_reg =readl (per_cpu_int_base + -ARMADA_370_XP_IN_DRBEL_MSK_OFFS ); + doorbell_mask_reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK );return 0 ; }
@@ -774,13 +765,13 @@ static void armada_370_xp_mpic_resume(void)if (!is_percpu_irq (irq)) {/* Non per-CPU interrupts */ writel (irq, per_cpu_int_base + -ARMADA_370_XP_INT_CLEAR_MASK_OFFS ); +ARMADA_370_XP_INT_CLEAR_MASK );if (!irqd_irq_disabled (data))armada_370_xp_irq_unmask (data); }else {/* Per-CPU interrupts */ writel (irq, main_int_base + -ARMADA_370_XP_INT_SET_ENABLE_OFFS ); +ARMADA_370_XP_INT_SET_ENABLE );/* * Re-enable on the current CPU,
@@ -794,7 +785,7 @@ static void armada_370_xp_mpic_resume(void)/* Reconfigure doorbells for IPIs and MSIs */ writel (doorbell_mask_reg, - per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK_OFFS ); + per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK );if (is_ipi_available ()) { src0 = doorbell_mask_reg &IPI_DOORBELL_MASK ;
@@ -805,9 +796,9 @@ static void armada_370_xp_mpic_resume(void) }if (src0) -writel (0 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK_OFFS ); +writel (0 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK );if (src1) -writel (1 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK_OFFS ); +writel (1 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK );if (is_ipi_available ())ipi_resume ();
@@ -847,7 +838,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, nr_irqs = (control >>2 ) &0x3ff ;for (i =0 ; i < nr_irqs; i++) -writel (i, main_int_base +ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS ); +writel (i, main_int_base +ARMADA_370_XP_INT_CLEAR_ENABLE ); armada_370_xp_mpic_domain = irq_domain_add_linear(node, nr_irqs,
Signature · 1 line
2.44.2
PATCH v2 2/30 irqchip/armada-370-xp: Change register constant suffix from _MSK to _MASK
In reply to Marek BehúnThere is one occurrence of suffix _MSK in register constants, others have _MASK instead. Change the one to _MASK for consistency.
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +10 -10
@@ -126,7 +126,7 @@/* Registers relative to per_cpu_int_base */ #define ARMADA_370_XP_IN_DRBEL_CAUSE (0x08) -#define ARMADA_370_XP_IN_DRBEL_MSK (0x0c) +#define ARMADA_370_XP_IN_DRBEL_MASK (0x0c)#define ARMADA_375_PPI_CAUSE (0x10)#define ARMADA_370_XP_CPU_INTACK (0x44)#define ARMADA_370_XP_INT_SET_MASK (0x48)
@@ -324,9 +324,9 @@ static void armada_370_xp_msi_reenable_percpu(void)u32 reg;/* Enable MSI doorbell mask and combined cpu local interrupt */ - reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); + reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); reg |=msi_doorbell_mask (); -writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); +writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK );/* Unmask local doorbell interrupt */ writel (1 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK );
@@ -394,17 +394,17 @@ static struct irq_domain *ipi_domain;static void armada_370_xp_ipi_mask (struct irq_data *d) {u32 reg; - reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); + reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); reg &= ~BIT (d->hwirq); -writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); +writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); }static void armada_370_xp_ipi_unmask (struct irq_data *d) {u32 reg; - reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); + reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); reg |=BIT (d->hwirq); -writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); +writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); } static void armada_370_xp_ipi_send_mask(struct irq_data *d,
@@ -539,7 +539,7 @@ static void armada_xp_mpic_smp_cpu_init(void)return ;/* Disable all IPIs */ -writel (0 , per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); +writel (0 , per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK );/* Clear pending IPIs */ writel (0 , per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE );
@@ -740,7 +740,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs)static int armada_370_xp_mpic_suspend (void ) { - doorbell_mask_reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); + doorbell_mask_reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK );return 0 ; }
@@ -785,7 +785,7 @@ static void armada_370_xp_mpic_resume(void)/* Reconfigure doorbells for IPIs and MSIs */ writel (doorbell_mask_reg, - per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MSK ); + per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK );if (is_ipi_available ()) { src0 = doorbell_mask_reg &IPI_DOORBELL_MASK ;
Signature · 1 line
2.44.2
PATCH v2 3/30 irqchip/armada-370-xp: Change spaces to tabs
In reply to Marek BehúnChange spaces to tabs in register constants definitions.
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +7 -7
@@ -137,13 +137,13 @@#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28)/* IPI and MSI interrupt definitions for IPI platforms */ -#define IPI_DOORBELL_START (0) -#define IPI_DOORBELL_END (8) -#define IPI_DOORBELL_MASK 0xFF -#define PCI_MSI_DOORBELL_START (16) -#define PCI_MSI_DOORBELL_NR (16) -#define PCI_MSI_DOORBELL_END (32) -#define PCI_MSI_DOORBELL_MASK 0xFFFF0000 +#define IPI_DOORBELL_START (0) +#define IPI_DOORBELL_END (8) +#define IPI_DOORBELL_MASK 0xFF +#define PCI_MSI_DOORBELL_START (16) +#define PCI_MSI_DOORBELL_NR (16) +#define PCI_MSI_DOORBELL_END (32) +#define PCI_MSI_DOORBELL_MASK 0xFFFF0000/* MSI interrupt definitions for non-IPI platforms */ #define PCI_MSI_FULL_DOORBELL_START 0
Signature · 1 line
2.44.2
PATCH v2 4/30 irqchip/armada-370-xp: Use BIT() and GENMASK() macros
In reply to Marek BehúnUse the BIT() and GENMASK() macros where appropriate.
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +5 -5
@@ -121,7 +121,7 @@#define ARMADA_370_XP_INT_SET_ENABLE (0x30)#define ARMADA_370_XP_INT_CLEAR_ENABLE (0x34)#define ARMADA_370_XP_INT_SOURCE_CTL (irq) (0x100 + irq*4) -#define ARMADA_370_XP_INT_SOURCE_CPU_MASK 0xF +#define ARMADA_370_XP_INT_SOURCE_CPU_MASK GENMASK(3, 0)#define ARMADA_370_XP_INT_IRQ_FIQ_MASK (cpuid) ((BIT(0) | BIT(8)) << cpuid)/* Registers relative to per_cpu_int_base */
@@ -132,18 +132,18 @@#define ARMADA_370_XP_INT_SET_MASK (0x48)#define ARMADA_370_XP_INT_CLEAR_MASK (0x4C)#define ARMADA_370_XP_INT_FABRIC_MASK (0x54) -#define ARMADA_370_XP_INT_CAUSE_PERF (cpu) (1 << cpu) +#define ARMADA_370_XP_INT_CAUSE_PERF (cpu) BIT(cpu)#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28)/* IPI and MSI interrupt definitions for IPI platforms */ #define IPI_DOORBELL_START (0)#define IPI_DOORBELL_END (8) -#define IPI_DOORBELL_MASK 0xFF +#define IPI_DOORBELL_MASK GENMASK(7, 0)#define PCI_MSI_DOORBELL_START (16)#define PCI_MSI_DOORBELL_NR (16)#define PCI_MSI_DOORBELL_END (32) -#define PCI_MSI_DOORBELL_MASK 0xFFFF0000 +#define PCI_MSI_DOORBELL_MASK GENMASK(31, 16)/* MSI interrupt definitions for non-IPI platforms */ #define PCI_MSI_FULL_DOORBELL_START 0
@@ -415,7 +415,7 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d,/* Convert our logical CPU mask into a physical one. */ for_each_cpu (cpu, mask) - map |=1 <<cpu_logical_map (cpu); + map |=BIT (cpu_logical_map (cpu));/* * Ensure that stores to Normal memory are visible to the
Signature · 1 line
2.44.2
PATCH v2 5/30 irqchip/armada-370-xp: Cosmetic fix parentheses in register constant definitions
In reply to Marek BehúnDrop parentheses where not needed and add where makes sense in register constant definitions.
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 38 ++++++++++++++--------------- 1 file changed, 19 insertions(+), 19 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +19 -19
@@ -116,33 +116,33 @@*/ /* Registers relative to main_int_base */ -#define ARMADA_370_XP_INT_CONTROL (0x00) -#define ARMADA_370_XP_SW_TRIG_INT (0x04) -#define ARMADA_370_XP_INT_SET_ENABLE (0x30) -#define ARMADA_370_XP_INT_CLEAR_ENABLE (0x34) -#define ARMADA_370_XP_INT_SOURCE_CTL (irq) (0x100 + irq*4) +#define ARMADA_370_XP_INT_CONTROL 0x00 +#define ARMADA_370_XP_SW_TRIG_INT 0x04 +#define ARMADA_370_XP_INT_SET_ENABLE 0x30 +#define ARMADA_370_XP_INT_CLEAR_ENABLE 0x34 +#define ARMADA_370_XP_INT_SOURCE_CTL (irq) (0x100 + (irq) * 4)#define ARMADA_370_XP_INT_SOURCE_CPU_MASK GENMASK(3, 0) -#define ARMADA_370_XP_INT_IRQ_FIQ_MASK (cpuid) ((BIT(0) | BIT(8)) << cpuid) +#define ARMADA_370_XP_INT_IRQ_FIQ_MASK (cpuid) ((BIT(0) | BIT(8)) << (cpuid))/* Registers relative to per_cpu_int_base */ -#define ARMADA_370_XP_IN_DRBEL_CAUSE (0x08) -#define ARMADA_370_XP_IN_DRBEL_MASK (0x0c) -#define ARMADA_375_PPI_CAUSE (0x10) -#define ARMADA_370_XP_CPU_INTACK (0x44) -#define ARMADA_370_XP_INT_SET_MASK (0x48) -#define ARMADA_370_XP_INT_CLEAR_MASK (0x4C) -#define ARMADA_370_XP_INT_FABRIC_MASK (0x54) +#define ARMADA_370_XP_IN_DRBEL_CAUSE 0x08 +#define ARMADA_370_XP_IN_DRBEL_MASK 0x0c +#define ARMADA_375_PPI_CAUSE 0x10 +#define ARMADA_370_XP_CPU_INTACK 0x44 +#define ARMADA_370_XP_INT_SET_MASK 0x48 +#define ARMADA_370_XP_INT_CLEAR_MASK 0x4C +#define ARMADA_370_XP_INT_FABRIC_MASK 0x54#define ARMADA_370_XP_INT_CAUSE_PERF (cpu) BIT(cpu) -#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28) +#define ARMADA_370_XP_MAX_PER_CPU_IRQS 28/* IPI and MSI interrupt definitions for IPI platforms */ -#define IPI_DOORBELL_START (0) -#define IPI_DOORBELL_END (8) +#define IPI_DOORBELL_START 0 +#define IPI_DOORBELL_END 8#define IPI_DOORBELL_MASK GENMASK(7, 0) -#define PCI_MSI_DOORBELL_START (16) -#define PCI_MSI_DOORBELL_NR (16) -#define PCI_MSI_DOORBELL_END (32) +#define PCI_MSI_DOORBELL_START 16 +#define PCI_MSI_DOORBELL_NR 16 +#define PCI_MSI_DOORBELL_END 32#define PCI_MSI_DOORBELL_MASK GENMASK(31, 16)/* MSI interrupt definitions for non-IPI platforms */
Signature · 1 line
2.44.2
Re: [PATCH v2 05/30] irqchip/armada-370-xp: Cosmetic fix parentheses in register constant definitions
Quoted 35 lines · Marek Behún
Drop parentheses where not needed and add where makes sense in register constant definitions.
Signed-off-by Marek Behún <[email protected]>Reviewed-by Andrew Lunn <[email protected]>--- drivers/irqchip/irq-armada-370-xp.c | 38 ++++++++++++++--------------- 1 file changed, 19 insertions(+), 19 deletions(-)drivers/irqchip/irq-armada-370-xp.c +6
-9@@ -116,33 +116,33 @@*/ /* Registers relative to main_int_base */ -#define ARMADA_370_XP_INT_CONTROL (0x00) -#define ARMADA_370_XP_SW_TRIG_INT (0x04) -#define ARMADA_370_XP_INT_SET_ENABLE (0x30) -#define ARMADA_370_XP_INT_CLEAR_ENABLE (0x34) -#define ARMADA_370_XP_INT_SOURCE_CTL (irq) (0x100 + irq*4) +#define ARMADA_370_XP_INT_CONTROL 0x00 +#define ARMADA_370_XP_SW_TRIG_INT 0x04 +#define ARMADA_370_XP_INT_SET_ENABLE 0x30 +#define ARMADA_370_XP_INT_CLEAR_ENABLE 0x34 +#define ARMADA_370_XP_INT_SOURCE_CTL (irq) (0x100 + (irq) * 4)#define ARMADA_370_XP_INT_SOURCE_CPU_MASK GENMASK(3, 0) -#define ARMADA_370_XP_INT_IRQ_FIQ_MASK (cpuid) ((BIT(0) | BIT(8)) << cpuid) +#define ARMADA_370_XP_INT_IRQ_FIQ_MASK (cpuid) ((BIT(0) | BIT(8)) << (cpuid))/* Registers relative to per_cpu_int_base */ -#define ARMADA_370_XP_IN_DRBEL_CAUSE (0x08) -#define ARMADA_370_XP_IN_DRBEL_MASK (0x0c) -#define ARMADA_375_PPI_CAUSE (0x10)
drivers/irqchip/irq-armada-370-xp.c line 133
Quoted 10 lines
drivers/irqchip/irq-armada-370-xp.c +6
-4-#define ARMADA_370_XP_CPU_INTACK (0x44) -#define ARMADA_370_XP_INT_SET_MASK (0x48) -#define ARMADA_370_XP_INT_CLEAR_MASK (0x4C) -#define ARMADA_370_XP_INT_FABRIC_MASK (0x54) +#define ARMADA_370_XP_IN_DRBEL_CAUSE 0x08 +#define ARMADA_370_XP_IN_DRBEL_MASK 0x0c +#define ARMADA_375_PPI_CAUSE 0x10 +#define ARMADA_370_XP_CPU_INTACK 0x44 +#define ARMADA_370_XP_INT_SET_MASK 0x48 +#define ARMADA_370_XP_INT_CLEAR_MASK 0x4C
Reviewed-by Ilpo Järvinen <[email protected]>
Although, it would be nice to have consistent hex form too as now there's 0x0c and 0x4C.
Signature · 1 line
i.
PATCH v2 6/30 irqchip/armada-370-xp: Change register constants prefix to MPIC_
In reply to Marek BehúnChange the long ARMADA_370_XP_ prefix in register constants (ARMADA_375_ in one case) to MPIC_. The rationale is that it is shorter and more generic (this controller is called MPIC and is also used on Armada 38x and 39x).
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 148 +++++++++++++--------------- 1 file changed, 69 insertions(+), 79 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +69 -79
@@ -66,18 +66,17 @@* device * * The "global interrupt mask/unmask" is modified using the -* ARMADA_370_XP_INT_SET_ENABLE and ARMADA_370_XP_INT_CLEAR_ENABLE +* MPIC_INT_SET_ENABLE and MPIC_INT_CLEAR_ENABLE * registers, which are relative to "main_int_base". * -* The "per-CPU mask/unmask" is modified using the -* ARMADA_370_XP_INT_SET_MASK and ARMADA_370_XP_INT_CLEAR_MASK -* registers, which are relative to "per_cpu_int_base". This base -* address points to a special address, which automatically accesses -* the registers of the current CPU. +* The "per-CPU mask/unmask" is modified using the MPIC_INT_SET_MASK +* and MPIC_INT_CLEAR_MASK registers, which are relative to +* "per_cpu_int_base". This base address points to a special address, +* which automatically accesses the registers of the current CPU. * * The per-CPU mask/unmask can also be adjusted using the global -* per-interrupt ARMADA_370_XP_INT_SOURCE_CTL register, which we use -* to configure interrupt affinity. +* per-interrupt MPIC_INT_SOURCE_CTL register, which we use to +* configure interrupt affinity. * * Due to this model, all interrupts need to be mask/unmasked at two * different levels: at the global level and at the per-CPU level.
@@ -91,9 +90,8 @@* the current CPU, running the ->map() code. This allows to have * the interrupt unmasked at this level in non-SMP * configurations. In SMP configurations, the ->set_affinity() -* callback is called, which using the -* ARMADA_370_XP_INT_SOURCE_CTL() readjusts the per-CPU mask/unmask -* for the interrupt. +* callback is called, which using the MPIC_INT_SOURCE_CTL() +* readjusts the per-CPU mask/unmask for the interrupt. * * The ->mask() and ->unmask() operations only mask/unmask the * interrupt at the "global" level.
@@ -116,25 +114,25 @@*/ /* Registers relative to main_int_base */ -#define ARMADA_370_XP_INT_CONTROL 0x00 -#define ARMADA_370_XP_SW_TRIG_INT 0x04 -#define ARMADA_370_XP_INT_SET_ENABLE 0x30 -#define ARMADA_370_XP_INT_CLEAR_ENABLE 0x34 -#define ARMADA_370_XP_INT_SOURCE_CTL (irq) (0x100 + (irq) * 4) -#define ARMADA_370_XP_INT_SOURCE_CPU_MASK GENMASK(3, 0) -#define ARMADA_370_XP_INT_IRQ_FIQ_MASK (cpuid) ((BIT(0) | BIT(8)) << (cpuid)) +#define MPIC_INT_CONTROL 0x00 +#define MPIC_SW_TRIG_INT 0x04 +#define MPIC_INT_SET_ENABLE 0x30 +#define MPIC_INT_CLEAR_ENABLE 0x34 +#define MPIC_INT_SOURCE_CTL (irq) (0x100 + (irq) * 4) +#define MPIC_INT_SOURCE_CPU_MASK GENMASK(3, 0) +#define MPIC_INT_IRQ_FIQ_MASK (cpuid) ((BIT(0) | BIT(8)) << (cpuid))/* Registers relative to per_cpu_int_base */ -#define ARMADA_370_XP_IN_DRBEL_CAUSE 0x08 -#define ARMADA_370_XP_IN_DRBEL_MASK 0x0c -#define ARMADA_375_PPI_CAUSE 0x10 -#define ARMADA_370_XP_CPU_INTACK 0x44 -#define ARMADA_370_XP_INT_SET_MASK 0x48 -#define ARMADA_370_XP_INT_CLEAR_MASK 0x4C -#define ARMADA_370_XP_INT_FABRIC_MASK 0x54 -#define ARMADA_370_XP_INT_CAUSE_PERF (cpu) BIT(cpu) +#define MPIC_IN_DRBEL_CAUSE 0x08 +#define MPIC_IN_DRBEL_MASK 0x0c +#define MPIC_PPI_CAUSE 0x10 +#define MPIC_CPU_INTACK 0x44 +#define MPIC_INT_SET_MASK 0x48 +#define MPIC_INT_CLEAR_MASK 0x4C +#define MPIC_INT_FABRIC_MASK 0x54 +#define MPIC_INT_CAUSE_PERF (cpu) BIT(cpu) -#define ARMADA_370_XP_MAX_PER_CPU_IRQS 28 +#define MPIC_MAX_PER_CPU_IRQS 28/* IPI and MSI interrupt definitions for IPI platforms */ #define IPI_DOORBELL_START 0
@@ -203,7 +201,7 @@ static inline unsigned int msi_doorbell_end(void)static inline bool is_percpu_irq (irq_hw_number_t irq) { -if (irq <=ARMADA_370_XP_MAX_PER_CPU_IRQS ) +if (irq <=MPIC_MAX_PER_CPU_IRQS )return true;return false;
@@ -219,9 +217,9 @@ static void armada_370_xp_irq_mask(struct irq_data *d)irq_hw_number_t hwirq =irqd_to_hwirq (d);if (!is_percpu_irq (hwirq)) -writel (hwirq, main_int_base +ARMADA_370_XP_INT_CLEAR_ENABLE ); +writel (hwirq, main_int_base +MPIC_INT_CLEAR_ENABLE );else -writel (hwirq, per_cpu_int_base +ARMADA_370_XP_INT_SET_MASK ); +writel (hwirq, per_cpu_int_base +MPIC_INT_SET_MASK ); }static void armada_370_xp_irq_unmask (struct irq_data *d)
@@ -229,9 +227,9 @@ static void armada_370_xp_irq_unmask(struct irq_data *d)irq_hw_number_t hwirq =irqd_to_hwirq (d);if (!is_percpu_irq (hwirq)) -writel (hwirq, main_int_base +ARMADA_370_XP_INT_SET_ENABLE ); +writel (hwirq, main_int_base +MPIC_INT_SET_ENABLE );else -writel (hwirq, per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK ); +writel (hwirq, per_cpu_int_base +MPIC_INT_CLEAR_MASK ); }#ifdef CONFIG_PCI_MSI
@@ -324,18 +322,18 @@ static void armada_370_xp_msi_reenable_percpu(void)u32 reg;/* Enable MSI doorbell mask and combined cpu local interrupt */ - reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); + reg =readl (per_cpu_int_base +MPIC_IN_DRBEL_MASK ); reg |=msi_doorbell_mask (); -writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); +writel (reg, per_cpu_int_base +MPIC_IN_DRBEL_MASK );/* Unmask local doorbell interrupt */ -writel (1 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK ); +writel (1 , per_cpu_int_base +MPIC_INT_CLEAR_MASK ); }static int armada_370_xp_msi_init (struct device_node *node,phys_addr_t main_int_phys_base) { - msi_doorbell_addr = main_int_phys_base +ARMADA_370_XP_SW_TRIG_INT ; + msi_doorbell_addr = main_int_phys_base +MPIC_SW_TRIG_INT ; armada_370_xp_msi_inner_domain = irq_domain_add_linear(NULL, msi_doorbell_size(),
@@ -356,7 +354,7 @@ static int armada_370_xp_msi_init(struct device_node *node,/* Unmask low 16 MSI irqs on non-IPI platforms */ if (!is_ipi_available ()) -writel (0 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK ); +writel (0 , per_cpu_int_base +MPIC_INT_CLEAR_MASK );return 0 ; }
@@ -384,8 +382,8 @@ static void armada_xp_mpic_perf_init(void) cpuid =cpu_logical_map (smp_processor_id ());/* Enable Performance Counter Overflow interrupts */ -writel (ARMADA_370_XP_INT_CAUSE_PERF (cpuid), - per_cpu_int_base +ARMADA_370_XP_INT_FABRIC_MASK ); +writel (MPIC_INT_CAUSE_PERF (cpuid), + per_cpu_int_base +MPIC_INT_FABRIC_MASK ); }#ifdef CONFIG_SMP
@@ -394,17 +392,17 @@ static struct irq_domain *ipi_domain;static void armada_370_xp_ipi_mask (struct irq_data *d) {u32 reg; - reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); + reg =readl (per_cpu_int_base +MPIC_IN_DRBEL_MASK ); reg &= ~BIT (d->hwirq); -writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); +writel (reg, per_cpu_int_base +MPIC_IN_DRBEL_MASK ); }static void armada_370_xp_ipi_unmask (struct irq_data *d) {u32 reg; - reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); + reg =readl (per_cpu_int_base +MPIC_IN_DRBEL_MASK ); reg |=BIT (d->hwirq); -writel (reg, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); +writel (reg, per_cpu_int_base +MPIC_IN_DRBEL_MASK ); } static void armada_370_xp_ipi_send_mask(struct irq_data *d,
@@ -424,13 +422,12 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d,dsb ();/* submit softirq */ -writel ((map <<8 ) | d->hwirq, main_int_base + -ARMADA_370_XP_SW_TRIG_INT ); +writel ((map <<8 ) | d->hwirq, main_int_base +MPIC_SW_TRIG_INT ); }static void armada_370_xp_ipi_ack (struct irq_data *d) { -writel (~BIT (d->hwirq), per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE ); +writel (~BIT (d->hwirq), per_cpu_int_base +MPIC_IN_DRBEL_CAUSE ); }static struct irq_chip ipi_irqchip = {
@@ -515,9 +512,8 @@ static int armada_xp_set_affinity(struct irq_data *d,/* Select a single core from the affinity mask which is online */ cpu =cpumask_any_and (mask_val, cpu_online_mask); -atomic_io_modify (main_int_base +ARMADA_370_XP_INT_SOURCE_CTL (hwirq), -ARMADA_370_XP_INT_SOURCE_CPU_MASK , -BIT (cpu_logical_map (cpu))); +atomic_io_modify (main_int_base +MPIC_INT_SOURCE_CTL (hwirq), +MPIC_INT_SOURCE_CPU_MASK ,BIT (cpu_logical_map (cpu)));irq_data_update_effective_affinity (d,cpumask_of (cpu));
@@ -529,23 +525,23 @@ static void armada_xp_mpic_smp_cpu_init(void)u32 control;int nr_irqs, i; - control =readl (main_int_base +ARMADA_370_XP_INT_CONTROL ); + control =readl (main_int_base +MPIC_INT_CONTROL ); nr_irqs = (control >>2 ) &0x3ff ;for (i =0 ; i < nr_irqs; i++) -writel (i, per_cpu_int_base +ARMADA_370_XP_INT_SET_MASK ); +writel (i, per_cpu_int_base +MPIC_INT_SET_MASK );if (!is_ipi_available ())return ;/* Disable all IPIs */ -writel (0 , per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); +writel (0 , per_cpu_int_base +MPIC_IN_DRBEL_MASK );/* Clear pending IPIs */ -writel (0 , per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE ); +writel (0 , per_cpu_int_base +MPIC_IN_DRBEL_CAUSE );/* Unmask IPI interrupt */ -writel (0 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK ); +writel (0 , per_cpu_int_base +MPIC_INT_CLEAR_MASK ); }static void armada_xp_mpic_reenable_percpu (void )
@@ -553,7 +549,7 @@ static void armada_xp_mpic_reenable_percpu(void)unsigned int irq;/* Re-enable per-CPU interrupts that were enabled before suspend */ -for (irq =0 ; irq <ARMADA_370_XP_MAX_PER_CPU_IRQS ; irq++) { +for (irq =0 ; irq <MPIC_MAX_PER_CPU_IRQS ; irq++) {struct irq_data *data;int virq;
@@ -615,10 +611,9 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,armada_370_xp_irq_mask (irq_get_irq_data (virq));if (!is_percpu_irq (hw)) -writel (hw, per_cpu_int_base + -ARMADA_370_XP_INT_CLEAR_MASK ); +writel (hw, per_cpu_int_base +MPIC_INT_CLEAR_MASK );else -writel (hw, main_int_base +ARMADA_370_XP_INT_SET_ENABLE ); +writel (hw, main_int_base +MPIC_INT_SET_ENABLE );irq_set_status_flags (virq,IRQ_LEVEL );if (is_percpu_irq (hw)) {
@@ -645,10 +640,10 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained) {u32 msimask, msinr; - msimask =readl_relaxed (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE ); + msimask =readl_relaxed (per_cpu_int_base +MPIC_IN_DRBEL_CAUSE ); msimask &=msi_doorbell_mask (); -writel (~msimask, per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_CAUSE ); +writel (~msimask, per_cpu_int_base +MPIC_IN_DRBEL_CAUSE );for (msinr =msi_doorbell_start (); msinr <msi_doorbell_end (); msinr++) {
@@ -673,17 +668,16 @@ static void armada_370_xp_mpic_handle_cascade_irq(struct irq_desc *desc)chained_irq_enter (chip, desc); - irqmap =readl_relaxed (per_cpu_int_base +ARMADA_375_PPI_CAUSE ); + irqmap =readl_relaxed (per_cpu_int_base +MPIC_PPI_CAUSE ); cpuid =cpu_logical_map (smp_processor_id ());for_each_set_bit (irqn, &irqmap,BITS_PER_LONG ) { - irqsrc =readl_relaxed (main_int_base + -ARMADA_370_XP_INT_SOURCE_CTL (irqn)); + irqsrc =readl_relaxed (main_int_base +MPIC_INT_SOURCE_CTL (irqn));/* Check if the interrupt is not masked on current CPU. * Test IRQ (0-1) and FIQ (8-9) mask bits. */ -if (!(irqsrc &ARMADA_370_XP_INT_IRQ_FIQ_MASK (cpuid))) +if (!(irqsrc &MPIC_INT_IRQ_FIQ_MASK (cpuid)))continue ;if (irqn ==0 || irqn ==1 ) {
@@ -703,8 +697,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs)u32 irqstat, irqnr; do { - irqstat = readl_relaxed(per_cpu_int_base + - ARMADA_370_XP_CPU_INTACK); + irqstat = readl_relaxed(per_cpu_int_base + MPIC_CPU_INTACK); irqnr = irqstat & 0x3FF; if (irqnr > 1022)
@@ -727,7 +720,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs)int ipi; ipimask =readl_relaxed (per_cpu_int_base + -ARMADA_370_XP_IN_DRBEL_CAUSE ) +MPIC_IN_DRBEL_CAUSE ) &IPI_DOORBELL_MASK ;for_each_set_bit (ipi, &ipimask,IPI_DOORBELL_END )
@@ -740,7 +733,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs)static int armada_370_xp_mpic_suspend (void ) { - doorbell_mask_reg =readl (per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); + doorbell_mask_reg =readl (per_cpu_int_base +MPIC_IN_DRBEL_MASK );return 0 ; }
@@ -751,7 +744,7 @@ static void armada_370_xp_mpic_resume(void)irq_hw_number_t irq;/* Re-enable interrupts */ - nirqs = (readl (main_int_base +ARMADA_370_XP_INT_CONTROL ) >>2 ) &0x3ff ; + nirqs = (readl (main_int_base +MPIC_INT_CONTROL ) >>2 ) &0x3ff ;for (irq =0 ; irq < nirqs; irq++) {struct irq_data *data;int virq;
@@ -764,14 +757,12 @@ static void armada_370_xp_mpic_resume(void)if (!is_percpu_irq (irq)) {/* Non per-CPU interrupts */ -writel (irq, per_cpu_int_base + -ARMADA_370_XP_INT_CLEAR_MASK ); +writel (irq, per_cpu_int_base +MPIC_INT_CLEAR_MASK );if (!irqd_irq_disabled (data))armada_370_xp_irq_unmask (data); }else {/* Per-CPU interrupts */ -writel (irq, main_int_base + -ARMADA_370_XP_INT_SET_ENABLE ); +writel (irq, main_int_base +MPIC_INT_SET_ENABLE );/* * Re-enable on the current CPU,
@@ -784,8 +775,7 @@ static void armada_370_xp_mpic_resume(void) }/* Reconfigure doorbells for IPIs and MSIs */ -writel (doorbell_mask_reg, - per_cpu_int_base +ARMADA_370_XP_IN_DRBEL_MASK ); +writel (doorbell_mask_reg, per_cpu_int_base +MPIC_IN_DRBEL_MASK );if (is_ipi_available ()) { src0 = doorbell_mask_reg &IPI_DOORBELL_MASK ;
@@ -796,9 +786,9 @@ static void armada_370_xp_mpic_resume(void) }if (src0) -writel (0 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK ); +writel (0 , per_cpu_int_base +MPIC_INT_CLEAR_MASK );if (src1) -writel (1 , per_cpu_int_base +ARMADA_370_XP_INT_CLEAR_MASK ); +writel (1 , per_cpu_int_base +MPIC_INT_CLEAR_MASK );if (is_ipi_available ())ipi_resume ();
@@ -834,11 +824,11 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, resource_size(&per_cpu_int_res));BUG_ON (!per_cpu_int_base); - control =readl (main_int_base +ARMADA_370_XP_INT_CONTROL ); + control =readl (main_int_base +MPIC_INT_CONTROL ); nr_irqs = (control >>2 ) &0x3ff ;for (i =0 ; i < nr_irqs; i++) -writel (i, main_int_base +ARMADA_370_XP_INT_CLEAR_ENABLE ); +writel (i, main_int_base +MPIC_INT_CLEAR_ENABLE ); armada_370_xp_mpic_domain = irq_domain_add_linear(node, nr_irqs,
Signature · 1 line
2.44.2
PATCH v2 7/30 irqchip/armada-370-xp: Use correct type for cpu variable
In reply to Marek BehúnUse unsigned int instead of int for variable storing the cpu number.
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +2 -2
@@ -409,7 +409,7 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) {unsigned long map =0 ; -int cpu; +unsigned int cpu;/* Convert our logical CPU mask into a physical one. */ for_each_cpu (cpu, mask)
@@ -507,7 +507,7 @@ static int armada_xp_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force) {irq_hw_number_t hwirq =irqd_to_hwirq (d); -int cpu; +unsigned int cpu;/* Select a single core from the affinity mask which is online */ cpu =cpumask_any_and (mask_val, cpu_online_mask);
Signature · 1 line
2.44.2
PATCH v2 8/30 irqchip/armada-370-xp: Simplify is_percpu_irq() code
In reply to Marek BehúnSimplify the code in the is_percpu_irq() function. Instead of
if (condition)
return true;
return false;
simply return condition.
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +1 -4
@@ -201,10 +201,7 @@ static inline unsigned int msi_doorbell_end(void)static inline bool is_percpu_irq (irq_hw_number_t irq) { -if (irq <=MPIC_MAX_PER_CPU_IRQS ) -return true; - -return false; +return irq <=MPIC_MAX_PER_CPU_IRQS ; }/*
Signature · 1 line
2.44.2
Re: [PATCH v2 08/30] irqchip/armada-370-xp: Simplify is_percpu_irq() code
Quoted 19 lines · Marek Behún
Simplify the code in the
is_percpu_irq()function. Instead of
if (condition)return true;return false;
simply return condition.Signed-off-by Marek Behún <[email protected]>Reviewed-by Andrew Lunn <[email protected]>--- drivers/irqchip/irq-armada-370-xp.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)drivers/irqchip/irq-armada-370-xp.c +0
-0@@ -201,10 +201,7 @@ static inline unsigned int msi_doorbell_end(void)
drivers/irqchip/irq-armada-370-xp.c static inline unsigned int msi_doorbell_end(void) · line 207
Quoted 10 lines
drivers/irqchip/irq-armada-370-xp.c +1
-4static inline bool is_percpu_irq (irq_hw_number_t irq) { -if (irq <=MPIC_MAX_PER_CPU_IRQS ) -return true; - -return false; +return irq <=MPIC_MAX_PER_CPU_IRQS ; }/*
Reviewed-by Ilpo Järvinen <[email protected]>
Signature · 1 line
i.
PATCH v2 9/30 irqchip/armada-370-xp: Change to SPDX license identifier
In reply to Marek BehúnChange the license identifier to SPDX style.
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +1 -4
@@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Marvell Armada 370 and Armada XP SoC IRQ handling *
@@ -7,10 +8,6 @@* Gregory CLEMENT <[email protected]> * Thomas Petazzoni <[email protected]> * Ben Dooks <[email protected]> -* -* This file is licensed under the terms of the GNU General Public -* License version 2. This program is licensed "as is" without any -* warranty of any kind, whether express or implied. */ #include <linux/bits.h>
Signature · 1 line
2.44.2
PATCH v2 10/30 irqchip/armada-370-xp: Declare iterators in for loop
In reply to Marek BehúnWhere possible, declare iterators in for cycle. This is possible since kernel uses -std=gnu11.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 27 ++++++++++----------------- 1 file changed, 10 insertions(+), 17 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +10 -17
@@ -276,7 +276,7 @@ static struct irq_chip armada_370_xp_msi_bottom_irq_chip = {static int armada_370_xp_msi_alloc (struct irq_domain *domain,unsigned int virq,unsigned int nr_irqs,void *args) { -int hwirq, i; +int hwirq;mutex_lock (&msi_used_lock); hwirq = bitmap_find_free_region(msi_used, msi_doorbell_size(),
@@ -286,7 +286,7 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq,if (hwirq <0 )return -ENOSPC ; -for (i =0 ; i < nr_irqs; i++) { +for (int i =0 ; i < nr_irqs; i++) { irq_domain_set_info(domain, virq + i, hwirq + i, &armada_370_xp_msi_bottom_irq_chip, domain->host_data, handle_simple_irq,
@@ -436,9 +436,7 @@ static int armada_370_xp_ipi_alloc(struct irq_domain *d,unsigned int virq, unsigned int nr_irqs, void *args) { - int i; - -for (i =0 ; i < nr_irqs; i++) { + for (int i = 0; i < nr_irqs; i++) {irq_set_percpu_devid (virq + i); irq_domain_set_info(d, virq + i, i, &ipi_irqchip, d->host_data,
@@ -463,9 +461,7 @@ static const struct irq_domain_ops ipi_domain_ops = {static void ipi_resume (void ) { -int i; - -for (i =0 ; i <IPI_DOORBELL_END ; i++) { +for (int i =0 ; i <IPI_DOORBELL_END ; i++) {int irq; irq =irq_find_mapping (ipi_domain, i);
@@ -517,12 +513,12 @@ static int armada_xp_set_affinity(struct irq_data *d,static void armada_xp_mpic_smp_cpu_init (void ) {u32 control; -int nr_irqs, i; +int nr_irqs; control =readl (main_int_base +MPIC_INT_CONTROL ); nr_irqs = (control >>2 ) &0x3ff ; -for (i =0 ; i < nr_irqs; i++) +for (int i =0 ; i < nr_irqs; i++)writel (i, per_cpu_int_base +MPIC_INT_SET_MASK );if (!is_ipi_available ())
@@ -540,10 +536,8 @@ static void armada_xp_mpic_smp_cpu_init(void)static void armada_xp_mpic_reenable_percpu (void ) { -unsigned int irq; -/* Re-enable per-CPU interrupts that were enabled before suspend */ -for (irq =0 ; irq <MPIC_MAX_PER_CPU_IRQS ; irq++) { +for (unsigned int irq =0 ; irq <MPIC_MAX_PER_CPU_IRQS ; irq++) {struct irq_data *data;int virq;
@@ -735,11 +729,10 @@ static void armada_370_xp_mpic_resume(void) {bool src0, src1;int nirqs; -irq_hw_number_t irq;/* Re-enable interrupts */ nirqs = (readl (main_int_base +MPIC_INT_CONTROL ) >>2 ) &0x3ff ; -for (irq =0 ; irq < nirqs; irq++) { +for (irq_hw_number_t irq =0 ; irq < nirqs; irq++) {struct irq_data *data;int virq;
@@ -797,7 +790,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, struct device_node *parent) {struct resource main_int_res, per_cpu_int_res; -int nr_irqs, i; +int nr_irqs;u32 control;BUG_ON (of_address_to_resource (node,0 , &main_int_res));
@@ -821,7 +814,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, control =readl (main_int_base +MPIC_INT_CONTROL ); nr_irqs = (control >>2 ) &0x3ff ; -for (i =0 ; i < nr_irqs; i++) +for (int i =0 ; i < nr_irqs; i++)writel (i, main_int_base +MPIC_INT_CLEAR_ENABLE ); armada_370_xp_mpic_domain =
Signature · 1 line
2.44.2
PATCH v2 11/30 irqchip/armada-370-xp: Rename variable for consistency
In reply to Marek BehúnRename the irq variable to virq in the ipi_resume() function for consistency with the rest of the code.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +5 -5
@@ -462,14 +462,14 @@ static const struct irq_domain_ops ipi_domain_ops = {static void ipi_resume (void ) {for (int i =0 ; i <IPI_DOORBELL_END ; i++) { -int irq; +int virq; - irq =irq_find_mapping (ipi_domain, i); -if (irq <=0 ) + virq =irq_find_mapping (ipi_domain, i); +if (virq <=0 )continue ; -if (irq_percpu_is_enabled (irq)) { +if (irq_percpu_is_enabled (virq)) {struct irq_data *d; - d =irq_domain_get_irq_data (ipi_domain, irq); + d =irq_domain_get_irq_data (ipi_domain, virq);armada_370_xp_ipi_unmask (d); } }
Signature · 1 line
2.44.2
PATCH v2 12/30 irqchip/armada-370-xp: Use unsigned int type for virqs
In reply to Marek BehúnThe return type of irq_find_mapping() and irq_linear_revmap() is unsigned int. Use the unsigned int type for the variables storing the return value.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +4 -4
@@ -462,10 +462,10 @@ static const struct irq_domain_ops ipi_domain_ops = {static void ipi_resume (void ) {for (int i =0 ; i <IPI_DOORBELL_END ; i++) { -int virq; +unsigned int virq; virq =irq_find_mapping (ipi_domain, i); -if (virq <=0 ) +if (!virq)continue ;if (irq_percpu_is_enabled (virq)) {struct irq_data *d;
@@ -539,7 +539,7 @@ static void armada_xp_mpic_reenable_percpu(void)/* Re-enable per-CPU interrupts that were enabled before suspend */ for (unsigned int irq =0 ; irq <MPIC_MAX_PER_CPU_IRQS ; irq++) {struct irq_data *data; -int virq; +unsigned int virq; virq =irq_linear_revmap (armada_370_xp_mpic_domain, irq);if (virq ==0 )
@@ -734,7 +734,7 @@ static void armada_370_xp_mpic_resume(void) nirqs = (readl (main_int_base +MPIC_INT_CONTROL ) >>2 ) &0x3ff ;for (irq_hw_number_t irq =0 ; irq < nirqs; irq++) {struct irq_data *data; -int virq; +unsigned int virq; virq =irq_linear_revmap (armada_370_xp_mpic_domain, irq);if (virq ==0 )
Signature · 1 line
2.44.2
PATCH v2 13/30 irqchip/armada-370-xp: Use !virq instead of virq == 0 in condition
In reply to Marek BehúnUse !virq instead of virq == 0 when checking for availability of the virq.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +2 -2
@@ -542,7 +542,7 @@ static void armada_xp_mpic_reenable_percpu(void)unsigned int virq; virq =irq_linear_revmap (armada_370_xp_mpic_domain, irq); -if (virq ==0 ) +if (!virq)continue ; data =irq_get_irq_data (virq);
@@ -737,7 +737,7 @@ static void armada_370_xp_mpic_resume(void)unsigned int virq; virq =irq_linear_revmap (armada_370_xp_mpic_domain, irq); -if (virq ==0 ) +if (!virq)continue ; data =irq_get_irq_data (virq);
Signature · 1 line
2.44.2
PATCH v2 14/30 irqchip/armada-370-xp: Simplify ipi_resume() code
In reply to Marek BehúnRefactor the ipi_resume() function to drop one indentation level.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +6 -8
@@ -462,16 +462,14 @@ static const struct irq_domain_ops ipi_domain_ops = {static void ipi_resume (void ) {for (int i =0 ; i <IPI_DOORBELL_END ; i++) { -unsigned int virq; +unsigned int virq =irq_find_mapping (ipi_domain, i); +struct irq_data *d; - virq =irq_find_mapping (ipi_domain, i); -if (!virq) +if (!virq || !irq_percpu_is_enabled (virq))continue ; -if (irq_percpu_is_enabled (virq)) { -struct irq_data *d; - d =irq_domain_get_irq_data (ipi_domain, virq); -armada_370_xp_ipi_unmask (d); - } + + d =irq_domain_get_irq_data (ipi_domain, virq); +armada_370_xp_ipi_unmask (d); } }
Signature · 1 line
2.44.2
PATCH v2 15/30 irqchip/armada-370-xp: Improve indentation
In reply to Marek BehúnAdd some blank lines and other indentation improvements.
Checkpatch now stops complaining.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 55 +++++++++++++++-------------- 1 file changed, 28 insertions(+), 27 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +28 -27
@@ -229,9 +229,9 @@ static void armada_370_xp_irq_unmask(struct irq_data *d)#ifdef CONFIG_PCI_MSI static struct irq_chip armada_370_xp_msi_irq_chip = { - .name ="MPIC MSI" , - .irq_mask = pci_msi_mask_irq, - .irq_unmask = pci_msi_unmask_irq, + .name ="MPIC MSI" , + .irq_mask = pci_msi_mask_irq, + .irq_unmask = pci_msi_unmask_irq, }; static struct msi_domain_info armada_370_xp_msi_domain_info = {
@@ -386,6 +386,7 @@ static struct irq_domain *ipi_domain;static void armada_370_xp_ipi_mask (struct irq_data *d) {u32 reg; + reg =readl (per_cpu_int_base +MPIC_IN_DRBEL_MASK ); reg &= ~BIT (d->hwirq);writel (reg, per_cpu_int_base +MPIC_IN_DRBEL_MASK );
@@ -394,6 +395,7 @@ static void armada_370_xp_ipi_mask(struct irq_data *d)static void armada_370_xp_ipi_unmask (struct irq_data *d) {u32 reg; + reg =readl (per_cpu_int_base +MPIC_IN_DRBEL_MASK ); reg |=BIT (d->hwirq);writel (reg, per_cpu_int_base +MPIC_IN_DRBEL_MASK );
@@ -432,24 +434,20 @@ static struct irq_chip ipi_irqchip = { .ipi_send_mask = armada_370_xp_ipi_send_mask, }; -static int armada_370_xp_ipi_alloc (struct irq_domain *d, -unsigned int virq, -unsigned int nr_irqs,void *args) +static int armada_370_xp_ipi_alloc (struct irq_domain *d,unsigned int virq, +unsigned int nr_irqs,void *args) {for (int i =0 ; i < nr_irqs; i++) {irq_set_percpu_devid (virq + i); -irq_domain_set_info (d, virq + i, i, &ipi_irqchip, - d->host_data, - handle_percpu_devid_irq, -NULL ,NULL ); +irq_domain_set_info (d, virq + i, i, &ipi_irqchip, d->host_data, + handle_percpu_devid_irq,NULL ,NULL ); }return 0 ; } -static void armada_370_xp_ipi_free (struct irq_domain *d, -unsigned int virq, -unsigned int nr_irqs) +static void armada_370_xp_ipi_free (struct irq_domain *d,unsigned int virq, +unsigned int nr_irqs) {/* Not freeing IPIs */ }
@@ -484,7 +482,8 @@ static __init void armada_xp_ipi_init(struct device_node *node)return ;irq_domain_update_bus_token (ipi_domain,DOMAIN_BUS_IPI ); - base_ipi =irq_domain_alloc_irqs (ipi_domain,IPI_DOORBELL_END ,NUMA_NO_NODE ,NULL ); + base_ipi =irq_domain_alloc_irqs (ipi_domain,IPI_DOORBELL_END , +NUMA_NO_NODE ,NULL );if (WARN_ON (!base_ipi))return ;
@@ -562,6 +561,7 @@ static int armada_xp_mpic_starting_cpu(unsigned int cpu)armada_xp_mpic_perf_init ();armada_xp_mpic_smp_cpu_init ();armada_xp_mpic_reenable_percpu (); +return 0 ; }
@@ -570,6 +570,7 @@ static int mpic_cascaded_starting_cpu(unsigned int cpu)armada_xp_mpic_perf_init ();armada_xp_mpic_reenable_percpu ();enable_percpu_irq (parent_irq,IRQ_TYPE_NONE ); + return 0; }#else
@@ -579,9 +580,9 @@ static void ipi_resume(void) {}static struct irq_chip armada_370_xp_irq_chip = { .name ="MPIC" , - .irq_mask = armada_370_xp_irq_mask, - .irq_mask_ack = armada_370_xp_irq_mask, - .irq_unmask = armada_370_xp_irq_unmask, + .irq_mask = armada_370_xp_irq_mask, + .irq_mask_ack = armada_370_xp_irq_mask, + .irq_unmask = armada_370_xp_irq_unmask, #ifdef CONFIG_SMP .irq_set_affinity = armada_xp_set_affinity, #endif
@@ -605,10 +606,10 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,if (is_percpu_irq (hw)) {irq_set_percpu_devid (virq);irq_set_chip_and_handler (virq, &armada_370_xp_irq_chip, - handle_percpu_devid_irq); + handle_percpu_devid_irq); }else {irq_set_chip_and_handler (virq, &armada_370_xp_irq_chip, - handle_level_irq); + handle_level_irq);irqd_set_single_target (irq_desc_get_irq_data (irq_to_desc (virq))); }irq_set_probe (virq);
@@ -617,8 +618,8 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, }static const struct irq_domain_ops armada_370_xp_mpic_irq_ops = { - .map = armada_370_xp_mpic_irq_map, - .xlate = irq_domain_xlate_onecell, + .map = armada_370_xp_mpic_irq_map, + .xlate = irq_domain_xlate_onecell, };#ifdef CONFIG_PCI_MSI
@@ -706,20 +707,20 @@ armada_370_xp_handle_irq(struct pt_regs *regs)int ipi; ipimask =readl_relaxed (per_cpu_int_base + -MPIC_IN_DRBEL_CAUSE ) - &IPI_DOORBELL_MASK ; +MPIC_IN_DRBEL_CAUSE ) & +IPI_DOORBELL_MASK ;for_each_set_bit (ipi, &ipimask,IPI_DOORBELL_END ) generic_handle_domain_irq(ipi_domain, ipi); }#endif - }while (1 ); }static int armada_370_xp_mpic_suspend (void ) { doorbell_mask_reg =readl (per_cpu_int_base +MPIC_IN_DRBEL_MASK ); +return 0 ; }
@@ -815,9 +816,9 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,for (int i =0 ; i < nr_irqs; i++)writel (i, main_int_base +MPIC_INT_CLEAR_ENABLE ); - armada_370_xp_mpic_domain = -irq_domain_add_linear (node, nr_irqs, - &armada_370_xp_mpic_irq_ops,NULL ); + armada_370_xp_mpic_domain =irq_domain_add_linear (node, nr_irqs, + &armada_370_xp_mpic_irq_ops, +NULL );BUG_ON (!armada_370_xp_mpic_domain);irq_domain_update_bus_token (armada_370_xp_mpic_domain,DOMAIN_BUS_WIRED );
Signature · 1 line
2.44.2
PATCH v2 16/30 irqchip/armada-370-xp: Change symbol prefixes to mpic
In reply to Marek BehúnChange symbol prefixes from armada_370_xp_ or others to mpic_.
The rationale is that it is shorter and more generic (this controller is called MPIC and is also used on Armada 38x and 39x).
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 316 ++++++++++++++-------------- 1 file changed, 154 insertions(+), 162 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +154 -162
@@ -150,18 +150,18 @@static void __iomem *per_cpu_int_base;static void __iomem *main_int_base; -static struct irq_domain *armada_370_xp_mpic_domain; +static struct irq_domain *mpic_domain;static u32 doorbell_mask_reg;static int parent_irq;#ifdef CONFIG_PCI_MSI -static struct irq_domain *armada_370_xp_msi_domain; -static struct irq_domain *armada_370_xp_msi_inner_domain; +static struct irq_domain *mpic_msi_domain; +static struct irq_domain *mpic_msi_inner_domain; static DECLARE_BITMAP(msi_used, PCI_MSI_FULL_DOORBELL_NR);static DEFINE_MUTEX (msi_used_lock);static phys_addr_t msi_doorbell_addr;#endif -static inline bool is_ipi_available (void ) +static inline bool mpic_is_ipi_available (void ) {/* * We distinguish IPI availability in the IC by the IC not having a
@@ -174,29 +174,29 @@ static inline bool is_ipi_available(void)static inline u32 msi_doorbell_mask (void ) { -return is_ipi_available () ?PCI_MSI_DOORBELL_MASK : -PCI_MSI_FULL_DOORBELL_MASK ; +return mpic_is_ipi_available () ?PCI_MSI_DOORBELL_MASK : +PCI_MSI_FULL_DOORBELL_MASK ; }static inline unsigned int msi_doorbell_start (void ) { -return is_ipi_available () ?PCI_MSI_DOORBELL_START : -PCI_MSI_FULL_DOORBELL_START ; +return mpic_is_ipi_available () ?PCI_MSI_DOORBELL_START : +PCI_MSI_FULL_DOORBELL_START ; }static inline unsigned int msi_doorbell_size (void ) { -return is_ipi_available () ?PCI_MSI_DOORBELL_NR : -PCI_MSI_FULL_DOORBELL_NR ; +return mpic_is_ipi_available () ?PCI_MSI_DOORBELL_NR : +PCI_MSI_FULL_DOORBELL_NR ; }static inline unsigned int msi_doorbell_end (void ) { -return is_ipi_available () ?PCI_MSI_DOORBELL_END : -PCI_MSI_FULL_DOORBELL_END ; +return mpic_is_ipi_available () ?PCI_MSI_DOORBELL_END : +PCI_MSI_FULL_DOORBELL_END ; } -static inline bool is_percpu_irq (irq_hw_number_t irq) +static inline bool mpic_is_percpu_irq (irq_hw_number_t irq) {return irq <=MPIC_MAX_PER_CPU_IRQS ; }
@@ -206,21 +206,21 @@ static inline bool is_percpu_irq(irq_hw_number_t irq)* For shared global interrupts, mask/unmask global enable bit * For CPU interrupts, mask/unmask the calling CPU's bit */ -static void armada_370_xp_irq_mask (struct irq_data *d) +static void mpic_irq_mask (struct irq_data *d) {irq_hw_number_t hwirq =irqd_to_hwirq (d); -if (!is_percpu_irq (hwirq)) +if (!mpic_is_percpu_irq (hwirq))writel (hwirq, main_int_base +MPIC_INT_CLEAR_ENABLE );else writel (hwirq, per_cpu_int_base +MPIC_INT_SET_MASK ); } -static void armada_370_xp_irq_unmask (struct irq_data *d) +static void mpic_irq_unmask (struct irq_data *d) {irq_hw_number_t hwirq =irqd_to_hwirq (d); -if (!is_percpu_irq (hwirq)) +if (!mpic_is_percpu_irq (hwirq))writel (hwirq, main_int_base +MPIC_INT_SET_ENABLE );else writel (hwirq, per_cpu_int_base +MPIC_INT_CLEAR_MASK );
@@ -228,19 +228,19 @@ static void armada_370_xp_irq_unmask(struct irq_data *d)#ifdef CONFIG_PCI_MSI -static struct irq_chip armada_370_xp_msi_irq_chip = { +static struct irq_chip mpic_msi_irq_chip = { .name ="MPIC MSI" , .irq_mask = pci_msi_mask_irq, .irq_unmask = pci_msi_unmask_irq, }; -static struct msi_domain_info armada_370_xp_msi_domain_info = { +static struct msi_domain_info mpic_msi_domain_info = { .flags = (MSI_FLAG_USE_DEF_DOM_OPS |MSI_FLAG_USE_DEF_CHIP_OPS |MSI_FLAG_MULTI_PCI_MSI |MSI_FLAG_PCI_MSIX ), - .chip = &armada_370_xp_msi_irq_chip, + .chip = &mpic_msi_irq_chip, }; -static void armada_370_xp_compose_msi_msg (struct irq_data *data,struct msi_msg *msg) +static void mpic_compose_msi_msg (struct irq_data *data,struct msi_msg *msg) {unsigned int cpu =cpumask_first (irq_data_get_effective_affinity_mask (data));
@@ -249,8 +249,8 @@ static void armada_370_xp_compose_msi_msg(struct irq_data *data, struct msi_msg msg->data =BIT (cpu +8 ) | (data->hwirq +msi_doorbell_start ()); } -static int armada_370_xp_msi_set_affinity (struct irq_data *irq_data, -const struct cpumask *mask,bool force) +static int mpic_msi_set_affinity (struct irq_data *irq_data, +const struct cpumask *mask,bool force) {unsigned int cpu;
@@ -267,14 +267,14 @@ static int armada_370_xp_msi_set_affinity(struct irq_data *irq_data,return IRQ_SET_MASK_OK ; } -static struct irq_chip armada_370_xp_msi_bottom_irq_chip = { +static struct irq_chip mpic_msi_bottom_irq_chip = { .name ="MPIC MSI" , - .irq_compose_msi_msg = armada_370_xp_compose_msi_msg, - .irq_set_affinity = armada_370_xp_msi_set_affinity, + .irq_compose_msi_msg = mpic_compose_msi_msg, + .irq_set_affinity = mpic_msi_set_affinity, }; -static int armada_370_xp_msi_alloc (struct irq_domain *domain,unsigned int virq, -unsigned int nr_irqs,void *args) +static int mpic_msi_alloc (struct irq_domain *domain,unsigned int virq, +unsigned int nr_irqs,void *args) {int hwirq;
@@ -288,7 +288,7 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq,for (int i =0 ; i < nr_irqs; i++) {irq_domain_set_info (domain, virq + i, hwirq + i, - &armada_370_xp_msi_bottom_irq_chip, + &mpic_msi_bottom_irq_chip, domain->host_data, handle_simple_irq,NULL ,NULL ); }
@@ -296,8 +296,8 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq,return 0 ; } -static void armada_370_xp_msi_free (struct irq_domain *domain, -unsigned int virq,unsigned int nr_irqs) +static void mpic_msi_free (struct irq_domain *domain,unsigned int virq, +unsigned int nr_irqs) {struct irq_data *d =irq_domain_get_irq_data (domain, virq);
@@ -306,12 +306,12 @@ static void armada_370_xp_msi_free(struct irq_domain *domain,mutex_unlock (&msi_used_lock); } -static const struct irq_domain_ops armada_370_xp_msi_domain_ops = { - .alloc = armada_370_xp_msi_alloc, - .free = armada_370_xp_msi_free, +static const struct irq_domain_ops mpic_msi_domain_ops = { + .alloc = mpic_msi_alloc, + .free = mpic_msi_free, }; -static void armada_370_xp_msi_reenable_percpu (void ) +static void mpic_msi_reenable_percpu (void ) {u32 reg;
@@ -324,45 +324,44 @@ static void armada_370_xp_msi_reenable_percpu(void)writel (1 , per_cpu_int_base +MPIC_INT_CLEAR_MASK ); } -static int armada_370_xp_msi_init (struct device_node *node, -phys_addr_t main_int_phys_base) +static int mpic_msi_init (struct device_node *node, +phys_addr_t main_int_phys_base) { msi_doorbell_addr = main_int_phys_base +MPIC_SW_TRIG_INT ; - armada_370_xp_msi_inner_domain = -irq_domain_add_linear (NULL ,msi_doorbell_size (), - &armada_370_xp_msi_domain_ops,NULL ); -if (!armada_370_xp_msi_inner_domain) + mpic_msi_inner_domain =irq_domain_add_linear (NULL ,msi_doorbell_size (), + &mpic_msi_domain_ops, +NULL ); +if (!mpic_msi_inner_domain)return -ENOMEM ; - armada_370_xp_msi_domain = -pci_msi_create_irq_domain (of_node_to_fwnode (node), - &armada_370_xp_msi_domain_info, - armada_370_xp_msi_inner_domain); -if (!armada_370_xp_msi_domain) { -irq_domain_remove (armada_370_xp_msi_inner_domain); + mpic_msi_domain =pci_msi_create_irq_domain (of_node_to_fwnode (node), + &mpic_msi_domain_info, + mpic_msi_inner_domain); +if (!mpic_msi_domain) { +irq_domain_remove (mpic_msi_inner_domain);return -ENOMEM ; } -armada_370_xp_msi_reenable_percpu (); +mpic_msi_reenable_percpu ();/* Unmask low 16 MSI irqs on non-IPI platforms */ -if (!is_ipi_available ()) +if (!mpic_is_ipi_available ())writel (0 , per_cpu_int_base +MPIC_INT_CLEAR_MASK );return 0 ; }#else -static __maybe_unused void armada_370_xp_msi_reenable_percpu (void ) {} +static __maybe_unused void mpic_msi_reenable_percpu (void ) {} -static inline int armada_370_xp_msi_init (struct device_node *node, -phys_addr_t main_int_phys_base) +static inline int mpic_msi_init (struct device_node *node, +phys_addr_t main_int_phys_base) {return 0 ; }#endif -static void armada_xp_mpic_perf_init (void ) +static void mpic_perf_init (void ) {unsigned long cpuid;
@@ -381,9 +380,9 @@ static void armada_xp_mpic_perf_init(void) }#ifdef CONFIG_SMP -static struct irq_domain *ipi_domain; +static struct irq_domain *mpic_ipi_domain; -static void armada_370_xp_ipi_mask (struct irq_data *d) +static void mpic_ipi_mask (struct irq_data *d) {u32 reg;
@@ -392,7 +391,7 @@ static void armada_370_xp_ipi_mask(struct irq_data *d)writel (reg, per_cpu_int_base +MPIC_IN_DRBEL_MASK ); } -static void armada_370_xp_ipi_unmask (struct irq_data *d) +static void mpic_ipi_unmask (struct irq_data *d) {u32 reg;
@@ -401,8 +400,7 @@ static void armada_370_xp_ipi_unmask(struct irq_data *d)writel (reg, per_cpu_int_base +MPIC_IN_DRBEL_MASK ); } -static void armada_370_xp_ipi_send_mask (struct irq_data *d, -const struct cpumask *mask) +static void mpic_ipi_send_mask (struct irq_data *d,const struct cpumask *mask) {unsigned long map =0 ;unsigned int cpu;
@@ -421,68 +419,69 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d,writel ((map <<8 ) | d->hwirq, main_int_base +MPIC_SW_TRIG_INT ); } -static void armada_370_xp_ipi_ack (struct irq_data *d) +static void mpic_ipi_ack (struct irq_data *d) {writel (~BIT (d->hwirq), per_cpu_int_base +MPIC_IN_DRBEL_CAUSE ); } -static struct irq_chip ipi_irqchip = { +static struct irq_chip mpic_ipi_irqchip = { .name ="IPI" , - .irq_ack = armada_370_xp_ipi_ack, - .irq_mask = armada_370_xp_ipi_mask, - .irq_unmask = armada_370_xp_ipi_unmask, - .ipi_send_mask = armada_370_xp_ipi_send_mask, + .irq_ack = mpic_ipi_ack, + .irq_mask = mpic_ipi_mask, + .irq_unmask = mpic_ipi_unmask, + .ipi_send_mask = mpic_ipi_send_mask, }; -static int armada_370_xp_ipi_alloc (struct irq_domain *d,unsigned int virq, -unsigned int nr_irqs,void *args) +static int mpic_ipi_alloc (struct irq_domain *d,unsigned int virq, +unsigned int nr_irqs,void *args) {for (int i =0 ; i < nr_irqs; i++) {irq_set_percpu_devid (virq + i); -irq_domain_set_info (d, virq + i, i, &ipi_irqchip, d->host_data, - handle_percpu_devid_irq,NULL ,NULL ); +irq_domain_set_info (d, virq + i, i, &mpic_ipi_irqchip, + d->host_data, handle_percpu_devid_irq, +NULL ,NULL ); }return 0 ; } -static void armada_370_xp_ipi_free (struct irq_domain *d,unsigned int virq, -unsigned int nr_irqs) +static void mpic_ipi_free (struct irq_domain *d,unsigned int virq, +unsigned int nr_irqs) {/* Not freeing IPIs */ } -static const struct irq_domain_ops ipi_domain_ops = { - .alloc = armada_370_xp_ipi_alloc, - .free = armada_370_xp_ipi_free, +static const struct irq_domain_ops mpic_ipi_domain_ops = { + .alloc = mpic_ipi_alloc, + .free = mpic_ipi_free, }; -static void ipi_resume (void ) +static void mpic_ipi_resume (void ) {for (int i =0 ; i <IPI_DOORBELL_END ; i++) { -unsigned int virq =irq_find_mapping (ipi_domain, i); +unsigned int virq =irq_find_mapping (mpic_ipi_domain, i);struct irq_data *d;if (!virq || !irq_percpu_is_enabled (virq))continue ; - d =irq_domain_get_irq_data (ipi_domain, virq); -armada_370_xp_ipi_unmask (d); + d =irq_domain_get_irq_data (mpic_ipi_domain, virq); +mpic_ipi_unmask (d); } } -static __init void armada_xp_ipi_init (struct device_node *node) +static __init void mpic_ipi_init (struct device_node *node) {int base_ipi; - ipi_domain =irq_domain_create_linear (of_node_to_fwnode (node), -IPI_DOORBELL_END , - &ipi_domain_ops,NULL ); -if (WARN_ON (!ipi_domain)) + mpic_ipi_domain =irq_domain_create_linear (of_node_to_fwnode (node), +IPI_DOORBELL_END , + &mpic_ipi_domain_ops,NULL ); +if (WARN_ON (!mpic_ipi_domain))return ; -irq_domain_update_bus_token (ipi_domain,DOMAIN_BUS_IPI ); - base_ipi =irq_domain_alloc_irqs (ipi_domain,IPI_DOORBELL_END , +irq_domain_update_bus_token (mpic_ipi_domain,DOMAIN_BUS_IPI ); + base_ipi =irq_domain_alloc_irqs (mpic_ipi_domain,IPI_DOORBELL_END ,NUMA_NO_NODE ,NULL );if (WARN_ON (!base_ipi))return ;
@@ -490,8 +489,8 @@ static __init void armada_xp_ipi_init(struct device_node *node)set_smp_ipi_range (base_ipi,IPI_DOORBELL_END ); } -static int armada_xp_set_affinity (struct irq_data *d, -const struct cpumask *mask_val,bool force) +static int mpic_set_affinity (struct irq_data *d,const struct cpumask *mask_val, +bool force) {irq_hw_number_t hwirq =irqd_to_hwirq (d);unsigned int cpu;
@@ -507,7 +506,7 @@ static int armada_xp_set_affinity(struct irq_data *d,return IRQ_SET_MASK_OK ; } -static void armada_xp_mpic_smp_cpu_init (void ) +static void mpic_smp_cpu_init (void ) {u32 control;int nr_irqs;
@@ -518,7 +517,7 @@ static void armada_xp_mpic_smp_cpu_init(void)for (int i =0 ; i < nr_irqs; i++)writel (i, per_cpu_int_base +MPIC_INT_SET_MASK ); -if (!is_ipi_available ()) +if (!mpic_is_ipi_available ())return ;/* Disable all IPIs */
@@ -531,14 +530,14 @@ static void armada_xp_mpic_smp_cpu_init(void)writel (0 , per_cpu_int_base +MPIC_INT_CLEAR_MASK ); } -static void armada_xp_mpic_reenable_percpu (void ) +static void mpic_reenable_percpu (void ) {/* Re-enable per-CPU interrupts that were enabled before suspend */ for (unsigned int irq =0 ; irq <MPIC_MAX_PER_CPU_IRQS ; irq++) {struct irq_data *data;unsigned int virq; - virq =irq_linear_revmap (armada_370_xp_mpic_domain, irq); + virq =irq_linear_revmap (mpic_domain, irq);if (!virq)continue ;
@@ -547,69 +546,68 @@ static void armada_xp_mpic_reenable_percpu(void)if (!irq_percpu_is_enabled (virq))continue ; - armada_370_xp_irq_unmask(data); + mpic_irq_unmask(data); } -if (is_ipi_available ()) -ipi_resume (); +if (mpic_is_ipi_available ()) +mpic_ipi_resume (); -armada_370_xp_msi_reenable_percpu (); +mpic_msi_reenable_percpu (); } -static int armada_xp_mpic_starting_cpu (unsigned int cpu) +static int mpic_starting_cpu (unsigned int cpu) { -armada_xp_mpic_perf_init (); -armada_xp_mpic_smp_cpu_init (); -armada_xp_mpic_reenable_percpu (); +mpic_perf_init (); +mpic_smp_cpu_init (); +mpic_reenable_percpu ();return 0 ; }static int mpic_cascaded_starting_cpu (unsigned int cpu) { -armada_xp_mpic_perf_init (); -armada_xp_mpic_reenable_percpu (); +mpic_perf_init (); +mpic_reenable_percpu ();enable_percpu_irq (parent_irq,IRQ_TYPE_NONE );return 0 ; }#else -static void armada_xp_mpic_smp_cpu_init (void ) {} -static void ipi_resume (void ) {} +static void mpic_smp_cpu_init (void ) {} +static void mpic_ipi_resume (void ) {}#endif -static struct irq_chip armada_370_xp_irq_chip = { +static struct irq_chip mpic_irq_chip = { .name ="MPIC" , - .irq_mask = armada_370_xp_irq_mask, - .irq_mask_ack = armada_370_xp_irq_mask, - .irq_unmask = armada_370_xp_irq_unmask, + .irq_mask = mpic_irq_mask, + .irq_mask_ack = mpic_irq_mask, + .irq_unmask = mpic_irq_unmask, #ifdef CONFIG_SMP - .irq_set_affinity = armada_xp_set_affinity, + .irq_set_affinity = mpic_set_affinity, #endif .flags =IRQCHIP_SKIP_SET_WAKE |IRQCHIP_MASK_ON_SUSPEND , }; -static int armada_370_xp_mpic_irq_map (struct irq_domain *h, -unsigned int virq,irq_hw_number_t hw) +static int mpic_irq_map (struct irq_domain *h,unsigned int virq, +irq_hw_number_t hw) {/* IRQs 0 and 1 cannot be mapped, they are handled internally */ if (hw <=1 )return -EINVAL ; -armada_370_xp_irq_mask (irq_get_irq_data (virq)); -if (!is_percpu_irq (hw)) +mpic_irq_mask (irq_get_irq_data (virq)); +if (!mpic_is_percpu_irq (hw))writel (hw, per_cpu_int_base +MPIC_INT_CLEAR_MASK );else writel (hw, main_int_base +MPIC_INT_SET_ENABLE );irq_set_status_flags (virq,IRQ_LEVEL ); -if (is_percpu_irq (hw)) { +if (mpic_is_percpu_irq (hw)) {irq_set_percpu_devid (virq); -irq_set_chip_and_handler (virq, &armada_370_xp_irq_chip, +irq_set_chip_and_handler (virq, &mpic_irq_chip, handle_percpu_devid_irq); }else { -irq_set_chip_and_handler (virq, &armada_370_xp_irq_chip, - handle_level_irq); +irq_set_chip_and_handler (virq, &mpic_irq_chip, handle_level_irq);irqd_set_single_target (irq_desc_get_irq_data (irq_to_desc (virq))); }irq_set_probe (virq);
@@ -617,13 +615,13 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,return 0 ; } -static const struct irq_domain_ops armada_370_xp_mpic_irq_ops = { - .map = armada_370_xp_mpic_irq_map, +static const struct irq_domain_ops mpic_irq_ops = { + .map = mpic_irq_map, .xlate = irq_domain_xlate_onecell, };#ifdef CONFIG_PCI_MSI -static void armada_370_xp_handle_msi_irq (struct pt_regs *regs,bool is_chained) +static void mpic_handle_msi_irq (struct pt_regs *regs,bool is_chained) {u32 msimask, msinr;
@@ -641,14 +639,14 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained) irq = msinr -msi_doorbell_start (); - generic_handle_domain_irq(armada_370_xp_msi_inner_domain, irq); + generic_handle_domain_irq(mpic_msi_inner_domain, irq); } }#else -static void armada_370_xp_handle_msi_irq (struct pt_regs *r,bool b) {} +static void mpic_handle_msi_irq (struct pt_regs *r,bool b) {}#endif -static void armada_370_xp_mpic_handle_cascade_irq (struct irq_desc *desc) +static void mpic_handle_cascade_irq (struct irq_desc *desc) {struct irq_chip *chip =irq_desc_get_chip (desc);unsigned long irqmap, irqn, irqsrc, cpuid;
@@ -668,18 +666,17 @@ static void armada_370_xp_mpic_handle_cascade_irq(struct irq_desc *desc)continue ;if (irqn ==0 || irqn ==1 ) { -armada_370_xp_handle_msi_irq (NULL , true); +mpic_handle_msi_irq (NULL , true);continue ; } -generic_handle_domain_irq (armada_370_xp_mpic_domain, irqn); +generic_handle_domain_irq (mpic_domain, irqn); }chained_irq_exit (chip, desc); } -static void __exception_irq_entry -armada_370_xp_handle_irq (struct pt_regs *regs) +static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) {u32 irqstat, irqnr;
@@ -691,14 +688,13 @@ armada_370_xp_handle_irq(struct pt_regs *regs)break ;if (irqnr >1 ) { -generic_handle_domain_irq (armada_370_xp_mpic_domain, - irqnr); +generic_handle_domain_irq (mpic_domain, irqnr);continue ; }/* MSI handling */ if (irqnr ==1 ) -armada_370_xp_handle_msi_irq (regs, false); +mpic_handle_msi_irq (regs, false);#ifdef CONFIG_SMP /* IPI Handling */
@@ -711,20 +707,20 @@ armada_370_xp_handle_irq(struct pt_regs *regs)IPI_DOORBELL_MASK ;for_each_set_bit (ipi, &ipimask,IPI_DOORBELL_END ) - generic_handle_domain_irq(ipi_domain, ipi); + generic_handle_domain_irq(mpic_ipi_domain, ipi); }#endif }while (1 ); } -static int armada_370_xp_mpic_suspend (void ) +static int mpic_suspend (void ) { doorbell_mask_reg =readl (per_cpu_int_base +MPIC_IN_DRBEL_MASK );return 0 ; } -static void armada_370_xp_mpic_resume (void ) +static void mpic_resume (void ) {bool src0, src1;int nirqs;
@@ -735,35 +731,34 @@ static void armada_370_xp_mpic_resume(void)struct irq_data *data;unsigned int virq; - virq =irq_linear_revmap (armada_370_xp_mpic_domain, irq); + virq =irq_linear_revmap (mpic_domain, irq);if (!virq)continue ; data =irq_get_irq_data (virq); -if (!is_percpu_irq (irq)) { +if (!mpic_is_percpu_irq (irq)) {/* Non per-CPU interrupts */ writel (irq, per_cpu_int_base +MPIC_INT_CLEAR_MASK );if (!irqd_irq_disabled (data)) -armada_370_xp_irq_unmask (data); +mpic_irq_unmask (data); }else {/* Per-CPU interrupts */ writel (irq, main_int_base +MPIC_INT_SET_ENABLE );/* -* Re-enable on the current CPU, -* armada_xp_mpic_reenable_percpu() will take -* care of secondary CPUs when they come up. +* Re-enable on the current CPU, mpic_reenable_percpu() +* will take care of secondary CPUs when they come up. */ if (irq_percpu_is_enabled (virq)) -armada_370_xp_irq_unmask (data); +mpic_irq_unmask (data); } }/* Reconfigure doorbells for IPIs and MSIs */ writel (doorbell_mask_reg, per_cpu_int_base +MPIC_IN_DRBEL_MASK ); -if (is_ipi_available ()) { +if (mpic_is_ipi_available ()) { src0 = doorbell_mask_reg &IPI_DOORBELL_MASK ; src1 = doorbell_mask_reg &PCI_MSI_DOORBELL_MASK ; }else {
@@ -776,17 +771,17 @@ static void armada_370_xp_mpic_resume(void)if (src1)writel (1 , per_cpu_int_base +MPIC_INT_CLEAR_MASK ); -if (is_ipi_available ()) -ipi_resume (); +if (mpic_is_ipi_available ()) +mpic_ipi_resume (); } -static struct syscore_ops armada_370_xp_mpic_syscore_ops = { - .suspend = armada_370_xp_mpic_suspend, - .resume = armada_370_xp_mpic_resume, +static struct syscore_ops mpic_syscore_ops = { + .suspend = mpic_suspend, + .resume = mpic_resume, }; -static int __init armada_370_xp_mpic_of_init (struct device_node *node, -struct device_node *parent) +static int __init mpic_of_init (struct device_node *node, +struct device_node *parent) {struct resource main_int_res, per_cpu_int_res;int nr_irqs;
@@ -816,11 +811,9 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,for (int i =0 ; i < nr_irqs; i++)writel (i, main_int_base +MPIC_INT_CLEAR_ENABLE ); - armada_370_xp_mpic_domain =irq_domain_add_linear (node, nr_irqs, - &armada_370_xp_mpic_irq_ops, -NULL ); -BUG_ON (!armada_370_xp_mpic_domain); -irq_domain_update_bus_token (armada_370_xp_mpic_domain,DOMAIN_BUS_WIRED ); + mpic_domain =irq_domain_add_linear (node, nr_irqs, &mpic_irq_ops,NULL ); +BUG_ON (!mpic_domain); +irq_domain_update_bus_token (mpic_domain,DOMAIN_BUS_WIRED );/* * Initialize parent_irq before calling any other functions, since it is
@@ -829,19 +822,19 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, parent_irq =irq_of_parse_and_map (node,0 );/* Setup for the boot CPU */ -armada_xp_mpic_perf_init (); -armada_xp_mpic_smp_cpu_init (); +mpic_perf_init (); +mpic_smp_cpu_init (); -armada_370_xp_msi_init (node, main_int_res.start); +mpic_msi_init (node, main_int_res.start);if (parent_irq <=0 ) { -irq_set_default_host (armada_370_xp_mpic_domain); -set_handle_irq (armada_370_xp_handle_irq); +irq_set_default_host (mpic_domain); +set_handle_irq (mpic_handle_irq);#ifdef CONFIG_SMP -armada_xp_ipi_init (node); +mpic_ipi_init (node);cpuhp_setup_state_nocalls (CPUHP_AP_IRQ_ARMADA_XP_STARTING ,"irqchip/armada/ipi:starting" , - armada_xp_mpic_starting_cpu,NULL ); + mpic_starting_cpu,NULL );#endif }else {#ifdef CONFIG_SMP
@@ -849,13 +842,12 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,"irqchip/armada/cascade:starting" , mpic_cascaded_starting_cpu, NULL);#endif -irq_set_chained_handler (parent_irq, - armada_370_xp_mpic_handle_cascade_irq); +irq_set_chained_handler (parent_irq, mpic_handle_cascade_irq); } -register_syscore_ops (&armada_370_xp_mpic_syscore_ops); +register_syscore_ops (&mpic_syscore_ops);return 0 ; } -IRQCHIP_DECLARE (armada_370_xp_mpic,"marvell,mpic" , armada_370_xp_mpic_of_init); +IRQCHIP_DECLARE (marvell_mpic,"marvell,mpic" , mpic_of_init);
Signature · 1 line
2.44.2
PATCH v2 17/30 irqchip/armada-370-xp: Don't read number of supported interrupts multiple times
In reply to Marek BehúnGet the number of supported interrupts, originally from the MPIC_INT_CONTROL register, from the mpic_domain structure member when it is already initialized.
Signed-off-by Marek Behún <[email protected]>
Reviewed-by Andrew Lunn <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +2 -10
@@ -508,13 +508,7 @@ static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,static void mpic_smp_cpu_init (void ) { -u32 control; -int nr_irqs; - - control =readl (main_int_base +MPIC_INT_CONTROL ); - nr_irqs = (control >>2 ) &0x3ff ; - -for (int i =0 ; i < nr_irqs; i++) +for (int i =0 ; i < mpic_domain->hwirq_max; i++)writel (i, per_cpu_int_base +MPIC_INT_SET_MASK );if (!mpic_is_ipi_available ())
@@ -723,11 +717,9 @@ static int mpic_suspend(void)static void mpic_resume (void ) {bool src0, src1; -int nirqs;/* Re-enable interrupts */ - nirqs = (readl (main_int_base +MPIC_INT_CONTROL ) >>2 ) &0x3ff ; -for (irq_hw_number_t irq =0 ; irq < nirqs; irq++) { +for (irq_hw_number_t irq =0 ; irq < mpic_domain->hwirq_max; irq++) {struct irq_data *data;unsigned int virq;
Signature · 1 line
2.44.2
PATCH v2 18/30 irqchip/armada-370-xp: Use FIELD_GET() and named register constant
In reply to Marek BehúnUse FIELD_GET() and named register mask constant when reading the number of supported interrupts / current interrupt.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +7 -5
@@ -10,6 +10,7 @@* Ben Dooks <[email protected]> */ +#include <linux/bitfield.h> #include <linux/bits.h> #include <linux/kernel.h> #include <linux/module.h>
@@ -112,6 +113,7 @@/* Registers relative to main_int_base */ #define MPIC_INT_CONTROL 0x00 +#define MPIC_INT_CONTROL_NUMINT_MASK GENMASK(12, 2)#define MPIC_SW_TRIG_INT 0x04#define MPIC_INT_SET_ENABLE 0x30#define MPIC_INT_CLEAR_ENABLE 0x34
@@ -124,6 +126,7 @@#define MPIC_IN_DRBEL_MASK 0x0c#define MPIC_PPI_CAUSE 0x10#define MPIC_CPU_INTACK 0x44 +#define MPIC_CPU_INTACK_IID_MASK GENMASK(9, 0)#define MPIC_INT_SET_MASK 0x48#define MPIC_INT_CLEAR_MASK 0x4C#define MPIC_INT_FABRIC_MASK 0x54
@@ -676,7 +679,7 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) do { irqstat = readl_relaxed(per_cpu_int_base + MPIC_CPU_INTACK); - irqnr = irqstat & 0x3FF; + irqnr = FIELD_GET(MPIC_CPU_INTACK_IID_MASK, irqstat); if (irqnr > 1022) break;
@@ -776,8 +779,7 @@ static int __init mpic_of_init(struct device_node *node, struct device_node *parent) {struct resource main_int_res, per_cpu_int_res; -int nr_irqs; -u32 control; +unsigned int nr_irqs;BUG_ON (of_address_to_resource (node,0 , &main_int_res));BUG_ON (of_address_to_resource (node,1 , &per_cpu_int_res));
@@ -797,8 +799,8 @@ static int __init mpic_of_init(struct device_node *node, resource_size(&per_cpu_int_res));BUG_ON (!per_cpu_int_base); - control =readl (main_int_base +MPIC_INT_CONTROL ); - nr_irqs = (control >>2 ) &0x3ff ; + nr_irqs =FIELD_GET (MPIC_INT_CONTROL_NUMINT_MASK , +readl (main_int_base +MPIC_INT_CONTROL ));for (int i =0 ; i < nr_irqs; i++)writel (i, main_int_base +MPIC_INT_CLEAR_ENABLE );
Signature · 1 line
2.44.2
PATCH v2 19/30 irqchip/armada-370-xp: Refactor mpic_handle_msi_irq() code
In reply to Marek BehúnRefactor the mpic_handle_msi_irq() function to make it simpler:
- drop the function arguments, they are not needed
- rename the variable holding the doorbell cause register to "cause"
- rename the iterating variable to "i"
- use for_each_set_bit() (requires retyping "cause" to unsigned long)
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 32 +++++++++++------------------ 1 file changed, 12 insertions(+), 20 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +12 -20
@@ -618,29 +618,21 @@ static const struct irq_domain_ops mpic_irq_ops = { };#ifdef CONFIG_PCI_MSI -static void mpic_handle_msi_irq (struct pt_regs *regs,bool is_chained) +static void mpic_handle_msi_irq (void ) { -u32 msimask, msinr; +unsigned long cause; +unsigned int i; - msimask =readl_relaxed (per_cpu_int_base +MPIC_IN_DRBEL_CAUSE ); - msimask &=msi_doorbell_mask (); + cause =readl_relaxed (per_cpu_int_base +MPIC_IN_DRBEL_CAUSE ); + cause &=msi_doorbell_mask (); +writel (~cause, per_cpu_int_base +MPIC_IN_DRBEL_CAUSE ); -writel (~msimask, per_cpu_int_base +MPIC_IN_DRBEL_CAUSE ); - -for (msinr =msi_doorbell_start (); - msinr <msi_doorbell_end (); msinr++) { -unsigned int irq; - -if (!(msimask &BIT (msinr))) -continue ; - - irq = msinr -msi_doorbell_start (); - -generic_handle_domain_irq (mpic_msi_inner_domain, irq); - } +for_each_set_bit (i, &cause,BITS_PER_LONG ) +generic_handle_domain_irq (mpic_msi_inner_domain, + i -msi_doorbell_start ()); }#else -static void mpic_handle_msi_irq (struct pt_regs *r,bool b) {} +static void mpic_handle_msi_irq (void ) {}#endif static void mpic_handle_cascade_irq (struct irq_desc *desc)
@@ -663,7 +655,7 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc)continue ;if (irqn ==0 || irqn ==1 ) { -mpic_handle_msi_irq (NULL , true); +mpic_handle_msi_irq ();continue ; }
@@ -691,7 +683,7 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs)/* MSI handling */ if (irqnr ==1 ) -mpic_handle_msi_irq (regs, false); +mpic_handle_msi_irq ();#ifdef CONFIG_SMP /* IPI Handling */
Signature · 1 line
2.44.2
PATCH v2 20/30 irqchip/armada-370-xp: Refactor handling IPI interrupts
In reply to Marek BehúnRefactor the handling of IPI interrupts
- put into own function mpic_handle_ipi_irq(), similar to mpic_handle_msi_irq()
- rename the variable holding the doorbell cause register to "cause"
- retype and rename the variable holding the IPI HW IRQ number to "irq_hw_number_t i"
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 31 +++++++++++++++++------------ 1 file changed, 18 insertions(+), 13 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +18 -13
@@ -635,6 +635,22 @@ static void mpic_handle_msi_irq(void)static void mpic_handle_msi_irq (void ) {}#endif +#ifdef CONFIG_SMP +static void mpic_handle_ipi_irq (void ) +{ +unsigned long cause; +irq_hw_number_t i; + + cause =readl_relaxed (per_cpu_int_base +MPIC_IN_DRBEL_CAUSE ); + cause &=IPI_DOORBELL_MASK ; + +for_each_set_bit (i, &cause,IPI_DOORBELL_END ) +generic_handle_domain_irq (mpic_ipi_domain, i); +} +#else +static inline void mpic_handle_ipi_irq (void ) {} +#endif +static void mpic_handle_cascade_irq (struct irq_desc *desc) {struct irq_chip *chip =irq_desc_get_chip (desc);
@@ -685,20 +701,9 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs)if (irqnr ==1 )mpic_handle_msi_irq (); -#ifdef CONFIG_SMP /* IPI Handling */ -if (irqnr ==0 ) { -unsigned long ipimask; -int ipi; - - ipimask =readl_relaxed (per_cpu_int_base + -MPIC_IN_DRBEL_CAUSE ) & -IPI_DOORBELL_MASK ; - -for_each_set_bit (ipi, &ipimask,IPI_DOORBELL_END ) -generic_handle_domain_irq (mpic_ipi_domain, ipi); - } -#endif +if (irqnr ==0 ) +mpic_handle_ipi_irq (); }while (1 ); }
Signature · 1 line
2.44.2
PATCH v2 21/30 irqchip/armada-370-xp: Use consistent variable names for hwirqs
In reply to Marek BehúnUse consistent variable names for hwirqs: when iterating, use "i", otherwise use "hwirq".
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 56 ++++++++++++++--------------- 1 file changed, 28 insertions(+), 28 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +28 -28
@@ -117,7 +117,7 @@#define MPIC_SW_TRIG_INT 0x04#define MPIC_INT_SET_ENABLE 0x30#define MPIC_INT_CLEAR_ENABLE 0x34 -#define MPIC_INT_SOURCE_CTL (irq) (0x100 + (irq) * 4) +#define MPIC_INT_SOURCE_CTL (hwirq) (0x100 + (hwirq) * 4)#define MPIC_INT_SOURCE_CPU_MASK GENMASK(3, 0)#define MPIC_INT_IRQ_FIQ_MASK (cpuid) ((BIT(0) | BIT(8)) << (cpuid))
@@ -199,9 +199,9 @@ static inline unsigned int msi_doorbell_end(void)PCI_MSI_FULL_DOORBELL_END ; } -static inline bool mpic_is_percpu_irq (irq_hw_number_t irq) +static inline bool mpic_is_percpu_irq (irq_hw_number_t hwirq) { -return irq <=MPIC_MAX_PER_CPU_IRQS ; +return hwirq <=MPIC_MAX_PER_CPU_IRQS ; }/*
@@ -530,11 +530,11 @@ static void mpic_smp_cpu_init(void)static void mpic_reenable_percpu (void ) {/* Re-enable per-CPU interrupts that were enabled before suspend */ -for (unsigned int irq =0 ; irq <MPIC_MAX_PER_CPU_IRQS ; irq++) { +for (unsigned int i =0 ; i <MPIC_MAX_PER_CPU_IRQS ; i++) {struct irq_data *data;unsigned int virq; - virq =irq_linear_revmap (mpic_domain, irq); + virq =irq_linear_revmap (mpic_domain, i);if (!virq)continue ;
@@ -586,20 +586,20 @@ static struct irq_chip mpic_irq_chip = { };static int mpic_irq_map (struct irq_domain *h,unsigned int virq, -irq_hw_number_t hw) +irq_hw_number_t hwirq) {/* IRQs 0 and 1 cannot be mapped, they are handled internally */ -if (hw <=1 ) +if (hwirq <=1 )return -EINVAL ;mpic_irq_mask (irq_get_irq_data (virq)); -if (!mpic_is_percpu_irq (hw)) -writel (hw, per_cpu_int_base +MPIC_INT_CLEAR_MASK ); +if (!mpic_is_percpu_irq (hwirq)) +writel (hwirq, per_cpu_int_base +MPIC_INT_CLEAR_MASK );else -writel (hw, main_int_base +MPIC_INT_SET_ENABLE ); +writel (hwirq, main_int_base +MPIC_INT_SET_ENABLE );irq_set_status_flags (virq,IRQ_LEVEL ); -if (mpic_is_percpu_irq (hw)) { +if (mpic_is_percpu_irq (hwirq)) {irq_set_percpu_devid (virq);irq_set_chip_and_handler (virq, &mpic_irq_chip, handle_percpu_devid_irq);
@@ -654,15 +654,15 @@ static inline void mpic_handle_ipi_irq(void) {}static void mpic_handle_cascade_irq (struct irq_desc *desc) {struct irq_chip *chip =irq_desc_get_chip (desc); -unsigned long irqmap, irqn, irqsrc, cpuid; +unsigned long irqmap, i, irqsrc, cpuid;chained_irq_enter (chip, desc); irqmap =readl_relaxed (per_cpu_int_base +MPIC_PPI_CAUSE ); cpuid =cpu_logical_map (smp_processor_id ()); -for_each_set_bit (irqn, &irqmap,BITS_PER_LONG ) { - irqsrc =readl_relaxed (main_int_base +MPIC_INT_SOURCE_CTL (irqn)); +for_each_set_bit (i, &irqmap,BITS_PER_LONG ) { + irqsrc =readl_relaxed (main_int_base +MPIC_INT_SOURCE_CTL (i));/* Check if the interrupt is not masked on current CPU. * Test IRQ (0-1) and FIQ (8-9) mask bits.
@@ -670,12 +670,12 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc)if (!(irqsrc &MPIC_INT_IRQ_FIQ_MASK (cpuid)))continue ; -if (irqn ==0 || irqn ==1 ) { +if (i ==0 || i ==1 ) {mpic_handle_msi_irq ();continue ; } -generic_handle_domain_irq (mpic_domain, irqn); +generic_handle_domain_irq (mpic_domain, i); }chained_irq_exit (chip, desc);
@@ -683,26 +683,26 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) { -u32 irqstat, irqnr; +u32 irqstat, i;do { irqstat =readl_relaxed (per_cpu_int_base +MPIC_CPU_INTACK ); - irqnr =FIELD_GET (MPIC_CPU_INTACK_IID_MASK , irqstat); + i =FIELD_GET (MPIC_CPU_INTACK_IID_MASK , irqstat); -if (irqnr >1022 ) +if (i >1022 )break ; -if (irqnr >1 ) { -generic_handle_domain_irq (mpic_domain, irqnr); +if (i >1 ) { +generic_handle_domain_irq (mpic_domain, i);continue ; }/* MSI handling */ -if (irqnr ==1 ) +if (i ==1 )mpic_handle_msi_irq ();/* IPI Handling */ -if (irqnr ==0 ) +if (i ==0 )mpic_handle_ipi_irq (); }while (1 ); }
@@ -719,24 +719,24 @@ static void mpic_resume(void)bool src0, src1;/* Re-enable interrupts */ -for (irq_hw_number_t irq =0 ; irq < mpic_domain->hwirq_max; irq++) { +for (irq_hw_number_t i =0 ; i < mpic_domain->hwirq_max; i++) {struct irq_data *data;unsigned int virq; - virq =irq_linear_revmap (mpic_domain, irq); + virq =irq_linear_revmap (mpic_domain, i);if (!virq)continue ; data =irq_get_irq_data (virq); -if (!mpic_is_percpu_irq (irq)) { +if (!mpic_is_percpu_irq (i)) {/* Non per-CPU interrupts */ -writel (irq, per_cpu_int_base +MPIC_INT_CLEAR_MASK ); +writel (i, per_cpu_int_base +MPIC_INT_CLEAR_MASK );if (!irqd_irq_disabled (data))mpic_irq_unmask (data); }else {/* Per-CPU interrupts */ -writel (irq, main_int_base +MPIC_INT_SET_ENABLE ); +writel (i, main_int_base +MPIC_INT_SET_ENABLE );/* * Re-enable on the current CPU, mpic_reenable_percpu()
Signature · 1 line
2.44.2
PATCH v2 22/30 irqchip/armada-370-xp: Use consistent types when iterating interrupts
In reply to Marek BehúnWhen iterating, use either the irq_hw_number_t type or the unsigned int type for the iterator variable, depending on whether the variable represents HW IRQ number or whether it is added to a IRQ number.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +10 -8
@@ -289,7 +289,7 @@ static int mpic_msi_alloc(struct irq_domain *domain, unsigned int virq,if (hwirq <0 )return -ENOSPC ; -for (int i =0 ; i < nr_irqs; i++) { +for (unsigned int i =0 ; i < nr_irqs; i++) { irq_domain_set_info(domain, virq + i, hwirq + i, &mpic_msi_bottom_irq_chip, domain->host_data, handle_simple_irq,
@@ -438,7 +438,7 @@ static struct irq_chip mpic_ipi_irqchip = {static int mpic_ipi_alloc (struct irq_domain *d,unsigned int virq,unsigned int nr_irqs,void *args) { -for (int i =0 ; i < nr_irqs; i++) { +for (unsigned int i =0 ; i < nr_irqs; i++) {irq_set_percpu_devid (virq + i); irq_domain_set_info(d, virq + i, i, &mpic_ipi_irqchip, d->host_data, handle_percpu_devid_irq,
@@ -461,7 +461,7 @@ static const struct irq_domain_ops mpic_ipi_domain_ops = {static void mpic_ipi_resume (void ) { -for (int i =0 ; i <IPI_DOORBELL_END ; i++) { +for (irq_hw_number_t i =0 ; i <IPI_DOORBELL_END ; i++) {unsigned int virq =irq_find_mapping (mpic_ipi_domain, i);struct irq_data *d;
@@ -511,7 +511,7 @@ static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,static void mpic_smp_cpu_init (void ) { -for (int i =0 ; i < mpic_domain->hwirq_max; i++) +for (irq_hw_number_t i =0 ; i < mpic_domain->hwirq_max; i++)writel (i, per_cpu_int_base +MPIC_INT_SET_MASK );if (!mpic_is_ipi_available ())
@@ -530,7 +530,7 @@ static void mpic_smp_cpu_init(void)static void mpic_reenable_percpu (void ) {/* Re-enable per-CPU interrupts that were enabled before suspend */ -for (unsigned int i =0 ; i <MPIC_MAX_PER_CPU_IRQS ; i++) { +for (irq_hw_number_t i =0 ; i <MPIC_MAX_PER_CPU_IRQS ; i++) {struct irq_data *data;unsigned int virq;
@@ -654,7 +654,8 @@ static inline void mpic_handle_ipi_irq(void) {}static void mpic_handle_cascade_irq (struct irq_desc *desc) {struct irq_chip *chip =irq_desc_get_chip (desc); -unsigned long irqmap, i, irqsrc, cpuid; +unsigned long irqmap, irqsrc, cpuid; +irq_hw_number_t i;chained_irq_enter (chip, desc);
@@ -683,7 +684,8 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) { -u32 irqstat, i; +irq_hw_number_t i; +u32 irqstat; do { irqstat = readl_relaxed(per_cpu_int_base + MPIC_CPU_INTACK);
@@ -799,7 +801,7 @@ static int __init mpic_of_init(struct device_node *node, nr_irqs =FIELD_GET (MPIC_INT_CONTROL_NUMINT_MASK ,readl (main_int_base +MPIC_INT_CONTROL )); -for (int i =0 ; i < nr_irqs; i++) +for (irq_hw_number_t i =0 ; i < nr_irqs; i++)writel (i, main_int_base +MPIC_INT_CLEAR_ENABLE ); mpic_domain =irq_domain_add_linear (node, nr_irqs, &mpic_irq_ops,NULL );
Signature · 1 line
2.44.2
PATCH v2 23/30 irqchip/armada-370-xp: Use consistent name for struct irq_data variables
In reply to Marek BehúnAlways use variable name "d" for struct irq_data *, for consistency.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +14 -14
@@ -243,17 +243,17 @@ static struct msi_domain_info mpic_msi_domain_info = { .chip = &mpic_msi_irq_chip, }; -static void mpic_compose_msi_msg (struct irq_data *data,struct msi_msg *msg) +static void mpic_compose_msi_msg (struct irq_data *d,struct msi_msg *msg) { -unsigned int cpu =cpumask_first (irq_data_get_effective_affinity_mask (data)); +unsigned int cpu =cpumask_first (irq_data_get_effective_affinity_mask (d)); msg->address_lo =lower_32_bits (msi_doorbell_addr); msg->address_hi =upper_32_bits (msi_doorbell_addr); - msg->data =BIT (cpu +8 ) | (data->hwirq +msi_doorbell_start ()); + msg->data =BIT (cpu +8 ) | (d->hwirq +msi_doorbell_start ()); } -static int mpic_msi_set_affinity (struct irq_data *irq_data, -const struct cpumask *mask,bool force) +static int mpic_msi_set_affinity (struct irq_data *d,const struct cpumask *mask, +bool force) {unsigned int cpu;
@@ -265,7 +265,7 @@ static int mpic_msi_set_affinity(struct irq_data *irq_data,if (cpu >= nr_cpu_ids)return -EINVAL ; -irq_data_update_effective_affinity (irq_data,cpumask_of (cpu)); +irq_data_update_effective_affinity (d,cpumask_of (cpu));return IRQ_SET_MASK_OK ; }
@@ -531,19 +531,19 @@ static void mpic_reenable_percpu(void) {/* Re-enable per-CPU interrupts that were enabled before suspend */ for (irq_hw_number_t i =0 ; i <MPIC_MAX_PER_CPU_IRQS ; i++) { -struct irq_data *data; +struct irq_data *d;unsigned int virq; virq =irq_linear_revmap (mpic_domain, i);if (!virq)continue ; - data =irq_get_irq_data (virq); + d =irq_get_irq_data (virq);if (!irq_percpu_is_enabled (virq))continue ; -mpic_irq_unmask (data); +mpic_irq_unmask (d); }if (mpic_is_ipi_available ())
@@ -722,20 +722,20 @@ static void mpic_resume(void)/* Re-enable interrupts */ for (irq_hw_number_t i =0 ; i < mpic_domain->hwirq_max; i++) { -struct irq_data *data; +struct irq_data *d;unsigned int virq; virq =irq_linear_revmap (mpic_domain, i);if (!virq)continue ; - data =irq_get_irq_data (virq); + d =irq_get_irq_data (virq);if (!mpic_is_percpu_irq (i)) {/* Non per-CPU interrupts */ writel (i, per_cpu_int_base +MPIC_INT_CLEAR_MASK ); -if (!irqd_irq_disabled (data)) -mpic_irq_unmask (data); +if (!irqd_irq_disabled (d)) +mpic_irq_unmask (d); }else {/* Per-CPU interrupts */ writel (i, main_int_base +MPIC_INT_SET_ENABLE );
@@ -745,7 +745,7 @@ static void mpic_resume(void)* will take care of secondary CPUs when they come up. */ if (irq_percpu_is_enabled (virq)) -mpic_irq_unmask (data); +mpic_irq_unmask (d); } }
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2.44.2
PATCH v2 24/30 irqchip/armada-370-xp: Simplify mpic_reenable_percpu() and mpic_resume()
In reply to Marek BehúnRefactor the mpic_reenable_percpu() and mpic_resume() functions to make them a little bit simpler.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +3 -9
@@ -531,18 +531,13 @@ static void mpic_reenable_percpu(void) {/* Re-enable per-CPU interrupts that were enabled before suspend */ for (irq_hw_number_t i =0 ; i <MPIC_MAX_PER_CPU_IRQS ; i++) { +unsigned int virq =irq_linear_revmap (mpic_domain, i);struct irq_data *d; -unsigned int virq; - virq =irq_linear_revmap (mpic_domain, i); -if (!virq) +if (!virq || !irq_percpu_is_enabled (virq))continue ; d =irq_get_irq_data (virq); - -if (!irq_percpu_is_enabled (virq)) -continue ; -mpic_irq_unmask (d); }
@@ -722,10 +717,9 @@ static void mpic_resume(void)/* Re-enable interrupts */ for (irq_hw_number_t i =0 ; i < mpic_domain->hwirq_max; i++) { +unsigned int virq =irq_linear_revmap (mpic_domain, i);struct irq_data *d; -unsigned int virq; - virq =irq_linear_revmap (mpic_domain, i);if (!virq)continue ;
Signature · 1 line
2.44.2
PATCH v2 25/30 irqchip/armada-370-xp: Drop unneeded curly brackets
In reply to Marek BehúnDrop unneeded curly brackets in mpic_msi_alloc().
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +1 -2
@@ -289,12 +289,11 @@ static int mpic_msi_alloc(struct irq_domain *domain, unsigned int virq,if (hwirq <0 )return -ENOSPC ; -for (unsigned int i =0 ; i < nr_irqs; i++) { +for (unsigned int i =0 ; i < nr_irqs; i++)irq_domain_set_info (domain, virq + i, hwirq + i, &mpic_msi_bottom_irq_chip, domain->host_data, handle_simple_irq,NULL ,NULL ); - }return 0 ; }
Signature · 1 line
2.44.2
PATCH v2 26/30 irqchip/armada-370-xp: Drop redundant continue
In reply to Marek BehúnDrop redundant continue from mpic_handle_irq().
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +1 -3
@@ -688,10 +688,8 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs)if (i >1022 )break ; -if (i >1 ) { +if (i >1 )generic_handle_domain_irq (mpic_domain, i); -continue ; - }/* MSI handling */ if (i ==1 )
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2.44.2
PATCH v2 27/30 irqchip/armada-370-xp: Rename variable for consistency
In reply to Marek BehúnRename the variable holding cause register to "cause" in mpic_handle_cascade_irq().
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +3 -3
@@ -648,15 +648,15 @@ static inline void mpic_handle_ipi_irq(void) {}static void mpic_handle_cascade_irq (struct irq_desc *desc) {struct irq_chip *chip =irq_desc_get_chip (desc); -unsigned long irqmap, irqsrc, cpuid; +unsigned long cause, irqsrc, cpuid;irq_hw_number_t i;chained_irq_enter (chip, desc); - irqmap =readl_relaxed (per_cpu_int_base +MPIC_PPI_CAUSE ); + cause =readl_relaxed (per_cpu_int_base +MPIC_PPI_CAUSE ); cpuid =cpu_logical_map (smp_processor_id ()); -for_each_set_bit (i, &irqmap,BITS_PER_LONG ) { +for_each_set_bit (i, &cause,BITS_PER_LONG ) { irqsrc =readl_relaxed (main_int_base +MPIC_INT_SOURCE_CTL (i));/* Check if the interrupt is not masked on current CPU.
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2.44.2
PATCH v2 28/30 irqchip/armada-370-xp: Use u32 type instead of unsigned long where possieble
In reply to Marek BehúnFor consistency across the driver, use the u32 type instead of unsigned long for holding register values and return value of cpu_logical_map().
One exception is when the variable is referenced for passing into for_each_set_bit(), in which case it has to be unsigned long.
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +4 -3
@@ -365,7 +365,7 @@ static inline int mpic_msi_init(struct device_node *node,static void mpic_perf_init (void ) { -unsigned long cpuid; +u32 cpuid;/* * This Performance Counter Overflow interrupt is specific for
@@ -404,8 +404,8 @@ static void mpic_ipi_unmask(struct irq_data *d)static void mpic_ipi_send_mask (struct irq_data *d,const struct cpumask *mask) { -unsigned long map =0 ;unsigned int cpu; +u32 map =0 ;/* Convert our logical CPU mask into a physical one. */ for_each_cpu (cpu, mask)
@@ -648,7 +648,8 @@ static inline void mpic_handle_ipi_irq(void) {}static void mpic_handle_cascade_irq (struct irq_desc *desc) {struct irq_chip *chip =irq_desc_get_chip (desc); -unsigned long cause, irqsrc, cpuid; +unsigned long cause; +u32 irqsrc, cpuid;irq_hw_number_t i;chained_irq_enter (chip, desc);
Signature · 1 line
2.44.2
PATCH v2 29/30 irqchip/armada-370-xp: Refactor initial memory regions mapping
In reply to Marek BehúnRefactor the initial memory regions mapping:
- put into its own function
- return error numbers on failure
- use WARN_ON() instead of BUG_ON()
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 62 ++++++++++++++++++++--------- 1 file changed, 44 insertions(+), 18 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +44 -18
@@ -12,6 +12,7 @@#include <linux/bitfield.h> #include <linux/bits.h> +#include <linux/err.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/init.h>
@@ -766,29 +767,54 @@ static struct syscore_ops mpic_syscore_ops = { .resume = mpic_resume, }; +static int mpic_map_region (struct device_node *np,int index, +void __iomem **base,phys_addr_t *phys_base) +{ +struct resource res; +int err; + + err =of_address_to_resource (np, index, &res); +if (WARN_ON (err)) + goto fail; + +if (WARN_ON (!request_mem_region (res.start,resource_size (&res), + np->full_name))) { + err = -EBUSY ; + goto fail; + } + + *base =ioremap (res.start,resource_size (&res)); +if (WARN_ON (!*base)) { + err = -ENOMEM ; + goto fail; + } + +if (phys_base) + *phys_base = res.start; + +return 0 ; + +fail: +pr_err ("%pOF: Unable to map resource %d: %pE\n" , np, index, +ERR_PTR (err)); + +return err; +} +static int __init mpic_of_init (struct device_node *node,struct device_node *parent) { -struct resource main_int_res, per_cpu_int_res; +phys_addr_t phys_base;unsigned int nr_irqs; +int err; -BUG_ON (of_address_to_resource (node,0 , &main_int_res)); -BUG_ON (of_address_to_resource (node,1 , &per_cpu_int_res)); - -BUG_ON (!request_mem_region (main_int_res.start, -resource_size (&main_int_res), - node->full_name)); -BUG_ON (!request_mem_region (per_cpu_int_res.start, -resource_size (&per_cpu_int_res), - node->full_name)); - - main_int_base =ioremap (main_int_res.start, -resource_size (&main_int_res)); -BUG_ON (!main_int_base); + err =mpic_map_region (node,0 , &main_int_base, &phys_base); +if (err) +return err; - per_cpu_int_base =ioremap (per_cpu_int_res.start, -resource_size (&per_cpu_int_res)); -BUG_ON (!per_cpu_int_base); + err =mpic_map_region (node,1 , &per_cpu_int_base,NULL ); +if (err) +return err; nr_irqs =FIELD_GET (MPIC_INT_CONTROL_NUMINT_MASK ,readl (main_int_base +MPIC_INT_CONTROL ));
@@ -810,7 +836,7 @@ static int __init mpic_of_init(struct device_node *node,mpic_perf_init ();mpic_smp_cpu_init (); -mpic_msi_init (node, main_int_res.start); +mpic_msi_init (node, phys_base);if (parent_irq <=0 ) {irq_set_default_host (mpic_domain);
Signature · 1 line
2.44.2
PATCH v2 30/30 irqchip/armada-370-xp: Print error and return error code on initialization failure
In reply to Marek BehúnPrint error and return error code on main / IPI / MSI domain initialization failure. Use WARN_ON() instead of BUG_ON().
Signed-off-by Marek Behún <[email protected]>
--- drivers/irqchip/irq-armada-370-xp.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-)
drivers/irqchip/irq-armada-370-xp.c +21 -6
@@ -473,7 +473,7 @@ static void mpic_ipi_resume(void) } } -static __init void mpic_ipi_init (struct device_node *node) +static __init int mpic_ipi_init (struct device_node *node) {int base_ipi;
@@ -481,15 +481,17 @@ static __init void mpic_ipi_init(struct device_node *node)IPI_DOORBELL_END , &mpic_ipi_domain_ops, NULL);if (WARN_ON (!mpic_ipi_domain)) -return ; +return -ENOMEM ;irq_domain_update_bus_token (mpic_ipi_domain,DOMAIN_BUS_IPI ); base_ipi =irq_domain_alloc_irqs (mpic_ipi_domain,IPI_DOORBELL_END ,NUMA_NO_NODE ,NULL );if (WARN_ON (!base_ipi)) -return ; +return -ENOMEM ;set_smp_ipi_range (base_ipi,IPI_DOORBELL_END ); + +return 0 ; } static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
@@ -823,7 +825,11 @@ static int __init mpic_of_init(struct device_node *node,writel (i, main_int_base +MPIC_INT_CLEAR_ENABLE ); mpic_domain =irq_domain_add_linear (node, nr_irqs, &mpic_irq_ops,NULL ); -BUG_ON (!mpic_domain); +if (!mpic_domain) { +pr_err ("%pOF: Unable to add IRQ domain\n" , node); +return -ENOMEM ; + } +irq_domain_update_bus_token (mpic_domain,DOMAIN_BUS_WIRED );/*
@@ -836,13 +842,22 @@ static int __init mpic_of_init(struct device_node *node,mpic_perf_init ();mpic_smp_cpu_init (); -mpic_msi_init (node, phys_base); + err =mpic_msi_init (node, phys_base); +if (err) { +pr_err ("%pOF: Unable to initialize MSI domain\n" , node); +return err; + }if (parent_irq <=0 ) {irq_set_default_host (mpic_domain);set_handle_irq (mpic_handle_irq);#ifdef CONFIG_SMP -mpic_ipi_init (node); + err =mpic_ipi_init (node); +if (err) { +pr_err ("%pOF: Unable to initialize IPI domain\n" , node); +return err; + } +cpuhp_setup_state_nocalls (CPUHP_AP_IRQ_ARMADA_XP_STARTING ,"irqchip/armada/ipi:starting" , mpic_starting_cpu,NULL );
Signature · 1 line
2.44.2