net: stmmac: qcom-ethqos: enable 2.5G ethernet on sa8775p-ride
Subsystems (5)
v3 cover net: stmmac: qcom-ethqos: enable 2.5G ethernet on sa8775p-ride
From: Bartosz Golaszewski <[email protected]>
Here are the changes required to enable 2.5G ethernet on sa8775p-ride. As advised by Andrew Lunn and Russell King, I am reusing the existing stmmac infrastructure to enable the SGMII loopback and so I dropped the patches adding new callbacks to the driver core. I also added more details to the commit message and made sure the workaround is only enabled on Rev 3 of the board (with AQR115C PHY). Also: dropped any mentions of the OCSGMII mode.
Changes since v2:
- only apply the SGMII loopback quirk on Rev 3 of the sa8775p-ride board
- extend the commit message in patch 2 to explain the situation in detail Link to v2: https://lore.kernel.org/netdev/[email protected]/
Changes since v1:
- split out the stmmac patches into their own series
- don't add new callbacks to the stmmac core, reuse existing
infrastructure instead
- don't try to add a new PHY mode (OCSGMII) but reuse 2500BASEX instead
Link to v1: https://lore.kernel.org/linux-arm-kernel/[email protected]/T/
Bartosz Golaszewski (2):
net: stmmac: qcom-ethqos: add support for 2.5G BASEX mode
net: stmmac: qcom-ethqos: enable SGMII loopback during DMA reset on
sa8775p-ride-r3
.../stmicro/stmmac/dwmac-qcom-ethqos.c | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+)
Signature · 1 line
2.43.0
PATCH v3 1/2 net: stmmac: qcom-ethqos: add support for 2.5G BASEX mode
From: Bartosz Golaszewski <[email protected]>
Add support for 2.5G speed in 2500BASEX mode to the QCom ethqos driver.
--- .../net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +11 -0
@@ -665,6 +665,14 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)return val; } +static void qcom_ethqos_speed_mode_2500 (struct net_device *ndev,void *data) +{ +struct stmmac_priv *priv =netdev_priv (ndev); + + priv->plat->max_speed =2500 ; + priv->plat->phy_interface =PHY_INTERFACE_MODE_2500BASEX ; +} +static int ethqos_configure (struct qcom_ethqos *ethqos) {return ethqos->configure_func (ethqos);
@@ -787,6 +795,9 @@ static int qcom_ethqos_probe(struct platform_device *pdev)case PHY_INTERFACE_MODE_RGMII_TXID : ethqos->configure_func = ethqos_configure_rgmii;break ; +case PHY_INTERFACE_MODE_2500BASEX : + plat_dat->speed_mode_2500 = qcom_ethqos_speed_mode_2500; + fallthrough;case PHY_INTERFACE_MODE_SGMII : ethqos->configure_func = ethqos_configure_sgmii;break ;
Signature · 1 line
2.43.0
Re: [PATCH net-next v3 1/2] net: stmmac: qcom-ethqos: add support for 2.5G BASEX mode
Quoted 5 lines · Bartosz Golaszewski
From: Bartosz Golaszewski <[email protected]>
Add support for 2.5G speed in 2500BASEX mode to the QCom ethqos driver.
Signed-off-by Bartosz Golaszewski <[email protected]>
Andrew
PATCH v3 2/2 net: stmmac: qcom-ethqos: enable SGMII loopback during DMA reset on sa8775p-ride-r3
In reply to Bartosz GolaszewskiFrom: Bartosz Golaszewski <[email protected]>
On sa8775p-ride-r3 the RX clocks from the AQR115C PHY are not available at the time of the DMA reset. We can however extract the RX clock from the internal SERDES block. Once the link is up, we can revert to the previous state.
The AQR115C PHY doesn't support in-band signalling so we can count on getting the link up notification and safely reuse existing callbacks which are already used by another HW quirk workaround which enables the functional clock to avoid a DMA reset due to timeout.
Only enable loopback on revision 3 of the board - check the phy_mode to make sure.
--- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+)
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +23 -0
@@ -21,6 +21,7 @@#define RGMII_IO_MACRO_CONFIG2 0x1C#define RGMII_IO_MACRO_DEBUG1 0x20#define EMAC_SYSTEM_LOW_POWER_DEBUG 0x28 +#define EMAC_WRAPPER_SGMII_PHY_CNTRL1 0xf4/* RGMII_IO_MACRO_CONFIG fields */ #define RGMII_CONFIG_FUNC_CLK_EN BIT(30)
@@ -79,6 +80,9 @@#define ETHQOS_MAC_CTRL_SPEED_MODE BIT(14)#define ETHQOS_MAC_CTRL_PORT_SEL BIT(15) +/* EMAC_WRAPPER_SGMII_PHY_CNTRL1 bits */ +#define SGMII_PHY_CNTRL1_SGMII_TX_TO_RX_LOOPBACK_EN BIT(3) +#define SGMII_10M_RX_CLK_DVDR 0x31struct ethqos_emac_por {
@@ -95,6 +99,7 @@ struct ethqos_emac_driver_data {bool has_integrated_pcs;u32 dma_addr_width;struct dwmac4_addrs dwmac4_addrs; +bool needs_sgmii_loopback; };struct qcom_ethqos {
@@ -114,6 +119,7 @@ struct qcom_ethqos {unsigned int num_por;bool rgmii_config_loopback_en;bool has_emac_ge_3; +bool needs_sgmii_loopback; };static int rgmii_readl (struct qcom_ethqos *ethqos,unsigned int offset)
@@ -191,8 +197,22 @@ ethqos_update_link_clk(struct qcom_ethqos *ethqos, unsigned int speed)clk_set_rate (ethqos->link_clk, ethqos->link_clk_rate); } +static void +qcom_ethqos_set_sgmii_loopback (struct qcom_ethqos *ethqos,bool enable) +{ +if (!ethqos->needs_sgmii_loopback || + ethqos->phy_mode !=PHY_INTERFACE_MODE_2500BASEX ) +return ; + +rgmii_updatel (ethqos, +SGMII_PHY_CNTRL1_SGMII_TX_TO_RX_LOOPBACK_EN , + enable ?SGMII_PHY_CNTRL1_SGMII_TX_TO_RX_LOOPBACK_EN :0 , +EMAC_WRAPPER_SGMII_PHY_CNTRL1 ); +} +static void ethqos_set_func_clk_en (struct qcom_ethqos *ethqos) { +qcom_ethqos_set_sgmii_loopback (ethqos, true);rgmii_updatel (ethqos,RGMII_CONFIG_FUNC_CLK_EN ,RGMII_CONFIG_FUNC_CLK_EN ,RGMII_IO_MACRO_CONFIG ); }
@@ -277,6 +297,7 @@ static const struct ethqos_emac_driver_data emac_v4_0_0_data = { .has_emac_ge_3 = true, .link_clk_name = "phyaux", .has_integrated_pcs = true, + .needs_sgmii_loopback = true, .dma_addr_width = 36, .dwmac4_addrs = { .dma_chan = 0x00008100,
@@ -682,6 +703,7 @@ static void ethqos_fix_mac_speed(void *priv, unsigned int speed, unsigned int mo {struct qcom_ethqos *ethqos = priv; +qcom_ethqos_set_sgmii_loopback (ethqos, false); ethqos->speed = speed;ethqos_update_link_clk (ethqos, speed);ethqos_configure (ethqos);
@@ -820,6 +842,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) ethqos->num_por = data->num_por; ethqos->rgmii_config_loopback_en = data->rgmii_config_loopback_en; ethqos->has_emac_ge_3 = data->has_emac_ge_3; + ethqos->needs_sgmii_loopback = data->needs_sgmii_loopback; ethqos->link_clk =devm_clk_get (dev, data->link_clk_name ?:"rgmii" );if (IS_ERR (ethqos->link_clk))
Signature · 1 line
2.43.0
Re: [PATCH net-next v3 2/2] net: stmmac: qcom-ethqos: enable SGMII loopback during DMA reset on sa8775p-ride-r3
Quoted 12 lines · Bartosz Golaszewski
From: Bartosz Golaszewski <[email protected]>
On sa8775p-ride-r3 the RX clocks from the AQR115C PHY are not available at the time of the DMA reset. We can however extract the RX clock from the internal SERDES block. Once the link is up, we can revert to the previous state.
The AQR115C PHY doesn't support in-band signalling so we can count on getting the link up notification and safely reuse existing callbacks which are already used by another HW quirk workaround which enables the functional clock to avoid a DMA reset due to timeout.
Quoted 4 lines
Only enable loopback on revision 3 of the board - check the
phy_modeto make sure.Signed-off-by Bartosz Golaszewski <[email protected]>
Andrew
This series was applied to netdev/net-next.git (main) by Jakub Kicinski <[email protected]>:
Hello:
This series was applied to netdev/net-next.git (main) by Jakub Kicinski <[email protected]>:
Quoted 11 lines · On Wed, 3 Jul 2024 20:14:57 +0200 you wrote:
From: Bartosz Golaszewski <[email protected]>
Here are the changes required to enable 2.5G ethernet on sa8775p-ride. As advised by Andrew Lunn and Russell King, I am reusing the existing stmmac infrastructure to enable the SGMII loopback and so I dropped the patches adding new callbacks to the driver core. I also added more details to the commit message and made sure the workaround is only enabled on Rev 3 of the board (with AQR115C PHY). Also: dropped any mentions of the OCSGMII mode.
[...]
Here is the summary with links:
- [net-next,v3,1/2] net: stmmac: qcom-ethqos: add support for 2.5G BASEX mode
https://git.kernel.org/netdev/net-next/c/61e9be0efbe8 - [net-next,v3,2/2] net: stmmac: qcom-ethqos: enable SGMII loopback during DMA reset on sa8775p-ride-r3 https://git.kernel.org/netdev/net-next/c/3c466d6537b9
You are awesome, thank you!
Signature · 2 lines
Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
Quoted 17 lines · On Tue, Jul 9, 2024 at 5:40 AM <[email protected]> wrote:
Hello:
This series was applied to netdev/net-next.git (main) by Jakub Kicinski <[email protected]>:
Quoted 10 lines · On Wed, 3 Jul 2024 20:14:57 +0200 you wrote:
From: Bartosz Golaszewski <[email protected]>
Here are the changes required to enable 2.5G ethernet on sa8775p-ride. As advised by Andrew Lunn and Russell King, I am reusing the existing stmmac infrastructure to enable the SGMII loopback and so I dropped the patches adding new callbacks to the driver core. I also added more details to the commit message and made sure the workaround is only enabled on Rev 3 of the board (with AQR115C PHY). Also: dropped any mentions of the OCSGMII mode.
Quoted 8 lines
Quoted 1 line
[...]
Here is the summary with links:
- [net-next,v3,1/2] net: stmmac: qcom-ethqos: add support for 2.5G BASEX modehttps://git.kernel.org/netdev/net-next/c/61e9be0efbe8 - [net-next,v3,2/2] net: stmmac: qcom-ethqos: enable SGMII loopback during DMA reset on sa8775p-ride-r3 https://git.kernel.org/netdev/net-next/c/3c466d6537b9
Hi Jakub,
Does picking these patches up now mean they will still make the v6.11 merge window? If so: could you also consider picking up the associated PHY changes[1] as - with the DT changes already in next - this is the last missing bit allowing enabling the 2.5G ethernet on the sa8775p-ride-r3 board?
Best Regards,
Bartosz