Add Clock and Reset for TCON LCD
Subsystems (4)
v2 cover Add Clock and Reset for TCON LCD
From: Chris Morgan <[email protected]>
Add the required resets and clocks used by the display engine TCON for LCD output. This is required for LCD output for the DE33 which is currently pending acceptance into mainline.
Note that while the clock is exposed on the T507, H616, and H700 the H616 does not expose the LCD controller that requires these clocks.
https://lore.kernel.org/linux-sunxi/[email protected]/
Changes since V1:
- Updated commit message to note that the H616 has this clock, but not the LCD controller that uses this clock.
Chris Morgan (2):
dt-bindings: clock: sun50i-h616-ccu: Add LCD TCON clk and reset
clk: sunxi-ng: h616: Add clock/reset for LCD TCON
drivers/clk/sunxi-ng/ccu-sun50i-h616.c | 24 +++++++++++++++++++++ drivers/clk/sunxi-ng/ccu-sun50i-h616.h | 2 +- include/dt-bindings/clock/sun50i-h616-ccu.h | 4 ++++ include/dt-bindings/reset/sun50i-h616-ccu.h | 2 ++ 4 files changed, 31 insertions(+), 1 deletion(-)
Signature · 1 line
2.43.0
PATCH v2 1/2 dt-bindings: clock: sun50i-h616-ccu: Add LCD TCON clk and reset
From: Chris Morgan <[email protected]>
Add the required clock and reset bindings for the LCD TCON.
--- include/dt-bindings/clock/sun50i-h616-ccu.h | 4 ++++ include/dt-bindings/reset/sun50i-h616-ccu.h | 2 ++ 2 files changed, 6 insertions(+)
include/dt-bindings/clock/sun50i-h616-ccu.h +4 -0
@@ -113,5 +113,9 @@#define CLK_BUS_HDCP 127#define CLK_PLL_SYSTEM_32K 128#define CLK_BUS_GPADC 129 +#define CLK_TCON_LCD0 130 +#define CLK_BUS_TCON_LCD0 131 +#define CLK_TCON_LCD1 132 +#define CLK_BUS_TCON_LCD1 133#endif /* _DT_BINDINGS_CLK_SUN50I_H616_H_ */
include/dt-bindings/reset/sun50i-h616-ccu.h +2 -0
@@ -67,5 +67,7 @@#define RST_BUS_HDCP 58#define RST_BUS_KEYADC 59#define RST_BUS_GPADC 60 +#define RST_BUS_TCON_LCD0 61 +#define RST_BUS_TCON_LCD1 62#endif /* _DT_BINDINGS_RESET_SUN50I_H616_H_ */
Signature · 1 line
2.43.0
PATCH v2 2/2 clk: sunxi-ng: h616: Add clock/reset for LCD TCON
In reply to Chris MorganFrom: Chris Morgan <[email protected]>
Add the required clock and reset which is used for the LCD TCON. Please note that these clocks are exposed on the T507, H616, and H700; however the H616 does not expose an LCD controller for which these clocks are needed.
--- drivers/clk/sunxi-ng/ccu-sun50i-h616.c | 24 ++++++++++++++++++++++++ drivers/clk/sunxi-ng/ccu-sun50i-h616.h | 2 +- 2 files changed, 25 insertions(+), 1 deletion(-)
drivers/clk/sunxi-ng/ccu-sun50i-h616.c +24 -0
@@ -645,6 +645,20 @@ static const char * const tcon_tv_parents[] = { "pll-video0","pll-video0-4x" ,"pll-video1" , "pll-video1-4x" }; +static SUNXI_CCU_MUX_WITH_GATE(tcon_lcd0_clk, "tcon-lcd0", + tcon_tv_parents,0xb60 , +24 ,3 ,/* mux */ +BIT (31 ),/* gate */ + CLK_SET_RATE_PARENT); +static SUNXI_CCU_MUX_WITH_GATE(tcon_lcd1_clk, "tcon-lcd1", + tcon_tv_parents,0xb64 , +24 ,3 ,/* mux */ +BIT (31 ),/* gate */ + CLK_SET_RATE_PARENT); +static SUNXI_CCU_GATE(bus_tcon_lcd0_clk, "bus-tcon-lcd0", "ahb3", + 0xb7c, BIT(0), 0); +static SUNXI_CCU_GATE(bus_tcon_lcd1_clk, "bus-tcon-lcd1", "ahb3", + 0xb7c, BIT(1), 0); static SUNXI_CCU_MP_WITH_MUX_GATE(tcon_tv0_clk, "tcon-tv0", tcon_tv_parents,0xb80 , 0, 4, /* M */
@@ -855,8 +869,12 @@ static struct ccu_common *sun50i_h616_ccu_clks[] = { &hdmi_cec_clk.common, &bus_hdmi_clk.common, &bus_tcon_top_clk.common, + &tcon_lcd0_clk.common, + &tcon_lcd1_clk.common, &tcon_tv0_clk.common, &tcon_tv1_clk.common, + &bus_tcon_lcd0_clk.common, + &bus_tcon_lcd1_clk.common, &bus_tcon_tv0_clk.common, &bus_tcon_tv1_clk.common, &tve0_clk.common,
@@ -989,8 +1007,12 @@ static struct clk_hw_onecell_data sun50i_h616_hw_clks = { [CLK_HDMI_CEC] = &hdmi_cec_clk.common.hw, [CLK_BUS_HDMI] = &bus_hdmi_clk.common.hw, [CLK_BUS_TCON_TOP] = &bus_tcon_top_clk.common.hw, + [CLK_TCON_LCD0] = &tcon_lcd0_clk.common.hw, + [CLK_TCON_LCD1] = &tcon_lcd1_clk.common.hw, [CLK_TCON_TV0] = &tcon_tv0_clk.common.hw, [CLK_TCON_TV1] = &tcon_tv1_clk.common.hw, + [CLK_BUS_TCON_LCD0] = &bus_tcon_lcd0_clk.common.hw, + [CLK_BUS_TCON_LCD1] = &bus_tcon_lcd1_clk.common.hw, [CLK_BUS_TCON_TV0] = &bus_tcon_tv0_clk.common.hw, [CLK_BUS_TCON_TV1] = &bus_tcon_tv1_clk.common.hw, [CLK_TVE0] = &tve0_clk.common.hw,
@@ -1062,6 +1084,8 @@ static const struct ccu_reset_map sun50i_h616_ccu_resets[] = { [RST_BUS_HDMI] = { 0xb1c, BIT(16) }, [RST_BUS_HDMI_SUB] = { 0xb1c, BIT(17) }, [RST_BUS_TCON_TOP] = { 0xb5c, BIT(16) }, + [RST_BUS_TCON_LCD0] = { 0xb7c, BIT(16) }, + [RST_BUS_TCON_LCD1] = { 0xb7c, BIT(17) }, [RST_BUS_TCON_TV0] = { 0xb9c, BIT(16) }, [RST_BUS_TCON_TV1] = { 0xb9c, BIT(17) }, [RST_BUS_TVE_TOP] = { 0xbbc, BIT(16) },
drivers/clk/sunxi-ng/ccu-sun50i-h616.h +1 -1
@@ -51,6 +51,6 @@#define CLK_BUS_DRAM 56 -#define CLK_NUMBER (CLK_BUS_GPADC + 1) +#define CLK_NUMBER (CLK_BUS_TCON_LCD1 + 1)#endif /* _CCU_SUN50I_H616_H_ */
Signature · 1 line
2.43.0
Re: [PATCH V2 2/2] clk: sunxi-ng: h616: Add clock/reset for LCD TCON
Quoted 9 lines · Chris Morgan
From: Chris Morgan <[email protected]>
Add the required clock and reset which is used for the LCD TCON. Please note that these clocks are exposed on the T507, H616, and H700; however the H616 does not expose an LCD controller for which these clocks are needed.
Signed-off-by Chris Morgan <[email protected]>Reviewed-by Andre Przywara <[email protected]>
Hi Chris,
Thanks for these! Can confirm that these two patches along with the recently posted DE33 [1] and H616 DT patch series [2] allow LCD display output on the RG35XX.
Regards,
Ryan
1. https://lore.kernel.org/linux-sunxi/[email protected]
2. https://lore.kernel.org/linux-sunxi/[email protected]
Re: [PATCH V2 2/2] clk: sunxi-ng: h616: Add clock/reset for LCD TCON
In reply to Chris MorganDne četrtek, 13. februar 2025 ob 18:22:48 Srednjeevropski standardni čas je Chris Morgan napisal(a):
Quoted 9 lines
From: Chris Morgan <[email protected]>
Add the required clock and reset which is used for the LCD TCON. Please note that these clocks are exposed on the T507, H616, and H700; however the H616 does not expose an LCD controller for which these clocks are needed.
Signed-off-by Chris Morgan <[email protected]>Reviewed-by Andre Przywara <[email protected]>
Actually, also LVDS reset is missing, but it can be introduced with follow up patch.
Best regards,
Jernej
Chen-Yu Tsai
AppliedRe: (subset) [PATCH V2 0/2] Add Clock and Reset for TCON LCD
In reply to Chris MorganQuoted 10 lines · Chris Morgan
From: Chris Morgan <[email protected]>
Add the required resets and clocks used by the display engine TCON for LCD output. This is required for LCD output for the DE33 which is currently pending acceptance into mainline.
Note that while the clock is exposed on the T507, H616, and H700 the H616 does not expose the LCD controller that requires these clocks.
[...]
Applied to clk-for-6.15 in [email protected]:linux-sunxi/linux-sunxi.git, thanks!
[2/2] clk: sunxi-ng: h616: Add clock/reset for LCD TCON
commit: 730feeaea72f1260548e57d35dd49603cd86a7e4
Best regards,
Signature · 1 line
Chen-Yu Tsai <[email protected]>