6.17.3-rc1 review
Subsystems (8)
Greg Kroah-Hartman
maintainerPATCH 123/563 block: skip unnecessary checks for split bio
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit 0b64682e78f7a53ea863e368b1aa66f05767858d ]
Lots of checks are already done while submitting this bio the first time, and there is no need to check them again when this bio is resubmitted after split.
Hence open code should_fail_bio() and blk_throtl_bio() that are still necessary from submit_bio_split_bioset().
Stable-dep-of: b2f5974079d8 ("block: fix ordering of recursive split IO")
--- block/blk-core.c | 2 +- block/blk-merge.c | 6 +++++- block/blk.h | 1 + 3 files changed, 7 insertions(+), 2 deletions(-)
block/blk-core.c +1 -1
@@ -539,7 +539,7 @@ static inline void bio_check_ro(struct bio *bio) } } -static noinline int should_fail_bio(struct bio *bio) +int should_fail_bio (struct bio *bio) {if (should_fail_request (bdev_whole (bio->bi_bdev), bio->bi_iter.bi_size))return -EIO ;
block/blk-merge.c +5 -1
@@ -130,7 +130,11 @@ struct bio *bio_submit_split_bioset(struct bio *bio, unsigned int split_sectors,bio_chain (split, bio);trace_block_split (split, bio->bi_iter.bi_sector);WARN_ON_ONCE (bio_zone_write_plugging (bio)); -submit_bio_noacct (bio); + +if (should_fail_bio (bio)) +bio_io_error (bio); +else if (!blk_throtl_bio (bio)) +submit_bio_noacct_nocheck (bio);return split; }
block/blk.h +1 -0
@@ -615,6 +615,7 @@ extern const struct address_space_operations def_blk_aops;int disk_register_independent_access_ranges (struct gendisk *disk);void disk_unregister_independent_access_ranges (struct gendisk *disk); +int should_fail_bio (struct bio *bio);#ifdef CONFIG_FAIL_MAKE_REQUEST bool should_fail_request (struct block_device *part,unsigned int bytes);#else /* CONFIG_FAIL_MAKE_REQUEST */
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 124/563 block: fix ordering of recursive split IO
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit b2f5974079d82a4761f002e80601064d4e39a81f ]
Currently, split bio will be chained to original bio, and original bio will be resubmitted to the tail of current->bio_list, waiting for split bio to be issued. However, if split bio get split again, the IO order will be messed up. This problem, on the one hand, will cause performance degradation, especially for mdraid with large IO size; on the other hand, will cause write errors for zoned block devices[1].
For example, in raid456 IO will first be split by max_sector from md_submit_bio(), and then later be split again by chunksize for internal handling:
For example, assume max_sectors is 1M, and chunksize is 512k
1) issue a 2M IO:
bio issuing: 0+2Mcurrent->bio_list: NULL
2) md_submit_bio() split by max_sector:
bio issuing: 0+1Mcurrent->bio_list: 1M+1M
3) chunk_aligned_read() split by chunksize:
bio issuing: 0+512kcurrent->bio_list: 1M+1M -> 512k+512k
4) after first bio issued, __submit_bio_noacct() will contuine issuing next bio:
bio issuing: 1M+1Mcurrent->bio_list: 512k+512k
bio issued: 0+512k
5) chunk_aligned_read() split by chunksize:
bio issuing: 1M+512kcurrent->bio_list: 512k+512k -> 1536k+512k
bio issued: 0+512k
6) no split afterwards, finally the issue order is:
0+512k -> 1M+512k -> 512k+512k -> 1536k+512k
This behaviour will cause large IO read on raid456 endup to be small discontinuous IO in underlying disks. Fix this problem by placing split bio to the head of current->bio_list.
Test script: test on 8 disk raid5 with 64k chunksize dd if=/dev/md0 of=/dev/null bs=4480k iflag=direct
Test results:
Before this patch
1) iostat results:
Device r/s rMB/s rrqm/s %rrqm r_await rareq-sz aqu-sz %util
md0 52430.00 3276.87 0.00 0.00 0.62 64.00 32.60 80.10 sd* 4487.00 409.00 2054.00 31.40 0.82 93.34 3.68 71.20 2) blktrace G stage: 8,0 0 486445 11.357392936 843 G R 14071424 + 128 [dd] 8,0 0 486451 11.357466360 843 G R 14071168 + 128 [dd] 8,0 0 486454 11.357515868 843 G R 14071296 + 128 [dd] 8,0 0 486468 11.357968099 843 G R 14072192 + 128 [dd] 8,0 0 486474 11.358031320 843 G R 14071936 + 128 [dd] 8,0 0 486480 11.358096298 843 G R 14071552 + 128 [dd] 8,0 0 486490 11.358303858 843 G R 14071808 + 128 [dd]
3) io seek for sdx:
Noted io seek is the result from blktrace D stage, statistic of:
ABS((offset of next IO) - (offset + len of previous IO))
Read|Write seek
cnt 55175, zero cnt 25079
Quoted 1 line
=(KB) .. <(KB) : count ratio |distribution |
0 .. 1 : 25079 45.5% |########################################|
1 .. 2 : 0 0.0% | |
2 .. 4 : 0 0.0% | |
4 .. 8 : 0 0.0% | |
8 .. 16 : 0 0.0% | |
16 .. 32 : 0 0.0% | |
32 .. 64 : 12540 22.7% |##################### |
64 .. 128 : 2508 4.5% |##### |
128 .. 256 : 0 0.0% | |
256 .. 512 : 10032 18.2% |################# |
512 .. 1024 : 5016 9.1% |######### |After this patch:
1) iostat results:
Device r/s rMB/s rrqm/s %rrqm r_await rareq-sz aqu-sz %util
md0 87965.00 5271.88 0.00 0.00 0.16 61.37 14.03 90.60 sd* 6020.00 658.44 5117.00 45.95 0.44 112.00 2.68 86.50 2) blktrace G stage: 8,0 0 206296 5.354894072 664 G R 7156992 + 128 [dd] 8,0 0 206305 5.355018179 664 G R 7157248 + 128 [dd] 8,0 0 206316 5.355204438 664 G R 7157504 + 128 [dd] 8,0 0 206319 5.355241048 664 G R 7157760 + 128 [dd] 8,0 0 206333 5.355500923 664 G R 7158016 + 128 [dd] 8,0 0 206344 5.355837806 664 G R 7158272 + 128 [dd] 8,0 0 206353 5.355960395 664 G R 7158528 + 128 [dd] 8,0 0 206357 5.356020772 664 G R 7158784 + 128 [dd]
3) io seek for sdx
Read|Write seek
cnt 28644, zero cnt 21483
Quoted 1 line
=(KB) .. <(KB) : count ratio |distribution |
0 .. 1 : 21483 75.0% |########################################|
1 .. 2 : 0 0.0% | |
2 .. 4 : 0 0.0% | |
4 .. 8 : 0 0.0% | |
8 .. 16 : 0 0.0% | |
16 .. 32 : 0 0.0% | |
32 .. 64 : 7161 25.0% |############## |BTW, this looks like a long term problem from day one, and large sequential IO read is pretty common case like video playing.
And even with this patch, in this test case IO is merged to at most 128k is due to block layer plug limit BLK_PLUG_FLUSH_SIZE, increase such limit can get even better performance. However, we'll figure out how to do this properly later.
[1] https://lore.kernel.org/all/[email protected]/
--- block/blk-core.c | 16 ++++++++++------ block/blk-merge.c | 2 +- block/blk-throttle.c | 2 +- block/blk.h | 2 +- 4 files changed, 13 insertions(+), 9 deletions(-)
block/blk-core.c +10 -6
@@ -727,7 +727,7 @@ static void __submit_bio_noacct_mq(struct bio *bio) current->bio_list =NULL ; } -void submit_bio_noacct_nocheck (struct bio *bio) +void submit_bio_noacct_nocheck (struct bio *bio,bool split) {blk_cgroup_bio_start (bio);
@@ -746,12 +746,16 @@ void submit_bio_noacct_nocheck(struct bio *bio)* to collect a list of requests submited by a ->submit_bio method while * it is active, and then process them after it returned. */ -if (current->bio_list) -bio_list_add (¤t->bio_list[0 ], bio); -else if (!bdev_test_flag (bio->bi_bdev,BD_HAS_SUBMIT_BIO )) +if (current->bio_list) { +if (split) +bio_list_add_head (¤t->bio_list[0 ], bio); +else +bio_list_add (¤t->bio_list[0 ], bio); + }else if (!bdev_test_flag (bio->bi_bdev,BD_HAS_SUBMIT_BIO )) {__submit_bio_noacct_mq (bio); -else + }else {__submit_bio_noacct (bio); + } } static blk_status_t blk_validate_atomic_write_op_size(struct request_queue *q,
@@ -872,7 +876,7 @@ void submit_bio_noacct(struct bio *bio)if (blk_throtl_bio (bio))return ; -submit_bio_noacct_nocheck (bio); +submit_bio_noacct_nocheck (bio, false);return ; not_supported:
block/blk-merge.c +1 -1
@@ -134,7 +134,7 @@ struct bio *bio_submit_split_bioset(struct bio *bio, unsigned int split_sectors,if (should_fail_bio (bio))bio_io_error (bio);else if (!blk_throtl_bio (bio)) -submit_bio_noacct_nocheck (bio); +submit_bio_noacct_nocheck (bio, true);return split; }
block/blk-throttle.c +1 -1
@@ -1224,7 +1224,7 @@ static void blk_throtl_dispatch_work_fn(struct work_struct *work)if (!bio_list_empty (&bio_list_on_stack)) {blk_start_plug (&plug);while ((bio =bio_list_pop (&bio_list_on_stack))) -submit_bio_noacct_nocheck (bio); +submit_bio_noacct_nocheck (bio, false);blk_finish_plug (&plug); } }
block/blk.h +1 -1
@@ -54,7 +54,7 @@ bool blk_queue_start_drain(struct request_queue *q);bool __blk_freeze_queue_start (struct request_queue *q,struct task_struct *owner);int __bio_queue_enter (struct request_queue *q,struct bio *bio); -void submit_bio_noacct_nocheck (struct bio *bio); +void submit_bio_noacct_nocheck (struct bio *bio,bool split);void bio_await_chain (struct bio *bio);static inline bool blk_try_enter_queue (struct request_queue *q,bool pm)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 125/563 blk-mq: remove useless checkings in blk_mq_update_nr_requests()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit 8bd7195fea6d9662aa3b32498a3828bfd9b63185 ]
1) queue_requests_store() is the only caller of blk_mq_update_nr_requests(), where queue is already freezed, no need to check mq_freeze_depth;
2) q->tag_set must be set for request based device, and queue_is_mq() is already checked in blk_mq_queue_attr_visible(), no need to check q->tag_set.
Stable-dep-of: b86433721f46 ("blk-mq: fix potential deadlock while nr_requests grown")
--- block/blk-mq.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-)
block/blk-mq.c +1 -8
@@ -4929,21 +4929,14 @@ int blk_mq_update_nr_requests(struct request_queue *q, unsigned int nr) {struct blk_mq_tag_set *set = q->tag_set;struct blk_mq_hw_ctx *hctx; -int ret; +int ret =0 ;unsigned long i; -if (WARN_ON_ONCE (!q->mq_freeze_depth)) -return -EINVAL ; - -if (!set) -return -EINVAL ; -if (q->nr_requests == nr)return 0 ;blk_mq_quiesce_queue (q); - ret =0 ;queue_for_each_hw_ctx (q, hctx, i) {if (!hctx->tags)continue ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 126/563 blk-mq: check invalid nr_requests in queue_requests_store()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit b46d4c447db76e36906ed59ebb9b3ef8f3383322 ]
queue_requests_store() is the only caller of blk_mq_update_nr_requests(), and blk_mq_update_nr_requests() is the only caller of blk_mq_tag_update_depth(), however, they all have checkings for nr_requests input by user.
Make code cleaner by moving all the checkings to the top function:
1) nr_requests > reserved tags;
2) if there is elevator, 4 <= nr_requests <= 2048;
3) if elevator is none, 4 <= nr_requests <= tag_set->queue_depth;
Meanwhile, case 2 is the only case tags can grow and -ENOMEM might be returned.
Stable-dep-of: b86433721f46 ("blk-mq: fix potential deadlock while nr_requests grown")
--- block/blk-mq-tag.c | 16 +--------------- block/blk-mq.c | 8 ++------ block/blk-mq.h | 2 +- block/blk-sysfs.c | 13 +++++++++++++ 4 files changed, 17 insertions(+), 22 deletions(-)
block/blk-mq-tag.c +1 -15
@@ -584,14 +584,10 @@ void blk_mq_free_tags(struct blk_mq_tags *tags) }int blk_mq_tag_update_depth (struct blk_mq_hw_ctx *hctx, -struct blk_mq_tags **tagsptr,unsigned int tdepth, -bool can_grow) +struct blk_mq_tags **tagsptr,unsigned int tdepth) {struct blk_mq_tags *tags = *tagsptr; -if (tdepth <= tags->nr_reserved_tags) -return -EINVAL ; -/* * If we are allowed to grow beyond the original size, allocate * a new set of tags before freeing the old one.
@@ -600,16 +596,6 @@ int blk_mq_tag_update_depth(struct blk_mq_hw_ctx *hctx,struct blk_mq_tag_set *set = hctx->queue->tag_set;struct blk_mq_tags *new; -if (!can_grow) -return -EINVAL ; - -/* -* We need some sort of upper limit, set it high enough that -* no valid use cases should require more. -*/ -if (tdepth >MAX_SCHED_RQ ) -return -EINVAL ; -/* * Only the sbitmap needs resizing since we allocated the max * initially.
block/blk-mq.c +2 -6
@@ -4932,9 +4932,6 @@ int blk_mq_update_nr_requests(struct request_queue *q, unsigned int nr)int ret =0 ;unsigned long i; -if (q->nr_requests == nr) -return 0 ; -blk_mq_quiesce_queue (q);queue_for_each_hw_ctx (q, hctx, i) {
@@ -4946,10 +4943,9 @@ int blk_mq_update_nr_requests(struct request_queue *q, unsigned int nr)*/ if (hctx->sched_tags) { ret =blk_mq_tag_update_depth (hctx, &hctx->sched_tags, - nr, true); + nr); }else { - ret =blk_mq_tag_update_depth (hctx, &hctx->tags, nr, - false); + ret =blk_mq_tag_update_depth (hctx, &hctx->tags, nr); }if (ret) goto out;
block/blk-mq.h +1 -1
@@ -171,7 +171,7 @@ void blk_mq_put_tag(struct blk_mq_tags *tags, struct blk_mq_ctx *ctx, unsigned int tag);void blk_mq_put_tags (struct blk_mq_tags *tags,int *tag_array,int nr_tags);int blk_mq_tag_update_depth (struct blk_mq_hw_ctx *hctx, -struct blk_mq_tags **tags,unsigned int depth,bool can_grow); +struct blk_mq_tags **tags,unsigned int depth);void blk_mq_tag_resize_shared_tags (struct blk_mq_tag_set *set,unsigned int size);void blk_mq_tag_update_sched_shared_tags (struct request_queue *q);
block/blk-sysfs.c +13 -0
@@ -78,12 +78,25 @@ queue_requests_store(struct gendisk *disk, const char *page, size_t count) memflags =blk_mq_freeze_queue (q);mutex_lock (&q->elevator_lock); + +if (nr == q->nr_requests) + goto unlock; +if (nr <BLKDEV_MIN_RQ ) nr =BLKDEV_MIN_RQ ; +if (nr <= q->tag_set->reserved_tags || + (q->elevator && nr >MAX_SCHED_RQ ) || + (!q->elevator && nr > q->tag_set->queue_depth)) { + ret = -EINVAL ; + goto unlock; + } + err =blk_mq_update_nr_requests (disk->queue, nr);if (err) ret = err; + +unlock:mutex_unlock (&q->elevator_lock);blk_mq_unfreeze_queue (q, memflags);return ret;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 127/563 blk-mq: convert to serialize updating nr_requests with update_nr_hwq_lock
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit 626ff4f8ebcb7207f01e7810acb85812ccf06bd8 ]
request_queue->nr_requests can be changed by:
a) switch elevator by updating nr_hw_queues
b) switch elevator by elevator sysfs attribute
c) configue queue sysfs attribute nr_requests
Current lock order is:
1) update_nr_hwq_lock, case a,b
2) freeze_queue
3) elevator_lock, case a,b,c
And update nr_requests is seriablized by elevator_lock() already, however, in the case c, we'll have to allocate new sched_tags if nr_requests grow, and do this with elevator_lock held and queue freezed has the risk of deadlock.
Hence use update_nr_hwq_lock instead, make it possible to allocate memory if tags grow, meanwhile also prevent nr_requests to be changed concurrently.
Stable-dep-of: b86433721f46 ("blk-mq: fix potential deadlock while nr_requests grown")
--- block/blk-sysfs.c | 25 ++++++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-)
block/blk-sysfs.c +20 -5
@@ -68,6 +68,7 @@ queue_requests_store(struct gendisk *disk, const char *page, size_t count)int ret, err;unsigned int memflags;struct request_queue *q = disk->queue; +struct blk_mq_tag_set *set = q->tag_set;if (!queue_is_mq (q))return -EINVAL ;
@@ -76,8 +77,11 @@ queue_requests_store(struct gendisk *disk, const char *page, size_t count)if (ret <0 )return ret; - memflags =blk_mq_freeze_queue (q); -mutex_lock (&q->elevator_lock); +/* +* Serialize updating nr_requests with concurrent queue_requests_store() +* and switching elevator. +*/ +down_write (&set->update_nr_hwq_lock);if (nr == q->nr_requests) goto unlock;
@@ -85,20 +89,31 @@ queue_requests_store(struct gendisk *disk, const char *page, size_t count)if (nr <BLKDEV_MIN_RQ ) nr =BLKDEV_MIN_RQ ; -if (nr <= q->tag_set->reserved_tags || +/* +* Switching elevator is protected by update_nr_hwq_lock: +* - read lock is held from elevator sysfs attribute; +* - write lock is held from updating nr_hw_queues; +* Hence it's safe to access q->elevator here with write lock held. +*/ +if (nr <= set->reserved_tags || (q->elevator && nr >MAX_SCHED_RQ ) || - (!q->elevator && nr > q->tag_set->queue_depth)) { + (!q->elevator && nr > set->queue_depth)) { ret = -EINVAL ; goto unlock; } + memflags =blk_mq_freeze_queue (q); +mutex_lock (&q->elevator_lock); + err =blk_mq_update_nr_requests (disk->queue, nr);if (err) ret = err; -unlock:mutex_unlock (&q->elevator_lock);blk_mq_unfreeze_queue (q, memflags); + +unlock: +up_write (&set->update_nr_hwq_lock);return ret; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 128/563 blk-mq: cleanup shared tags case in blk_mq_update_nr_requests()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit 7f2799c546dba9e12f9ff4d07936601e416c640d ]
For shared tags case, all hctx->sched_tags/tags are the same, it doesn't make sense to call into blk_mq_tag_update_depth() multiple times for the same tags.
Stable-dep-of: b86433721f46 ("blk-mq: fix potential deadlock while nr_requests grown")
--- block/blk-mq-tag.c | 7 ------- block/blk-mq.c | 43 ++++++++++++++++++++++--------------------- 2 files changed, 22 insertions(+), 28 deletions(-)
block/blk-mq-tag.c +0 -7
@@ -596,13 +596,6 @@ int blk_mq_tag_update_depth(struct blk_mq_hw_ctx *hctx,struct blk_mq_tag_set *set = hctx->queue->tag_set;struct blk_mq_tags *new; -/* -* Only the sbitmap needs resizing since we allocated the max -* initially. -*/ -if (blk_mq_is_shared_tags (set->flags)) -return 0 ; - new =blk_mq_alloc_map_and_rqs (set, hctx->queue_num, tdepth);if (!new)return -ENOMEM ;
block/blk-mq.c +22 -21
56 lines not on this page · raw message
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 129/563 blk-mq: split bitmap grow and resize case in blk_mq_update_nr_requests()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit e63200404477456ec60c62dd8b3b1092aba2e211 ]
No functional changes are intended, make code cleaner and prepare to fix the grow case in following patches.
Stable-dep-of: b86433721f46 ("blk-mq: fix potential deadlock while nr_requests grown")
--- block/blk-mq.c | 39 +++++++++++++++++++++++++++------------ 1 file changed, 27 insertions(+), 12 deletions(-)
block/blk-mq.c +27 -12
@@ -4935,25 +4935,40 @@ int blk_mq_update_nr_requests(struct request_queue *q, unsigned int nr)blk_mq_quiesce_queue (q);if (blk_mq_is_shared_tags (set->flags)) { +/* +* Shared tags, for sched tags, we allocate max initially hence +* tags can't grow, see blk_mq_alloc_sched_tags(). +*/ if (q->elevator)blk_mq_tag_update_sched_shared_tags (q);else blk_mq_tag_resize_shared_tags (set, nr); - }else { + }else if (!q->elevator) { +/* +* Non-shared hardware tags, nr is already checked from +* queue_requests_store() and tags can't grow. +*/ queue_for_each_hw_ctx (q, hctx, i) {if (!hctx->tags)continue ; -/* -* If we're using an MQ scheduler, just update the -* scheduler queue depth. This is similar to what the -* old code would do. -*/ -if (hctx->sched_tags) - ret =blk_mq_tag_update_depth (hctx, - &hctx->sched_tags, nr); -else - ret =blk_mq_tag_update_depth (hctx, - &hctx->tags, nr); +sbitmap_queue_resize (&hctx->tags->bitmap_tags, + nr - hctx->tags->nr_reserved_tags); + } + }else if (nr <= q->elevator->et->nr_requests) { +/* Non-shared sched tags, and tags don't grow. */ +queue_for_each_hw_ctx (q, hctx, i) { +if (!hctx->sched_tags) +continue ; +sbitmap_queue_resize (&hctx->sched_tags->bitmap_tags, + nr - hctx->sched_tags->nr_reserved_tags); + } + }else { +/* Non-shared sched tags, and tags grow */ +queue_for_each_hw_ctx (q, hctx, i) { +if (!hctx->sched_tags) +continue ; + ret =blk_mq_tag_update_depth (hctx, &hctx->sched_tags, + nr);if (ret) goto out; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 130/563 blk-mq-sched: add new parameter nr_requests in blk_mq_alloc_sched_tags()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit 6293e336f6d7d3f3415346ce34993b3398846166 ]
This helper only support to allocate the default number of requests, add a new parameter to support specific number of requests.
Prepare to fix potential deadlock in the case nr_requests grow.
Stable-dep-of: b86433721f46 ("blk-mq: fix potential deadlock while nr_requests grown")
--- block/blk-mq-sched.c | 14 +++++--------- block/blk-mq-sched.h | 2 +- block/blk-mq.h | 11 +++++++++++ block/elevator.c | 3 ++- 4 files changed, 19 insertions(+), 11 deletions(-)
block/blk-mq-sched.c +5 -9
@@ -454,7 +454,7 @@ void blk_mq_free_sched_tags_batch(struct xarray *et_table, }struct elevator_tags *blk_mq_alloc_sched_tags (struct blk_mq_tag_set *set, -unsigned int nr_hw_queues) +unsigned int nr_hw_queues,unsigned int nr_requests) {unsigned int nr_tags;int i;
@@ -470,13 +470,8 @@ struct elevator_tags *blk_mq_alloc_sched_tags(struct blk_mq_tag_set *set, nr_tags * sizeof(struct blk_mq_tags *), gfp);if (!et)return NULL ; -/* -* Default to double of smaller one between hw queue_depth and -* 128, since we don't split into sync/async like the old code -* did. Additionally, this is a per-hw queue depth. -*/ - et->nr_requests = 2 * min_t(unsigned int, set->queue_depth, -BLKDEV_DEFAULT_RQ ); + + et->nr_requests = nr_requests; et->nr_hw_queues = nr_hw_queues;if (blk_mq_is_shared_tags (set->flags)) {
@@ -521,7 +516,8 @@ int blk_mq_alloc_sched_tags_batch(struct xarray *et_table,* concurrently. */ if (q->elevator) { - et =blk_mq_alloc_sched_tags (set, nr_hw_queues); + et =blk_mq_alloc_sched_tags (set, nr_hw_queues, +blk_mq_default_nr_requests (set));if (!et) goto out_unwind;if (xa_insert (et_table, q->id, et, gfp))
block/blk-mq-sched.h +1 -1
@@ -24,7 +24,7 @@ void blk_mq_exit_sched(struct request_queue *q, struct elevator_queue *e);void blk_mq_sched_free_rqs (struct request_queue *q);struct elevator_tags *blk_mq_alloc_sched_tags (struct blk_mq_tag_set *set, -unsigned int nr_hw_queues); +unsigned int nr_hw_queues,unsigned int nr_requests);int blk_mq_alloc_sched_tags_batch (struct xarray *et_table,struct blk_mq_tag_set *set,unsigned int nr_hw_queues); void blk_mq_free_sched_tags(struct elevator_tags *et,
block/blk-mq.h +11 -0
@@ -109,6 +109,17 @@ static inline struct blk_mq_hw_ctx *blk_mq_map_queue(blk_opf_t opf,return ctx->hctxs[blk_mq_get_hctx_type (opf)]; } +/* +* Default to double of smaller one between hw queue_depth and +* 128, since we don't split into sync/async like the old code +* did. Additionally, this is a per-hw queue depth. +*/ +static inline unsigned int blk_mq_default_nr_requests ( +struct blk_mq_tag_set *set) +{ + return 2 * min_t(unsigned int, set->queue_depth, BLKDEV_DEFAULT_RQ); +} +/* * sysfs helpers */
block/elevator.c +2 -1
@@ -669,7 +669,8 @@ static int elevator_change(struct request_queue *q, struct elv_change_ctx *ctx)lockdep_assert_held (&set->update_nr_hwq_lock);if (strncmp (ctx->name,"none" ,4 )) { - ctx->et =blk_mq_alloc_sched_tags (set, set->nr_hw_queues); + ctx->et =blk_mq_alloc_sched_tags (set, set->nr_hw_queues, +blk_mq_default_nr_requests (set));if (!ctx->et)return -ENOMEM ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 131/563 blk-mq: fix potential deadlock while nr_requests grown
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit b86433721f46d934940528f28d49c1dedb690df1 ]
Allocate and free sched_tags while queue is freezed can deadlock[1], this is a long term problem, hence allocate memory before freezing queue and free memory after queue is unfreezed.
[1] https://lore.kernel.org/all/[email protected]/
--- block/blk-mq.c | 22 +++++++++------------- block/blk-mq.h | 5 ++++- block/blk-sysfs.c | 29 +++++++++++++++++++++-------- 3 files changed, 34 insertions(+), 22 deletions(-)
block/blk-mq.c +9 -13
@@ -4925,11 +4925,13 @@ void blk_mq_free_tag_set(struct blk_mq_tag_set *set) }EXPORT_SYMBOL (blk_mq_free_tag_set); -int blk_mq_update_nr_requests (struct request_queue *q,unsigned int nr) +struct elevator_tags *blk_mq_update_nr_requests (struct request_queue *q, +struct elevator_tags *et, +unsigned int nr) {struct blk_mq_tag_set *set = q->tag_set; +struct elevator_tags *old_et =NULL ;struct blk_mq_hw_ctx *hctx; -int ret =0 ;unsigned long i;blk_mq_quiesce_queue (q);
@@ -4964,24 +4966,18 @@ int blk_mq_update_nr_requests(struct request_queue *q, unsigned int nr) } }else {/* Non-shared sched tags, and tags grow */ -queue_for_each_hw_ctx (q, hctx, i) { -if (!hctx->sched_tags) -continue ; - ret =blk_mq_tag_update_depth (hctx, &hctx->sched_tags, - nr); -if (ret) - goto out; - } +queue_for_each_hw_ctx (q, hctx, i) + hctx->sched_tags = et->tags[i]; + old_et = q->elevator->et; + q->elevator->et = et; } q->nr_requests = nr;if (q->elevator && q->elevator->type->ops.depth_updated) q->elevator->type->ops.depth_updated (q); -out:blk_mq_unquiesce_queue (q); - -return ret; +return old_et; }/*
block/blk-mq.h +4 -1
@@ -6,6 +6,7 @@#include "blk-stat.h" struct blk_mq_tag_set ; +struct elevator_tags ;struct blk_mq_ctxs {struct kobject kobj;
@@ -45,7 +46,9 @@ void blk_mq_submit_bio(struct bio *bio);int blk_mq_poll (struct request_queue *q,blk_qc_t cookie,struct io_comp_batch *iob,unsigned int flags);void blk_mq_exit_queue (struct request_queue *q); -int blk_mq_update_nr_requests (struct request_queue *q,unsigned int nr); +struct elevator_tags *blk_mq_update_nr_requests (struct request_queue *q, +struct elevator_tags *tags, +unsigned int nr);void blk_mq_wake_waiters (struct request_queue *q);bool blk_mq_dispatch_rq_list (struct blk_mq_hw_ctx *hctx,struct list_head *,bool );
block/blk-sysfs.c +21 -8
@@ -64,11 +64,12 @@ static ssize_t queue_requests_show(struct gendisk *disk, char *page)static ssize_t queue_requests_store (struct gendisk *disk,const char *page,size_t count) { -unsigned long nr; -int ret, err; -unsigned int memflags;struct request_queue *q = disk->queue;struct blk_mq_tag_set *set = q->tag_set; +struct elevator_tags *et =NULL ; +unsigned int memflags; +unsigned long nr; +int ret;if (!queue_is_mq (q))return -EINVAL ;
@@ -102,16 +103,28 @@ queue_requests_store(struct gendisk *disk, const char *page, size_t count) goto unlock; } +if (!blk_mq_is_shared_tags (set->flags) && q->elevator && + nr > q->elevator->et->nr_requests) { +/* +* Tags will grow, allocate memory before freezing queue to +* prevent deadlock. +*/ + et =blk_mq_alloc_sched_tags (set, q->nr_hw_queues, nr); +if (!et) { + ret = -ENOMEM ; + goto unlock; + } + } + memflags =blk_mq_freeze_queue (q);mutex_lock (&q->elevator_lock); - - err =blk_mq_update_nr_requests (disk->queue, nr); -if (err) - ret = err; - + et =blk_mq_update_nr_requests (q, et, nr);mutex_unlock (&q->elevator_lock);blk_mq_unfreeze_queue (q, memflags); +if (et) +blk_mq_free_sched_tags (et, set); + unlock:up_write (&set->update_nr_hwq_lock);return ret;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 132/563 arm64: dts: allwinner: a527: cubie-a5e: Add ethernet PHY reset setting
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen-Yu Tsai <[email protected]>
[ Upstream commit a15f095b590bcc1968fbf2ced8fe87fbd8d012e0 ]
The external Ethernet PHY has a reset pin that is connected to the SoC. It is missing from the original submission.
Add it to complete the description.
--- arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 3 +++ 1 file changed, 3 insertions(+)
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts +3 -0
@@ -75,6 +75,9 @@ &mdio0 { ext_rgmii_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; + reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ + reset-assert-us = <10000>; + reset-deassert-us = <150000>; }; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 133/563 arm64: dts: allwinner: t527: avaota-a1: Add ethernet PHY reset setting
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen-Yu Tsai <[email protected]>
[ Upstream commit 8dc3f973b2ff7ea19f7637983c11b005daa8fe45 ]
The external Ethernet PHY has a reset pin that is connected to the SoC. It is missing from the original submission.
Add it to complete the description.
--- arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts | 3 +++ 1 file changed, 3 insertions(+)
arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts +3 -0
@@ -85,6 +85,9 @@ &mdio0 { ext_rgmii_phy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; + reset-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 */ + reset-assert-us = <10000>; + reset-deassert-us = <150000>; }; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 134/563 arm64: dts: rockchip: Add RTC on rk3576-evb1-v10
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Alexey Charkov <[email protected]>
[ Upstream commit 0adaae77862932a19cc14c086d7fd15ec0ef7703 ]
Add the I2C connected RTC chip to the Rockchip RK3576 EVB1 board.
Apart from the realtime clock functionality, it also provides a 32 kHz clock source for the onboard WiFi chip.
Stable-dep-of: 843367c7ed19 ("arm64: dts: rockchip: Fix network on rk3576 evb1 board")
--- .../boot/dts/rockchip/rk3576-evb1-v10.dts | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+)
arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts +22 -0
@@ -680,6 +680,22 @@ regulator-state-mem { }; }; +&i2c2 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + clock-output-names = "hym8563"; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int>; + wakeup-source; + #clock-cells = <0>; + }; +}; + &mdio0 { rgmii_phy0: phy@1 { compatible = "ethernet-phy-ieee802.3-c22";
@@ -708,6 +724,12 @@ &pcie1 { }; &pinctrl { + hym8563 { + rtc_int: rtc-int { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + usb { usb_host_pwren: usb-host-pwren { rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 135/563 arm64: dts: rockchip: Add WiFi on rk3576-evb1-v10
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Alexey Charkov <[email protected]>
[ Upstream commit ebf8183ad08afc4fcabe1379a5098354829d950d ]
Add device tree nodes to enable the onboard Ampak AP6275P WiFi chip connected over a PCIe link on Rockchip RK3576 EVB1.
It takes an external 32 kHz clock from the RTC chip and requires the WIFI_REG_ON signal to be enabled before the bus is enumerated to initialize properly.
Stable-dep-of: 843367c7ed19 ("arm64: dts: rockchip: Fix network on rk3576 evb1 board")
--- .../boot/dts/rockchip/rk3576-evb1-v10.dts | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+)
arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts +58 -0
@@ -232,6 +232,20 @@ vcc_ufs_s0: regulator-vcc-ufs-s0 { regulator-max-microvolt = <3300000>; vin-supply = <&vcc_sys>; }; + + vcc_wifi_reg_on: regulator-wifi-reg-on { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&wifi_reg_on>; + pinctrl-names = "default"; + regulator-name = "wifi_reg_on"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8_s3>; + }; }; &cpu_l0 {
@@ -242,6 +256,10 @@ &cpu_b0 { cpu-supply = <&vdd_cpu_big_s0>; }; +&combphy0_ps { + status = "okay"; +}; + &combphy1_psu { status = "okay"; };
@@ -712,6 +730,30 @@ rgmii_phy1: phy@1 { }; }; +&pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_rst>; + reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc_3v3_s3>; + status = "okay"; + + pcie@0,0 { + reg = <0x0 0 0 0 0>; + bus-range = <0x0 0xf>; + device_type = "pci"; + ranges; + #address-cells = <3>; + #size-cells = <2>; + + wifi: wifi@0,0 { + compatible = "pci14e4,449d"; + reg = <0x10000 0 0 0 0>; + clocks = <&hym8563>; + clock-names = "lpo"; + }; + }; +}; + &pcie1 { reset-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie1>;
@@ -730,6 +772,12 @@ rtc_int: rtc-int { }; }; + pcie0 { + pcie0_rst: pcie0-rst { + rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + usb { usb_host_pwren: usb-host-pwren { rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -743,6 +791,16 @@ usbc0_int: usbc0-int { rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; }; }; + + wifi { + wifi_reg_on: wifi-reg-on { + rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + wifi_wake_host: wifi-wake-host { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; }; &sdmmc {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 136/563 arm64: dts: rockchip: Fix network on rk3576 evb1 board
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Reichel <[email protected]>
[ Upstream commit 843367c7ed196bd0806c8776cba108aaf6923b82 ]
The RK3576 EVB1 has a RTL8211F PHY for each GMAC interface with a dedicated reset line and the 25MHz clock provided by the SoC. The current description results in non-working Ethernet as the clocks are only enabled by the PHY driver, but probing the right PHY driver currently requires that the PHY ID register can be read for automatic identification.
This fixes up the network description to get the network functionality working reliably and cleans up usage of deprecated DT properties while at it.
--- .../boot/dts/rockchip/rk3576-evb1-v10.dts | 38 ++++++++++++++----- 1 file changed, 28 insertions(+), 10 deletions(-)
arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts +28 -10
@@ -275,9 +275,6 @@ ð0m0_rx_bus2 ð0m0_rgmii_clk ð0m0_rgmii_bus ðm0_clk0_25m_out>; - snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 20000 100000>; tx_delay = <0x21>; status = "okay"; };
@@ -293,9 +290,6 @@ ð1m0_rx_bus2 ð1m0_rgmii_clk ð1m0_rgmii_bus ðm0_clk1_25m_out>; - snps,reset-gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 20000 100000>; tx_delay = <0x20>; status = "okay"; };
@@ -715,18 +709,32 @@ hym8563: rtc@51 { }; &mdio0 { - rgmii_phy0: phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; + rgmii_phy0: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c916"; reg = <0x1>; clocks = <&cru REFCLKO25M_GMAC0_OUT>; + assigned-clocks = <&cru REFCLKO25M_GMAC0_OUT>; + assigned-clock-rates = <25000000>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_phy0_rst>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; }; }; &mdio1 { - rgmii_phy1: phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; + rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c916"; reg = <0x1>; clocks = <&cru REFCLKO25M_GMAC1_OUT>; + assigned-clocks = <&cru REFCLKO25M_GMAC1_OUT>; + assigned-clock-rates = <25000000>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_phy1_rst>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; }; };
@@ -772,6 +780,16 @@ rtc_int: rtc-int { }; }; + network { + rgmii_phy0_rst: rgmii-phy0-rst { + rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + rgmii_phy1_rst: rgmii-phy1-rst { + rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pcie0 { pcie0_rst: pcie0-rst { rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 137/563 arm64: dts: ti: k3-j742s2-mcu-wakeup: Override firmware-name for MCU R5F cores
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Beleswar Padhi <[email protected]>
[ Upstream commit 00c8fdc2809f05422d919809106f54c23de3cba3 ]
The J742S2 SoC reuses the common k3-j784s4-j742s2-mcu-wakeup-common.dtsi for its MCU domain, but it does not override the firmware-name property for its R5F cores. This causes the wrong firmware binaries to be referenced.
Introduce a new k3-j742s2-mcu-wakeup.dtsi file to override the firmware-name property with correct names for J742s2.
--- .../arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi | 17 +++++++++++++++++ arch/arm64/boot/dts/ti/k3-j742s2.dtsi | 1 + 2 files changed, 18 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi
arch/arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi new file +17 -0
@@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Device Tree Source for J742S2 SoC Family + * + * TRM: https://www.ti.com/lit/pdf/spruje3 + * + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + */ + +&mcu_r5fss0_core0 { + firmware-name = "j742s2-mcu-r5f0_0-fw"; +}; + +&mcu_r5fss0_core1 { + firmware-name = "j742s2-mcu-r5f0_1-fw"; +};
arch/arm64/boot/dts/ti/k3-j742s2.dtsi +1 -0
@@ -96,3 +96,4 @@ cpu3: cpu@3 { }; #include "k3-j742s2-main.dtsi" +#include "k3-j742s2-mcu-wakeup.dtsi"
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 138/563 arm64: dts: ti: k3: Rename rproc reserved-mem nodes to memory@addr
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Beleswar Padhi <[email protected]>
[ Upstream commit aee0678597c63e5427e91b2e49a6c5ed4951f277 ]
Currently, the reserved memory carveouts used by remote processors are named like 'rproc-name-<dma>-memory-region@addr'. While it is descriptive, the node label already serves that purpose. Rename reserved memory nodes to generic 'memory@addr' to align with the device tree specifications. This is done for all TI K3 based boards.
Stable-dep-of: 79a1778c7819 ("Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations"")
--- .../boot/dts/ti/k3-am62-phycore-som.dtsi | 10 ++-- .../boot/dts/ti/k3-am62-pocketbeagle2.dts | 6 +-- arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 2 +- .../arm64/boot/dts/ti/k3-am625-beagleplay.dts | 2 +- .../boot/dts/ti/k3-am62a-phycore-som.dtsi | 12 ++--- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 12 ++--- arch/arm64/boot/dts/ti/k3-am62d2-evm.dts | 14 +++--- arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 8 ++-- .../arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 8 ++-- .../boot/dts/ti/k3-am64-phycore-som.dtsi | 22 ++++----- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 22 ++++----- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 22 ++++----- arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 16 +++---- .../arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 18 +++---- .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 10 ++-- .../arm64/boot/dts/ti/k3-am654-base-board.dts | 10 ++-- .../arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 22 ++++----- .../boot/dts/ti/k3-am68-phycore-som.dtsi | 34 ++++++------- arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 34 ++++++------- arch/arm64/boot/dts/ti/k3-am69-sk.dts | 48 +++++++++---------- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 18 +++---- .../boot/dts/ti/k3-j721e-beagleboneai64.dts | 38 +++++++-------- arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 38 +++++++-------- arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 38 +++++++-------- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 34 ++++++------- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 22 ++++----- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 4 +- .../dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 44 ++++++++--------- 29 files changed, 285 insertions(+), 285 deletions(-)
arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi +5 -5
@@ -46,31 +46,31 @@ ramoops@9c700000 { pmsg-size = <0x8000>; }; - rtos_ipc_memory_region: ipc-memories@9c800000 { + rtos_ipc_memory_region: memory@9c800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c800000 0x00 0x00300000>; no-map; }; - mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 { + mcu_m4fss_dma_memory_region: memory@9cb00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9cb00000 0x00 0x100000>; no-map; }; - mcu_m4fss_memory_region: m4f-memory@9cc00000 { + mcu_m4fss_memory_region: memory@9cc00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9cc00000 0x00 0xe00000>; no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 { + wkup_r5fss0_core0_dma_memory_region: memory@9da00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9da00000 0x00 0x100000>; no-map; }; - wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 { + wkup_r5fss0_core0_memory_region: memory@9db00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9db00000 0x00 0xc00000>; no-map;
arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts +3 -3
@@ -54,13 +54,13 @@ linux,cma { linux,cma-default; }; - mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 { + mcu_m4fss_dma_memory_region: memory@9cb00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9cb00000 0x00 0x100000>; no-map; }; - mcu_m4fss_memory_region: m4f-memory@9cc00000 { + mcu_m4fss_memory_region: memory@9cc00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9cc00000 0x00 0xe00000>; no-map;
@@ -78,7 +78,7 @@ secure_ddr: optee@9e800000 { no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 { + wkup_r5fss0_core0_dma_memory_region: memory@9db00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9db00000 0x00 0xc00000>; no-map;
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +1 -1
@@ -206,7 +206,7 @@ secure_ddr: optee@9e800000 { no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 { + wkup_r5fss0_core0_dma_memory_region: memory@9db00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9db00000 0x00 0xc00000>; no-map;
arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +1 -1
@@ -83,7 +83,7 @@ secure_ddr: optee@9e800000 { no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 { + wkup_r5fss0_core0_dma_memory_region: memory@9db00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9db00000 0x00 0xc00000>; no-map;
arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi +6 -6
@@ -59,37 +59,37 @@ linux,cma { linux,cma-default; }; - c7x_0_dma_memory_region: c7x-dma-memory@99800000 { + c7x_0_dma_memory_region: memory@99800000 { compatible = "shared-dma-pool"; reg = <0x00 0x99800000 0x00 0x100000>; no-map; }; - c7x_0_memory_region: c7x-memory@99900000 { + c7x_0_memory_region: memory@99900000 { compatible = "shared-dma-pool"; reg = <0x00 0x99900000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { + mcu_r5fss0_core0_dma_memory_region: memory@9b800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b800000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { + mcu_r5fss0_core0_memory_region: memory@9b900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b900000 0x00 0xf00000>; no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + wkup_r5fss0_core0_dma_memory_region: memory@9c800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c800000 0x00 0x100000>; no-map; }; - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { + wkup_r5fss0_core0_memory_region: memory@9c900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c900000 0x00 0xf00000>; no-map;
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +6 -6
@@ -53,37 +53,37 @@ linux,cma { linux,cma-default; }; - c7x_0_dma_memory_region: c7x-dma-memory@99800000 { + c7x_0_dma_memory_region: memory@99800000 { compatible = "shared-dma-pool"; reg = <0x00 0x99800000 0x00 0x100000>; no-map; }; - c7x_0_memory_region: c7x-memory@99900000 { + c7x_0_memory_region: memory@99900000 { compatible = "shared-dma-pool"; reg = <0x00 0x99900000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { + mcu_r5fss0_core0_dma_memory_region: memory@9b800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b800000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { + mcu_r5fss0_core0_memory_region: memory@9b900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b900000 0x00 0xf00000>; no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + wkup_r5fss0_core0_dma_memory_region: memory@9c800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c800000 0x00 0x100000>; no-map; }; - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { + wkup_r5fss0_core0_memory_region: memory@9c900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c900000 0x00 0xf00000>; no-map;
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts +7 -7
@@ -58,37 +58,37 @@ secure_tfa_ddr: tfa@80000000 { no-map; }; - c7x_0_dma_memory_region: c7x-dma-memory@99800000 { + c7x_0_dma_memory_region: memory@99800000 { compatible = "shared-dma-pool"; reg = <0x00 0x99800000 0x00 0x100000>; no-map; }; - c7x_0_memory_region: c7x-memory@99900000 { + c7x_0_memory_region: memory@99900000 { compatible = "shared-dma-pool"; reg = <0x00 0x99900000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { + mcu_r5fss0_core0_dma_memory_region: memory@9b800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b800000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { + mcu_r5fss0_core0_memory_region: memory@9b900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b900000 0x00 0xf00000>; no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + wkup_r5fss0_core0_dma_memory_region: memory@9c800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c800000 0x00 0x100000>; no-map; }; - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { + wkup_r5fss0_core0_memory_region: memory@9c900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c900000 0x00 0xf00000>; no-map;
@@ -100,7 +100,7 @@ secure_ddr: optee@9e800000 { no-map; }; - rtos_ipc_memory_region: ipc-memories@a0000000 { + rtos_ipc_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x01000000>; no-map;
arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi +1 -1
@@ -162,7 +162,7 @@ secure_ddr: optee@9e800000 { no-map; }; - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { + wkup_r5fss0_core0_memory_region: memory@9c900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c900000 0x00 0x01e00000>; no-map;
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +4 -4
@@ -49,25 +49,25 @@ reserved-memory { #size-cells = <2>; ranges; - mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 { + mcu_r5fss0_core0_dma_memory_region: memory@9b800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b800000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 { + mcu_r5fss0_core0_memory_region: memory@9b900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9b900000 0x00 0xf00000>; no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + wkup_r5fss0_core0_dma_memory_region: memory@9c800000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c800000 0x00 0x100000>; no-map; }; - wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 { + wkup_r5fss0_core0_memory_region: memory@9c900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c900000 0x00 0xf00000>; no-map;
arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +4 -4
@@ -58,25 +58,25 @@ linux,cma { linux,cma-default; }; - mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 { + mcu_m4fss_dma_memory_region: memory@9cb00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9cb00000 0x00 0x100000>; no-map; }; - mcu_m4fss_memory_region: m4f-memory@9cc00000 { + mcu_m4fss_memory_region: memory@9cc00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9cc00000 0x00 0xe00000>; no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 { + wkup_r5fss0_core0_dma_memory_region: memory@9da00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9da00000 0x00 0x100000>; no-map; }; - wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 { + wkup_r5fss0_core0_memory_region: memory@9db00000 { compatible = "shared-dma-pool"; reg = <0x00 0x9db00000 0x00 0xc00000>; no-map;
arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi +11 -11
@@ -41,67 +41,67 @@ secure_ddr: optee@9e800000 { no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + main_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a0100000 { + main_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + main_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a1100000 { + main_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss1_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a2100000 { + main_r5fss1_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss1_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a3100000 { + main_r5fss1_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 { + mcu_m4fss_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - mcu_m4fss_memory_region: m4f-memory@a4100000 { + mcu_m4fss_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a5000000 { + rtos_ipc_memory_region: memory@a5000000 { reg = <0x00 0xa5000000 0x00 0x00800000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-am642-evm.dts +11 -11
@@ -53,67 +53,67 @@ secure_ddr: optee@9e800000 { no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + main_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a0100000 { + main_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + main_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a1100000 { + main_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss1_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a2100000 { + main_r5fss1_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss1_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a3100000 { + main_r5fss1_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 { + mcu_m4fss_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - mcu_m4fss_memory_region: m4f-memory@a4100000 { + mcu_m4fss_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a5000000 { + rtos_ipc_memory_region: memory@a5000000 { reg = <0x00 0xa5000000 0x00 0x00800000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-am642-sk.dts +11 -11
@@ -51,67 +51,67 @@ secure_ddr: optee@9e800000 { no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + main_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a0100000 { + main_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + main_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a1100000 { + main_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss1_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a2100000 { + main_r5fss1_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss1_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a3100000 { + main_r5fss1_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 { + mcu_m4fss_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - mcu_m4fss_memory_region: m4f-memory@a4100000 { + mcu_m4fss_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a5000000 { + rtos_ipc_memory_region: memory@a5000000 { reg = <0x00 0xa5000000 0x00 0x00800000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi +8 -8
@@ -115,49 +115,49 @@ secure_ddr: optee@9e800000 { no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + main_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a0100000 { + main_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + main_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a1100000 { + main_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss1_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a2100000 { + main_r5fss1_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss1_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a3100000 { + main_r5fss1_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map;
arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi +9 -9
@@ -31,55 +31,55 @@ secure_ddr: optee@9e800000 { no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + main_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a0100000 { + main_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + main_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a1100000 { + main_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss1_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a2100000 { + main_r5fss1_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss1_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a3100000 { + main_r5fss1_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a5000000 { + rtos_ipc_memory_region: memory@a5000000 { reg = <0x00 0xa5000000 0x00 0x00800000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +5 -5
@@ -47,31 +47,31 @@ secure_ddr: secure-ddr@9e800000 { no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0 0xa0000000 0 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { + mcu_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0 0xa0100000 0 0xf00000>; no-map; }; - mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0 0xa1000000 0 0x100000>; no-map; }; - mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { + mcu_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0 0xa1100000 0 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a2000000 { + rtos_ipc_memory_region: memory@a2000000 { reg = <0x00 0xa2000000 0x00 0x00200000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-am654-base-board.dts +5 -5
@@ -50,31 +50,31 @@ secure_ddr: secure-ddr@9e800000 { no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0 0xa0000000 0 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { + mcu_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0 0xa0100000 0 0xf00000>; no-map; }; - mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0 0xa1000000 0 0x100000>; no-map; }; - mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { + mcu_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0 0xa1100000 0 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a2000000 { + rtos_ipc_memory_region: memory@a2000000 { reg = <0x00 0xa2000000 0x00 0x00100000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts +11 -11
@@ -50,67 +50,67 @@ secure_ddr: optee@9e800000 { no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + wkup_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 { + wkup_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 { + mcu_r5fss0_core0_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 { + main_r5fss0_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 { + main_r5fss0_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - c7x_0_dma_memory_region: c7x-dma-memory@a3000000 { + c7x_0_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - c7x_0_memory_region: c7x-memory@a3100000 { + c7x_0_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - c7x_1_dma_memory_region: c7x-dma-memory@a4000000 { + c7x_1_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - c7x_1_memory_region: c7x-memory@a4100000 { + c7x_1_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a5000000 { + rtos_ipc_memory_region: memory@a5000000 { reg = <0x00 0xa5000000 0x00 0x1c00000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-am68-phycore-som.dtsi +17 -17
@@ -49,103 +49,103 @@ secure_ddr: optee@9e800000 { no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { + mcu_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { + mcu_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss0_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a2100000 { + main_r5fss0_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss0_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a3100000 { + main_r5fss0_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 { + main_r5fss1_core0_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a4100000 { + main_r5fss1_core0_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 { + main_r5fss1_core1_dma_memory_region: memory@a5000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a5100000 { + main_r5fss1_core1_memory_region: memory@a5100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5100000 0x00 0xf00000>; no-map; }; - c71_0_dma_memory_region: c71-dma-memory@a6000000 { + c71_0_dma_memory_region: memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map; }; - c71_0_memory_region: c71-memory@a6100000 { + c71_0_memory_region: memory@a6100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6100000 0x00 0xf00000>; no-map; }; - c71_1_dma_memory_region: c71-dma-memory@a7000000 { + c71_1_dma_memory_region: memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map; }; - c71_1_memory_region: c71-memory@a7100000 { + c71_1_memory_region: memory@a7100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a8000000 { + rtos_ipc_memory_region: memory@a8000000 { reg = <0x00 0xa8000000 0x00 0x01c00000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi +17 -17
@@ -27,103 +27,103 @@ secure_ddr: optee@9e800000 { no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { + mcu_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { + mcu_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss0_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a2100000 { + main_r5fss0_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss0_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a3100000 { + main_r5fss0_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 { + main_r5fss1_core0_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a4100000 { + main_r5fss1_core0_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 { + main_r5fss1_core1_dma_memory_region: memory@a5000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a5100000 { + main_r5fss1_core1_memory_region: memory@a5100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5100000 0x00 0xf00000>; no-map; }; - c71_0_dma_memory_region: c71-dma-memory@a6000000 { + c71_0_dma_memory_region: memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map; }; - c71_0_memory_region: c71-memory@a6100000 { + c71_0_memory_region: memory@a6100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6100000 0x00 0xf00000>; no-map; }; - c71_1_dma_memory_region: c71-dma-memory@a7000000 { + c71_1_dma_memory_region: memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map; }; - c71_1_memory_region: c71-memory@a7100000 { + c71_1_memory_region: memory@a7100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a8000000 { + rtos_ipc_memory_region: memory@a8000000 { reg = <0x00 0xa8000000 0x00 0x01c00000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-am69-sk.dts +24 -24
169 lines not on this page · raw message
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +9 -9
@@ -29,55 +29,55 @@ secure_ddr: optee@9e800000 { no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { + mcu_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { + mcu_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss0_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a2100000 { + main_r5fss0_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss0_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a3100000 { + main_r5fss0_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a4000000 { + rtos_ipc_memory_region: memory@a4000000 { reg = <0x00 0xa4000000 0x00 0x00800000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +19 -19
@@ -51,115 +51,115 @@ secure_ddr: optee@9e800000 { no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { + mcu_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { + mcu_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss0_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a2100000 { + main_r5fss0_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss0_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a3100000 { + main_r5fss0_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 { + main_r5fss1_core0_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a4100000 { + main_r5fss1_core0_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 { + main_r5fss1_core1_dma_memory_region: memory@a5000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a5100000 { + main_r5fss1_core1_memory_region: memory@a5100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5100000 0x00 0xf00000>; no-map; }; - c66_0_dma_memory_region: c66-dma-memory@a6000000 { + c66_0_dma_memory_region: memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map; }; - c66_0_memory_region: c66-memory@a6100000 { + c66_0_memory_region: memory@a6100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6100000 0x00 0xf00000>; no-map; }; - c66_1_dma_memory_region: c66-dma-memory@a7000000 { + c66_1_dma_memory_region: memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map; }; - c66_1_memory_region: c66-memory@a7100000 { + c66_1_memory_region: memory@a7100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7100000 0x00 0xf00000>; no-map; }; - c71_0_dma_memory_region: c71-dma-memory@a8000000 { + c71_0_dma_memory_region: memory@a8000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa8000000 0x00 0x100000>; no-map; }; - c71_0_memory_region: c71-memory@a8100000 { + c71_0_memory_region: memory@a8100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa8100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@aa000000 { + rtos_ipc_memory_region: memory@aa000000 { reg = <0x00 0xaa000000 0x00 0x01c00000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-j721e-sk.dts +19 -19
@@ -48,115 +48,115 @@ secure_ddr: optee@9e800000 { no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { + mcu_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { + mcu_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss0_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a2100000 { + main_r5fss0_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss0_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a3100000 { + main_r5fss0_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 { + main_r5fss1_core0_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a4100000 { + main_r5fss1_core0_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 { + main_r5fss1_core1_dma_memory_region: memory@a5000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a5100000 { + main_r5fss1_core1_memory_region: memory@a5100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5100000 0x00 0xf00000>; no-map; }; - c66_0_dma_memory_region: c66-dma-memory@a6000000 { + c66_0_dma_memory_region: memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map; }; - c66_0_memory_region: c66-memory@a6100000 { + c66_0_memory_region: memory@a6100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6100000 0x00 0xf00000>; no-map; }; - c66_1_dma_memory_region: c66-dma-memory@a7000000 { + c66_1_dma_memory_region: memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map; }; - c66_1_memory_region: c66-memory@a7100000 { + c66_1_memory_region: memory@a7100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7100000 0x00 0xf00000>; no-map; }; - c71_0_dma_memory_region: c71-dma-memory@a8000000 { + c71_0_dma_memory_region: memory@a8000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa8000000 0x00 0x100000>; no-map; }; - c71_0_memory_region: c71-memory@a8100000 { + c71_0_memory_region: memory@a8100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa8100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@aa000000 { + rtos_ipc_memory_region: memory@aa000000 { reg = <0x00 0xaa000000 0x00 0x01c00000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +19 -19
@@ -29,115 +29,115 @@ secure_ddr: optee@9e800000 { no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { + mcu_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { + mcu_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss0_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a2100000 { + main_r5fss0_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss0_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a3100000 { + main_r5fss0_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 { + main_r5fss1_core0_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a4100000 { + main_r5fss1_core0_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 { + main_r5fss1_core1_dma_memory_region: memory@a5000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a5100000 { + main_r5fss1_core1_memory_region: memory@a5100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5100000 0x00 0xf00000>; no-map; }; - c66_1_dma_memory_region: c66-dma-memory@a6000000 { + c66_1_dma_memory_region: memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map; }; - c66_0_memory_region: c66-memory@a6100000 { + c66_0_memory_region: memory@a6100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6100000 0x00 0xf00000>; no-map; }; - c66_0_dma_memory_region: c66-dma-memory@a7000000 { + c66_0_dma_memory_region: memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map; }; - c66_1_memory_region: c66-memory@a7100000 { + c66_1_memory_region: memory@a7100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7100000 0x00 0xf00000>; no-map; }; - c71_0_dma_memory_region: c71-dma-memory@a8000000 { + c71_0_dma_memory_region: memory@a8000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa8000000 0x00 0x100000>; no-map; }; - c71_0_memory_region: c71-memory@a8100000 { + c71_0_memory_region: memory@a8100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa8100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@aa000000 { + rtos_ipc_memory_region: memory@aa000000 { reg = <0x00 0xaa000000 0x00 0x01c00000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +17 -17
@@ -31,103 +31,103 @@ secure_ddr: optee@9e800000 { no-map; }; - mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { + mcu_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { + mcu_r5fss0_core1_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { + mcu_r5fss0_core1_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { + main_r5fss0_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: r5f-memory@a2100000 { + main_r5fss0_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { + main_r5fss0_core1_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - main_r5fss0_core1_memory_region: r5f-memory@a3100000 { + main_r5fss0_core1_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 { + main_r5fss1_core0_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - main_r5fss1_core0_memory_region: r5f-memory@a4100000 { + main_r5fss1_core0_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 { + main_r5fss1_core1_dma_memory_region: memory@a5000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5000000 0x00 0x100000>; no-map; }; - main_r5fss1_core1_memory_region: r5f-memory@a5100000 { + main_r5fss1_core1_memory_region: memory@a5100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5100000 0x00 0xf00000>; no-map; }; - c71_0_dma_memory_region: c71-dma-memory@a6000000 { + c71_0_dma_memory_region: memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map; }; - c71_0_memory_region: c71-memory@a6100000 { + c71_0_memory_region: memory@a6100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6100000 0x00 0xf00000>; no-map; }; - c71_1_dma_memory_region: c71-dma-memory@a7000000 { + c71_1_dma_memory_region: memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map; }; - c71_1_memory_region: c71-memory@a7100000 { + c71_1_memory_region: memory@a7100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a8000000 { + rtos_ipc_memory_region: memory@a8000000 { reg = <0x00 0xa8000000 0x00 0x01c00000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-j722s-evm.dts +11 -11
@@ -52,67 +52,67 @@ secure_ddr: optee@9e800000 { no-map; }; - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { + wkup_r5fss0_core0_dma_memory_region: memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; - wkup_r5fss0_core0_memory_region: r5f-memory@a0100000 { + wkup_r5fss0_core0_memory_region: memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; - mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@a1000000 { + mcu_r5fss0_core0_dma_memory_region: memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; - mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@a1100000 { + mcu_r5fss0_core0_memory_region: memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; - main_r5fss0_core0_dma_memory_region: main-r5fss-dma-memory-region@a2000000 { + main_r5fss0_core0_dma_memory_region: memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; - main_r5fss0_core0_memory_region: main-r5fss-memory-region@a2100000 { + main_r5fss0_core0_memory_region: memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; - c7x_0_dma_memory_region: c7x-dma-memory@a3000000 { + c7x_0_dma_memory_region: memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; - c7x_0_memory_region: c7x-memory@a3100000 { + c7x_0_memory_region: memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; - c7x_1_dma_memory_region: c7x-dma-memory@a4000000 { + c7x_1_dma_memory_region: memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; - c7x_1_memory_region: c7x-memory@a4100000 { + c7x_1_memory_region: memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; - rtos_ipc_memory_region: ipc-memories@a5000000 { + rtos_ipc_memory_region: memory@a5000000 { reg = <0x00 0xa5000000 0x00 0x1c00000>; alignment = <0x1000>; no-map;
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +2 -2
@@ -28,13 +28,13 @@ reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; - c71_3_dma_memory_region: c71-dma-memory@ab000000 { + c71_3_dma_memory_region: memory@ab000000 { compatible = "shared-dma-pool"; reg = <0x00 0xab000000 0x00 0x100000>; no-map; }; - c71_3_memory_region: c71-memory@ab100000 { + c71_3_memory_region: memory@ab100000 { compatible = "shared-dma-pool"; reg = <0x00 0xab100000 0x00 0xf00000>; no-map;
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi +22 -22
155 lines not on this page · raw message
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 139/563 Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations"
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Beleswar Padhi <[email protected]>
[ Upstream commit 79a1778c7819c8491cdbdc1f7e46d478cb84d5cf ]
This reverts commit 9f3814a7c06b7c7296cf8c1622078ad71820454b.
The C6x carveouts are reversed intentionally. This is due to the requirement to keep the DMA memory region as non-cached, however the minimum granular cache region for C6x is 16MB. So, C66x_0 marks the entire C66x_1 16MB memory carveouts as non-cached, and uses the DMA memory region of C66x_1 as its own, and vice-versa.
This was also called out in the original commit which introduced these reversed carveouts:
"The minimum granularity on the Cache settings on C66x DSP cores is 16MB, so the DMA memory regions are chosen such that they are in separate 16MB regions for each DSP, while reserving a total of 16 MB for each DSP and not changing the overall DSP remoteproc carveouts."
--- arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/ti/k3-j721e-sk.dts +4 -2
@@ -120,7 +120,8 @@ main_r5fss1_core1_memory_region: memory@a5100000 { no-map; }; - c66_0_dma_memory_region: memory@a6000000 { + /* Carveout locations are flipped due to caching */ + c66_1_dma_memory_region: memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map;
@@ -132,7 +133,8 @@ c66_0_memory_region: memory@a6100000 { no-map; }; - c66_1_dma_memory_region: memory@a7000000 { + /* Carveout locations are flipped due to caching */ + c66_0_dma_memory_region: memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 140/563 Revert "arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x carveout locations"
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Beleswar Padhi <[email protected]>
[ Upstream commit 932424a925ce79cbed0a93d36c5f1b69a0128de1 ]
This reverts commit 1a314099b7559690fe23cdf3300dfff6e830ecb1.
The C6x carveouts are reversed intentionally. This is due to the requirement to keep the DMA memory region as non-cached, however the minimum granular cache region for C6x is 16MB. So, C66x_0 marks the entire C66x_1 16MB memory carveouts as non-cached, and uses the DMA memory region of C66x_1 as its own, and vice-versa.
This was also called out in the original commit which introduced these reversed carveouts:
"The minimum granularity on the Cache settings on C66x DSP cores is 16MB, so the DMA memory regions are chosen such that they are in separate 16MB regions for each DSP, while reserving a total of 16 MB for each DSP and not changing the overall DSP remoteproc carveouts."
--- arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +4 -2
@@ -123,7 +123,8 @@ main_r5fss1_core1_memory_region: memory@a5100000 { no-map; }; - c66_0_dma_memory_region: memory@a6000000 { + /* Carveout locations are flipped due to caching */ + c66_1_dma_memory_region: memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map;
@@ -135,7 +136,8 @@ c66_0_memory_region: memory@a6100000 { no-map; }; - c66_1_dma_memory_region: memory@a7000000 { + /* Carveout locations are flipped due to caching */ + c66_0_dma_memory_region: memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 141/563 arm64: dts: mediatek: mt8188: Change efuse fallback compatible to mt8186
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen-Yu Tsai <[email protected]>
[ Upstream commit c881d1c37b2c159d908203dba5c4920bc776046f ]
The efuse block in the MT8188 contains the GPU speed bin cell, and like the MT8186 one, has the same conversion scheme to work with the GPU OPP binding. This was reflected in a corresponding change to the efuse DT binding.
Change the fallback compatible of the MT8188's efuse block from the generic one to the MT8186 one. This also makes GPU DVFS work properly.
--- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt8188.dtsi +1 -1
@@ -2183,7 +2183,7 @@ imp_iic_wrap_en: clock-controller@11ec2000 { }; efuse: efuse@11f20000 { - compatible = "mediatek,mt8188-efuse", "mediatek,efuse"; + compatible = "mediatek,mt8188-efuse", "mediatek,mt8186-efuse"; reg = <0 0x11f20000 0 0x1000>; #address-cells = <1>; #size-cells = <1>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 142/563 arm64: dts: mediatek: mt8186-tentacruel: Fix touchscreen model
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen-Yu Tsai <[email protected]>
[ Upstream commit 0370911565869384f19b35ea9e71ee7a57b48a33 ]
The touchscreen controller used with the original Krabby design is the Elan eKTH6918, which is in the same family as eKTH6915, but supporting a larger screen size with more sense lines.
OTOH, the touchscreen controller that actually shipped on the Tentacruel devices is the Elan eKTH6A12NAY. A compatible string was added for it specifically because it has different power sequencing timings.
Fix up the touchscreen nodes for both these. This also includes adding a previously missing reset line. Also add "no-reset-on-power-off" since the power is always on, and putting it in reset would consume more power.
--- arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi | 8 ++++---- .../dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts | 4 ++++ 2 files changed, 8 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/mediatek/mt8186-corsola-krabby.dtsi +4 -4
@@ -71,14 +71,14 @@ &i2c1 { i2c-scl-internal-delay-ns = <10000>; touchscreen: touchscreen@10 { - compatible = "hid-over-i2c"; + compatible = "elan,ekth6915"; reg = <0x10>; interrupts-extended = <&pio 12 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; pinctrl-0 = <&touchscreen_pins>; - post-power-on-delay-ms = <10>; - hid-descr-addr = <0x0001>; - vdd-supply = <&pp3300_s3>; + reset-gpios = <&pio 60 GPIO_ACTIVE_LOW>; + vcc33-supply = <&pp3300_s3>; + no-reset-on-power-off; }; };
arch/arm64/boot/dts/mediatek/mt8186-corsola-tentacruel-sku262144.dts +4 -0
@@ -42,3 +42,7 @@ MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) CROS_STD_MAIN_KEYMAP >; }; + +&touchscreen { + compatible = "elan,ekth6a12nay"; +};
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 143/563 arm64: dts: ti: k3-pinctrl: Fix the bug in existing macros
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Akashdeep Kaur <[email protected]>
[ Upstream commit 2e79ee4d64e9ba4a3fc90e91dfd715407efab16d ]
Currently, DS_IO_OVERRIDE_EN_SHIFT macro is not defined anywhere but used for defining other macro.
Replace this undefined macro with valid macro. Rename the existing macro to reflect the actual behavior.
--- arch/arm64/boot/dts/ti/k3-pinctrl.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/ti/k3-pinctrl.h +2 -2
@@ -55,8 +55,8 @@#define PIN_DS_FORCE_DISABLE (0 << FORCE_DS_EN_SHIFT)#define PIN_DS_FORCE_ENABLE (1 << FORCE_DS_EN_SHIFT) -#define PIN_DS_IO_OVERRIDE_DISABLE (0 << DS_IO_OVERRIDE_EN_SHIFT) -#define PIN_DS_IO_OVERRIDE_ENABLE (1 << DS_IO_OVERRIDE_EN_SHIFT) +#define PIN_DS_ISO_OVERRIDE_DISABLE (0 << ISO_OVERRIDE_EN_SHIFT) +#define PIN_DS_ISO_OVERRIDE_ENABLE (1 << ISO_OVERRIDE_EN_SHIFT)#define PIN_DS_OUT_ENABLE (0 << DS_OUT_DIS_SHIFT)#define PIN_DS_OUT_DISABLE (1 << DS_OUT_DIS_SHIFT)#define PIN_DS_OUT_VALUE_ZERO (0 << DS_OUT_VAL_SHIFT)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 144/563 arm64: dts: renesas: r9a09g047e57-smarc: Fix gpio keys pin control node
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Biju Das <[email protected]>
[ Upstream commit 3e5df910b592d47734b6dcd03d57498d4766bf6c ]
Adding pin control node to the child won't parse the pins during driver bind. Fix the issue by moving it to parent node.
This issue is observed while adding Schmitt input enable for PS0 pin on later patch. Currently the reset value of the PIN is set to NMI function and hence there is no breakage.
--- arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts +3 -3
@@ -90,10 +90,10 @@ &i2c0 { }; &keys { - key-sleep { - pinctrl-0 = <&nmi_pins>; - pinctrl-names = "default"; + pinctrl-0 = <&nmi_pins>; + pinctrl-names = "default"; + key-sleep { interrupts-extended = <&icu 0 IRQ_TYPE_EDGE_FALLING>; linux,code = <KEY_SLEEP>; label = "SLEEP";
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 145/563 arm64: dts: mediatek: mt6331: Fix pmic, regulators, rtc, keys node names
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: AngeloGioacchino Del Regno <[email protected]>
[ Upstream commit 98967109c9c0e2de4140827628c63f96314099ab ]
The node names for "pmic", "regulators", "rtc", and "keys" are dictated by the PMIC MFD binding: change those to adhere to it.
--- arch/arm64/boot/dts/mediatek/mt6331.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
arch/arm64/boot/dts/mediatek/mt6331.dtsi +5 -5
@@ -6,12 +6,12 @@ #include <dt-bindings/input/input.h> &pwrap { - pmic: mt6331 { + pmic: pmic { compatible = "mediatek,mt6331"; interrupt-controller; #interrupt-cells = <2>; - mt6331regulator: mt6331regulator { + mt6331regulator: regulators { compatible = "mediatek,mt6331-regulator"; mt6331_vdvfs11_reg: buck-vdvfs11 {
@@ -258,7 +258,7 @@ mt6331_vrtc_reg: ldo-vrtc { }; mt6331_vdig18_reg: ldo-vdig18 { - regulator-name = "dvdd18_dig"; + regulator-name = "vdig18"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-ramp-delay = <0>;
@@ -266,11 +266,11 @@ mt6331_vdig18_reg: ldo-vdig18 { }; }; - mt6331rtc: mt6331rtc { + mt6331rtc: rtc { compatible = "mediatek,mt6331-rtc"; }; - mt6331keys: mt6331keys { + mt6331keys: keys { compatible = "mediatek,mt6331-keys"; power { linux,keycodes = <KEY_POWER>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 146/563 mmc: core: Fix variable shadowing in mmc_route_rpmb_frames()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Bean Huo <[email protected]>
[ Upstream commit 072755cca7e743c28a273fcb69b0e826109473d7 ]
Rename the inner 'frm' variable to 'resp_frm' in the write path of mmc_route_rpmb_frames() to avoid shadowing the outer 'frm' variable.
The function declares 'frm' at function scope pointing to the request frame, but then redeclares another 'frm' variable inside the write block pointing to the response frame. This shadowing makes the code confusing and error-prone.
Using 'resp_frm' for the response frame makes the distinction clear and improves code readability.
--- drivers/mmc/core/block.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/mmc/core/block.c +3 -3
@@ -2936,15 +2936,15 @@ static int mmc_route_rpmb_frames(struct device *dev, u8 *req,return -ENOMEM ;if (write) { -struct rpmb_frame *frm = (struct rpmb_frame *)resp; +struct rpmb_frame *resp_frm = (struct rpmb_frame *)resp;/* Send write request frame(s) */ set_idata (idata[0 ],MMC_WRITE_MULTIPLE_BLOCK ,1 |MMC_CMD23_ARG_REL_WR , req, req_len);/* Send result request frame */ -memset (frm,0 ,sizeof (*frm)); - frm->req_resp =cpu_to_be16 (RPMB_RESULT_READ ); +memset (resp_frm,0 ,sizeof (*resp_frm)); + resp_frm->req_resp =cpu_to_be16 (RPMB_RESULT_READ );set_idata (idata[1 ],MMC_WRITE_MULTIPLE_BLOCK ,1 , resp, resp_len);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 147/563 arm64: dts: mediatek: mt6795-xperia-m5: Fix mmc0 latch-ck value
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: AngeloGioacchino Del Regno <[email protected]>
[ Upstream commit 236681fb64102f25ed11df55999e6985c1bc2f7d ]
Change the latch-ck value from 0x14 to 4: as only bits [0-3] are actually used, the final value that gets written to the register field for DAT_LATCH_CK_SEL is just 0x4.
This also fixes dtbs_check warnings.
--- arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts +1 -1
@@ -212,7 +212,7 @@ proximity@48 { &mmc0 { /* eMMC controller */ - mediatek,latch-ck = <0x14>; /* hs400 */ + mediatek,latch-ck = <4>; /* hs400 */ mediatek,hs200-cmd-int-delay = <1>; mediatek,hs400-cmd-int-delay = <1>; mediatek,hs400-ds-dly3 = <0x1a>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 148/563 arm64: dts: mediatek: mt7986a: Fix PCI-Express T-PHY node address
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: AngeloGioacchino Del Regno <[email protected]>
[ Upstream commit 6b3fff78c13f1a2ba5a355a101fa1ca0a13054ad ]
The PCIe TPHY is under the soc bus, which provides MMIO, and all nodes under that must use the bus, otherwise those would clearly be out of place.
Add ranges to the PCIe tphy and assign the address to the main node to silence a dtbs_check warning, and fix the children to use the MMIO range of t-phy.
--- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/mediatek/mt7986a.dtsi +6 -6
@@ -428,16 +428,16 @@ pcie_intc: interrupt-controller { }; }; - pcie_phy: t-phy { + pcie_phy: t-phy@11c00000 { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; - ranges; - #address-cells = <2>; - #size-cells = <2>; + ranges = <0 0 0x11c00000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; status = "disabled"; - pcie_port: pcie-phy@11c00000 { - reg = <0 0x11c00000 0 0x20000>; + pcie_port: pcie-phy@0 { + reg = <0 0x20000>; clocks = <&clk40m>; clock-names = "ref"; #phy-cells = <1>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 149/563 arm64: dts: mediatek: mt8395-kontron-i1200: Fix MT6360 regulator nodes
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: AngeloGioacchino Del Regno <[email protected]>
[ Upstream commit 09a1e9c973973aff26e66a5673c19442d91b9e3d ]
All of the MT6360 regulator nodes were wrong and would not probe because the regulator names are supposed to be lower case, but they are upper case in this devicetree.
Change all nodes to be lower case to get working regulators.
--- .../mediatek/mt8395-kontron-3-5-sbc-i1200.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts +8 -8
@@ -352,7 +352,7 @@ regulator { LDO_VIN2-supply = <&vsys>; LDO_VIN3-supply = <&vsys>; - mt6360_buck1: BUCK1 { + mt6360_buck1: buck1 { regulator-name = "emi_vdd2"; regulator-min-microvolt = <600000>; regulator-max-microvolt = <1800000>;
@@ -362,7 +362,7 @@ MT6360_OPMODE_LP regulator-always-on; }; - mt6360_buck2: BUCK2 { + mt6360_buck2: buck2 { regulator-name = "emi_vddq"; regulator-min-microvolt = <300000>; regulator-max-microvolt = <1300000>;
@@ -372,7 +372,7 @@ MT6360_OPMODE_LP regulator-always-on; }; - mt6360_ldo1: LDO1 { + mt6360_ldo1: ldo1 { regulator-name = "mt6360_ldo1"; /* Test point */ regulator-min-microvolt = <1200000>; regulator-max-microvolt = <3600000>;
@@ -380,7 +380,7 @@ mt6360_ldo1: LDO1 { MT6360_OPMODE_LP>; }; - mt6360_ldo2: LDO2 { + mt6360_ldo2: ldo2 { regulator-name = "panel1_p1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@@ -388,7 +388,7 @@ mt6360_ldo2: LDO2 { MT6360_OPMODE_LP>; }; - mt6360_ldo3: LDO3 { + mt6360_ldo3: ldo3 { regulator-name = "vmc_pmu"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>;
@@ -396,7 +396,7 @@ mt6360_ldo3: LDO3 { MT6360_OPMODE_LP>; }; - mt6360_ldo5: LDO5 { + mt6360_ldo5: ldo5 { regulator-name = "vmch_pmu"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
@@ -404,7 +404,7 @@ mt6360_ldo5: LDO5 { MT6360_OPMODE_LP>; }; - mt6360_ldo6: LDO6 { + mt6360_ldo6: ldo6 { regulator-name = "mt6360_ldo6"; /* Test point */ regulator-min-microvolt = <500000>; regulator-max-microvolt = <2100000>;
@@ -412,7 +412,7 @@ mt6360_ldo6: LDO6 { MT6360_OPMODE_LP>; }; - mt6360_ldo7: LDO7 { + mt6360_ldo7: ldo7 { regulator-name = "emi_vmddr_en"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 150/563 arm64: dts: mediatek: mt8516-pumpkin: Fix machine compatible
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: AngeloGioacchino Del Regno <[email protected]>
[ Upstream commit ffe6a5d1dd4d4d8af0779526cf4e40522647b25f ]
This devicetree contained only the SoC compatible but lacked the machine specific one: add a "mediatek,mt8516-pumpkin" compatible to the list to fix dtbs_check warnings.
--- arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/mediatek/mt8516-pumpkin.dts +1 -1
@@ -11,7 +11,7 @@ / { model = "Pumpkin MT8516"; - compatible = "mediatek,mt8516"; + compatible = "mediatek,mt8516-pumpkin", "mediatek,mt8516"; memory@40000000 { device_type = "memory";
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 151/563 arm64: dts: allwinner: a527: cubie-a5e: Add LEDs
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen-Yu Tsai <[email protected]>
[ Upstream commit 4184f0190792aea06553af963741a24cc9b47689 ]
The Radxa Cubie A5E has a 3-color LED. The green and blue LEDs are wired to GPIO pins on the SoC, and the green one is lit by default to serve as a power indicator. The red LED is wired to the M.2 slot.
Add device nodes for the green and blue LEDs.
A default "heartbeat" trigger is set for the green power LED, though in practice it might be better if it were inverted, i.e. lit most of the time.
Stable-dep-of: 9f01e1e14e71 ("arm64: dts: allwinner: a527: cubie-a5e: Drop external 32.768 KHz crystal")
--- .../dts/allwinner/sun55i-a527-cubie-a5e.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts +19 -0
@@ -6,6 +6,7 @@ #include "sun55i-a523.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> / { model = "Radxa Cubie A5E";
@@ -27,6 +28,24 @@ ext_osc32k: ext-osc32k-clk { clock-output-names = "ext_osc32k"; }; + leds { + compatible = "gpio-leds"; + + power-led { + function = LED_FUNCTION_POWER; + color = <LED_COLOR_ID_GREEN>; + gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */ + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + use-led { + function = LED_FUNCTION_ACTIVITY; + color = <LED_COLOR_ID_BLUE>; + gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */ + }; + }; + reg_vcc5v: vcc5v { /* board wide 5V supply from the USB-C connector */ compatible = "regulator-fixed";
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 152/563 arm64: dts: allwinner: a527: cubie-a5e: Drop external 32.768 KHz crystal
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen-Yu Tsai <[email protected]>
[ Upstream commit 9f01e1e14e71defefcb4d6823b8476a15f3cf04a ]
The Radxa Cubie A5E has empty pads for a 32.768 KHz crystal, but it is left unpopulated, as per the schematics and seen on board images. A dead give away is the RTC's LOSC auto switch register showing the external OSC to be abnormal.
Drop the external crystal from the device tree. It was not referenced anyway.
--- arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts | 7 ------- 1 file changed, 7 deletions(-)
arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts +0 -7
@@ -21,13 +21,6 @@ chosen { stdout-path = "serial0:115200n8"; }; - ext_osc32k: ext-osc32k-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "ext_osc32k"; - }; - leds { compatible = "gpio-leds";
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 153/563 arm64: dts: allwinner: t527: avaota-a1: hook up external 32k crystal
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen-Yu Tsai <[email protected]>
[ Upstream commit 3d5e1ba00af8dd34ae1e573c2c07e00b5ec65267 ]
When the board was added, its external 32.768 KHz crystal was described but not hooked up correctly. This meant the device had to fall back to the SoC's internal oscillator or divide a 32 KHz clock from the main oscillator, neither of which are accurate for the RTC. As a result the RTC clock will drift badly.
Hook the crystal up to the RTC block and request the correct clock rate.
--- arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts | 8 ++++++++ 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts +8 -0
@@ -309,6 +309,14 @@ &r_pio { vcc-pm-supply = <®_aldo3>; }; +&rtc { + clocks = <&r_ccu CLK_BUS_R_RTC>, <&osc24M>, + <&r_ccu CLK_R_AHB>, <&ext_osc32k>; + clock-names = "bus", "hosc", "ahb", "ext-osc32k"; + assigned-clocks = <&rtc CLK_OSC32K>; + assigned-clock-rates = <32768>; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 154/563 arm64: dts: allwinner: t527: orangepi-4a: hook up external 32k crystal
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chen-Yu Tsai <[email protected]>
[ Upstream commit bd1ce7ef6aef4ee7349eb3124166e712693650ce ]
When the board was added, its external 32.768 KHz crystal was described but not hooked up correctly. This meant the device had to fall back to the SoC's internal oscillator or divide a 32 KHz clock from the main oscillator, neither of which are accurate for the RTC. As a result the RTC clock will drift badly.
Hook the crystal up to the RTC block and request the correct clock rate.
--- arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts | 8 ++++++++ 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts +8 -0
@@ -346,6 +346,14 @@ &r_pio { vcc-pm-supply = <®_bldo2>; }; +&rtc { + clocks = <&r_ccu CLK_BUS_R_RTC>, <&osc24M>, + <&r_ccu CLK_R_AHB>, <&ext_osc32k>; + clock-names = "bus", "hosc", "ahb", "ext-osc32k"; + assigned-clocks = <&rtc CLK_OSC32K>; + assigned-clock-rates = <32768>; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 155/563 pwm: tiehrpwm: Dont drop runtime PM reference in .free()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Uwe Kleine-König <[email protected]>
[ Upstream commit 21a5e91fda50fc662ce1a12bd0aae9d103455b43 ]
The pwm driver calls pm_runtime_get_sync() when the hardware becomes enabled and pm_runtime_put_sync() when it becomes disabled. The PWM's state is kept when a consumer goes away, so the call to pm_runtime_put_sync() in the .free() callback is unbalanced resulting in a non-functional device and a reference underlow for the second consumer.
The easiest fix for that issue is to just not drop the runtime PM reference in .free(), so do that.
--- drivers/pwm/pwm-tiehrpwm.c | 5 ----- 1 file changed, 5 deletions(-)
drivers/pwm/pwm-tiehrpwm.c +0 -5
@@ -391,11 +391,6 @@ static void ehrpwm_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) {struct ehrpwm_pwm_chip *pc =to_ehrpwm_pwm_chip (chip); -if (pwm_is_enabled (pwm)) { -dev_warn (pwmchip_parent (chip),"Removing PWM device without disabling\n" ); -pm_runtime_put_sync (pwmchip_parent (chip)); - } -/* set period value to zero on free */ pc->period_cycles[pwm->hwpwm] =0 ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 156/563 pwm: tiehrpwm: Make code comment in .free() more useful
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Uwe Kleine-König <[email protected]>
[ Upstream commit 878dbfc12cc52b17d79d205560c0fafcf5332b13 ]
Instead of explaining trivia to everyone who can read C describe the higher-level effect of setting pc->period_cycles[pwm->hwpwm] to zero.
--- drivers/pwm/pwm-tiehrpwm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pwm/pwm-tiehrpwm.c +1 -1
@@ -391,7 +391,7 @@ static void ehrpwm_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) {struct ehrpwm_pwm_chip *pc =to_ehrpwm_pwm_chip (chip); -/* set period value to zero on free */ +/* Don't let a pwm without consumer block requests to the other channel */ pc->period_cycles[pwm->hwpwm] =0 ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 157/563 pwm: tiehrpwm: Fix various off-by-one errors in duty-cycle calculation
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Uwe Kleine-König <[email protected]>
[ Upstream commit bc7ce5bfc504eea9eac0eb0215017b9fcfc62c59 ]
In Up-Count Mode the timer is reset to zero one tick after it reaches TBPRD, so the period length is (TBPRD + 1) * T_TBCLK. This matches both the documentation and measurements. So the value written to the TBPRD has to be one less than the calculated period_cycles value.
A complication here is that for a 100% relative duty-cycle the value written to the CMPx register has to be TBPRD + 1 which might overflow if TBPRD is 0xffff. To handle that the calculation of the AQCTLx register has to be moved to ehrpwm_pwm_config() and the edge at CTR = CMPx has to be skipped.
Additionally the AQCTL_PRD register field has to be 0 because that defines the hardware's action when the maximal counter value is reached, which is (as above) one clock tick before the period's end. The period start edge has to happen when the counter is reset and so is defined in the AQCTL_ZRO field.
--- drivers/pwm/pwm-tiehrpwm.c | 143 +++++++++++++++---------------------- 1 file changed, 58 insertions(+), 85 deletions(-)
drivers/pwm/pwm-tiehrpwm.c +58 -85
@@ -36,7 +36,7 @@#define CLKDIV_MAX 7#define HSPCLKDIV_MAX 7 -#define PERIOD_MAX 0xFFFF +#define PERIOD_MAX 0x10000/* compare module registers */ #define CMPA 0x12
@@ -65,14 +65,10 @@#define AQCTL_ZRO_FRCHIGH BIT(1)#define AQCTL_ZRO_FRCTOGGLE (BIT(1) | BIT(0)) -#define AQCTL_CHANA_POLNORMAL (AQCTL_CAU_FRCLOW | AQCTL_PRD_FRCHIGH | \ - AQCTL_ZRO_FRCHIGH) -#define AQCTL_CHANA_POLINVERSED (AQCTL_CAU_FRCHIGH | AQCTL_PRD_FRCLOW | \ - AQCTL_ZRO_FRCLOW) -#define AQCTL_CHANB_POLNORMAL (AQCTL_CBU_FRCLOW | AQCTL_PRD_FRCHIGH | \ - AQCTL_ZRO_FRCHIGH) -#define AQCTL_CHANB_POLINVERSED (AQCTL_CBU_FRCHIGH | AQCTL_PRD_FRCLOW | \ - AQCTL_ZRO_FRCLOW) +#define AQCTL_CHANA_POLNORMAL (AQCTL_CAU_FRCLOW | AQCTL_ZRO_FRCHIGH) +#define AQCTL_CHANA_POLINVERSED (AQCTL_CAU_FRCHIGH | AQCTL_ZRO_FRCLOW) +#define AQCTL_CHANB_POLNORMAL (AQCTL_CBU_FRCLOW | AQCTL_ZRO_FRCHIGH) +#define AQCTL_CHANB_POLINVERSED (AQCTL_CBU_FRCHIGH | AQCTL_ZRO_FRCLOW)#define AQSFRC_RLDCSF_MASK (BIT(7) | BIT(6))#define AQSFRC_RLDCSF_ZRO 0
@@ -108,7 +104,6 @@ struct ehrpwm_pwm_chip {unsigned long clk_rate;void __iomem *mmio_base;unsigned long period_cycles[NUM_PWM_CHANNEL ]; -enum pwm_polarity polarity[NUM_PWM_CHANNEL ];struct clk *tbclk;struct ehrpwm_context ctx; };
@@ -177,51 +172,20 @@ static int set_prescale_div(unsigned long rqst_prescaler, u16 *prescale_div,return 1 ; } -static void configure_polarity (struct ehrpwm_pwm_chip *pc,int chan) -{ -u16 aqctl_val, aqctl_mask; -unsigned int aqctl_reg; - -/* -* Configure PWM output to HIGH/LOW level on counter -* reaches compare register value and LOW/HIGH level -* on counter value reaches period register value and -* zero value on counter -*/ -if (chan ==1 ) { - aqctl_reg =AQCTLB ; - aqctl_mask =AQCTL_CBU_MASK ; - -if (pc->polarity[chan] ==PWM_POLARITY_INVERSED ) - aqctl_val =AQCTL_CHANB_POLINVERSED ; -else - aqctl_val =AQCTL_CHANB_POLNORMAL ; - }else { - aqctl_reg =AQCTLA ; - aqctl_mask =AQCTL_CAU_MASK ; - -if (pc->polarity[chan] ==PWM_POLARITY_INVERSED ) - aqctl_val =AQCTL_CHANA_POLINVERSED ; -else - aqctl_val =AQCTL_CHANA_POLNORMAL ; - } - - aqctl_mask |=AQCTL_PRD_MASK |AQCTL_ZRO_MASK ; -ehrpwm_modify (pc->mmio_base, aqctl_reg, aqctl_mask, aqctl_val); -} -/* * period_ns = 10^9 * (ps_divval * period_cycles) / PWM_CLK_RATE * duty_ns = 10^9 * (ps_divval * duty_cycles) / PWM_CLK_RATE */ static int ehrpwm_pwm_config (struct pwm_chip *chip,struct pwm_device *pwm, -u64 duty_ns,u64 period_ns) +u64 duty_ns,u64 period_ns,enum pwm_polarity polarity) {struct ehrpwm_pwm_chip *pc =to_ehrpwm_pwm_chip (chip);u32 period_cycles, duty_cycles;u16 ps_divval, tb_divval;unsigned int i, cmp_reg;unsigned long long c; +u16 aqctl_val, aqctl_mask; +unsigned int aqctl_reg;if (period_ns >NSEC_PER_SEC )return -ERANGE ;
@@ -231,15 +195,10 @@ static int ehrpwm_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,do_div (c,NSEC_PER_SEC ); period_cycles = (unsigned long )c; -if (period_cycles <1 ) { - period_cycles =1 ; - duty_cycles =1 ; - }else { - c = pc->clk_rate; - c = c * duty_ns; -do_div (c,NSEC_PER_SEC ); - duty_cycles = (unsigned long )c; - } + c = pc->clk_rate; + c = c * duty_ns; +do_div (c,NSEC_PER_SEC ); + duty_cycles = (unsigned long )c;/* * Period values should be same for multiple PWM channels as IP uses
@@ -271,46 +230,67 @@ static int ehrpwm_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,return -EINVAL ; } -pm_runtime_get_sync (pwmchip_parent (chip)); - -/* Update clock prescaler values */ -ehrpwm_modify (pc->mmio_base,TBCTL ,TBCTL_CLKDIV_MASK , tb_divval); -/* Update period & duty cycle with presacler division */ period_cycles = period_cycles / ps_divval; duty_cycles = duty_cycles / ps_divval; -/* Configure shadow loading on Period register */ -ehrpwm_modify (pc->mmio_base,TBCTL ,TBCTL_PRDLD_MASK ,TBCTL_PRDLD_SHDW ); +if (period_cycles <1 ) + period_cycles =1 ; -ehrpwm_write (pc->mmio_base,TBPRD , period_cycles); +pm_runtime_get_sync (pwmchip_parent (chip)); -/* Configure ehrpwm counter for up-count mode */ -ehrpwm_modify (pc->mmio_base,TBCTL ,TBCTL_CTRMODE_MASK , -TBCTL_CTRMODE_UP ); +/* Update clock prescaler values */ +ehrpwm_modify (pc->mmio_base,TBCTL ,TBCTL_CLKDIV_MASK , tb_divval); -if (pwm->hwpwm ==1 ) +if (pwm->hwpwm ==1 ) {/* Channel 1 configured with compare B register */ cmp_reg =CMPB ; -else + + aqctl_reg =AQCTLB ; + aqctl_mask =AQCTL_CBU_MASK ; + +if (polarity ==PWM_POLARITY_INVERSED ) + aqctl_val =AQCTL_CHANB_POLINVERSED ; +else + aqctl_val =AQCTL_CHANB_POLNORMAL ; + +/* if duty_cycle is big, don't toggle on CBU */ +if (duty_cycles > period_cycles) + aqctl_val &= ~AQCTL_CBU_MASK ; + + }else {/* Channel 0 configured with compare A register */ cmp_reg =CMPA ; -ehrpwm_write (pc->mmio_base, cmp_reg, duty_cycles); + aqctl_reg =AQCTLA ; + aqctl_mask =AQCTL_CAU_MASK ; -pm_runtime_put_sync (pwmchip_parent (chip)); +if (polarity ==PWM_POLARITY_INVERSED ) + aqctl_val =AQCTL_CHANA_POLINVERSED ; +else + aqctl_val =AQCTL_CHANA_POLNORMAL ; -return 0 ; -} +/* if duty_cycle is big, don't toggle on CAU */ +if (duty_cycles > period_cycles) + aqctl_val &= ~AQCTL_CAU_MASK ; + } -static int ehrpwm_pwm_set_polarity (struct pwm_chip *chip, -struct pwm_device *pwm, -enum pwm_polarity polarity) -{ -struct ehrpwm_pwm_chip *pc =to_ehrpwm_pwm_chip (chip); + aqctl_mask |=AQCTL_PRD_MASK |AQCTL_ZRO_MASK ; +ehrpwm_modify (pc->mmio_base, aqctl_reg, aqctl_mask, aqctl_val); + +/* Configure shadow loading on Period register */ +ehrpwm_modify (pc->mmio_base,TBCTL ,TBCTL_PRDLD_MASK ,TBCTL_PRDLD_SHDW ); + +ehrpwm_write (pc->mmio_base,TBPRD , period_cycles -1 ); + +/* Configure ehrpwm counter for up-count mode */ +ehrpwm_modify (pc->mmio_base,TBCTL ,TBCTL_CTRMODE_MASK , +TBCTL_CTRMODE_UP ); + +if (!(duty_cycles > period_cycles)) +ehrpwm_write (pc->mmio_base, cmp_reg, duty_cycles); -/* Configuration of polarity in hardware delayed, do at enable */ - pc->polarity[pwm->hwpwm] = polarity; +pm_runtime_put_sync (pwmchip_parent (chip));return 0 ; }
@@ -339,9 +319,6 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)ehrpwm_modify (pc->mmio_base,AQCSFRC , aqcsfrc_mask, aqcsfrc_val); -/* Channels polarity can be configured from action qualifier module */ -configure_polarity (pc, pwm->hwpwm); -/* Enable TBCLK */ ret =clk_enable (pc->tbclk);if (ret) {
@@ -406,10 +383,6 @@ static int ehrpwm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,ehrpwm_pwm_disable (chip, pwm); enabled = false; } - - err =ehrpwm_pwm_set_polarity (chip, pwm, state->polarity); -if (err) -return err; }if (!state->enabled) {
@@ -418,7 +391,7 @@ static int ehrpwm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,return 0 ; } - err =ehrpwm_pwm_config (chip, pwm, state->duty_cycle, state->period); + err =ehrpwm_pwm_config (chip, pwm, state->duty_cycle, state->period, state->polarity);if (err)return err;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 158/563 pwm: tiehrpwm: Fix corner case in clock divisor calculation
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Uwe Kleine-König <[email protected]>
[ Upstream commit 00f83f0e07e44e2f1fb94b223e77ab7b18ee2d7d ]
The function set_prescale_div() is responsible for calculating the clock divisor settings such that the input clock rate is divided down such that the required period length is at most 0x10000 clock ticks. If period_cycles is an integer multiple of 0x10000, the divisor period_cycles / 0x10000 is good enough. So round up in the calculation of the required divisor and compare it using >= instead of >.
--- drivers/pwm/pwm-tiehrpwm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/pwm/pwm-tiehrpwm.c +2 -2
@@ -161,7 +161,7 @@ static int set_prescale_div(unsigned long rqst_prescaler, u16 *prescale_div, *prescale_div = (1 << clkdiv) * (hspclkdiv ? (hspclkdiv *2 ) :1 ); -if (*prescale_div > rqst_prescaler) { +if (*prescale_div >= rqst_prescaler) { *tb_clk_div = (clkdiv <<TBCTL_CLKDIV_SHIFT ) | (hspclkdiv <<TBCTL_HSPCLKDIV_SHIFT );return 0 ;
@@ -224,7 +224,7 @@ static int ehrpwm_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, pc->period_cycles[pwm->hwpwm] = period_cycles;/* Configure clock prescaler to support Low frequency PWM wave */ -if (set_prescale_div (period_cycles/PERIOD_MAX , &ps_divval, +if (set_prescale_div (DIV_ROUND_UP (period_cycles,PERIOD_MAX ), &ps_divval, &tb_divval)) {dev_err (pwmchip_parent (chip),"Unsupported values\n" );return -EINVAL ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 159/563 ACPICA: Apply ACPI_NONSTRING
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Ahmed Salem <[email protected]>
[ Upstream commit 12fd607554c4efb4856959f0e5823f541bc0e701 ]
Add ACPI_NONSTRING for destination char arrays without a terminating NUL character.
This is a follow-up to commit 2b82118845e0 ("ACPICA: Apply ACPI_NONSTRING") where a few more destination arrays were missed.
--- include/acpi/actbl.h | 2 +- tools/power/acpi/os_specific/service_layers/oslinuxtbl.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-)
include/acpi/actbl.h +1 -1
@@ -73,7 +73,7 @@ struct acpi_table_header { char oem_id[ACPI_OEM_ID_SIZE] ACPI_NONSTRING; /* ASCII OEM identification */ char oem_table_id[ACPI_OEM_TABLE_ID_SIZE] ACPI_NONSTRING; /* ASCII OEM table identification */u32 oem_revision;/* OEM revision number */ -char asl_compiler_id[ACPI_NAMESEG_SIZE ];/* ASCII ASL compiler vendor ID */ + char asl_compiler_id[ACPI_NAMESEG_SIZE] ACPI_NONSTRING; /* ASCII ASL compiler vendor ID */u32 asl_compiler_revision;/* ASL compiler version */ };
tools/power/acpi/os_specific/service_layers/oslinuxtbl.c +2 -2
@@ -995,7 +995,7 @@ static acpi_status osl_list_customized_tables(char *directory) {void *table_dir;u32 instance; -char temp_name[ACPI_NAMESEG_SIZE ]; + char temp_name[ACPI_NAMESEG_SIZE] ACPI_NONSTRING;char *filename;acpi_status status =AE_OK ;
@@ -1312,7 +1312,7 @@ osl_get_customized_table(char *pathname, {void *table_dir;u32 current_instance =0 ; -char temp_name[ACPI_NAMESEG_SIZE ]; + char temp_name[ACPI_NAMESEG_SIZE] ACPI_NONSTRING;char table_filename[PATH_MAX ];char *filename;acpi_status status;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 160/563 ACPICA: Fix largest possible resource descriptor index
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Antipov <[email protected]>
[ Upstream commit 8ca944fea4d6d9019e01f2d6f6e766f315a9d73f ]
ACPI_RESOURCE_NAME_LARGE_MAX should be equal to the last actually used resource descriptor index (ACPI_RESOURCE_NAME_CLOCK_INPUT).
Otherwise 'resource_index' in 'acpi_ut_validate_resource()' may be clamped incorrectly and resulting value may issue an out-of-bounds access for 'acpi_gbl_resource_types' array. Compile tested only.
--- drivers/acpi/acpica/aclocal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/acpi/acpica/aclocal.h +1 -1
@@ -1141,7 +1141,7 @@ struct acpi_port_info {#define ACPI_RESOURCE_NAME_PIN_GROUP_FUNCTION 0x91#define ACPI_RESOURCE_NAME_PIN_GROUP_CONFIG 0x92#define ACPI_RESOURCE_NAME_CLOCK_INPUT 0x93 -#define ACPI_RESOURCE_NAME_LARGE_MAX 0x94 +#define ACPI_RESOURCE_NAME_LARGE_MAX 0x93/***************************************************************************** *
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 161/563 riscv, bpf: Sign extend struct ops return values properly
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Hengqi Chen <[email protected]>
[ Upstream commit fd2e08128944a7679e753f920e9eda72057e427c ]
The ns_bpf_qdisc selftest triggers a kernel panic:
Unable to handle kernel paging request at virtual address ffffffffa38dbf58
Current test_progs pgtable: 4K pagesize, 57-bit VAs, pgdp=0x00000001109cc000
[ffffffffa38dbf58] pgd=000000011fffd801, p4d=000000011fffd401, pud=000000011fffd001, pmd=0000000000000000
Oops [#1]
Modules linked in: bpf_testmod(OE) xt_conntrack nls_iso8859_1 [...] [last unloaded: bpf_testmod(OE)]
CPU: 1 UID: 0 PID: 23584 Comm: test_progs Tainted: G W OE 6.17.0-rc1-g2465bb83e0b4 #1 NONE
Tainted: [W]=WARN, [O]=OOT_MODULE, [E]=UNSIGNED_MODULE
Hardware name: Unknown Unknown Product/Unknown Product, BIOS 2024.01+dfsg-1ubuntu5.1 01/01/2024
epc : __qdisc_run+0x82/0x6f0
ra : __qdisc_run+0x6e/0x6f0
epc : ffffffff80bd5c7a ra : ffffffff80bd5c66 sp : ff2000000eecb550
gp : ffffffff82472098 tp : ff60000096895940 t0 : ffffffff8001f180
t1 : ffffffff801e1664 t2 : 0000000000000000 s0 : ff2000000eecb5d0
s1 : ff60000093a6a600 a0 : ffffffffa38dbee8 a1 : 0000000000000001
a2 : ff2000000eecb510 a3 : 0000000000000001 a4 : 0000000000000000
a5 : 0000000000000010 a6 : 0000000000000000 a7 : 0000000000735049
s2 : ffffffffa38dbee8 s3 : 0000000000000040 s4 : ff6000008bcda000
s5 : 0000000000000008 s6 : ff60000093a6a680 s7 : ff60000093a6a6f0
s8 : ff60000093a6a6ac s9 : ff60000093140000 s10: 0000000000000000
s11: ff2000000eecb9d0 t3 : 0000000000000000 t4 : 0000000000ff0000
t5 : 0000000000000000 t6 : ff60000093a6a8b6
status: 0000000200000120 badaddr: ffffffffa38dbf58 cause: 000000000000000d
[<ffffffff80bd5c7a>] __qdisc_run+0x82/0x6f0
[<ffffffff80b6fe58>] __dev_queue_xmit+0x4c0/0x1128
[<ffffffff80b80ae0>] neigh_resolve_output+0xd0/0x170
[<ffffffff80d2daf6>] ip6_finish_output2+0x226/0x6c8
[<ffffffff80d31254>] ip6_finish_output+0x10c/0x2a0
[<ffffffff80d31446>] ip6_output+0x5e/0x178
[<ffffffff80d2e232>] ip6_xmit+0x29a/0x608
[<ffffffff80d6f4c6>] inet6_csk_xmit+0xe6/0x140
[<ffffffff80c985e4>] __tcp_transmit_skb+0x45c/0xaa8
[<ffffffff80c995fe>] tcp_connect+0x9ce/0xd10
[<ffffffff80d66524>] tcp_v6_connect+0x4ac/0x5e8
[<ffffffff80cc19b8>] __inet_stream_connect+0xd8/0x318
[<ffffffff80cc1c36>] inet_stream_connect+0x3e/0x68
[<ffffffff80b42b20>] __sys_connect_file+0x50/0x88
[<ffffffff80b42bee>] __sys_connect+0x96/0xc8
[<ffffffff80b42c40>] __riscv_sys_connect+0x20/0x30
[<ffffffff80e5bcae>] do_trap_ecall_u+0x256/0x378
[<ffffffff80e69af2>] handle_exception+0x14a/0x156
Code: 892a 0363 1205 489c 8bc1 c7e5 2d03 084a 2703 080a (2783) 0709
---[ end trace 0000000000000000 ]---The bpf_fifo_dequeue prog returns a skb which is a pointer. The pointer is treated as a 32bit value and sign extend to 64bit in epilogue. This behavior is right for most bpf prog types but wrong for struct ops which requires RISC-V ABI.
So let's sign extend struct ops return values according to the function model and RISC-V ABI([0]).
[0]: https://riscv.org/wp-content/uploads/2024/12/riscv-calling.pdf
--- arch/riscv/net/bpf_jit_comp64.c | 42 ++++++++++++++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-)
arch/riscv/net/bpf_jit_comp64.c +41 -1
@@ -765,6 +765,39 @@ static int emit_atomic_rmw(u8 rd, u8 rs, const struct bpf_insn *insn,return 0 ; } +/* +* Sign-extend the register if necessary +*/ +static int sign_extend (u8 rd,u8 rs,u8 sz,bool sign,struct rv_jit_context *ctx) +{ +if (!sign && (sz ==1 || sz ==2 )) { +if (rd != rs) +emit_mv (rd, rs, ctx); +return 0 ; + } + +switch (sz) { +case 1 : +emit_sextb (rd, rs, ctx); +break ; +case 2 : +emit_sexth (rd, rs, ctx); +break ; +case 4 : +emit_sextw (rd, rs, ctx); +break ; +case 8 : +if (rd != rs) +emit_mv (rd, rs, ctx); +break ; +default : +pr_err ("bpf-jit: invalid size %d for sign_extend\n" , sz); +return -EINVAL ; + } + +return 0 ; +} +#define BPF_FIXUP_OFFSET_MASK GENMASK(26, 0)#define BPF_FIXUP_REG_MASK GENMASK(31, 27)#define REG_DONT_CLEAR_MARKER 0/* RV_REG_ZERO unused in pt_regmap */
@@ -1226,8 +1259,15 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im,restore_args (min_t (int, nr_arg_slots,RV_MAX_REG_ARGS ), args_off, ctx);if (save_ret) { -emit_ld (RV_REG_A0 , -retval_off,RV_REG_FP , ctx);emit_ld (regmap[BPF_REG_0 ], -(retval_off -8 ),RV_REG_FP , ctx); +if (is_struct_ops) { + ret =sign_extend (RV_REG_A0 , regmap[BPF_REG_0 ], m->ret_size, + m->ret_flags &BTF_FMODEL_SIGNED_ARG , ctx); +if (ret) + goto out; + }else { +emit_ld (RV_REG_A0 , -retval_off,RV_REG_FP , ctx); + } }emit_ld (RV_REG_S1 , -sreg_off,RV_REG_FP , ctx);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 162/563 nvme-auth: update bi_directional flag
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Martin George <[email protected]>
[ Upstream commit 6ff1bd7846680dfdaafc68d7fcd0ab7e3bcbc4a0 ]
While setting chap->s2 to zero as part of secure channel concatenation, the host missed out to disable the bi_directional flag to indicate that controller authentication is not requested. Fix the same.
--- drivers/nvme/host/auth.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
drivers/nvme/host/auth.c +3 -2
@@ -331,9 +331,10 @@ static int nvme_auth_set_dhchap_reply_data(struct nvme_ctrl *ctrl, }else {memset (chap->c2,0 , chap->hash_len); } -if (ctrl->opts->concat) +if (ctrl->opts->concat) { chap->s2 =0 ; -else + chap->bi_directional = false; + }else chap->s2 =nvme_auth_get_seqnum (); data->seqnum =cpu_to_le32 (chap->s2);if (chap->host_key_len) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 163/563 nvmet-fc: move lsop put work to nvmet_fc_ls_req_op
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Daniel Wagner <[email protected]>
[ Upstream commit db5a5406fb7e5337a074385c7a3e53c77f2c1bd3 ]
It’s possible for more than one async command to be in flight from __nvmet_fc_send_ls_req. For each command, a tgtport reference is taken.
In the current code, only one put work item is queued at a time, which results in a leaked reference.
To fix this, move the work item to the nvmet_fc_ls_req_op struct, which already tracks all resources related to the command.
--- drivers/nvme/target/fc.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-)
drivers/nvme/target/fc.c +9 -10
@@ -54,6 +54,8 @@ struct nvmet_fc_ls_req_op { /* for an LS RQST XMT */int ls_error;struct list_head lsreq_list;/* tgtport->ls_req_list */ bool req_queued; + +struct work_struct put_work; };
@@ -111,8 +113,6 @@ struct nvmet_fc_tgtport {struct nvmet_fc_port_entry *pe;struct kref ref;u32 max_sg_cnt; - -struct work_struct put_work; };struct nvmet_fc_port_entry {
@@ -235,12 +235,13 @@ static int nvmet_fc_tgt_a_get(struct nvmet_fc_tgt_assoc *assoc);static void nvmet_fc_tgt_q_put (struct nvmet_fc_tgt_queue *queue);static int nvmet_fc_tgt_q_get (struct nvmet_fc_tgt_queue *queue);static void nvmet_fc_tgtport_put (struct nvmet_fc_tgtport *tgtport); -static void nvmet_fc_put_tgtport_work (struct work_struct *work) +static void nvmet_fc_put_lsop_work (struct work_struct *work) { -struct nvmet_fc_tgtport *tgtport = - container_of(work, struct nvmet_fc_tgtport, put_work); +struct nvmet_fc_ls_req_op *lsop = + container_of(work, struct nvmet_fc_ls_req_op, put_work); -nvmet_fc_tgtport_put (tgtport); +nvmet_fc_tgtport_put (lsop->tgtport); +kfree (lsop); }static int nvmet_fc_tgtport_get (struct nvmet_fc_tgtport *tgtport); static void nvmet_fc_handle_fcp_rqst(struct nvmet_fc_tgtport *tgtport,
@@ -367,7 +368,7 @@ __nvmet_fc_finish_ls_req(struct nvmet_fc_ls_req_op *lsop) DMA_BIDIRECTIONAL); out_putwork: -queue_work (nvmet_wq, &tgtport->put_work); +queue_work (nvmet_wq, &lsop->put_work); } static int
@@ -388,6 +389,7 @@ __nvmet_fc_send_ls_req(struct nvmet_fc_tgtport *tgtport, lsreq->done = done; lsop->req_queued = false;INIT_LIST_HEAD (&lsop->lsreq_list); +INIT_WORK (&lsop->put_work, nvmet_fc_put_lsop_work); lsreq->rqstdma = fc_dma_map_single(tgtport->dev, lsreq->rqstaddr, lsreq->rqstlen + lsreq->rsplen,
@@ -447,8 +449,6 @@ nvmet_fc_disconnect_assoc_done(struct nvmefc_ls_req *lsreq, int status)__nvmet_fc_finish_ls_req (lsop);/* fc-nvme target doesn't care about success or failure of cmd */ - -kfree (lsop); }/*
@@ -1410,7 +1410,6 @@ nvmet_fc_register_targetport(struct nvmet_fc_port_info *pinfo,kref_init (&newrec->ref);ida_init (&newrec->assoc_cnt); newrec->max_sg_cnt = template->max_sgl_segments; -INIT_WORK (&newrec->put_work, nvmet_fc_put_tgtport_work); ret =nvmet_fc_alloc_ls_iodlist (newrec);if (ret) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 164/563 nvmet-fcloop: call done callback even when remote port is gone
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Daniel Wagner <[email protected]>
[ Upstream commit 10c165af35d225eb033f4edc7fcc699a8d2d533d ]
When the target port is gone, it's not possible to access any of the request resources. The function should just silently drop the response. The comment is misleading in this regard.
Though it's still necessary to call the driver via the ->done callback so the driver is able to release all resources.
--- drivers/nvme/target/fcloop.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
drivers/nvme/target/fcloop.c +5 -3
@@ -496,13 +496,15 @@ fcloop_t2h_xmt_ls_rsp(struct nvme_fc_local_port *localport,if (!targetport) {/* * The target port is gone. The target doesn't expect any -* response anymore and the ->done call is not valid -* because the resources have been freed by -* nvmet_fc_free_pending_reqs. +* response anymore and thus lsreq can't be accessed anymore. * * We end up here from delete association exchange: * nvmet_fc_xmt_disconnect_assoc sends an async request. +* +* Return success because this is what LLDDs do; silently +* drop the response. */ + lsrsp->done (lsrsp);kmem_cache_free (lsreq_cache, tls_req);return 0 ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 165/563 nvme-tcp: send only permitted commands for secure concat
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Martin George <[email protected]>
[ Upstream commit df4666a4908a6d883f628f93a3e6c80981332035 ]
In addition to sending permitted commands such as connect/auth over the initial unencrypted admin connection as part of secure channel concatenation, the host also sends commands such as Property Get and Identify on the same. This is a spec violation leading to secure concat failures. Fix this by ensuring these additional commands are avoided on this connection.
--- drivers/nvme/host/tcp.c | 3 +++ 1 file changed, 3 insertions(+)
drivers/nvme/host/tcp.c +3 -0
@@ -2250,6 +2250,9 @@ static int nvme_tcp_configure_admin_queue(struct nvme_ctrl *ctrl, bool new)if (error) goto out_cleanup_tagset; +if (ctrl->opts->concat && !ctrl->tls_pskid) +return 0 ; + error =nvme_enable_ctrl (ctrl);if (error) goto out_stop_queue;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 166/563 i3c: master: svc: Use manual response for IBI events
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Stanley Chu <[email protected]>
[ Upstream commit a7869b0a2540fd122eccec00ae7d4243166b0a60 ]
Driver wants to nack the IBI request when the target is not in the known address list. In below code, svc_i3c_master_nack_ibi() will cause undefined behavior when using AUTOIBI with auto response rule, because hw always auto ack the IBI request.
switch (ibitype) {
case SVC_I3C_MSTATUS_IBITYPE_IBI:
dev = svc_i3c_master_dev_from_addr(master, ibiaddr);
if (!dev || !is_events_enabled(master, SVC_I3C_EVENT_IBI))
svc_i3c_master_nack_ibi(master);
...
break;AutoIBI has another issue that the controller doesn't quit AutoIBI state after IBIWON polling timeout when there is a SDA glitch(high->low->high).
1. SDA high->low: raising an interrupt to execute IBI ISR
2. SDA low->high
3. Driver writes an AutoIBI request
4. AutoIBI process does not start because SDA is not low
5. IBIWON polling times out
6. Controller reamins in AutoIBI state and doesn't accept EmitStop request
Emitting broadcast address with IBIRESP_MANUAL avoids both issues.
--- drivers/i3c/master/svc-i3c-master.c | 30 ++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-)
drivers/i3c/master/svc-i3c-master.c +25 -5
@@ -517,9 +517,24 @@ static void svc_i3c_master_ibi_isr(struct svc_i3c_master *master)*/ writel (SVC_I3C_MINT_IBIWON , master->regs +SVC_I3C_MSTATUS ); -/* Acknowledge the incoming interrupt with the AUTOIBI mechanism */ -writel (SVC_I3C_MCTRL_REQUEST_AUTO_IBI | -SVC_I3C_MCTRL_IBIRESP_AUTO , +/* +* Write REQUEST_START_ADDR request to emit broadcast address for arbitration, +* instend of using AUTO_IBI. +* +* Using AutoIBI request may cause controller to remain in AutoIBI state when +* there is a glitch on SDA line (high->low->high). +* 1. SDA high->low, raising an interrupt to execute IBI isr. +* 2. SDA low->high. +* 3. IBI isr writes an AutoIBI request. +* 4. The controller will not start AutoIBI process because SDA is not low. +* 5. IBIWON polling times out. +* 6. Controller reamins in AutoIBI state and doesn't accept EmitStop request. +*/ +writel (SVC_I3C_MCTRL_REQUEST_START_ADDR | +SVC_I3C_MCTRL_TYPE_I3C | +SVC_I3C_MCTRL_IBIRESP_MANUAL | +SVC_I3C_MCTRL_DIR (SVC_I3C_MCTRL_DIR_WRITE ) | +SVC_I3C_MCTRL_ADDR (I3C_BROADCAST_ADDR ), master->regs +SVC_I3C_MCTRL );/* Wait for IBIWON, should take approximately 100us */
@@ -539,10 +554,15 @@ static void svc_i3c_master_ibi_isr(struct svc_i3c_master *master)switch (ibitype) {case SVC_I3C_MSTATUS_IBITYPE_IBI : dev =svc_i3c_master_dev_from_addr (master, ibiaddr); -if (!dev || !is_events_enabled (master,SVC_I3C_EVENT_IBI )) +if (!dev || !is_events_enabled (master,SVC_I3C_EVENT_IBI )) {svc_i3c_master_nack_ibi (master); -else + }else { +if (dev->info.bcr &I3C_BCR_IBI_PAYLOAD ) +svc_i3c_master_ack_ibi (master, true); +else +svc_i3c_master_ack_ibi (master, false);svc_i3c_master_handle_ibi (master, dev); + }break ;case SVC_I3C_MSTATUS_IBITYPE_HOT_JOIN :if (is_events_enabled (master,SVC_I3C_EVENT_HOTJOIN ))
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 167/563 i3c: master: svc: Recycle unused IBI slot
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Stanley Chu <[email protected]>
[ Upstream commit 3448a934ba6f803911ac084d05a2ffce507ea6c6 ]
In svc_i3c_master_handle_ibi(), an IBI slot is fetched from the pool to store the IBI payload. However, when an error condition is encountered, the function returns without recycling the IBI slot, resulting in an IBI slot leak.
--- drivers/i3c/master/svc-i3c-master.c | 1 + 1 file changed, 1 insertion(+)
drivers/i3c/master/svc-i3c-master.c +1 -0
@@ -417,6 +417,7 @@ static int svc_i3c_master_handle_ibi(struct svc_i3c_master *master, SVC_I3C_MSTATUS_COMPLETE(val), 0, 1000);if (ret) {dev_err (master->dev,"Timeout when polling for COMPLETE\n" ); +i3c_generic_ibi_recycle_slot (data->ibi_pool, slot);return ret; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 168/563 block: update validation of atomic writes boundary for stacked devices
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: John Garry <[email protected]>
[ Upstream commit bfd4037296bd7e1f95394a2e3daf8e3c1796c3b3 ]
In commit 63d092d1c1b1 ("block: use chunk_sectors when evaluating stacked atomic write limits"), it was missed to use a chunk sectors limit check in blk_stack_atomic_writes_boundary_head(), so update that function to do the proper check.
--- block/blk-settings.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-)
block/blk-settings.c +14 -8
@@ -643,18 +643,24 @@ static bool blk_stack_atomic_writes_tail(struct queue_limits *t,static bool blk_stack_atomic_writes_boundary_head (struct queue_limits *t,struct queue_limits *b) { +unsigned int boundary_sectors; + +if (!b->atomic_write_hw_boundary || !t->chunk_sectors) +return true; + + boundary_sectors = b->atomic_write_hw_boundary >>SECTOR_SHIFT ; +/* * Ensure atomic write boundary is aligned with chunk sectors. Stacked -* devices store chunk sectors in t->io_min. +* devices store any stripe size in t->chunk_sectors. */ -if (b->atomic_write_hw_boundary > t->io_min && - b->atomic_write_hw_boundary % t->io_min) +if (boundary_sectors > t->chunk_sectors && + boundary_sectors % t->chunk_sectors)return false; -if (t->io_min > b->atomic_write_hw_boundary && - t->io_min % b->atomic_write_hw_boundary) +if (t->chunk_sectors > boundary_sectors && + t->chunk_sectors % boundary_sectors)return false; - t->atomic_write_hw_boundary = b->atomic_write_hw_boundary;return true; }
@@ -695,13 +701,13 @@ static void blk_stack_atomic_writes_chunk_sectors(struct queue_limits *t)static bool blk_stack_atomic_writes_head (struct queue_limits *t,struct queue_limits *b) { -if (b->atomic_write_hw_boundary && - !blk_stack_atomic_writes_boundary_head (t, b)) +if (!blk_stack_atomic_writes_boundary_head (t, b))return false; t->atomic_write_hw_unit_max = b->atomic_write_hw_unit_max; t->atomic_write_hw_unit_min = b->atomic_write_hw_unit_min; t->atomic_write_hw_max = b->atomic_write_hw_max; + t->atomic_write_hw_boundary = b->atomic_write_hw_boundary;return true; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 169/563 block: fix stacking of atomic writes when atomics are not supported
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: John Garry <[email protected]>
[ Upstream commit f2d8c5a2f79c28569edf4948b611052253b5e99a ]
Atomic writes support may not always be possible when stacking devices which support atomic writes. Such as case is a different atomic write boundary between stacked devices (which is not supported).
In the case that atomic writes cannot supported, the top device queue HW limits are set to 0.
However, in blk_stack_atomic_writes_limits(), we detect that we are stacking the first bottom device by checking the top device atomic_write_hw_max value == 0. This get confused with the case of atomic writes not supported, above.
Make the distinction between stacking the first bottom device and no atomics supported by initializing stacked device atomic_write_hw_max = UINT_MAX and checking that for stacking the first bottom device.
--- block/blk-settings.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-)
block/blk-settings.c +10 -9
@@ -56,6 +56,7 @@ void blk_set_stacking_limits(struct queue_limits *lim) lim->max_user_wzeroes_unmap_sectors =UINT_MAX ; lim->max_hw_zone_append_sectors =UINT_MAX ; lim->max_user_discard_sectors =UINT_MAX ; + lim->atomic_write_hw_max =UINT_MAX ; }EXPORT_SYMBOL (blk_set_stacking_limits);
@@ -232,6 +233,10 @@ static void blk_validate_atomic_write_limits(struct queue_limits *lim)if (!(lim->features &BLK_FEAT_ATOMIC_WRITES )) goto unsupported; +/* UINT_MAX indicates stacked limits in initial state */ +if (lim->atomic_write_hw_max ==UINT_MAX ) + goto unsupported; +if (!lim->atomic_write_hw_max) goto unsupported;
@@ -723,18 +728,14 @@ static void blk_stack_atomic_writes_limits(struct queue_limits *t,if (!blk_atomic_write_start_sect_aligned (start, b)) goto unsupported; -/* -* If atomic_write_hw_max is set, we have already stacked 1x bottom -* device, so check for compliance. -*/ -if (t->atomic_write_hw_max) { +/* UINT_MAX indicates no stacking of bottom devices yet */ +if (t->atomic_write_hw_max ==UINT_MAX ) { +if (!blk_stack_atomic_writes_head (t, b)) + goto unsupported; + }else {if (!blk_stack_atomic_writes_tail (t, b)) goto unsupported; -return ; } - -if (!blk_stack_atomic_writes_head (t, b)) - goto unsupported;blk_stack_atomic_writes_chunk_sectors (t);return ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 170/563 selftests: watchdog: skip ping loop if WDIOF_KEEPALIVEPING not supported
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Akhilesh Patil <[email protected]>
[ Upstream commit e8cfc524eaf3c0ed88106177edb6961e202e6716 ]
Check if watchdog device supports WDIOF_KEEPALIVEPING option before entering keep_alive() ping test loop. Fix watchdog-test silently looping if ioctl based ping is not supported by the device. Exit from test in such case instead of getting stuck in loop executing failing keep_alive()
watchdog_info:
identity: m41t93 rtc Watchdog
firmware_version: 0
Support/Status: Set timeout (in seconds)
Support/Status: Watchdog triggers a management or other external alarm not a reboot
Watchdog card disabled.
Watchdog timeout set to 5 seconds.
Watchdog ping rate set to 2 seconds.
Watchdog card enabled.WDIOC_KEEPALIVE not supported by this device
without this change
Watchdog card disabled.
Watchdog timeout set to 5 seconds.
Watchdog ping rate set to 2 seconds.
Watchdog card enabled.
Watchdog Ticking Away!
(Where test stuck here forver silently)
Updated change log at commit time:
Shuah Khan <[email protected]>
--- tools/testing/selftests/watchdog/watchdog-test.c | 6 ++++++ 1 file changed, 6 insertions(+)
tools/testing/selftests/watchdog/watchdog-test.c +6 -0
@@ -332,6 +332,12 @@ int main(int argc, char *argv[])if (oneshot) goto end; +/* Check if WDIOF_KEEPALIVEPING is supported */ +if (!(info.options &WDIOF_KEEPALIVEPING )) { +printf ("WDIOC_KEEPALIVE not supported by this device\n" ); + goto end; + } +printf ("Watchdog Ticking Away!\n" );/*
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 171/563 selftests/kselftest_harness: Add harness-selftest.expected to TEST_FILES
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yi Lai <[email protected]>
[ Upstream commit 3e23a3f688b457288c37899f8898180cc231ff97 ]
The harness-selftest.expected is not installed in INSTALL_PATH. Attempting to execute harness-selftest.sh shows warning:
diff: ./kselftest_harness/harness-selftest.expected: No such file or directory
Add harness-selftest.expected to TEST_FILES.
--- tools/testing/selftests/kselftest_harness/Makefile | 1 + 1 file changed, 1 insertion(+)
tools/testing/selftests/kselftest_harness/Makefile +1 -0
@@ -2,6 +2,7 @@ TEST_GEN_PROGS_EXTENDED := harness-selftest TEST_PROGS := harness-selftest.sh +TEST_FILES := harness-selftest.expected EXTRA_CLEAN := harness-selftest.seen include ../lib.mk
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 172/563 blk-throttle: fix throtl_data leak during disk release
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Yu Kuai <[email protected]>
[ Upstream commit 336aec7b06be860477be80a4299263a2e9355789 ]
Tightening the throttle activation check in blk_throtl_activated() to require both q->td presence and policy bit set introduced a memory leak during disk release:
blkg_destroy_all() clears the policy bit first during queue deactivation, causing subsequent blk_throtl_exit() to skip throtl_data cleanup when blk_throtl_activated() fails policy check.
Idealy we should avoid modifying blk_throtl_exit() activation check because it's intuitive that blk-throtl start from blk_throtl_init() and end in blk_throtl_exit(). However, call blk_throtl_exit() before blkg_destroy_all() will make a long term deadlock problem easier to trigger[1], hence fix this problem by checking if q->td is NULL from blk_throtl_exit(), and remove policy deactivation as well since it's useless.
[1] https://lore.kernel.org/all/CAHj4cs9p9H5yx+ywsb3CMUdbqGPhM+8tuBvhW=9ADiCjAqza9w@mail.gmail.com/#t
--- block/blk-throttle.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
block/blk-throttle.c +5 -2
@@ -1842,12 +1842,15 @@ void blk_throtl_exit(struct gendisk *disk) {struct request_queue *q = disk->queue; -if (!blk_throtl_activated (q)) +/* +* blkg_destroy_all() already deactivate throtl policy, just check and +* free throtl data. +*/ +if (!q->td)return ;timer_delete_sync (&q->td->service_queue.pending_timer);throtl_shutdown_wq (q); -blkcg_deactivate_policy (disk, &blkcg_policy_throtl);kfree (q->td); }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 173/563 bpf: Explicitly check accesses to bpf_sock_addr
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Paul Chaignon <[email protected]>
[ Upstream commit 6fabca2fc94d33cdf7ec102058983b086293395f ]
Syzkaller found a kernel warning on the following sock_addr program:
0: r0 = 0
1: r2 = *(u32 *)(r1 +60)
2: exitwhich triggers:
verifier bug: error during ctx access conversion (0)
This is happening because offset 60 in bpf_sock_addr corresponds to an implicit padding of 4 bytes, right after msg_src_ip4. Access to this padding isn't rejected in sock_addr_is_valid_access and it thus later fails to convert the access.
This patch fixes it by explicitly checking the various fields of bpf_sock_addr in sock_addr_is_valid_access.
I checked the other ctx structures and is_valid_access functions and didn't find any other similar cases. Other cases of (properly handled) padding are covered in new tests in a subsequent patch.
--- net/core/filter.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-)
net/core/filter.c +10 -6
@@ -9284,13 +9284,17 @@ static bool sock_addr_is_valid_access(int off, int size,return false; info->reg_type =PTR_TO_SOCKET ;break ; -default : -if (type ==BPF_READ ) { -if (size != size_default) -return false; - }else { + case bpf_ctx_range(struct bpf_sock_addr, user_family): + case bpf_ctx_range(struct bpf_sock_addr, family): + case bpf_ctx_range(struct bpf_sock_addr, type): + case bpf_ctx_range(struct bpf_sock_addr, protocol): +if (type !=BPF_READ )return false; - } +if (size != size_default) +return false; +break ; +default : +return false; }return true;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 174/563 mmc: select REGMAP_MMIO with MMC_LOONGSON2
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mikko Rapeli <[email protected]>
[ Upstream commit 67da3f16e5f97a864a0beb4f9758d09e1890a76e ]
COMPILE_TEST with MMC_LOONGSON2 failed to link due to undeclared dependency:
ERROR: modpost: "__devm_regmap_init_mmio_clk" [drivers/mmc/host/loongson2-mmc.ko] undefined!
--- drivers/mmc/host/Kconfig | 1 + 1 file changed, 1 insertion(+)
drivers/mmc/host/Kconfig +1 -0
@@ -1115,6 +1115,7 @@ config MMC_LOONGSON2 tristate "Loongson-2K SD/SDIO/eMMC Host Interface support" depends on LOONGARCH || COMPILE_TEST depends on HAS_DMA + select REGMAP_MMIO help This selects support for the SD/SDIO/eMMC Host Controller on Loongson-2K series CPUs.
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 175/563 selftests/futex: Fix futex_wait() for 32bit ARM
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dan Carpenter <[email protected]>
[ Upstream commit 237bfb76c90b184f57bb18fe35ff366c19393dc8 ]
On 32bit ARM systems gcc-12 will use 32bit timestamps while gcc-13 and later will use 64bit timestamps. The problem is that SYS_futex will continue pointing at the 32bit system call. This makes the futex_wait test fail like this:
waiter failed errno 110
not ok 1 futex_wake private returned: 0 Success waiter failed errno 110
not ok 2 futex_wake shared (page anon) returned: 0 Success waiter failed errno 110
not ok 3 futex_wake shared (file backed) returned: 0 Success
Instead of compiling differently depending on the gcc version, use the -D_FILE_OFFSET_BITS=64 -D_TIME_BITS=64 options to ensure that 64bit timestamps are used. Then use ifdefs to make SYS_futex point to the 64bit system call.
Stable-dep-of: ed323aeda5e0 ("selftest/futex: Compile also with libnuma < 2.0.16")
--- tools/testing/selftests/futex/functional/Makefile | 2 +- tools/testing/selftests/futex/include/futextest.h | 11 +++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-)
tools/testing/selftests/futex/functional/Makefile +1 -1
@@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 INCLUDES := -I../include -I../../ $(KHDR_INCLUDES) -CFLAGS := $(CFLAGS) -g -O2 -Wall -pthread $(INCLUDES) $(KHDR_INCLUDES) +CFLAGS := $(CFLAGS) -g -O2 -Wall -pthread -D_FILE_OFFSET_BITS=64 -D_TIME_BITS=64 $(INCLUDES) $(KHDR_INCLUDES) LDLIBS := -lpthread -lrt -lnuma LOCAL_HDRS := \
tools/testing/selftests/futex/include/futextest.h +11 -0
@@ -58,6 +58,17 @@ typedef volatile u_int32_t futex_t;#define SYS_futex SYS_futex_time64#endif +/* +* On 32bit systems if we use "-D_FILE_OFFSET_BITS=64 -D_TIME_BITS=64" or if +* we are using a newer compiler then the size of the timestamps will be 64bit, +* however, the SYS_futex will still point to the 32bit futex system call. +*/ +#if __SIZEOF_POINTER__ ==4 && defined(SYS_futex_time64) && \ + defined(_TIME_BITS) && _TIME_BITS ==64 +# undef SYS_futex +# define SYS_futex SYS_futex_time64 +#endif +/** * futex() - SYS_futex syscall wrapper * @uaddr: address of first futex
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 176/563 selftest/futex: Make the error check more precise for futex_numa_mpol
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: André Almeida <[email protected]>
[ Upstream commit c1c863457780adfb2e29fa9a85897179ad3903e6 ]
Instead of just checking if the syscall failed as expected, check as well if the returned error code matches the expected error code.
[ bigeasy: reword the commmit message ]
Stable-dep-of: ed323aeda5e0 ("selftest/futex: Compile also with libnuma < 2.0.16")
--- .../futex/functional/futex_numa_mpol.c | 36 +++++++++++-------- 1 file changed, 21 insertions(+), 15 deletions(-)
tools/testing/selftests/futex/functional/futex_numa_mpol.c +21 -15
@@ -77,7 +77,7 @@ static void join_max_threads(void) } } -static void __test_futex (void *futex_ptr,int must_fail,unsigned int futex_flags) +static void __test_futex (void *futex_ptr,int err_value,unsigned int futex_flags) {int to_wake, ret, i, need_exit =0 ;
@@ -88,11 +88,17 @@ static void __test_futex(void *futex_ptr, int must_fail, unsigned int futex_flag do { ret = futex2_wake(futex_ptr, to_wake, futex_flags); - if (must_fail) { - if (ret < 0) - break; - ksft_exit_fail_msg("futex2_wake(%d, 0x%x) should fail, but didn't\n", - to_wake, futex_flags); + + if (err_value) { + if (ret >= 0) + ksft_exit_fail_msg("futex2_wake(%d, 0x%x) should fail, but didn't\n", + to_wake, futex_flags); + + if (errno != err_value) + ksft_exit_fail_msg("futex2_wake(%d, 0x%x) expected error was %d, but returned %d (%s)\n", + to_wake, futex_flags, err_value, errno, strerror(errno)); + + break; } if (ret < 0) { ksft_exit_fail_msg("Failed futex2_wake(%d, 0x%x): %m\n",
@@ -106,12 +112,12 @@ static void __test_futex(void *futex_ptr, int must_fail, unsigned int futex_flagjoin_max_threads ();for (i =0 ; i <MAX_THREADS ; i++) { -if (must_fail && thread_args[i].result !=-1 ) { +if (err_value && thread_args[i].result !=-1 ) {ksft_print_msg ("Thread %d should fail but succeeded (%d)\n" , i, thread_args[i].result); need_exit =1 ; } -if (!must_fail && thread_args[i].result !=0 ) { +if (!err_value && thread_args[i].result !=0 ) {ksft_print_msg ("Thread %d failed (%d)\n" , i, thread_args[i].result); need_exit =1 ; }
@@ -120,14 +126,14 @@ static void __test_futex(void *futex_ptr, int must_fail, unsigned int futex_flagksft_exit_fail_msg ("Aborting due to earlier errors.\n" ); } -static void test_futex (void *futex_ptr,int must_fail) +static void test_futex (void *futex_ptr,int err_value) { -__test_futex (futex_ptr, must_fail,FUTEX2_SIZE_U32 |FUTEX_PRIVATE_FLAG |FUTEX2_NUMA ); +__test_futex (futex_ptr, err_value,FUTEX2_SIZE_U32 |FUTEX_PRIVATE_FLAG |FUTEX2_NUMA ); } -static void test_futex_mpol (void *futex_ptr,int must_fail) +static void test_futex_mpol (void *futex_ptr,int err_value) { -__test_futex (futex_ptr, must_fail,FUTEX2_SIZE_U32 |FUTEX_PRIVATE_FLAG |FUTEX2_NUMA |FUTEX2_MPOL ); +__test_futex (futex_ptr, err_value,FUTEX2_SIZE_U32 |FUTEX_PRIVATE_FLAG |FUTEX2_NUMA |FUTEX2_MPOL ); }static void usage (char *prog)
@@ -184,16 +190,16 @@ int main(int argc, char *argv[])/* FUTEX2_NUMA futex must be 8-byte aligned */ ksft_print_msg ("Mis-aligned futex\n" ); -test_futex (futex_ptr + mem_size -4 ,1 ); +test_futex (futex_ptr + mem_size -4 ,EINVAL ); futex_numa->numa =FUTEX_NO_NODE ;mprotect (futex_ptr, mem_size,PROT_READ );ksft_print_msg ("Memory, RO\n" ); -test_futex (futex_ptr,1 ); +test_futex (futex_ptr,EFAULT );mprotect (futex_ptr, mem_size,PROT_NONE );ksft_print_msg ("Memory, no access\n" ); -test_futex (futex_ptr,1 ); +test_futex (futex_ptr,EFAULT );mprotect (futex_ptr, mem_size,PROT_READ |PROT_WRITE );ksft_print_msg ("Memory back to RW\n" );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 177/563 selftest/futex: Compile also with libnuma < 2.0.16
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sebastian Andrzej Siewior <[email protected]>
[ Upstream commit ed323aeda5e09fa1ab95946673939c8c425c329c ]
After using numa_set_mempolicy_home_node() the test fails to compile on systems with libnuma library versioned lower than 2.0.16.
In order to allow lower library version add a pkg-config related check and exclude that part of the code. Without the proper MPOL setup it can't be tested.
Make a total number of tests two. The first one is the first batch and the second is the MPOL related one. The goal is to let the user know if it has been skipped due to library limitation.
Remove test_futex_mpol(), it was unused and it is now complained by the compiler if the part is not compiled.
--- .../selftests/futex/functional/Makefile | 5 ++++- .../futex/functional/futex_numa_mpol.c | 21 +++++++++---------- 2 files changed, 14 insertions(+), 12 deletions(-)
tools/testing/selftests/futex/functional/Makefile +4 -1
@@ -1,6 +1,9 @@ # SPDX-License-Identifier: GPL-2.0 +PKG_CONFIG ?= pkg-config +LIBNUMA_TEST = $(shell sh -c "$(PKG_CONFIG) numa --atleast-version 2.0.16 > /dev/null 2>&1 && echo SUFFICIENT || echo NO") + INCLUDES := -I../include -I../../ $(KHDR_INCLUDES) -CFLAGS := $(CFLAGS) -g -O2 -Wall -pthread -D_FILE_OFFSET_BITS=64 -D_TIME_BITS=64 $(INCLUDES) $(KHDR_INCLUDES) +CFLAGS := $(CFLAGS) -g -O2 -Wall -pthread -D_FILE_OFFSET_BITS=64 -D_TIME_BITS=64 $(INCLUDES) $(KHDR_INCLUDES) -DLIBNUMA_VER_$(LIBNUMA_TEST)=1 LDLIBS := -lpthread -lrt -lnuma LOCAL_HDRS := \
tools/testing/selftests/futex/functional/futex_numa_mpol.c +10 -11
@@ -131,11 +131,6 @@ static void test_futex(void *futex_ptr, int err_value)__test_futex (futex_ptr, err_value,FUTEX2_SIZE_U32 |FUTEX_PRIVATE_FLAG |FUTEX2_NUMA ); } -static void test_futex_mpol (void *futex_ptr,int err_value) -{ -__test_futex (futex_ptr, err_value,FUTEX2_SIZE_U32 |FUTEX_PRIVATE_FLAG |FUTEX2_NUMA |FUTEX2_MPOL ); -} -static void usage (char *prog) {printf ("Usage: %s\n" , prog);
@@ -148,7 +143,7 @@ static void usage(char *prog)int main (int argc,char *argv[]) {struct futex32_numa *futex_numa; -int mem_size, i; +int mem_size;void *futex_ptr;int c;
@@ -171,7 +166,7 @@ int main(int argc, char *argv[]) }ksft_print_header (); -ksft_set_plan (1 ); +ksft_set_plan (2 ); mem_size =sysconf (_SC_PAGE_SIZE); futex_ptr =mmap (NULL , mem_size,PROT_READ |PROT_WRITE ,MAP_PRIVATE |MAP_ANONYMOUS ,0 ,0 );
@@ -205,8 +200,11 @@ int main(int argc, char *argv[])ksft_print_msg ("Memory back to RW\n" );test_futex (futex_ptr,0 ); +ksft_test_result_pass ("futex2 memory boundarie tests passed\n" ); +/* MPOL test. Does not work as expected */ -for (i =0 ; i <4 ; i++) { +#ifdef LIBNUMA_VER_SUFFICIENT +for (int i =0 ; i <4 ; i++) {unsigned long nodemask;int ret;
@@ -225,15 +223,16 @@ int main(int argc, char *argv[]) ret =futex2_wake (futex_ptr,0 ,FUTEX2_SIZE_U32 |FUTEX_PRIVATE_FLAG |FUTEX2_NUMA |FUTEX2_MPOL );if (ret <0 )ksft_test_result_fail ("Failed to wake 0 with MPOL: %m\n" ); -if (0 ) -test_futex_mpol (futex_numa,0 );if (futex_numa->numa != i) {ksft_exit_fail_msg ("Returned NUMA node is %d expected %d\n" , futex_numa->numa, i); } } } -ksft_test_result_pass ("NUMA MPOL tests passed\n" ); +ksft_test_result_pass ("futex2 MPOL hints test passed\n" ); +#else +ksft_test_result_skip ("futex2 MPOL hints test requires libnuma 2.0.16+\n" ); +#endif ksft_finished ();return 0 ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 178/563 bpf: dont report verifier bug for missing bpf_scc_visit on speculative path
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Eduard Zingerman <[email protected]>
[ Upstream commit a3c73d629ea1373af3c0c954d41fd1af555492e3 ]
Syzbot generated a program that triggers a verifier_bug() call in maybe_exit_scc(). maybe_exit_scc() assumes that, when called for a state with insn_idx in some SCC, there should be an instance of struct bpf_scc_visit allocated for that SCC. Turns out the assumption does not hold for speculative execution paths. See example in the next patch.
maybe_scc_exit() is called from update_branch_counts() for states that reach branch count of zero, meaning that path exploration for a particular path is finished. Path exploration can finish in one of three ways:
a. Verification error is found. In this case, update_branch_counts()
is called only for non-speculative paths.
b. Top level BPF_EXIT is reached. Such instructions are never a part of
an SCC, so compute_scc_callchain() in maybe_scc_exit() will return false, and maybe_scc_exit() will return early.
c. A checkpoint is reached and matched. Checkpoints are created by
is_state_visited(), which calls maybe_enter_scc(), which allocates bpf_scc_visit instances for checkpoints within SCCs.
Hence, for non-speculative symbolic execution paths, the assumption still holds: if maybe_scc_exit() is called for a state within an SCC, bpf_scc_visit instance must exist.
This patch removes the verifier_bug() call for speculative paths.
--- kernel/bpf/verifier.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-)
kernel/bpf/verifier.c +18 -3
@@ -1946,9 +1946,24 @@ static int maybe_exit_scc(struct bpf_verifier_env *env, struct bpf_verifier_statreturn 0 ; visit =scc_visit_lookup (env, callchain);if (!visit) { -verifier_bug (env,"scc exit: no visit info for call chain %s" , -format_callchain (env, callchain)); -return -EFAULT ; +/* +* If path traversal stops inside an SCC, corresponding bpf_scc_visit +* must exist for non-speculative paths. For non-speculative paths +* traversal stops when: +* a. Verification error is found, maybe_exit_scc() is not called. +* b. Top level BPF_EXIT is reached. Top level BPF_EXIT is not a member +* of any SCC. +* c. A checkpoint is reached and matched. Checkpoints are created by +* is_state_visited(), which calls maybe_enter_scc(), which allocates +* bpf_scc_visit instances for checkpoints within SCCs. +* (c) is the only case that can reach this point. +*/ +if (!st->speculative) { +verifier_bug (env,"scc exit: no visit info for call chain %s" , +format_callchain (env, callchain)); +return -EFAULT ; + } +return 0 ; }if (visit->entry_state != st)return 0 ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 179/563 bpf, arm64: Call bpf_jit_binary_pack_finalize() in bpf_jit_free()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Hengqi Chen <[email protected]>
[ Upstream commit 6ff4a0fa3e1b2b9756254b477fb2f0fbe04ff378 ]
The current implementation seems incorrect and does NOT match the comment above, use bpf_jit_binary_pack_finalize() instead.
--- arch/arm64/net/bpf_jit_comp.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
arch/arm64/net/bpf_jit_comp.c +1 -2
@@ -3064,8 +3064,7 @@ void bpf_jit_free(struct bpf_prog *prog)* before freeing it. */ if (jit_data) { -bpf_arch_text_copy (&jit_data->ro_header->size, &jit_data->header->size, -sizeof (jit_data->header->size)); +bpf_jit_binary_pack_finalize (jit_data->ro_header, jit_data->header);kfree (jit_data); } prog->bpf_func -=cfi_get_offset ();
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 180/563 arm64: dts: apple: t600x: Add missing WiFi properties
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Hector Martin <[email protected]>
[ Upstream commit 3050713d84f58d2e4ba463c5474092fa6738c527 ]
Add compatible and antenna-sku properties to the shared node and brcm,board-type property to individuall board device trees.
Stable-dep-of: 6313115c55f4 ("arm64: dts: apple: Add ethernet0 alias for J375 template")
--- arch/arm64/boot/dts/apple/t6000-j314s.dts | 4 ++++ arch/arm64/boot/dts/apple/t6000-j316s.dts | 4 ++++ arch/arm64/boot/dts/apple/t6001-j314c.dts | 4 ++++ arch/arm64/boot/dts/apple/t6001-j316c.dts | 4 ++++ arch/arm64/boot/dts/apple/t6001-j375c.dts | 4 ++++ arch/arm64/boot/dts/apple/t6002-j375d.dts | 4 ++++ arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi | 2 ++ arch/arm64/boot/dts/apple/t600x-j375.dtsi | 2 ++ 8 files changed, 28 insertions(+)
arch/arm64/boot/dts/apple/t6000-j314s.dts +4 -0
@@ -16,3 +16,7 @@ / { compatible = "apple,j314s", "apple,t6000", "apple,arm-platform"; model = "Apple MacBook Pro (14-inch, M1 Pro, 2021)"; }; + +&wifi0 { + brcm,board-type = "apple,maldives"; +};
arch/arm64/boot/dts/apple/t6000-j316s.dts +4 -0
@@ -16,3 +16,7 @@ / { compatible = "apple,j316s", "apple,t6000", "apple,arm-platform"; model = "Apple MacBook Pro (16-inch, M1 Pro, 2021)"; }; + +&wifi0 { + brcm,board-type = "apple,madagascar"; +};
arch/arm64/boot/dts/apple/t6001-j314c.dts +4 -0
@@ -16,3 +16,7 @@ / { compatible = "apple,j314c", "apple,t6001", "apple,arm-platform"; model = "Apple MacBook Pro (14-inch, M1 Max, 2021)"; }; + +&wifi0 { + brcm,board-type = "apple,maldives"; +};
arch/arm64/boot/dts/apple/t6001-j316c.dts +4 -0
@@ -16,3 +16,7 @@ / { compatible = "apple,j316c", "apple,t6001", "apple,arm-platform"; model = "Apple MacBook Pro (16-inch, M1 Max, 2021)"; }; + +&wifi0 { + brcm,board-type = "apple,madagascar"; +};
arch/arm64/boot/dts/apple/t6001-j375c.dts +4 -0
@@ -16,3 +16,7 @@ / { compatible = "apple,j375c", "apple,t6001", "apple,arm-platform"; model = "Apple Mac Studio (M1 Max, 2022)"; }; + +&wifi0 { + brcm,board-type = "apple,okinawa"; +};
arch/arm64/boot/dts/apple/t6002-j375d.dts +4 -0
@@ -38,6 +38,10 @@ hpm5: usb-pd@3a { }; }; +&wifi0 { + brcm,board-type = "apple,okinawa"; +}; + /* delete unused always-on power-domains on die 1 */ /delete-node/ &ps_atc2_usb_aon_die1;
arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi +2 -0
@@ -99,9 +99,11 @@ &port00 { /* WLAN */ bus-range = <1 1>; wifi0: wifi@0,0 { + compatible = "pci14e4,4433"; reg = <0x10000 0x0 0x0 0x0 0x0>; /* To be filled by the loader */ local-mac-address = [00 10 18 00 00 10]; + apple,antenna-sku = "XX"; }; };
arch/arm64/boot/dts/apple/t600x-j375.dtsi +2 -0
@@ -84,9 +84,11 @@ &port00 { /* WLAN */ bus-range = <1 1>; wifi0: wifi@0,0 { + compatible = "pci14e4,4433"; reg = <0x10000 0x0 0x0 0x0 0x0>; /* To be filled by the loader */ local-mac-address = [00 10 18 00 00 10]; + apple,antenna-sku = "XX"; }; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 181/563 arm64: dts: apple: t600x: Add bluetooth device nodes
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Hector Martin <[email protected]>
[ Upstream commit c34e2ec6a84ea3f7a01d8fcd3073f858c4f47605 ]
Add bluetooth PCIe device nodes to specify per device brcm,board-type and provide the bootloader filled "local-bd-address" and calibration data.
Stable-dep-of: 6313115c55f4 ("arm64: dts: apple: Add ethernet0 alias for J375 template")
--- arch/arm64/boot/dts/apple/t6000-j314s.dts | 4 ++++ arch/arm64/boot/dts/apple/t6000-j316s.dts | 4 ++++ arch/arm64/boot/dts/apple/t6001-j314c.dts | 4 ++++ arch/arm64/boot/dts/apple/t6001-j316c.dts | 4 ++++ arch/arm64/boot/dts/apple/t6001-j375c.dts | 4 ++++ arch/arm64/boot/dts/apple/t6002-j375d.dts | 4 ++++ arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi | 8 ++++++++ arch/arm64/boot/dts/apple/t600x-j375.dtsi | 8 ++++++++ 8 files changed, 40 insertions(+)
arch/arm64/boot/dts/apple/t6000-j314s.dts +4 -0
@@ -20,3 +20,7 @@ / { &wifi0 { brcm,board-type = "apple,maldives"; }; + +&bluetooth0 { + brcm,board-type = "apple,maldives"; +};
arch/arm64/boot/dts/apple/t6000-j316s.dts +4 -0
@@ -20,3 +20,7 @@ / { &wifi0 { brcm,board-type = "apple,madagascar"; }; + +&bluetooth0 { + brcm,board-type = "apple,madagascar"; +};
arch/arm64/boot/dts/apple/t6001-j314c.dts +4 -0
@@ -20,3 +20,7 @@ / { &wifi0 { brcm,board-type = "apple,maldives"; }; + +&bluetooth0 { + brcm,board-type = "apple,maldives"; +};
arch/arm64/boot/dts/apple/t6001-j316c.dts +4 -0
@@ -20,3 +20,7 @@ / { &wifi0 { brcm,board-type = "apple,madagascar"; }; + +&bluetooth0 { + brcm,board-type = "apple,madagascar"; +};
arch/arm64/boot/dts/apple/t6001-j375c.dts +4 -0
@@ -20,3 +20,7 @@ / { &wifi0 { brcm,board-type = "apple,okinawa"; }; + +&bluetooth0 { + brcm,board-type = "apple,okinawa"; +};
arch/arm64/boot/dts/apple/t6002-j375d.dts +4 -0
@@ -42,6 +42,10 @@ &wifi0 { brcm,board-type = "apple,okinawa"; }; +&bluetooth0 { + brcm,board-type = "apple,okinawa"; +}; + /* delete unused always-on power-domains on die 1 */ /delete-node/ &ps_atc2_usb_aon_die1;
arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi +8 -0
@@ -13,6 +13,7 @@ / { aliases { + bluetooth0 = &bluetooth0; serial0 = &serial0; wifi0 = &wifi0; };
@@ -105,6 +106,13 @@ wifi0: wifi@0,0 { local-mac-address = [00 10 18 00 00 10]; apple,antenna-sku = "XX"; }; + + bluetooth0: bluetooth@0,1 { + compatible = "pci14e4,5f71"; + reg = <0x10100 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-bd-address = [00 00 00 00 00 00]; + }; }; &port01 {
arch/arm64/boot/dts/apple/t600x-j375.dtsi +8 -0
@@ -11,6 +11,7 @@ / { aliases { + bluetooth0 = &bluetooth0; serial0 = &serial0; wifi0 = &wifi0; };
@@ -90,6 +91,13 @@ wifi0: wifi@0,0 { local-mac-address = [00 10 18 00 00 10]; apple,antenna-sku = "XX"; }; + + bluetooth0: bluetooth@0,1 { + compatible = "pci14e4,5f71"; + reg = <0x10100 0x0 0x0 0x0 0x0>; + /* To be filled by the loader */ + local-bd-address = [00 00 00 00 00 00]; + }; }; &port01 {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 182/563 arm64: dts: apple: Add ethernet0 alias for J375 template
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Janne Grunau <[email protected]>
[ Upstream commit 6313115c55f44f7bee3f469c91d3de60d724eabd ]
The alias is used by the boot loader to fill the MAC address.
--- arch/arm64/boot/dts/apple/t600x-j375.dtsi | 1 + 1 file changed, 1 insertion(+)
arch/arm64/boot/dts/apple/t600x-j375.dtsi +1 -0
@@ -12,6 +12,7 @@ / { aliases { bluetooth0 = &bluetooth0; + ethernet0 = ðernet0; serial0 = &serial0; wifi0 = &wifi0; };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 183/563 selftests: always install UAPI headers to the correct directory
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Thomas Weißschuh <[email protected]>
[ Upstream commit 2c55daf7de07158df2ab3835321086beca25a691 ]
Currently the UAPI headers are always installed into the source directory. When building out-of-tree this doesn't work, as the include path will be wrong and it dirties the source tree, leading to complains by kbuild.
Make sure the 'headers' target installs the UAPI headers in the correctly.
The real target directory can come from multiple places. To handle them all extract the target directory from KHDR_INCLUDES.
--- tools/testing/selftests/lib.mk | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
tools/testing/selftests/lib.mk +4 -1
@@ -228,7 +228,10 @@ $(OUTPUT)/%:%.S $(LINK.S) $^ $(LDLIBS) -o $@ endif +# Extract the expected header directory +khdr_output := $(patsubst %/usr/include,%,$(filter %/usr/include,$(KHDR_INCLUDES))) + headers: - $(Q)$(MAKE) -C $(top_srcdir) headers + $(Q)$(MAKE) -f $(top_srcdir)/Makefile -C $(khdr_output) headers .PHONY: run_tests all clean install emit_tests gen_mods_dir clean_mods_dir headers
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 184/563 smp: Fix up and expand the smp_call_function_many() kerneldoc
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Rafael J. Wysocki <[email protected]>
[ Upstream commit ccf09357ffef2ab472369ab9cdf470c9bc9b821a ]
The smp_call_function_many() kerneldoc comment got out of sync with the function definition (bool parameter "wait" is incorrectly described as a bitmask in it), so fix it up by copying the "wait" description from the smp_call_function() kerneldoc and add information regarding the handling of the local CPU to it.
--- kernel/smp.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)
kernel/smp.c +5 -6
@@ -884,16 +884,15 @@ static void smp_call_function_many_cond(const struct cpumask *mask,* @mask: The set of cpus to run on (only runs on online subset). * @func: The function to run. This must be fast and non-blocking. * @info: An arbitrary pointer to pass to the function. -* @wait: Bitmask that controls the operation. If %SCF_WAIT is set, wait -* (atomically) until function has completed on other CPUs. If -* %SCF_RUN_LOCAL is set, the function will also be run locally -* if the local CPU is set in the @cpumask. -* -* If @wait is true, then returns once @func has returned. +* @wait: If true, wait (atomically) until function has completed +* on other CPUs. * * You must not call this function with disabled interrupts or from a * hardware interrupt handler or from a bottom half handler. Preemption * must be disabled when calling this function. +* +* @func is not called on the local CPU even if @mask contains it. Consider +* using on_each_cpu_cond_mask() instead if this is not desirable. */ void smp_call_function_many (const struct cpumask *mask,smp_call_func_t func,void *info,bool wait)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 185/563 mfd: max77705: max77705_charger: move active discharge setting to mfd parent
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dzmitry Sankouski <[email protected]>
[ Upstream commit c24928ac69be2390cdf456d126b464af079c57ef ]
Active discharge setting is a part of MFD top level i2c device, hence cannot be controlled by charger. Writing to MAX77705_PMIC_REG_MAINCTRL1 register from charger driver is a mistake.
Move active discharge setting to MFD parent driver.
--- drivers/mfd/max77705.c | 3 +++ drivers/power/supply/max77705_charger.c | 3 --- 2 files changed, 3 insertions(+), 3 deletions(-)
drivers/mfd/max77705.c +3 -0
@@ -108,6 +108,9 @@ static int max77705_i2c_probe(struct i2c_client *i2c)if (pmic_rev !=MAX77705_PASS3 )return dev_err_probe (dev, -ENODEV ,"Rev.0x%x is not tested\n" , pmic_rev); +/* Active Discharge Enable */ +regmap_update_bits (max77705->regmap,MAX77705_PMIC_REG_MAINCTRL1 ,1 ,1 ); + ret = devm_regmap_add_irq_chip(dev, max77705->regmap, i2c->irq, IRQF_ONESHOT | IRQF_SHARED, 0,
drivers/power/supply/max77705_charger.c +0 -3
@@ -487,9 +487,6 @@ static void max77705_charger_initialize(struct max77705_charger_data *chg)regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_00 ,MAX77705_WDTEN_MASK ,0 ); -/* Active Discharge Enable */ -regmap_update_bits (regmap,MAX77705_PMIC_REG_MAINCTRL1 ,1 ,1 ); -/* VBYPSET=5.0V */ regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_11 ,MAX77705_VBYPSET_MASK ,0 );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 186/563 power: supply: max77705_charger: refactoring: rename charger to chg
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dzmitry Sankouski <[email protected]>
[ Upstream commit d84510db8c1414b67167cdc452103c1f429588cc ]
Rename struct max77705_charger_data variable to chg for consistency.
Stable-dep-of: 12a1185a06e3 ("power: supply: max77705_charger: rework interrupts")
--- drivers/power/supply/max77705_charger.c | 80 ++++++++++++------------- 1 file changed, 40 insertions(+), 40 deletions(-)
drivers/power/supply/max77705_charger.c +40 -40
@@ -42,9 +42,9 @@ static enum power_supply_property max77705_charger_props[] = {static int max77705_chgin_irq (void *irq_drv_data) { -struct max77705_charger_data *charger = irq_drv_data; +struct max77705_charger_data *chg = irq_drv_data; -queue_work (charger->wqueue, &charger->chgin_work); +queue_work (chg->wqueue, &chg->chgin_work);return 0 ; }
@@ -109,19 +109,19 @@ static int max77705_get_online(struct regmap *regmap, int *val)return 0 ; } -static int max77705_check_battery (struct max77705_charger_data *charger,int *val) +static int max77705_check_battery (struct max77705_charger_data *chg,int *val) {unsigned int reg_data;unsigned int reg_data2; -struct regmap *regmap = charger->regmap; +struct regmap *regmap = chg->regmap;regmap_read (regmap,MAX77705_CHG_REG_INT_OK , ®_data); -dev_dbg (charger->dev,"CHG_INT_OK(0x%x)\n" , reg_data); +dev_dbg (chg->dev,"CHG_INT_OK(0x%x)\n" , reg_data);regmap_read (regmap,MAX77705_CHG_REG_DETAILS_00 , ®_data2); -dev_dbg (charger->dev,"CHG_DETAILS00(0x%x)\n" , reg_data2); +dev_dbg (chg->dev,"CHG_DETAILS00(0x%x)\n" , reg_data2);if ((reg_data &MAX77705_BATP_OK ) || !(reg_data2 &MAX77705_BATP_DTLS )) *val = true;
@@ -131,9 +131,9 @@ static int max77705_check_battery(struct max77705_charger_data *charger, int *vareturn 0 ; } -static int max77705_get_charge_type (struct max77705_charger_data *charger,int *val) +static int max77705_get_charge_type (struct max77705_charger_data *chg,int *val) { -struct regmap *regmap = charger->regmap; +struct regmap *regmap = chg->regmap;unsigned int reg_data;regmap_read (regmap,MAX77705_CHG_REG_CNFG_09 , ®_data);
@@ -159,9 +159,9 @@ static int max77705_get_charge_type(struct max77705_charger_data *charger, int *return 0 ; } -static int max77705_get_status (struct max77705_charger_data *charger,int *val) +static int max77705_get_status (struct max77705_charger_data *chg,int *val) { -struct regmap *regmap = charger->regmap; +struct regmap *regmap = chg->regmap;unsigned int reg_data;regmap_read (regmap,MAX77705_CHG_REG_CNFG_09 , ®_data);
@@ -234,10 +234,10 @@ static int max77705_get_vbus_state(struct regmap *regmap, int *value)return 0 ; } -static int max77705_get_battery_health (struct max77705_charger_data *charger, +static int max77705_get_battery_health (struct max77705_charger_data *chg,int *value) { -struct regmap *regmap = charger->regmap; +struct regmap *regmap = chg->regmap;unsigned int bat_dtls;regmap_read (regmap,MAX77705_CHG_REG_DETAILS_01 , &bat_dtls);
@@ -245,16 +245,16 @@ static int max77705_get_battery_health(struct max77705_charger_data *charger,switch (bat_dtls) {case MAX77705_BATTERY_NOBAT : -dev_dbg (charger->dev,"%s: No battery and the charger is suspended\n" , +dev_dbg (chg->dev,"%s: No battery and the chg is suspended\n" , __func__); *value =POWER_SUPPLY_HEALTH_NO_BATTERY ;break ;case MAX77705_BATTERY_PREQUALIFICATION : -dev_dbg (charger->dev,"%s: battery is okay but its voltage is low(~VPQLB)\n" , +dev_dbg (chg->dev,"%s: battery is okay but its voltage is low(~VPQLB)\n" , __func__);break ;case MAX77705_BATTERY_DEAD : -dev_dbg (charger->dev,"%s: battery dead\n" , __func__); +dev_dbg (chg->dev,"%s: battery dead\n" , __func__); *value =POWER_SUPPLY_HEALTH_DEAD ;break ;case MAX77705_BATTERY_GOOD :
@@ -262,11 +262,11 @@ static int max77705_get_battery_health(struct max77705_charger_data *charger, *value =POWER_SUPPLY_HEALTH_GOOD ;break ;case MAX77705_BATTERY_OVERVOLTAGE : -dev_dbg (charger->dev,"%s: battery ovp\n" , __func__); +dev_dbg (chg->dev,"%s: battery ovp\n" , __func__); *value =POWER_SUPPLY_HEALTH_OVERVOLTAGE ;break ;default : -dev_dbg (charger->dev,"%s: battery unknown\n" , __func__); +dev_dbg (chg->dev,"%s: battery unknown\n" , __func__); *value =POWER_SUPPLY_HEALTH_UNSPEC_FAILURE ;break ; }
@@ -274,9 +274,9 @@ static int max77705_get_battery_health(struct max77705_charger_data *charger,return 0 ; } -static int max77705_get_health (struct max77705_charger_data *charger,int *val) +static int max77705_get_health (struct max77705_charger_data *chg,int *val) { -struct regmap *regmap = charger->regmap; +struct regmap *regmap = chg->regmap;int ret, is_online =0 ; ret =max77705_get_online (regmap, &is_online);
@@ -287,15 +287,15 @@ static int max77705_get_health(struct max77705_charger_data *charger, int *val)if (ret || (*val !=POWER_SUPPLY_HEALTH_GOOD ))return ret; } -return max77705_get_battery_health (charger, val); +return max77705_get_battery_health (chg, val); } -static int max77705_get_input_current (struct max77705_charger_data *charger, +static int max77705_get_input_current (struct max77705_charger_data *chg,int *val) {unsigned int reg_data;int get_current =0 ; -struct regmap *regmap = charger->regmap; +struct regmap *regmap = chg->regmap;regmap_read (regmap,MAX77705_CHG_REG_CNFG_09 , ®_data);
@@ -313,11 +313,11 @@ static int max77705_get_input_current(struct max77705_charger_data *charger,return 0 ; } -static int max77705_get_charge_current (struct max77705_charger_data *charger, +static int max77705_get_charge_current (struct max77705_charger_data *chg,int *val) {unsigned int reg_data; -struct regmap *regmap = charger->regmap; +struct regmap *regmap = chg->regmap;regmap_read (regmap,MAX77705_CHG_REG_CNFG_02 , ®_data); reg_data &=MAX77705_CHG_CC ;
@@ -327,12 +327,12 @@ static int max77705_get_charge_current(struct max77705_charger_data *charger,return 0 ; } -static int max77705_set_float_voltage (struct max77705_charger_data *charger, +static int max77705_set_float_voltage (struct max77705_charger_data *chg,int float_voltage) {int float_voltage_mv;unsigned int reg_data =0 ; -struct regmap *regmap = charger->regmap; +struct regmap *regmap = chg->regmap; float_voltage_mv = float_voltage /1000 ; reg_data = float_voltage_mv <= 4000 ? 0x0 :
@@ -345,12 +345,12 @@ static int max77705_set_float_voltage(struct max77705_charger_data *charger, (reg_data << MAX77705_CHG_CV_PRM_SHIFT)); } -static int max77705_get_float_voltage (struct max77705_charger_data *charger, +static int max77705_get_float_voltage (struct max77705_charger_data *chg,int *val) {unsigned int reg_data =0 ;int voltage_mv; -struct regmap *regmap = charger->regmap; +struct regmap *regmap = chg->regmap;regmap_read (regmap,MAX77705_CHG_REG_CNFG_04 , ®_data); reg_data &=MAX77705_CHG_PRM_MASK ;
@@ -365,28 +365,28 @@ static int max77705_chg_get_property(struct power_supply *psy,enum power_supply_property psp, union power_supply_propval *val) { - struct max77705_charger_data *charger = power_supply_get_drvdata(psy); -struct regmap *regmap = charger->regmap; + struct max77705_charger_data *chg = power_supply_get_drvdata(psy); +struct regmap *regmap = chg->regmap;switch (psp) {case POWER_SUPPLY_PROP_ONLINE :return max77705_get_online (regmap, &val->intval);case POWER_SUPPLY_PROP_PRESENT : -return max77705_check_battery (charger, &val->intval); +return max77705_check_battery (chg, &val->intval);case POWER_SUPPLY_PROP_STATUS : -return max77705_get_status (charger, &val->intval); +return max77705_get_status (chg, &val->intval);case POWER_SUPPLY_PROP_CHARGE_TYPE : -return max77705_get_charge_type (charger, &val->intval); +return max77705_get_charge_type (chg, &val->intval);case POWER_SUPPLY_PROP_HEALTH : -return max77705_get_health (charger, &val->intval); +return max77705_get_health (chg, &val->intval);case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT : -return max77705_get_input_current (charger, &val->intval); +return max77705_get_input_current (chg, &val->intval);case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT : -return max77705_get_charge_current (charger, &val->intval); +return max77705_get_charge_current (chg, &val->intval);case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE : -return max77705_get_float_voltage (charger, &val->intval); +return max77705_get_float_voltage (chg, &val->intval);case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN : - val->intval = charger->bat_info->voltage_max_design_uv; + val->intval = chg->bat_info->voltage_max_design_uv;break ;case POWER_SUPPLY_PROP_MODEL_NAME : val->strval = max77705_charger_model;
@@ -410,10 +410,10 @@ static const struct power_supply_desc max77705_charger_psy_desc = {static void max77705_chgin_isr_work (struct work_struct *work) { -struct max77705_charger_data *charger = +struct max77705_charger_data *chg = container_of(work, struct max77705_charger_data, chgin_work); -power_supply_changed (charger->psy_chg); +power_supply_changed (chg->psy_chg); }static void max77705_charger_initialize (struct max77705_charger_data *chg)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 187/563 power: supply: max77705_charger: use regfields for config registers
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dzmitry Sankouski <[email protected]>
[ Upstream commit ef1e734dbe257ce8bc42383b9977b5558f061288 ]
Using regfields allows to cleanup masks and register offset definition, allowing to access register info by it's functional name.
Stable-dep-of: 12a1185a06e3 ("power: supply: max77705_charger: rework interrupts")
--- drivers/power/supply/max77705_charger.c | 105 +++++++++--------------- include/linux/power/max77705_charger.h | 102 ++++++++++++----------- 2 files changed, 93 insertions(+), 114 deletions(-)
drivers/power/supply/max77705_charger.c +39 -66
@@ -74,8 +74,7 @@ static int max77705_charger_enable(struct max77705_charger_data *chg) {int rv; - rv =regmap_update_bits (chg->regmap,MAX77705_CHG_REG_CNFG_09 , -MAX77705_CHG_EN_MASK ,MAX77705_CHG_EN_MASK ); + rv =regmap_field_write (chg->rfield[MAX77705_CHG_EN ],1 );if (rv)dev_err (chg->dev,"unable to enable the charger: %d\n" , rv);
@@ -87,10 +86,7 @@ static void max77705_charger_disable(void *data)struct max77705_charger_data *chg = data;int rv; - rv =regmap_update_bits (chg->regmap, -MAX77705_CHG_REG_CNFG_09 , -MAX77705_CHG_EN_MASK , -MAX77705_CHG_DISABLE ); + rv =regmap_field_write (chg->rfield[MAX77705_CHG_EN ],MAX77705_CHG_DISABLE );if (rv)dev_err (chg->dev,"unable to disable the charger: %d\n" , rv); }
@@ -134,10 +130,10 @@ static int max77705_check_battery(struct max77705_charger_data *chg, int *val)static int max77705_get_charge_type (struct max77705_charger_data *chg,int *val) {struct regmap *regmap = chg->regmap; -unsigned int reg_data; +unsigned int reg_data, chg_en; -regmap_read (regmap,MAX77705_CHG_REG_CNFG_09 , ®_data); -if (!MAX77705_CHARGER_CHG_CHARGING (reg_data)) { +regmap_field_read (chg->rfield[MAX77705_CHG_EN ], &chg_en); +if (!chg_en) { *val =POWER_SUPPLY_CHARGE_TYPE_NONE ;return 0 ; }
@@ -162,10 +158,10 @@ static int max77705_get_charge_type(struct max77705_charger_data *chg, int *val)static int max77705_get_status (struct max77705_charger_data *chg,int *val) {struct regmap *regmap = chg->regmap; -unsigned int reg_data; +unsigned int reg_data, chg_en; -regmap_read (regmap,MAX77705_CHG_REG_CNFG_09 , ®_data); -if (!MAX77705_CHARGER_CHG_CHARGING (reg_data)) { +regmap_field_read (chg->rfield[MAX77705_CHG_EN ], &chg_en); +if (!chg_en) { *val =POWER_SUPPLY_CHARGE_TYPE_NONE ;return 0 ; }
@@ -295,16 +291,11 @@ static int max77705_get_input_current(struct max77705_charger_data *chg, {unsigned int reg_data;int get_current =0 ; -struct regmap *regmap = chg->regmap; -regmap_read (regmap,MAX77705_CHG_REG_CNFG_09 , ®_data); - - reg_data &=MAX77705_CHG_CHGIN_LIM_MASK ; +regmap_field_read (chg->rfield[MAX77705_CHG_CHGIN_LIM ], ®_data);if (reg_data <=3 ) get_current =MAX77705_CURRENT_CHGIN_MIN ; -else if (reg_data >=MAX77705_CHG_CHGIN_LIM_MASK ) - get_current =MAX77705_CURRENT_CHGIN_MAX ;else get_current = (reg_data +1 ) *MAX77705_CURRENT_CHGIN_STEP ;
@@ -317,10 +308,8 @@ static int max77705_get_charge_current(struct max77705_charger_data *chg, int *val) {unsigned int reg_data; -struct regmap *regmap = chg->regmap; -regmap_read (regmap,MAX77705_CHG_REG_CNFG_02 , ®_data); - reg_data &=MAX77705_CHG_CC ; +regmap_field_read (chg->rfield[MAX77705_CHG_CC_LIM ], ®_data); *val = reg_data <=0x2 ?MAX77705_CURRENT_CHGIN_MIN : reg_data *MAX77705_CURRENT_CHG_STEP ;
@@ -332,7 +321,6 @@ static int max77705_set_float_voltage(struct max77705_charger_data *chg, {int float_voltage_mv;unsigned int reg_data =0 ; -struct regmap *regmap = chg->regmap; float_voltage_mv = float_voltage /1000 ; reg_data = float_voltage_mv <= 4000 ? 0x0 :
@@ -340,9 +328,7 @@ static int max77705_set_float_voltage(struct max77705_charger_data *chg, (float_voltage_mv <=4200 ) ? (float_voltage_mv -4000 ) /50 : (((float_voltage_mv -4200 ) /10 ) +0x04 ); -return regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_04 , -MAX77705_CHG_CV_PRM_MASK , - (reg_data <<MAX77705_CHG_CV_PRM_SHIFT )); +return regmap_field_write (chg->rfield[MAX77705_CHG_CV_PRM ], reg_data); } static int max77705_get_float_voltage(struct max77705_charger_data *chg,
@@ -350,10 +336,8 @@ static int max77705_get_float_voltage(struct max77705_charger_data *chg, {unsigned int reg_data =0 ;int voltage_mv; -struct regmap *regmap = chg->regmap; -regmap_read (regmap,MAX77705_CHG_REG_CNFG_04 , ®_data); - reg_data &=MAX77705_CHG_PRM_MASK ; +regmap_field_read (chg->rfield[MAX77705_CHG_CV_PRM ], ®_data); voltage_mv = reg_data <=0x04 ? reg_data *50 +4000 : (reg_data -4 ) *10 +4200 ; *val = voltage_mv *1000 ;
@@ -418,7 +402,6 @@ static void max77705_chgin_isr_work(struct work_struct *work)static void max77705_charger_initialize (struct max77705_charger_data *chg) { -u8 reg_data;struct power_supply_battery_info *info;struct regmap *regmap = chg->regmap;
@@ -429,45 +412,31 @@ static void max77705_charger_initialize(struct max77705_charger_data *chg)/* unlock charger setting protect */ /* slowest LX slope */ - reg_data =MAX77705_CHGPROT_MASK |MAX77705_SLOWEST_LX_SLOPE ; -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_06 , reg_data, - reg_data); +regmap_field_write (chg->rfield[MAX77705_CHGPROT ],MAX77705_CHGPROT_UNLOCKED ); +regmap_field_write (chg->rfield[MAX77705_LX_SLOPE ],MAX77705_SLOWEST_LX_SLOPE );/* fast charge timer disable */ /* restart threshold disable */ /* pre-qual charge disable */ - reg_data = (MAX77705_FCHGTIME_DISABLE <<MAX77705_FCHGTIME_SHIFT ) | - (MAX77705_CHG_RSTRT_DISABLE <<MAX77705_CHG_RSTRT_SHIFT ) | - (MAX77705_CHG_PQEN_DISABLE <<MAX77705_PQEN_SHIFT ); -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_01 , - (MAX77705_FCHGTIME_MASK | -MAX77705_CHG_RSTRT_MASK | -MAX77705_PQEN_MASK ), - reg_data); - -/* OTG off(UNO on), boost off */ -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_00 , -MAX77705_OTG_CTRL ,0 ); +regmap_field_write (chg->rfield[MAX77705_FCHGTIME ],MAX77705_FCHGTIME_DISABLE ); +regmap_field_write (chg->rfield[MAX77705_CHG_RSTRT ],MAX77705_CHG_RSTRT_DISABLE ); +regmap_field_write (chg->rfield[MAX77705_CHG_PQEN ],MAX77705_CHG_PQEN_DISABLE ); + +regmap_field_write (chg->rfield[MAX77705_MODE ], +MAX77705_CHG_MASK |MAX77705_BUCK_MASK );/* charge current 450mA(default) */ /* otg current limit 900mA */ -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_02 , -MAX77705_OTG_ILIM_MASK , -MAX77705_OTG_ILIM_900 <<MAX77705_OTG_ILIM_SHIFT ); +regmap_field_write (chg->rfield[MAX77705_OTG_ILIM ],MAX77705_OTG_ILIM_900 );/* BAT to SYS OCP 4.80A */ -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_05 , -MAX77705_REG_B2SOVRC_MASK , -MAX77705_B2SOVRC_4_8A <<MAX77705_REG_B2SOVRC_SHIFT ); +regmap_field_write (chg->rfield[MAX77705_REG_B2SOVRC ],MAX77705_B2SOVRC_4_8A ); +/* top off current 150mA */ /* top off timer 30min */ - reg_data = (MAX77705_TO_ITH_150MA <<MAX77705_TO_ITH_SHIFT ) | - (MAX77705_TO_TIME_30M <<MAX77705_TO_TIME_SHIFT ) | - (MAX77705_SYS_TRACK_DISABLE <<MAX77705_SYS_TRACK_DIS_SHIFT ); -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_03 , - (MAX77705_TO_ITH_MASK | -MAX77705_TO_TIME_MASK | -MAX77705_SYS_TRACK_DIS_MASK ), reg_data); +regmap_field_write (chg->rfield[MAX77705_TO ],MAX77705_TO_ITH_150MA ); +regmap_field_write (chg->rfield[MAX77705_TO_TIME ],MAX77705_TO_TIME_30M ); +regmap_field_write (chg->rfield[MAX77705_SYS_TRACK ],MAX77705_SYS_TRACK_DISABLE );/* cv voltage 4.2V or 4.35V */ /* MINVSYS 3.6V(default) */
@@ -478,25 +447,21 @@ static void max77705_charger_initialize(struct max77705_charger_data *chg)max77705_set_float_voltage (chg, info->voltage_max_design_uv); } -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_12 , -MAX77705_VCHGIN_REG_MASK ,MAX77705_VCHGIN_4_5 ); -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_12 , -MAX77705_WCIN_REG_MASK ,MAX77705_WCIN_4_5 ); +regmap_field_write (chg->rfield[MAX77705_VCHGIN ],MAX77705_VCHGIN_4_5 ); +regmap_field_write (chg->rfield[MAX77705_WCIN ],MAX77705_WCIN_4_5 );/* Watchdog timer */ regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_00 ,MAX77705_WDTEN_MASK ,0 );/* VBYPSET=5.0V */ -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_11 ,MAX77705_VBYPSET_MASK ,0 ); +regmap_field_write (chg->rfield[MAX77705_VBYPSET ],0 );/* Switching Frequency : 1.5MHz */ -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_08 ,MAX77705_REG_FSW_MASK , - (MAX77705_CHG_FSW_1_5MHz <<MAX77705_REG_FSW_SHIFT )); +regmap_field_write (chg->rfield[MAX77705_REG_FSW ], MAX77705_CHG_FSW_1_5MHz);/* Auto skip mode */ -regmap_update_bits (regmap,MAX77705_CHG_REG_CNFG_12 ,MAX77705_REG_DISKIP_MASK , - (MAX77705_AUTO_SKIP <<MAX77705_REG_DISKIP_SHIFT )); +regmap_field_write (chg->rfield[MAX77705_REG_DISKIP ],MAX77705_AUTO_SKIP ); }static int max77705_charger_probe (struct i2c_client *i2c)
@@ -520,6 +485,14 @@ static int max77705_charger_probe(struct i2c_client *i2c)if (IS_ERR (chg->regmap))return PTR_ERR (chg->regmap); +for (int i =0 ; i <MAX77705_N_REGMAP_FIELDS ; i++) { + chg->rfield[i] =devm_regmap_field_alloc (dev, chg->regmap, + max77705_reg_field[i]); +if (IS_ERR (chg->rfield[i])) +return dev_err_probe (dev,PTR_ERR (chg->rfield[i]), +"cannot allocate regmap field\n" ); + } + ret =regmap_update_bits (chg->regmap,MAX77705_CHG_REG_INT_MASK ,MAX77705_CHGIN_IM ,0 );
include/linux/power/max77705_charger.h +54 -48
170 lines not on this page · raw message
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 188/563 power: supply: max77705_charger: rework interrupts
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dzmitry Sankouski <[email protected]>
[ Upstream commit 12a1185a06e3377af777e792ba7436862f8e528a ]
Current implementation uses handle_post_irq to actually handle chgin irq. This is not how things are meant to work in regmap-irq.
Remove handle_post_irq, and request a threaded interrupt for chgin.
--- drivers/power/supply/max77705_charger.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-)
drivers/power/supply/max77705_charger.c +12 -10
@@ -40,13 +40,13 @@ static enum power_supply_property max77705_charger_props[] = { POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, }; -static int max77705_chgin_irq (void *irq_drv_data) +static irqreturn_t max77705_chgin_irq (int irq,void *irq_drv_data) {struct max77705_charger_data *chg = irq_drv_data;queue_work (chg->wqueue, &chg->chgin_work); -return 0 ; +return IRQ_HANDLED ; }static const struct regmap_irq max77705_charger_irqs[] = {
@@ -64,7 +64,6 @@ static struct regmap_irq_chip max77705_charger_irq_chip = { .name = "max77705-charger", .status_base = MAX77705_CHG_REG_INT, .mask_base = MAX77705_CHG_REG_INT_MASK, - .handle_post_irq = max77705_chgin_irq, .num_regs = 1, .irqs = max77705_charger_irqs, .num_irqs = ARRAY_SIZE(max77705_charger_irqs),
@@ -493,12 +492,6 @@ static int max77705_charger_probe(struct i2c_client *i2c) "cannot allocate regmap field\n"); } - ret =regmap_update_bits (chg->regmap, -MAX77705_CHG_REG_INT_MASK , -MAX77705_CHGIN_IM ,0 ); -if (ret) -return ret; - pscfg.fwnode =dev_fwnode (dev); pscfg.drv_data = chg;
@@ -508,7 +501,7 @@ static int max77705_charger_probe(struct i2c_client *i2c) max77705_charger_irq_chip.irq_drv_data = chg; ret =devm_regmap_add_irq_chip (chg->dev, chg->regmap, i2c->irq, -IRQF_ONESHOT |IRQF_SHARED ,0 , +IRQF_ONESHOT ,0 , &max77705_charger_irq_chip, &irq_data);if (ret)
@@ -526,6 +519,15 @@ static int max77705_charger_probe(struct i2c_client *i2c)max77705_charger_initialize (chg); + ret =devm_request_threaded_irq (dev,regmap_irq_get_virq (irq_data,MAX77705_CHGIN_I ), +NULL , max77705_chgin_irq, +IRQF_TRIGGER_NONE , +"chgin-irq" , chg); +if (ret) { +dev_err_probe (dev, ret,"Failed to Request chgin IRQ\n" ); + goto destroy_wq; + } + ret =max77705_charger_enable (chg);if (ret) {dev_err_probe (dev, ret,"failed to enable charge\n" );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 189/563 tools/nolibc: make time_t robust if __kernel_old_time_t is missing in host headers
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Zhouyi Zhou <[email protected]>
[ Upstream commit 0ff52df6b32a6b04a7c9dfe3d7a387aff215b482 ]
Commit d5094bcb5bfd ("tools/nolibc: define time_t in terms of __kernel_old_time_t") made nolibc use the kernel's time type so that time_t matches timespec::tv_sec on all ABIs (notably x32).
But since __kernel_old_time_t is fairly new, notably from 2020 in commit 94c467ddb273 ("y2038: add __kernel_old_timespec and __kernel_old_time_t"), nolibc builds that rely on host headers may fail.
Switch to __kernel_time_t, which is the same as __kernel_old_time_t and has existed for longer.
Tested in PPC VM of Open Source Lab of Oregon State University (./tools/testing/selftests/rcutorture/bin/mkinitrd.sh)
--- tools/include/nolibc/std.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
tools/include/nolibc/std.h +1 -1
@@ -29,6 +29,6 @@ typedef unsigned long nlink_t;typedef signed long off_t ;typedef signed long blksize_t ;typedef signed long blkcnt_t ; -typedef __kernel_old_time_t time_t ; +typedef __kernel_time_t time_t ;#endif /* _NOLIBC_STD_H */
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 190/563 spi: fix return code when spi device has too many chipselects
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jonas Gorski <[email protected]>
[ Upstream commit 188f63235bcdd207646773a8739387d85347ed76 ]
Don't return a positive value when there are too many chipselects.
--- drivers/spi/spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/spi/spi.c +1 -1
@@ -2449,7 +2449,7 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,if (rc > ctlr->num_chipselect) {dev_err (&ctlr->dev,"%pOF has number of CS > ctlr->num_chipselect (%d)\n" , nc, rc); -return rc; +return -EINVAL ; }if ((of_property_present (nc,"parallel-memories" )) && (!(ctlr->flags &SPI_CONTROLLER_MULTI_CS ))) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 191/563 clocksource/drivers/timer-tegra186: Avoid 64-bit divide operation
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Guenter Roeck <[email protected]>
[ Upstream commit 916aa36042db8ee230543ffe0d192f900e8b8c9f ]
Building the driver on xtensa fails with
tensa-linux-ld: drivers/clocksource/timer-tegra186.o:
in function `tegra186_timer_remove':
timer-tegra186.c:(.text+0x350):
undefined reference to `__udivdi3'
Avoid the problem by rearranging the offending code to avoid the 64-bit divide operation.
--- drivers/clocksource/timer-tegra186.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clocksource/timer-tegra186.c +1 -1
@@ -267,7 +267,7 @@ static unsigned int tegra186_wdt_get_timeleft(struct watchdog_device *wdd)* counter value to the time of the counter expirations that * remain. */ - timeleft += (((u64 )wdt->base.timeout *USEC_PER_SEC ) /5 ) * (4 - expiration); + timeleft += ((u64 )wdt->base.timeout * (USEC_PER_SEC /5 )) * (4 - expiration);/* * Convert the current counter value to seconds,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 192/563 clocksource/drivers/tegra186: Avoid 64-bit division
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Arnd Bergmann <[email protected]>
[ Upstream commit 409f8fe03e08f92bf5be96cedbcd7a3e8fb2eeaf ]
The newly added function causes a build failure on 32-bit targets with older compiler version such as gcc-10:
arm-linux-gnueabi-ld: drivers/clocksource/timer-tegra186.o: in function `tegra186_wdt_get_timeleft':
timer-tegra186.c:(.text+0x3c2): undefined reference to `__aeabi_uldivmod'
The calculation can trivially be changed to avoid the division entirely, as USEC_PER_SEC is a multiple of 5. Change both such calculation for consistency, even though gcc apparently managed to optimize the other one properly already.
[dlezcano : Fixed conflict with [email protected] ]
--- drivers/clocksource/timer-tegra186.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clocksource/timer-tegra186.c +1 -1
@@ -159,7 +159,7 @@ static void tegra186_wdt_enable(struct tegra186_wdt *wdt)tmr_writel (wdt->tmr,TMRCSSR_SRC_USEC ,TMRCSSR );/* configure timer (system reset happens on the fifth expiration) */ - value =TMRCR_PTV (wdt->base.timeout *USEC_PER_SEC /5 ) | + value =TMRCR_PTV (wdt->base.timeout * (USEC_PER_SEC /5 )) |TMRCR_PERIODIC |TMRCR_ENABLE ;tmr_writel (wdt->tmr, value,TMRCR );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 193/563 bpf: Mark kfuncs as __noclone
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Andrea Righi <[email protected]>
[ Upstream commit d4680a11e14c7baf683cb8453d91d71d2e0b9d3e ]
Some distributions (e.g., CachyOS) support building the kernel with -O3, but doing so may break kfuncs, resulting in their symbols not being properly exported.
In fact, with gcc -O3, some kfuncs may be optimized away despite being annotated as noinline. This happens because gcc can still clone the function during IPA optimizations, e.g., by duplicating or inlining it into callers, and then dropping the standalone symbol. This breaks BTF ID resolution since resolve_btfids relies on the presence of a global symbol for each kfunc.
Currently, this is not an issue for upstream, because we don't allow building the kernel with -O3, but it may be safer to address it anyway, to prevent potential issues in the future if compilers become more aggressive with optimizations.
Therefore, add __noclone to __bpf_kfunc to ensure kfuncs are never cloned and remain distinct, globally visible symbols, regardless of the optimization level.
--- include/linux/btf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
include/linux/btf.h +1 -1
@@ -86,7 +86,7 @@* as to avoid issues such as the compiler inlining or eliding either a static * kfunc, or a global kfunc in an LTO build. */ -#define __bpf_kfunc __used __retain noinline +#define __bpf_kfunc __used __retain __noclone noinline#define __bpf_kfunc_start_defs () \ __diag_push(); \
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 194/563 once: fix race by moving DO_ONCE to separate section
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Qi Xi <[email protected]>
[ Upstream commit edcc8a38b5ac1a3dbd05e113a38a25b937ebefe5 ]
The commit c2c60ea37e5b ("once: use __section(".data.once")") moved DO_ONCE's ___done variable to .data.once section, which conflicts with DO_ONCE_LITE() that also uses the same section.
This creates a race condition when clear_warn_once is used:
Thread 1 (DO_ONCE) Thread 2 (DO_ONCE)__do_once_start
read ___done (false)
acquire once_lock
execute func__do_once_done
write ___done (true) __do_once_start
release once_lock // Thread 3 clear_warn_once reset ___done
read ___done (false) acquire once_lock
execute func
schedule once_work __do_once_done once_deferred: OK write ___done (true) static_branch_disable release once_lock
schedule once_work once_deferred:
BUG_ON(!static_key_enabled)
DO_ONCE_LITE() in once_lite.h is used by WARN_ON_ONCE() and other warning macros. Keep its ___done flag in the .data..once section and allow resetting by clear_warn_once, as originally intended.
In contrast, DO_ONCE() is used for functions like get_random_once() and relies on its ___done flag for internal synchronization. We should not reset DO_ONCE() by clear_warn_once.
Fix it by isolating DO_ONCE's ___done into a separate .data..do_once section, shielding it from clear_warn_once.
--- include/asm-generic/vmlinux.lds.h | 1 + include/linux/once.h | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-)
include/asm-generic/vmlinux.lds.h +1 -0
@@ -361,6 +361,7 @@ defined(CONFIG_AUTOFDO_CLANG) || defined(CONFIG_PROPELLER_CLANG) __start_once = .; \ *(.data..once) \ __end_once = .; \ + *(.data..do_once) \STRUCT_ALIGN (); \ *(__tracepoints) \/* implement dynamic printk debug */ \
include/linux/once.h +2 -2
@@ -46,7 +46,7 @@ void __do_once_sleepable_done(bool *done, struct static_key_true *once_key,#define DO_ONCE (func, ...) \ ({ \ bool ___ret = false; \ - static bool __section(".data..once") ___done = false; \ + static bool __section(".data..do_once") ___done = false; \ static DEFINE_STATIC_KEY_TRUE(___once_key); \ if (static_branch_unlikely(&___once_key)) { \ unsigned long ___flags; \
@@ -64,7 +64,7 @@ void __do_once_sleepable_done(bool *done, struct static_key_true *once_key,#define DO_ONCE_SLEEPABLE (func, ...) \ ({ \ bool ___ret = false; \ - static bool __section(".data..once") ___done = false; \ + static bool __section(".data..do_once") ___done = false; \ static DEFINE_STATIC_KEY_TRUE(___once_key); \ if (static_branch_unlikely(&___once_key)) { \ ___ret = __do_once_sleepable_start(&___done); \
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 195/563 hwmon: (mlxreg-fan) Separate methods of fan setting coming from different subsystems
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Vadim Pasternak <[email protected]>
[ Upstream commit c02e4644f8ac9c501077ef5ac53ae7fc51472d49 ]
Distinct between fan speed setting request coming for hwmon and thermal subsystems.
There are fields 'last_hwmon_state' and 'last_thermal_state' in the structure 'mlxreg_fan_pwm', which respectively store the cooling state set by the 'hwmon' and 'thermal' subsystem.
The purpose is to make arbitration of fan speed setting. For example, if fan speed required to be not lower than some limit, such setting is to be performed through 'hwmon' subsystem, thus 'thermal' subsystem will not set fan below this limit.
Currently, the 'last_thermal_state' is also be updated by 'hwmon' causing cooling state to never be set to a lower value.
Eliminate update of 'last_thermal_state', when request is coming from 'hwmon' subsystem.
--- drivers/hwmon/mlxreg-fan.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-)
drivers/hwmon/mlxreg-fan.c +16 -8
@@ -113,8 +113,8 @@ struct mlxreg_fan {int divider; }; -static int mlxreg_fan_set_cur_state (struct thermal_cooling_device *cdev, -unsigned long state); +static int _mlxreg_fan_set_cur_state (struct thermal_cooling_device *cdev, +unsigned long state,bool thermal); static int mlxreg_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
@@ -224,8 +224,9 @@ mlxreg_fan_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,* last thermal state. */ if (pwm->last_hwmon_state >= pwm->last_thermal_state) -return mlxreg_fan_set_cur_state (pwm->cdev, - pwm->last_hwmon_state); +return _mlxreg_fan_set_cur_state (pwm->cdev, + pwm->last_hwmon_state, + false);return 0 ; }return regmap_write (fan->regmap, pwm->reg, val);
@@ -357,9 +358,8 @@ static int mlxreg_fan_get_cur_state(struct thermal_cooling_device *cdev,return 0 ; } -static int mlxreg_fan_set_cur_state (struct thermal_cooling_device *cdev, -unsigned long state) - +static int _mlxreg_fan_set_cur_state (struct thermal_cooling_device *cdev, +unsigned long state,bool thermal) {struct mlxreg_fan_pwm *pwm = cdev->devdata;struct mlxreg_fan *fan = pwm->fan;
@@ -369,7 +369,8 @@ static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev,return -EINVAL ;/* Save thermal state. */ - pwm->last_thermal_state = state; +if (thermal) + pwm->last_thermal_state = state; state = max_t(unsigned long, state, pwm->last_hwmon_state); err = regmap_write(fan->regmap, pwm->reg,
@@ -381,6 +382,13 @@ static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev,return 0 ; } +static int mlxreg_fan_set_cur_state (struct thermal_cooling_device *cdev, +unsigned long state) + +{ +return _mlxreg_fan_set_cur_state (cdev, state, true); +} +static const struct thermal_cooling_device_ops mlxreg_fan_cooling_ops = { .get_max_state = mlxreg_fan_get_max_state, .get_cur_state = mlxreg_fan_get_cur_state,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 196/563 tools/nolibc: add stdbool.h to nolibc includes
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: André Almeida <[email protected]>
[ Upstream commit 2d965c1ae4135ed6f505661458f6dabd39488dac ]
Otherwise tests compiled with only "-include nolibc.h" will fail with "error: unknown type name 'bool'", even though a stdbool.h is available from nolibc.
--- tools/include/nolibc/nolibc.h | 1 + 1 file changed, 1 insertion(+)
tools/include/nolibc/nolibc.h +1 -0
@@ -116,6 +116,7 @@#include "sched.h" #include "signal.h" #include "unistd.h" +#include "stdbool.h" #include "stdio.h" #include "stdlib.h" #include "string.h"
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 197/563 thermal/drivers/qcom: Make LMH select QCOM_SCM
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit 57eda47bd14b0c2876f2db42e757c57b7a671965 ]
The QCOM_SCM symbol is not user-visible, so it makes little sense to depend on it. Make LMH driver select QCOM_SCM as all other drivers do and, as the dependecy is now correctly handled, enable || COMPILE_TEST in order to include the driver into broader set of build tests.
--- drivers/thermal/qcom/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
drivers/thermal/qcom/Kconfig +2 -1
@@ -34,7 +34,8 @@ config QCOM_SPMI_TEMP_ALARM config QCOM_LMH tristate "Qualcomm Limits Management Hardware" - depends on ARCH_QCOM && QCOM_SCM + depends on ARCH_QCOM || COMPILE_TEST + select QCOM_SCM help This enables initialization of Qualcomm limits management hardware(LMh). LMh allows for hardware-enforced mitigation for cpus based on
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 198/563 thermal/drivers/qcom/lmh: Add missing IRQ includes
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit b50b2c53f98fcdb6957e184eb488c16502db9575 ]
As reported by LKP, the Qualcomm LMH driver needs to include several IRQ-related headers, which decrlare necessary IRQ functionality. Currently driver builds on ARM64 platforms, where the headers are pulled in implicitly by other headers, but fails to build on other platforms.
--- drivers/thermal/qcom/lmh.c | 2 ++ 1 file changed, 2 insertions(+)
drivers/thermal/qcom/lmh.c +2 -0
@@ -5,6 +5,8 @@*/ #include <linux/module.h> #include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/irqdesc.h> #include <linux/irqdomain.h> #include <linux/err.h> #include <linux/platform_device.h>
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 199/563 i2c: mediatek: fix potential incorrect use of I2C_MASTER_WRRD
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Leilk.Liu <[email protected]>
[ Upstream commit b492183652808e0f389272bf63dc836241b287ff ]
The old IC does not support the I2C_MASTER_WRRD (write-then-read) function, but the current code’s handling of i2c->auto_restart may potentially lead to entering the I2C_MASTER_WRRD software flow, resulting in unexpected bugs.
Instead of repurposing the auto_restart flag, add a separate flag to signal I2C_MASTER_WRRD operations.
Also fix handling of msgs. If the operation (i2c->op) is I2C_MASTER_WRRD, then the msgs pointer is incremented by 2. For all other operations, msgs is simply incremented by 1.
--- drivers/i2c/busses/i2c-mt65xx.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-)
drivers/i2c/busses/i2c-mt65xx.c +10 -7
@@ -1243,6 +1243,7 @@ static int mtk_i2c_transfer(struct i2c_adapter *adap, {int ret;int left_num = num; +bool write_then_read_en = false;struct mtk_i2c *i2c =i2c_get_adapdata (adap); ret =clk_bulk_enable (I2C_MT65XX_CLK_MAX , i2c->clocks);
@@ -1256,6 +1257,7 @@ static int mtk_i2c_transfer(struct i2c_adapter *adap,if (!(msgs[0 ].flags &I2C_M_RD ) && (msgs[1 ].flags &I2C_M_RD ) && msgs[0 ].addr == msgs[1 ].addr) { i2c->auto_restart =0 ; + write_then_read_en = true; } }
@@ -1280,12 +1282,10 @@ static int mtk_i2c_transfer(struct i2c_adapter *adap,else i2c->op =I2C_MASTER_WR ; -if (!i2c->auto_restart) { -if (num >1 ) { -/* combined two messages into one transaction */ - i2c->op =I2C_MASTER_WRRD ; - left_num--; - } +if (write_then_read_en) { +/* combined two messages into one transaction */ + i2c->op =I2C_MASTER_WRRD ; + left_num--; }/* always use DMA mode. */
@@ -1293,7 +1293,10 @@ static int mtk_i2c_transfer(struct i2c_adapter *adap,if (ret <0 ) goto err_exit; - msgs++; +if (i2c->op ==I2C_MASTER_WRRD ) + msgs +=2 ; +else + msgs++; }/* the return value is number of executed messages */ ret = num;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 200/563 i2c: spacemit: ensure bus release check runs when wait_bus_idle() fails
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Troy Mitchell <[email protected]>
[ Upstream commit 41d6f90ef5dc2841bdd09817c63a3d6188473b9b ]
spacemit_i2c_wait_bus_idle() only returns 0 on success or a negative error code on failure.
Since 'ret' can never be positive, the final 'else' branch was unreachable, and spacemit_i2c_check_bus_release() was never called.
This commit guarantees we attempt to release the bus whenever waiting for an idle bus fails.
--- drivers/i2c/busses/i2c-k1.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
drivers/i2c/busses/i2c-k1.c +5 -4
@@ -476,12 +476,13 @@ static int spacemit_i2c_xfer(struct i2c_adapter *adapt, struct i2c_msg *msgs, inspacemit_i2c_enable (i2c); ret =spacemit_i2c_wait_bus_idle (i2c); -if (!ret) +if (!ret) { ret =spacemit_i2c_xfer_msg (i2c); -else if (ret <0 ) -dev_dbg (i2c->dev,"i2c transfer error: %d\n" , ret); -else +if (ret <0 ) +dev_dbg (i2c->dev,"i2c transfer error: %d\n" , ret); + }else {spacemit_i2c_check_bus_release (i2c); + }spacemit_i2c_disable (i2c);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 201/563 i2c: spacemit: remove stop function to avoid bus error
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Troy Mitchell <[email protected]>
[ Upstream commit 445522fe7aad6131b2747ae8c76f77266054cd84 ]
Previously, STOP handling was split into two separate steps:
1) clear TB/STOP/START/ACK bits
2) issue STOP by calling spacemit_i2c_stop()
This left a small window where the control register was updated twice, which can confuse the controller. While this race has not been observed with interrupt-driven transfers, it reliably causes bus errors in PIO mode.
Inline the STOP sequence into the IRQ handler and ensure that control register bits are updated atomically in a single writel().
--- drivers/i2c/busses/i2c-k1.c | 26 +++++++------------------- 1 file changed, 7 insertions(+), 19 deletions(-)
drivers/i2c/busses/i2c-k1.c +7 -19
@@ -267,19 +267,6 @@ static void spacemit_i2c_start(struct spacemit_i2c_dev *i2c)writel (val, i2c->base +SPACEMIT_ICR ); } -static void spacemit_i2c_stop (struct spacemit_i2c_dev *i2c) -{ -u32 val; - - val =readl (i2c->base +SPACEMIT_ICR ); - val |=SPACEMIT_CR_STOP |SPACEMIT_CR_ALDIE |SPACEMIT_CR_TB ; - -if (i2c->read) - val |=SPACEMIT_CR_ACKNAK ; - -writel (val, i2c->base +SPACEMIT_ICR ); -} -static int spacemit_i2c_xfer_msg (struct spacemit_i2c_dev *i2c) {unsigned long time_left;
@@ -412,7 +399,6 @@ static irqreturn_t spacemit_i2c_irq_handler(int irq, void *devid) val =readl (i2c->base +SPACEMIT_ICR ); val &= ~(SPACEMIT_CR_TB |SPACEMIT_CR_ACKNAK |SPACEMIT_CR_STOP |SPACEMIT_CR_START ); -writel (val, i2c->base +SPACEMIT_ICR );switch (i2c->state) {case SPACEMIT_STATE_START :
@@ -429,14 +415,16 @@ static irqreturn_t spacemit_i2c_irq_handler(int irq, void *devid) }if (i2c->state !=SPACEMIT_STATE_IDLE ) { + val |=SPACEMIT_CR_TB |SPACEMIT_CR_ALDIE ; +if (spacemit_i2c_is_last_msg (i2c)) {/* trigger next byte with stop */ -spacemit_i2c_stop (i2c); - }else { -/* trigger next byte */ - val |=SPACEMIT_CR_ALDIE |SPACEMIT_CR_TB ; -writel (val, i2c->base +SPACEMIT_ICR ); + val |=SPACEMIT_CR_STOP ; + +if (i2c->read) + val |=SPACEMIT_CR_ACKNAK ; } +writel (val, i2c->base +SPACEMIT_ICR ); } err_out:
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 202/563 i2c: spacemit: disable SDA glitch fix to avoid restart delay
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Troy Mitchell <[email protected]>
[ Upstream commit 11f40684ccd84e792eced110f0a5d3d6adbdf90d ]
The K1 I2C controller has an SDA glitch fix that introduces a small delay on restart signals. While this feature can suppress glitches on SDA when SCL = 0, it also delays the restart signal, which may cause unexpected behavior in some transfers.
The glitch itself does not affect normal I2C operation, because the I2C specification allows SDA to change while SCL is low.
To ensure correct transmission for every message, we disable the SDA glitch fix by setting the RCR.SDA_GLITCH_NOFIX bit during initialization.
This guarantees that restarts are issued promptly without unintended delays.
--- drivers/i2c/busses/i2c-k1.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
drivers/i2c/busses/i2c-k1.c +11 -0
@@ -14,6 +14,7 @@#define SPACEMIT_ICR 0x0/* Control register */ #define SPACEMIT_ISR 0x4/* Status register */ #define SPACEMIT_IDBR 0xc/* Data buffer register */ +#define SPACEMIT_IRCR 0x18/* Reset cycle counter */ #define SPACEMIT_IBMR 0x1c/* Bus monitor register */ /* SPACEMIT_ICR register fields */
@@ -76,6 +77,8 @@ SPACEMIT_SR_GCAD | SPACEMIT_SR_IRF | SPACEMIT_SR_ITE | \ SPACEMIT_SR_ALD) +#define SPACEMIT_RCR_SDA_GLITCH_NOFIX BIT(7)/* bypass the SDA glitch fix */ +/* SPACEMIT_IBMR register fields */ #define SPACEMIT_BMR_SDA BIT(0)/* SDA line level */ #define SPACEMIT_BMR_SCL BIT(1)/* SCL line level */
@@ -237,6 +240,14 @@ static void spacemit_i2c_init(struct spacemit_i2c_dev *i2c) val |=SPACEMIT_CR_MSDE |SPACEMIT_CR_MSDIE ;writel (val, i2c->base +SPACEMIT_ICR ); + +/* +* The glitch fix in the K1 I2C controller introduces a delay +* on restart signals, so we disable the fix here. +*/ + val =readl (i2c->base +SPACEMIT_IRCR ); + val |=SPACEMIT_RCR_SDA_GLITCH_NOFIX ; +writel (val, i2c->base +SPACEMIT_IRCR ); } static inline void
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 203/563 i2c: spacemit: check SDA instead of SCL after bus reset
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Troy Mitchell <[email protected]>
[ Upstream commit db7720ef50e0103be70a3887bc66e9c909933ad9 ]
After calling spacemit_i2c_conditionally_reset_bus(), the controller should ensure that the SDA line is release before proceeding.
Previously, the driver checked the SCL line instead, which does not guarantee that the bus is truly idle.
This patch changes the check to verify SDA. This ensures proper bus recovery and avoids potential communication errors after a conditional reset.
--- drivers/i2c/busses/i2c-k1.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/i2c/busses/i2c-k1.c +2 -2
@@ -172,9 +172,9 @@ static void spacemit_i2c_conditionally_reset_bus(struct spacemit_i2c_dev *i2c)spacemit_i2c_reset (i2c);usleep_range (10 ,20 ); -/* check scl status again */ +/* check sda again here */ status =readl (i2c->base +SPACEMIT_IBMR ); -if (!(status &SPACEMIT_BMR_SCL )) +if (!(status &SPACEMIT_BMR_SDA ))dev_warn_ratelimited (i2c->dev,"unit reset failed\n" ); }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 204/563 i2c: spacemit: ensure SDA is released after bus reset
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Troy Mitchell <[email protected]>
[ Upstream commit 0de61943244dec418d396633a587adca1c350b55 ]
After performing a conditional bus reset, the controller must ensure that the SDA line is actually released.
Previously, the reset routine only performed a single check, which could leave the bus in a locked state in some situations.
This patch introduces a loop that toggles the reset cycle and issues a reset request up to SPACEMIT_BUS_RESET_CLK_CNT_MAX times, checking SDA after each attempt. If SDA is released before the maximum count, the function returns early. Otherwise, a warning is emitted.
This change improves bus recovery reliability.
--- drivers/i2c/busses/i2c-k1.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-)
drivers/i2c/busses/i2c-k1.c +20 -1
@@ -3,6 +3,7 @@* Copyright (C) 2024-2025 Troy Mitchell <[email protected]> */ +#include <linux/bitfield.h> #include <linux/clk.h> #include <linux/i2c.h> #include <linux/iopoll.h>
@@ -26,7 +27,8 @@#define SPACEMIT_CR_MODE_FAST BIT(8)/* bus mode (master operation) */ /* Bit 9 is reserved */ #define SPACEMIT_CR_UR BIT(10)/* unit reset */ -/* Bits 11-12 are reserved */ +#define SPACEMIT_CR_RSTREQ BIT(11)/* i2c bus reset request */ +/* Bit 12 is reserved */ #define SPACEMIT_CR_SCLE BIT(13)/* master clock enable */ #define SPACEMIT_CR_IUE BIT(14)/* unit enable */ /* Bits 15-17 are reserved */
@@ -78,6 +80,8 @@ SPACEMIT_SR_ALD)#define SPACEMIT_RCR_SDA_GLITCH_NOFIX BIT(7)/* bypass the SDA glitch fix */ +/* the cycles of SCL during bus reset */ +#define SPACEMIT_RCR_FIELD_RST_CYC GENMASK(3, 0)/* SPACEMIT_IBMR register fields */ #define SPACEMIT_BMR_SDA BIT(0)/* SDA line level */
@@ -91,6 +95,8 @@#define SPACEMIT_SR_ERR (SPACEMIT_SR_BED | SPACEMIT_SR_RXOV | SPACEMIT_SR_ALD) +#define SPACEMIT_BUS_RESET_CLK_CNT_MAX 9 +enum spacemit_i2c_state {SPACEMIT_STATE_IDLE ,SPACEMIT_STATE_START ,
@@ -163,6 +169,7 @@ static int spacemit_i2c_handle_err(struct spacemit_i2c_dev *i2c)static void spacemit_i2c_conditionally_reset_bus (struct spacemit_i2c_dev *i2c) {u32 status; +u8 clk_cnt;/* if bus is locked, reset unit. 0: locked */ status =readl (i2c->base +SPACEMIT_IBMR );
@@ -172,6 +179,18 @@ static void spacemit_i2c_conditionally_reset_bus(struct spacemit_i2c_dev *i2c)spacemit_i2c_reset (i2c);usleep_range (10 ,20 ); +for (clk_cnt =0 ; clk_cnt <SPACEMIT_BUS_RESET_CLK_CNT_MAX ; clk_cnt++) { + status =readl (i2c->base +SPACEMIT_IBMR ); +if (status &SPACEMIT_BMR_SDA ) +return ; + +/* There's nothing left to save here, we are about to exit */ +writel (FIELD_PREP (SPACEMIT_RCR_FIELD_RST_CYC ,1 ), + i2c->base +SPACEMIT_IRCR ); +writel (SPACEMIT_CR_RSTREQ , i2c->base +SPACEMIT_ICR ); +usleep_range (20 ,30 ); + } +/* check sda again here */ status =readl (i2c->base +SPACEMIT_IBMR );if (!(status &SPACEMIT_BMR_SDA ))
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 205/563 i2c: designware: Fix clock issue when PM is disabled
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Kunihiko Hayashi <[email protected]>
[ Upstream commit 70e633bedeeb4a7290d3b1dd9d49cc2bae25a46f ]
When the driver is removed, the clocks are first enabled by calling pm_runtime_get_sync(), and then disabled with pm_runtime_put_sync().
If CONFIG_PM=y, clocks for this controller are disabled when it's in the idle state. So the clocks are properly disabled when the driver exits.
Othewise, the clocks are always enabled and the PM functions have no effect. Therefore, the driver exits without disabling the clocks.
# cat /sys/kernel/debug/clk/clk-pclk/clk_enable_count
18
# echo 1214a000.i2c > /sys/bus/platform/drivers/i2c_designware/bind
# cat /sys/kernel/debug/clk/clk-pclk/clk_enable_count
20
# echo 1214a000.i2c > /sys/bus/platform/drivers/i2c_designware/unbind
# cat /sys/kernel/debug/clk/clk-pclk/clk_enable_count
20To ensure that the clocks can be disabled correctly even without CONFIG_PM=y, should add the following fixes:
- Replace with pm_runtime_put_noidle(), which only decrements the runtime PM usage count.
- Call i2c_dw_prepare_clk(false) to explicitly disable the clocks.
--- drivers/i2c/busses/i2c-designware-platdrv.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
drivers/i2c/busses/i2c-designware-platdrv.c +3 -1
@@ -331,9 +331,11 @@ static void dw_i2c_plat_remove(struct platform_device *pdev)i2c_dw_disable (dev);pm_runtime_dont_use_autosuspend (device); -pm_runtime_put_sync (device); +pm_runtime_put_noidle (device);dw_i2c_plat_pm_cleanup (dev); +i2c_dw_prepare_clk (dev, false); +i2c_dw_remove_lock_support (dev);reset_control_assert (dev->rst);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 206/563 i2c: designware: Add disabling clocks when probe fails
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Kunihiko Hayashi <[email protected]>
[ Upstream commit c149841b069ccc6e480b00e11f35a57b5d88c7bb ]
After an error occurs during probing state, dw_i2c_plat_pm_cleanup() is called. However, this function doesn't disable clocks and the clock-enable count keeps increasing. Should disable these clocks explicitly.
--- drivers/i2c/busses/i2c-designware-platdrv.c | 1 + 1 file changed, 1 insertion(+)
drivers/i2c/busses/i2c-designware-platdrv.c +1 -0
@@ -314,6 +314,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) exit_probe:dw_i2c_plat_pm_cleanup (dev); +i2c_dw_prepare_clk (dev, false); exit_reset:reset_control_assert (dev->rst);return ret;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 207/563 libbpf: Fix error when st-prefix_ops and ops from differ btf
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: D. Wythe <[email protected]>
[ Upstream commit 0cc114dc358cf8da2ca23a366e761e89a46ca277 ]
When a module registers a struct_ops, the struct_ops type and its corresponding map_value type ("bpf_struct_ops_") may reside in different btf objects, here are four possible case:
+--------+---------------+-------------+---------------------------------+ | |bpf_struct_ops_| xxx_ops | | +--------+---------------+-------------+---------------------------------+ | case 0 | btf_vmlinux | btf_vmlinux | be used and reg only in vmlinux | +--------+---------------+-------------+---------------------------------+ | case 1 | btf_vmlinux | mod_btf | INVALID | +--------+---------------+-------------+---------------------------------+ | case 2 | mod_btf | btf_vmlinux | reg in mod but be used both in | | | | | vmlinux and mod. | +--------+---------------+-------------+---------------------------------+ | case 3 | mod_btf | mod_btf | be used and reg only in mod | +--------+---------------+-------------+---------------------------------+
Currently we figure out the mod_btf by searching with the struct_ops type, which makes it impossible to figure out the mod_btf when the struct_ops type is in btf_vmlinux while it's corresponding map_value type is in mod_btf (case 2).
The fix is to use the corresponding map_value type ("bpf_struct_ops_") as the lookup anchor instead of the struct_ops type to figure out the btf and mod_btf via find_ksym_btf_id(), and then we can locate the kern_type_id via btf__find_by_name_kind() with the btf we just obtained from find_ksym_btf_id().
With this change the lookup obtains the correct btf and mod_btf for case 2, preserves correct behavior for other valid cases, and still fails as expected for the invalid scenario (case 1).
--- tools/lib/bpf/libbpf.c | 36 +++++++++++++++++------------------- 1 file changed, 17 insertions(+), 19 deletions(-)
tools/lib/bpf/libbpf.c +17 -19
@@ -1013,35 +1013,33 @@ find_struct_ops_kern_types(struct bpf_object *obj, const char *tname_raw,const struct btf_member *kern_data_member;struct btf *btf =NULL ;__s32 kern_vtype_id, kern_type_id; -char tname[256 ]; +char tname[192 ], stname[256 ];__u32 i;snprintf (tname,sizeof (tname),"%.*s" , (int )bpf_core_essential_name_len (tname_raw), tname_raw); - kern_type_id =find_ksym_btf_id (obj, tname,BTF_KIND_STRUCT , - &btf, mod_btf); -if (kern_type_id <0 ) { -pr_warn ("struct_ops init_kern: struct %s is not found in kernel BTF\n" , - tname); -return kern_type_id; - } - kern_type =btf__type_by_id (btf, kern_type_id); +snprintf (stname,sizeof (stname),"%s%s" ,STRUCT_OPS_VALUE_PREFIX , tname); -/* Find the corresponding "map_value" type that will be used -* in map_update(BPF_MAP_TYPE_STRUCT_OPS). For example, -* find "struct bpf_struct_ops_tcp_congestion_ops" from the -* btf_vmlinux. +/* Look for the corresponding "map_value" type that will be used +* in map_update(BPF_MAP_TYPE_STRUCT_OPS) first, figure out the btf +* and the mod_btf. +* For example, find "struct bpf_struct_ops_tcp_congestion_ops". */ - kern_vtype_id =find_btf_by_prefix_kind (btf,STRUCT_OPS_VALUE_PREFIX , - tname,BTF_KIND_STRUCT ); + kern_vtype_id =find_ksym_btf_id (obj, stname,BTF_KIND_STRUCT , &btf, mod_btf);if (kern_vtype_id <0 ) { -pr_warn ("struct_ops init_kern: struct %s%s is not found in kernel BTF\n" , -STRUCT_OPS_VALUE_PREFIX , tname); +pr_warn ("struct_ops init_kern: struct %s is not found in kernel BTF\n" , stname);return kern_vtype_id; } kern_vtype =btf__type_by_id (btf, kern_vtype_id); + kern_type_id =btf__find_by_name_kind (btf, tname,BTF_KIND_STRUCT ); +if (kern_type_id <0 ) { +pr_warn ("struct_ops init_kern: struct %s is not found in kernel BTF\n" , tname); +return kern_type_id; + } + kern_type =btf__type_by_id (btf, kern_type_id); +/* Find "struct tcp_congestion_ops" from * struct bpf_struct_ops_tcp_congestion_ops { * [ ... ]
@@ -1054,8 +1052,8 @@ find_struct_ops_kern_types(struct bpf_object *obj, const char *tname_raw,break ; }if (i ==btf_vlen (kern_vtype)) { -pr_warn ("struct_ops init_kern: struct %s data is not found in struct %s%s\n" , - tname,STRUCT_OPS_VALUE_PREFIX , tname); +pr_warn ("struct_ops init_kern: struct %s data is not found in struct %s\n" , + tname, stname);return -EINVAL ; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 208/563 bpf: Enforce expected_attach_type for tailcall compatibility
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Daniel Borkmann <[email protected]>
[ Upstream commit 4540aed51b12bc13364149bf95f6ecef013197c0 ]
Yinhao et al. recently reported:
Our fuzzer tool discovered an uninitialized pointer issue in the bpf_prog_test_run_xdp() function within the Linux kernel's BPF subsystem. This leads to a NULL pointer dereference when a BPF program attempts to deference the txq member of struct xdp_buff object.
The test initializes two programs of BPF_PROG_TYPE_XDP: progA acts as the entry point for bpf_prog_test_run_xdp() and its expected_attach_type can neither be of be BPF_XDP_DEVMAP nor BPF_XDP_CPUMAP. progA calls into a slot of a tailcall map it owns. progB's expected_attach_type must be BPF_XDP_DEVMAP to pass xdp_is_valid_access() validation. The program returns struct xdp_md's egress_ifindex, and the latter is only allowed to be accessed under mentioned expected_attach_type. progB is then inserted into the tailcall which progA calls.
The underlying issue goes beyond XDP though. Another example are programs of type BPF_PROG_TYPE_CGROUP_SOCK_ADDR. sock_addr_is_valid_access() as well as sock_addr_func_proto() have different logic depending on the programs' expected_attach_type. Similarly, a program attached to BPF_CGROUP_INET4_GETPEERNAME should not be allowed doing a tailcall into a program which calls bpf_bind() out of BPF which is only enabled for BPF_CGROUP_INET4_CONNECT.
In short, specifying expected_attach_type allows to open up additional functionality or restrictions beyond what the basic bpf_prog_type enables. The use of tailcalls must not violate these constraints. Fix it by enforcing expected_attach_type in __bpf_prog_map_compatible().
Note that we only enforce this for tailcall maps, but not for BPF devmaps or
cpumaps: There, the programs are invoked through dev_map_bpf_prog_run*() and cpu_map_bpf_prog_run*() which set up a new environment / context and therefore these situations are not prone to this issue.
--- include/linux/bpf.h | 1 + kernel/bpf/core.c | 5 +++++ 2 files changed, 6 insertions(+)
include/linux/bpf.h +1 -0
@@ -285,6 +285,7 @@ struct bpf_map_owner {bool xdp_has_frags;u64 storage_cookie[MAX_BPF_CGROUP_STORAGE_TYPE ];const struct btf_type *attach_func_proto; +enum bpf_attach_type expected_attach_type; };struct bpf_map {
kernel/bpf/core.c +5 -0
@@ -2393,6 +2393,7 @@ static bool __bpf_prog_map_compatible(struct bpf_map *map, map->owner->type = prog_type; map->owner->jited = fp->jited; map->owner->xdp_has_frags = aux->xdp_has_frags; + map->owner->expected_attach_type = fp->expected_attach_type; map->owner->attach_func_proto = aux->attach_func_proto;for_each_cgroup_storage_type (i) { map->owner->storage_cookie[i] =
@@ -2404,6 +2405,10 @@ static bool __bpf_prog_map_compatible(struct bpf_map *map, ret = map->owner->type == prog_type && map->owner->jited == fp->jited && map->owner->xdp_has_frags == aux->xdp_has_frags; +if (ret && + map->map_type ==BPF_MAP_TYPE_PROG_ARRAY && + map->owner->expected_attach_type != fp->expected_attach_type) + ret = false;for_each_cgroup_storage_type (i) {if (!ret)break ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 209/563 i3c: fix big-endian FIFO transfers
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Arnd Bergmann <[email protected]>
[ Upstream commit d6ddd9beb1a5c32acb9b80f5c2cd8b17f41371d1 ]
Short MMIO transfers that are not a multiple of four bytes in size need a special case for the final bytes, however the existing implementation is not endian-safe and introduces an incorrect byteswap on big-endian kernels.
This usually does not cause problems because most systems are little-endian and most transfers are multiple of four bytes long, but still needs to be fixed to avoid the extra byteswap.
Change the special case for both i3c_writel_fifo() and i3c_readl_fifo() to use non-byteswapping writesl() and readsl() with a single element instead of the byteswapping writel()/readl() that are meant for individual MMIO registers. As data is copied between a FIFO and a memory buffer, the writesl()/readsl() loops are typically based on __raw_readl()/ __raw_writel(), resulting in the order of bytes in the FIFO to match the order in the buffer, regardless of the CPU endianess.
The earlier versions in the dw-i3c and i3c-master-cdns had a correct implementation, but the generic version that was recently added broke it.
--- drivers/i3c/internals.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)
drivers/i3c/internals.h +10 -2
@@ -38,7 +38,11 @@ static inline void i3c_writel_fifo(void __iomem *addr, const void *buf,u32 tmp =0 ;memcpy (&tmp, buf + (nbytes & ~3 ), nbytes &3 ); -writel (tmp, addr); +/* +* writesl() instead of writel() to keep FIFO +* byteorder on big-endian targets +*/ +writesl (addr, &tmp,1 ); } }
@@ -55,7 +59,11 @@ static inline void i3c_readl_fifo(const void __iomem *addr, void *buf,if (nbytes &3 ) {u32 tmp; - tmp =readl (addr); +/* +* readsl() instead of readl() to keep FIFO +* byteorder on big-endian targets +*/ +readsl (addr, &tmp,1 );memcpy (buf + (nbytes & ~3 ), &tmp, nbytes &3 ); } }
Signature · 1 line
2.51.0
RE: [PATCH 6.17 209/563] i3c: fix big-endian FIFO transfers
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Greg,
Please ignore this one - the next version of it has already been merged.
Thanks,
Manikanta
Quoted 83 lines
-----Original Message-----
From: Greg Kroah-Hartman <[email protected]>
Sent: Monday, October 13, 2025 8:11 PM
To: [email protected]
Cc: Greg Kroah-Hartman <[email protected]>; [email protected]; Guntupalli, Manikanta <[email protected]>; Arnd Bergmann <[email protected]>; Jorge Marques <[email protected]>; Alexandre Belloni <[email protected]>; Sasha Levin <[email protected]>
Subject: [PATCH 6.17 209/563] i3c: fix big-endian FIFO transfers6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Arnd Bergmann <[email protected]>
[ Upstream commit
d6ddd9beb1a5c32acb9b80f5c2cd8b17f41371d1]Short MMIO transfers that are not a multiple of four bytes in size need a special case for the final bytes, however the existing implementation is not endian-safe and introduces an incorrect byteswap on big-endian kernels.
This usually does not cause problems because most systems are little-endian and most transfers are multiple of four bytes long, but still needs to be fixed to avoid the extra byteswap.
Change the special case for both
i3c_writel_fifo()andi3c_readl_fifo()to use non- byteswappingwritesl()andreadsl()with a single element instead of the byteswapping writel()/readl() that are meant for individual MMIO registers. As data is copied between a FIFO and a memory buffer, the writesl()/readsl() loops are typically based on __raw_readl()/__raw_writel(), resulting in the order of bytes in the FIFO to match the order in the buffer, regardless of the CPU endianess.The earlier versions in the dw-i3c and i3c-master-cdns had a correct implementation, but the generic version that was recently added broke it.
Fixes 733b439375b4 ("i3c: master: Add inline i3c_readl_fifo() and i3c_writel_fifo()")Cc Manikanta Guntupalli <[email protected]>Signed-off-by Arnd Bergmann <[email protected]>Reviewed-by Jorge Marques <[email protected]>Signed-off-by Alexandre Belloni <[email protected]>Signed-off-by Sasha Levin <[email protected]>--- drivers/i3c/internals.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)drivers/i3c/internals.h index renamed from drivers/i3c/internals.h +0
-0
0d857cc68cc5d..79ceaa5f5afd6100644drivers/i3c/internals.h +10
-2@@ -38,7 +38,11 @@ static inline void i3c_writel_fifo(void __iomem *addr, constvoid *buf, u32 tmp = 0;memcpy (&tmp, buf + (nbytes & ~3 ), nbytes &3 ); -writel (tmp, addr); +/* +* writesl() instead of writel() to keep FIFO +* byteorder on big-endian targets +*/ +writesl (addr, &tmp,1 ); } }@@ -55,7 +59,11 @@ static inline void i3c_readl_fifo(const void __iomem *addr, void *buf, if (nbytes & 3) {u32 tmp; - tmp =readl (addr); +/* +* readsl() instead of readl() to keep FIFO +* byteorder on big-endian targets +*/ +readsl (addr, &tmp,1 );memcpy (buf + (nbytes & ~3 ), &tmp, nbytes &3 ); }}
--
2.51.0
Greg Kroah-Hartman
maintainerRe: [PATCH 6.17 209/563] i3c: fix big-endian FIFO transfers
Quoted 7 lines · Manikanta
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Greg,
Please ignore this one - the next version of it has already been merged.
I do not understand, that is what this commit is:
Quoted 7 lines
Quoted 7 lines
6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Arnd Bergmann <[email protected]>
[ Upstream commit
d6ddd9beb1a5c32acb9b80f5c2cd8b17f41371d1]
We reference the git id here.
thanks,
greg k-h
Greg Kroah-Hartman
maintainerPATCH 210/563 mfd: max77705: Setup the core driver as an interrupt controller
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dzmitry Sankouski <[email protected]>
[ Upstream commit 605c9820e44de2da7d67acf66484136561da63a2 ]
Current implementation describes only MFD's own topsys interrupts. However, max77705 has a register which indicates interrupt source, i.e. it acts as an interrupt controller. There's 4 interrupt sources in
max77705: topsys, charger, fuelgauge, usb type-c manager.
Setup max77705 MFD parent as an interrupt controller. Delete topsys interrupts because currently unused.
Remove shared interrupt flag, because we're are an interrupt controller now, and subdevices should request interrupts from us.
--- drivers/mfd/max77705.c | 35 ++++++++++++++--------------------- 1 file changed, 14 insertions(+), 21 deletions(-)
drivers/mfd/max77705.c +14 -21
@@ -61,21 +61,21 @@ static const struct regmap_config max77705_regmap_config = { .max_register = MAX77705_PMIC_REG_USBC_RESET, }; -static const struct regmap_irq max77705_topsys_irqs[] = { - { .mask =MAX77705_SYSTEM_IRQ_BSTEN_INT , }, - { .mask =MAX77705_SYSTEM_IRQ_SYSUVLO_INT , }, - { .mask =MAX77705_SYSTEM_IRQ_SYSOVLO_INT , }, - { .mask =MAX77705_SYSTEM_IRQ_TSHDN_INT , }, - { .mask =MAX77705_SYSTEM_IRQ_TM_INT , }, +static const struct regmap_irq max77705_irqs[] = { + { .mask =MAX77705_SRC_IRQ_CHG , }, + { .mask =MAX77705_SRC_IRQ_TOP , }, + { .mask =MAX77705_SRC_IRQ_FG , }, + { .mask =MAX77705_SRC_IRQ_USBC , }, }; -static const struct regmap_irq_chip max77705_topsys_irq_chip = { - .name ="max77705-topsys" , - .status_base =MAX77705_PMIC_REG_SYSTEM_INT , - .mask_base =MAX77705_PMIC_REG_SYSTEM_INT_MASK , +static const struct regmap_irq_chip max77705_irq_chip = { + .name ="max77705" , + .status_base =MAX77705_PMIC_REG_INTSRC , + .ack_base =MAX77705_PMIC_REG_INTSRC , + .mask_base =MAX77705_PMIC_REG_INTSRC_MASK , .num_regs =1 , - .irqs = max77705_topsys_irqs, - .num_irqs =ARRAY_SIZE (max77705_topsys_irqs), + .irqs = max77705_irqs, + .num_irqs =ARRAY_SIZE (max77705_irqs), };static int max77705_i2c_probe (struct i2c_client *i2c)
@@ -113,19 +113,12 @@ static int max77705_i2c_probe(struct i2c_client *i2c) ret =devm_regmap_add_irq_chip (dev, max77705->regmap, i2c->irq, -IRQF_ONESHOT |IRQF_SHARED ,0 , - &max77705_topsys_irq_chip, +IRQF_ONESHOT ,0 , + &max77705_irq_chip, &irq_data);if (ret)return dev_err_probe (dev, ret,"Failed to add IRQ chip\n" ); -/* Unmask interrupts from all blocks in interrupt source register */ - ret =regmap_update_bits (max77705->regmap, -MAX77705_PMIC_REG_INTSRC_MASK , -MAX77705_SRC_IRQ_ALL , (unsigned int )~MAX77705_SRC_IRQ_ALL ); -if (ret <0 ) -return dev_err_probe (dev, ret,"Could not unmask interrupts in INTSRC\n" ); - domain =regmap_irq_get_domain (irq_data); ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 211/563 drm/sched: Fix a race in DRM_GPU_SCHED_STAT_NO_HANG test
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Tvrtko Ursulin <[email protected]>
[ Upstream commit 2650bc4007c15e05f995f472b4fc89e793162bc4 ]
The "skip reset" test waits for the timeout handler to run for the duration of 2 * MOCK_TIMEOUT, and because the mock scheduler opted to remove the "skip reset" flag once it fires, this gives opportunity for the timeout handler to run twice. Second time the job will be removed from the mock scheduler job list and the drm_mock_sched_advance() call in the test will fail.
Fix it by making the "don't reset" flag persist for the lifetime of the job and add a new flag to verify that the code path had executed as expected.
--- drivers/gpu/drm/scheduler/tests/mock_scheduler.c | 2 +- drivers/gpu/drm/scheduler/tests/sched_tests.h | 7 ++++--- drivers/gpu/drm/scheduler/tests/tests_basic.c | 4 ++-- 3 files changed, 7 insertions(+), 6 deletions(-)
drivers/gpu/drm/scheduler/tests/mock_scheduler.c +1 -1
@@ -219,7 +219,7 @@ mock_sched_timedout_job(struct drm_sched_job *sched_job)unsigned long flags;if (job->flags &DRM_MOCK_SCHED_JOB_DONT_RESET ) { - job->flags &= ~DRM_MOCK_SCHED_JOB_DONT_RESET ; + job->flags |=DRM_MOCK_SCHED_JOB_RESET_SKIPPED ;return DRM_GPU_SCHED_STAT_NO_HANG ; }
drivers/gpu/drm/scheduler/tests/sched_tests.h +4 -3
@@ -95,9 +95,10 @@ struct drm_mock_sched_job {struct completion done; -#define DRM_MOCK_SCHED_JOB_DONE 0x1 -#define DRM_MOCK_SCHED_JOB_TIMEDOUT 0x2 -#define DRM_MOCK_SCHED_JOB_DONT_RESET 0x4 +#define DRM_MOCK_SCHED_JOB_DONE 0x1 +#define DRM_MOCK_SCHED_JOB_TIMEDOUT 0x2 +#define DRM_MOCK_SCHED_JOB_DONT_RESET 0x4 +#define DRM_MOCK_SCHED_JOB_RESET_SKIPPED 0x8unsigned long flags;struct list_head link;
drivers/gpu/drm/scheduler/tests/tests_basic.c +2 -2
@@ -317,8 +317,8 @@ static void drm_sched_skip_reset(struct kunit *test)KUNIT_ASSERT_FALSE (test, done);KUNIT_ASSERT_EQ (test, - job->flags &DRM_MOCK_SCHED_JOB_DONT_RESET , -0 ); + job->flags &DRM_MOCK_SCHED_JOB_RESET_SKIPPED , +DRM_MOCK_SCHED_JOB_RESET_SKIPPED ); i =drm_mock_sched_advance (sched,1 );KUNIT_ASSERT_EQ (test, i,1 );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 212/563 drm/panel-edp: Add disable to 100ms for MNB601LS1-4
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Langyan Ye <[email protected]>
[ Upstream commit 9b3700b15cb581d748c3d46e7eb30ffced1642e8 ]
For the MNB601LS1-4 panel, the T9+T10 timing does not meet the requirements of the specification, so disable is set to 100ms.
--- drivers/gpu/drm/panel/panel-edp.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
drivers/gpu/drm/panel/panel-edp.c +8 -1
@@ -1828,6 +1828,13 @@ static const struct panel_delay delay_50_500_e200_d200_po2e335 = { .powered_on_to_enable = 335, }; +static const struct panel_delay delay_200_500_e50_d100 = { + .hpd_absent =200 , + .unprepare =500 , + .enable =50 , + .disable =100 , +}; +#define EDP_PANEL_ENTRY (vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ { \ .ident = { \
@@ -1984,7 +1991,7 @@ static const struct edp_panel_entry edp_panels[] = {EDP_PANEL_ENTRY ('C' ,'S' ,'W' ,0x1100 , &delay_200_500_e80_d50,"MNB601LS1-1" ),EDP_PANEL_ENTRY ('C' ,'S' ,'W' ,0x1103 , &delay_200_500_e80_d50,"MNB601LS1-3" ), -EDP_PANEL_ENTRY ('C' ,'S' ,'W' ,0x1104 , &delay_200_500_e50,"MNB601LS1-4" ), +EDP_PANEL_ENTRY ('C' ,'S' ,'W' ,0x1104 , &delay_200_500_e50_d100,"MNB601LS1-4" ),EDP_PANEL_ENTRY ('C' ,'S' ,'W' ,0x1448 , &delay_200_500_e50,"MNE007QS3-7" ), EDP_PANEL_ENTRY('C', 'S', 'W', 0x1457, &delay_80_500_e80_p2e200, "MNE007QS3-8"),
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 213/563 drm/display: bridge-connector: correct CEC bridge pointers in drm_bridge_connector_init
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dmitry Baryshkov <[email protected]>
[ Upstream commit 92e34a5241ddf4b084df20e6953275d16f156aa8 ]
The bridge used in drm_bridge_connector_init() for CEC init does not correctly point to the required HDMI CEC bridge, which can lead to errors during CEC initialization.
--- drivers/gpu/drm/display/drm_bridge_connector.c | 4 ++++ 1 file changed, 4 insertions(+)
drivers/gpu/drm/display/drm_bridge_connector.c +4 -0
@@ -816,6 +816,8 @@ struct drm_connector *drm_bridge_connector_init(struct drm_device *drm,if (bridge_connector->bridge_hdmi_cec && bridge_connector->bridge_hdmi_cec->ops &DRM_BRIDGE_OP_HDMI_CEC_NOTIFIER ) { + bridge = bridge_connector->bridge_hdmi_cec; + ret =drmm_connector_hdmi_cec_notifier_register (connector,NULL , bridge->hdmi_cec_dev);
@@ -825,6 +827,8 @@ struct drm_connector *drm_bridge_connector_init(struct drm_device *drm,if (bridge_connector->bridge_hdmi_cec && bridge_connector->bridge_hdmi_cec->ops &DRM_BRIDGE_OP_HDMI_CEC_ADAPTER ) { + bridge = bridge_connector->bridge_hdmi_cec; + ret = drmm_connector_hdmi_cec_register(connector, &drm_bridge_connector_hdmi_cec_funcs, bridge->hdmi_cec_adapter_name,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 214/563 drm/panel-edp: Add 50ms disable delay for four panels
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Langyan Ye <[email protected]>
[ Upstream commit 1511d3c4d2bb30f784924a877f3cef518bb73077 ]
Add 50ms disable delay for NV116WHM-N49, NV122WUM-N41, and MNC207QS1-1 to satisfy T9+T10 timing. Add 50ms disable delay for MNE007JA1-2 as well, since MNE007JA1-2 copies the timing of MNC207QS1-1.
Specifically, it should be noted that the MNE007JA1-2 panel was added by someone who did not have the panel documentation, so they simply copied the timing from the MNC207QS1-1 panel. Adding an extra 50 ms of delay should be safe.
--- drivers/gpu/drm/panel/panel-edp.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)
drivers/gpu/drm/panel/panel-edp.c +6 -5
@@ -1736,10 +1736,11 @@ static const struct panel_delay delay_200_500_e50 = { .enable = 50, }; -static const struct panel_delay delay_200_500_e50_p2e200 = { +static const struct panel_delay delay_200_500_e50_d50_p2e200 = { .hpd_absent =200 , .unprepare =500 , .enable =50 , + .disable =50 , .prepare_to_enable =200 , };
@@ -1941,13 +1942,13 @@ static const struct edp_panel_entry edp_panels[] = {EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x09dd , &delay_200_500_e50,"NT116WHM-N21" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0a1b , &delay_200_500_e50,"NV133WUM-N63" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0a36 , &delay_200_500_e200,"Unknown" ), -EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0a3e , &delay_200_500_e80,"NV116WHM-N49" ), +EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0a3e , &delay_200_500_e80_d50,"NV116WHM-N49" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0a5d , &delay_200_500_e50,"NV116WHM-N45" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0ac5 , &delay_200_500_e50,"NV116WHM-N4C" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0ae8 , &delay_200_500_e50_p2e80,"NV140WUM-N41" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0b09 , &delay_200_500_e50_po2e200,"NV140FHM-NZ" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0b1e , &delay_200_500_e80,"NE140QDM-N6A" ), -EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0b34 , &delay_200_500_e80,"NV122WUM-N41" ), +EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0b34 , &delay_200_500_e80_d50,"NV122WUM-N41" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0b43 , &delay_200_500_e200,"NV140FHM-T09" ),EDP_PANEL_ENTRY ('B' ,'O' ,'E' ,0x0b56 , &delay_200_500_e80,"NT140FHM-N47" ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b66, &delay_200_500_e80, "NE140WUM-N6G"),
@@ -1986,8 +1987,8 @@ static const struct edp_panel_entry edp_panels[] = {EDP_PANEL_ENTRY ('C' ,'M' ,'N' ,0x14e5 , &delay_200_500_e80_d50,"N140HGA-EA1" ),EDP_PANEL_ENTRY ('C' ,'M' ,'N' ,0x162b , &delay_200_500_e80_d50,"N160JCE-ELL" ), -EDP_PANEL_ENTRY ('C' ,'S' ,'O' ,0x1200 , &delay_200_500_e50_p2e200,"MNC207QS1-1" ), -EDP_PANEL_ENTRY ('C' ,'S' ,'O' ,0x1413 , &delay_200_500_e50_p2e200,"MNE007JA1-2" ), +EDP_PANEL_ENTRY ('C' ,'S' ,'O' ,0x1200 , &delay_200_500_e50_d50_p2e200,"MNC207QS1-1" ), +EDP_PANEL_ENTRY ('C' ,'S' ,'O' ,0x1413 , &delay_200_500_e50_d50_p2e200,"MNE007JA1-2" ),EDP_PANEL_ENTRY ('C' ,'S' ,'W' ,0x1100 , &delay_200_500_e80_d50,"MNB601LS1-1" ), EDP_PANEL_ENTRY('C', 'S', 'W', 0x1103, &delay_200_500_e80_d50, "MNB601LS1-3"),
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 215/563 drm/vmwgfx: fix missing assignment to ts
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Colin Ian King <[email protected]>
[ Upstream commit 33f8f321e7aa7715ce19560801ee5223ba8b9a7d ]
The assignment to ts is missing on the call to ktime_to_timespec64. Fix this by adding the missing assignment.
--- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c +1 -1
@@ -538,7 +538,7 @@ static void vmw_event_fence_action_seq_passed(struct dma_fence *f,if (likely (eaction->tv_sec !=NULL )) {struct timespec64 ts; -ktime_to_timespec64 (f->timestamp); + ts =ktime_to_timespec64 (f->timestamp);/* monotonic time, so no y2038 overflow */ *eaction->tv_sec = ts.tv_sec; *eaction->tv_usec = ts.tv_nsec /NSEC_PER_USEC ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 216/563 drm/amd/display: Reduce Stack Usage by moving audio_output into stream_res v4
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Srinivasan Shanmugam <[email protected]>
[ Upstream commit 1cf1205ef2685cf43db3785706b017d1e54e0bec ]
The function dp_retrain_link_dp_test currently allocates a large audio_output array on the stack, causing the stack frame size to exceed the compiler limit (1080 bytes > 1024 bytes).
This change prevents stack overflow issues:amdgpu/../display/dc/link/accessories/link_dp_cts.c:65:13: warning: stack frame size (1080) exceeds limit (1024) in 'dp_retrain_link_dp_test' [-Wframe-larger-than] static void dp_retrain_link_dp_test(struct dc_link *link,
v2: Move audio-related data like audio_output is kept "per pipe" to
manage the audio for that specific display pipeline/display output path (stream). (Wenjing)
v3: Update in all the places where build_audio_output is currently
called with a separate audio_output variable on the stack & wherever audio_output is passed to other functions dce110_apply_single_controller_ctx_to_hw() & dce110_setup_audio_dto() (like az_configure, wall_dto_setup) replace with usage of pipe_ctx->stream_res.audio_output to centralize audio data per pipe.
v4: Remove empty lines before build_audio_output. (Alex)
--- .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 32 ++++++++----------- .../gpu/drm/amd/display/dc/inc/core_types.h | 5 +-- .../display/dc/link/accessories/link_dp_cts.c | 12 +++---- .../dc/resource/dcn31/dcn31_resource.c | 5 ++- .../dc/resource/dcn31/dcn31_resource.h | 3 +- 5 files changed, 26 insertions(+), 31 deletions(-)
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c +14 -18
@@ -1600,19 +1600,17 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw( }if (pipe_ctx->stream_res.audio !=NULL ) { -struct audio_output audio_output = {0 }; +build_audio_output (context, pipe_ctx, &pipe_ctx->stream_res.audio_output); -build_audio_output (context, pipe_ctx, &audio_output); - - link_hwss->setup_audio_output (pipe_ctx, &audio_output, + link_hwss->setup_audio_output (pipe_ctx, &pipe_ctx->stream_res.audio_output, pipe_ctx->stream_res.audio->inst); pipe_ctx->stream_res.audio->funcs->az_configure ( pipe_ctx->stream_res.audio, pipe_ctx->stream->signal, - &audio_output.crtc_info, + &pipe_ctx->stream_res.audio_output.crtc_info, &pipe_ctx->stream->audio_info, - &audio_output.dp_link_info); + &pipe_ctx->stream_res.audio_output.dp_link_info);if (dc->config.disable_hbr_audio_dp2) if (pipe_ctx->stream_res.audio->funcs->az_disable_hbr_audio &&
@@ -2386,9 +2384,7 @@ static void dce110_setup_audio_dto(if (pipe_ctx->stream->signal !=SIGNAL_TYPE_HDMI_TYPE_A )continue ;if (pipe_ctx->stream_res.audio !=NULL ) { -struct audio_output audio_output; - -build_audio_output (context, pipe_ctx, &audio_output); +build_audio_output (context, pipe_ctx, &pipe_ctx->stream_res.audio_output);if (dc->res_pool->dccg && dc->res_pool->dccg->funcs->set_audio_dtbclk_dto) {struct dtbclk_dto_params dto_params = {0 };
@@ -2399,14 +2395,14 @@ static void dce110_setup_audio_dto( pipe_ctx->stream_res.audio->funcs->wall_dto_setup ( pipe_ctx->stream_res.audio, pipe_ctx->stream->signal, - &audio_output.crtc_info, - &audio_output.pll_info); + &pipe_ctx->stream_res.audio_output.crtc_info, + &pipe_ctx->stream_res.audio_output.pll_info); }else pipe_ctx->stream_res.audio->funcs->wall_dto_setup ( pipe_ctx->stream_res.audio, pipe_ctx->stream->signal, - &audio_output.crtc_info, - &audio_output.pll_info); + &pipe_ctx->stream_res.audio_output.crtc_info, + &pipe_ctx->stream_res.audio_output.pll_info);break ; } }
@@ -2426,15 +2422,15 @@ static void dce110_setup_audio_dto(continue ;if (pipe_ctx->stream_res.audio !=NULL ) { -struct audio_output audio_output = {0 }; - -build_audio_output (context, pipe_ctx, &audio_output); +build_audio_output (context, + pipe_ctx, + &pipe_ctx->stream_res.audio_output); pipe_ctx->stream_res.audio->funcs->wall_dto_setup ( pipe_ctx->stream_res.audio, pipe_ctx->stream->signal, - &audio_output.crtc_info, - &audio_output.pll_info); + &pipe_ctx->stream_res.audio_output.crtc_info, + &pipe_ctx->stream_res.audio_output.pll_info);break ; } }
drivers/gpu/drm/amd/display/dc/inc/core_types.h +3 -2
@@ -228,8 +228,7 @@ struct resource_funcs {enum dc_status (*update_dc_state_for_encoder_switch)(struct dc_link *link,struct dc_link_settings *link_setting,uint8_t pipe_count, -struct pipe_ctx *pipes, -struct audio_output *audio_output); +struct pipe_ctx *pipes); };struct audio_support {
@@ -361,6 +360,8 @@ struct stream_resource {uint8_t gsl_group;struct test_pattern_params test_pattern_params; + +struct audio_output audio_output; };struct plane_resource {
drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c +6 -6
@@ -75,7 +75,6 @@ static void dp_retrain_link_dp_test(struct dc_link *link,bool is_hpo_acquired;uint8_t count;int i; -struct audio_output audio_output[MAX_PIPES ]; needs_divider_update = (link->dc->link_srv->dp_get_encoding_format (link_setting) != link->dc->link_srv->dp_get_encoding_format ((const struct dc_link_settings *) &link->cur_link_settings));
@@ -99,7 +98,7 @@ static void dp_retrain_link_dp_test(struct dc_link *link,if (needs_divider_update && link->dc->res_pool->funcs->update_dc_state_for_encoder_switch) { link->dc->res_pool->funcs->update_dc_state_for_encoder_switch (link, link_setting, count, - *pipes, &audio_output[0 ]); + *pipes);for (i =0 ; i < count; i++) { pipes[i]->clock_source->funcs->program_pix_clk( pipes[i]->clock_source,
@@ -111,15 +110,16 @@ static void dp_retrain_link_dp_test(struct dc_link *link,const struct link_hwss *link_hwss =get_link_hwss ( link, &pipes[i]->link_res); - link_hwss->setup_audio_output (pipes[i], &audio_output[i], - pipes[i]->stream_res.audio->inst); + link_hwss->setup_audio_output (pipes[i], + &pipes[i]->stream_res.audio_output, + pipes[i]->stream_res.audio->inst); pipes[i]->stream_res.audio->funcs->az_configure ( pipes[i]->stream_res.audio, pipes[i]->stream->signal, - &audio_output[i].crtc_info, + &pipes[i]->stream_res.audio_output.crtc_info, &pipes[i]->stream->audio_info, - &audio_output[i].dp_link_info); + &pipes[i]->stream_res.audio_output.dp_link_info); if (link->dc->config.disable_hbr_audio_dp2 && pipes[i]->stream_res.audio->funcs->az_disable_hbr_audio &&
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c +2 -3
@@ -2239,8 +2239,7 @@ struct resource_pool *dcn31_create_resource_pool(enum dc_status dcn31_update_dc_state_for_encoder_switch (struct dc_link *link,struct dc_link_settings *link_setting,uint8_t pipe_count, -struct pipe_ctx *pipes, -struct audio_output *audio_output) +struct pipe_ctx *pipes) {struct dc_state *state = link->dc->current_state;int i;
@@ -2255,7 +2254,7 @@ enum dc_status dcn31_update_dc_state_for_encoder_switch(struct dc_link *link,// Setup audio if (pipes[i].stream_res.audio !=NULL ) - build_audio_output(state, &pipes[i], &audio_output[i]); + build_audio_output(state, &pipes[i], &pipes[i].stream_res.audio_output); }#else /* This DCN requires rate divider updates and audio reprogramming to allow DP1<-->DP2 link rate switching,
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h +1 -2
@@ -69,8 +69,7 @@ unsigned int dcn31_get_det_buffer_size(enum dc_status dcn31_update_dc_state_for_encoder_switch (struct dc_link *link,struct dc_link_settings *link_setting,uint8_t pipe_count, -struct pipe_ctx *pipes, -struct audio_output *audio_output); +struct pipe_ctx *pipes);/*temp: B0 specific before switch to dcn313 headers*/ #ifndef regPHYPLLF_PIXCLK_RESYNC_CNTL
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 217/563 drm/panel: novatek-nt35560: Fix invalid return value
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Brigham Campbell <[email protected]>
[ Upstream commit 125459e19ec654924e472f3ff5aeea40358dbebf ]
Fix bug in nt35560_set_brightness() which causes the function to erroneously report an error. mipi_dsi_dcs_write() returns either a negative value when an error occurred or a positive number of bytes written when no error occurred. The buggy code reports an error under either condition.
--- drivers/gpu/drm/panel/panel-novatek-nt35560.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/panel/panel-novatek-nt35560.c +1 -1
@@ -161,7 +161,7 @@ static int nt35560_set_brightness(struct backlight_device *bl) par =0x00 ; ret =mipi_dsi_dcs_write (dsi,MIPI_DCS_WRITE_CONTROL_DISPLAY , &par,1 ); -if (ret) { +if (ret <0 ) {dev_err (nt->dev,"failed to disable display backlight (%d)\n" , ret);return ret; }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 218/563 drm/amdgpu: fix link error for !PM_SLEEP
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Arnd Bergmann <[email protected]>
[ Upstream commit 4d22db6d070ed3934f02ed15391283f6feb258ad ]
When power management is not enabled in the kernel build, the newly added hibernation changes cause a link failure:
arm-linux-gnueabi-ld: drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o: in function `amdgpu_pmops_thaw':
amdgpu_drv.c:(.text+0x1514): undefined reference to `pm_hibernate_is_recovering'
Make the power management code in this driver conditional on CONFIG_PM and CONFIG_PM_SLEEP
--- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +10 -10
@@ -2964,15 +2964,15 @@ long amdgpu_drm_ioctl(struct file *filp, }static const struct dev_pm_ops amdgpu_pm_ops = { - .prepare = amdgpu_pmops_prepare, - .complete = amdgpu_pmops_complete, - .suspend = amdgpu_pmops_suspend, - .suspend_noirq = amdgpu_pmops_suspend_noirq, - .resume = amdgpu_pmops_resume, - .freeze = amdgpu_pmops_freeze, - .thaw = amdgpu_pmops_thaw, - .poweroff = amdgpu_pmops_poweroff, - .restore = amdgpu_pmops_restore, + .prepare =pm_sleep_ptr (amdgpu_pmops_prepare), + .complete =pm_sleep_ptr (amdgpu_pmops_complete), + .suspend =pm_sleep_ptr (amdgpu_pmops_suspend), + .suspend_noirq =pm_sleep_ptr (amdgpu_pmops_suspend_noirq), + .resume =pm_sleep_ptr (amdgpu_pmops_resume), + .freeze =pm_sleep_ptr (amdgpu_pmops_freeze), + .thaw =pm_sleep_ptr (amdgpu_pmops_thaw), + .poweroff =pm_sleep_ptr (amdgpu_pmops_poweroff), + .restore =pm_sleep_ptr (amdgpu_pmops_restore), .runtime_suspend = amdgpu_pmops_runtime_suspend, .runtime_resume = amdgpu_pmops_runtime_resume, .runtime_idle = amdgpu_pmops_runtime_idle,
@@ -3117,7 +3117,7 @@ static struct pci_driver amdgpu_kms_pci_driver = { .probe = amdgpu_pci_probe, .remove = amdgpu_pci_remove, .shutdown = amdgpu_pci_shutdown, - .driver.pm = &amdgpu_pm_ops, + .driver.pm = pm_ptr(&amdgpu_pm_ops), .err_handler = &amdgpu_pci_err_handler, .dev_groups = amdgpu_sysfs_groups, };
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 219/563 drm/amdgpu: Fix jpeg v4.0.3 poison irq call trace on sriov guest
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Xiang Liu <[email protected]>
[ Upstream commit d3d73bdb02e8cc4a1b2b721a42908504cd18ebf9 ]
Sriov guest side doesn't init ras feature hence the poison irq shouldn't be put during hw fini.
[25209.467154] Call Trace: [25209.467156] <TASK> [25209.467158] ? srso_alias_return_thunk+0x5/0x7f [25209.467162] ? show_trace_log_lvl+0x28e/0x2ea [25209.467166] ? show_trace_log_lvl+0x28e/0x2ea [25209.467171] ? jpeg_v4_0_3_hw_fini+0x6f/0x90 [amdgpu] [25209.467300] ? show_regs.part.0+0x23/0x29 [25209.467303] ? show_regs.cold+0x8/0xd [25209.467304] ? amdgpu_irq_put+0x9e/0xc0 [amdgpu] [25209.467403] ? __warn+0x8c/0x100 [25209.467407] ? amdgpu_irq_put+0x9e/0xc0 [amdgpu] [25209.467503] ? report_bug+0xa4/0xd0 [25209.467508] ? handle_bug+0x39/0x90 [25209.467511] ? exc_invalid_op+0x19/0x70 [25209.467513] ? asm_exc_invalid_op+0x1b/0x20 [25209.467518] ? amdgpu_irq_put+0x9e/0xc0 [amdgpu] [25209.467613] ? amdgpu_irq_put+0x5f/0xc0 [amdgpu] [25209.467709] jpeg_v4_0_3_hw_fini+0x6f/0x90 [amdgpu] [25209.467805] amdgpu_ip_block_hw_fini+0x34/0x61 [amdgpu] [25209.467971] amdgpu_device_fini_hw+0x3b3/0x467 [amdgpu]
--- drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c +1 -1
@@ -444,7 +444,7 @@ static int jpeg_v4_0_3_hw_fini(struct amdgpu_ip_block *ip_block) ret =jpeg_v4_0_3_set_powergating_state (ip_block,AMD_PG_STATE_GATE ); } -if (amdgpu_ras_is_supported (adev,AMDGPU_RAS_BLOCK__JPEG )) +if (amdgpu_ras_is_supported (adev,AMDGPU_RAS_BLOCK__JPEG ) && !amdgpu_sriov_vf (adev))amdgpu_irq_put (adev, &adev->jpeg.inst->ras_poison_irq,0 );return ret;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 220/563 drm/amdgpu: Fix vcn v4.0.3 poison irq call trace on sriov guest
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Xiang Liu <[email protected]>
[ Upstream commit 58364f01db4a155356f92cce1474761d7a0eda3d ]
Sriov guest side doesn't init ras feature hence the poison irq shouldn't be put during hw fini.
[25209.468816] Call Trace: [25209.468817] <TASK> [25209.468818] ? srso_alias_return_thunk+0x5/0x7f [25209.468820] ? show_trace_log_lvl+0x28e/0x2ea [25209.468822] ? show_trace_log_lvl+0x28e/0x2ea [25209.468825] ? vcn_v4_0_3_hw_fini+0xaf/0xe0 [amdgpu] [25209.468936] ? show_regs.part.0+0x23/0x29 [25209.468939] ? show_regs.cold+0x8/0xd [25209.468940] ? amdgpu_irq_put+0x9e/0xc0 [amdgpu] [25209.469038] ? __warn+0x8c/0x100 [25209.469040] ? amdgpu_irq_put+0x9e/0xc0 [amdgpu] [25209.469135] ? report_bug+0xa4/0xd0 [25209.469138] ? handle_bug+0x39/0x90 [25209.469140] ? exc_invalid_op+0x19/0x70 [25209.469142] ? asm_exc_invalid_op+0x1b/0x20 [25209.469146] ? amdgpu_irq_put+0x9e/0xc0 [amdgpu] [25209.469241] vcn_v4_0_3_hw_fini+0xaf/0xe0 [amdgpu] [25209.469343] amdgpu_ip_block_hw_fini+0x34/0x61 [amdgpu] [25209.469511] amdgpu_device_fini_hw+0x3b3/0x467 [amdgpu]
--- drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c +1 -1
@@ -391,7 +391,7 @@ static int vcn_v4_0_3_hw_fini(struct amdgpu_ip_block *ip_block) vinst->set_pg_state (vinst,AMD_PG_STATE_GATE ); } -if (amdgpu_ras_is_supported (adev,AMDGPU_RAS_BLOCK__VCN )) +if (amdgpu_ras_is_supported (adev,AMDGPU_RAS_BLOCK__VCN ) && !amdgpu_sriov_vf (adev))amdgpu_irq_put (adev, &adev->vcn.inst->ras_poison_irq,0 );return 0 ;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 221/563 PCI: endpoint: pci-ep-msi: Fix NULL vs IS_ERR() check in pci_epf_write_msi_msg()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dan Carpenter <[email protected]>
[ Upstream commit 57a75fa9d56e310e883e4377205690e88c05781b ]
The pci_epc_get() function returns error pointers. It never returns NULL. Update the check to match.
--- drivers/pci/endpoint/pci-ep-msi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pci/endpoint/pci-ep-msi.c +1 -1
@@ -24,7 +24,7 @@ static void pci_epf_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)struct pci_epf *epf; epc =pci_epc_get (dev_name (msi_desc_to_dev (desc))); -if (!epc) +if (IS_ERR (epc))return ; epf = list_first_entry_or_null(&epc->pci_epf, struct pci_epf, list);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 222/563 PCI: xgene-msi: Return negative -EINVAL in xgene_msi_handler_setup()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dan Carpenter <[email protected]>
[ Upstream commit b26fc701a25195134ff0327709a0421767c4c7b2 ]
There is a typo so we accidentally return positive EINVAL instead of negative -EINVAL. Add the missing '-' character.
--- drivers/pci/controller/pci-xgene-msi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/pci/controller/pci-xgene-msi.c +1 -1
@@ -311,7 +311,7 @@ static int xgene_msi_handler_setup(struct platform_device *pdev) msi_val =xgene_msi_int_read (xgene_msi, i);if (msi_val) {dev_err (&pdev->dev,"Failed to clear spurious IRQ\n" ); -return EINVAL ; +return -EINVAL ; } irq =platform_get_irq (pdev, i);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 223/563 drm/radeon/r600_cs: clean up of dead code in r600_cs
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Brahmajit Das <[email protected]>
[ Upstream commit 260dcf5b06d519bcf27a5dfdb5c626821a55c170 ]
GCC 16 enables -Werror=unused-but-set-variable= which results in build error with the following message.
drivers/gpu/drm/radeon/r600_cs.c: In function ‘r600_texture_size’:drivers/gpu/drm/radeon/r600_cs.c:1411:29: error: variable ‘level’ set but not used [-Werror=unused-but-set-variable=]
1411 | unsigned offset, i, level;
| ^~~~~
cc1: all warnings being treated as errors
make[6]: *** [scripts/Makefile.build:287: drivers/gpu/drm/radeon/r600_cs.o] Error 1
level although is set, but in never used in the function r600_texture_size. Thus resulting in dead code and this error getting triggered.
--- drivers/gpu/drm/radeon/r600_cs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/radeon/r600_cs.c +2 -2
@@ -1408,7 +1408,7 @@ static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned llevel, unsigned block_align, unsigned height_align, unsigned base_align, unsigned *l0_size, unsigned *mipmap_size) { - unsigned offset, i, level; + unsigned offset, i;unsigned width, height, depth, size;unsigned blocksize;unsigned nbx, nby;
@@ -1420,7 +1420,7 @@ static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned llevel, w0 =r600_mip_minify (w0,0 ); h0 =r600_mip_minify (h0,0 ); d0 =r600_mip_minify (d0,0 ); -for (i =0 , offset =0 , level = blevel; i < nlevels; i++, level++) { +for (i =0 , offset =0 ; i < nlevels; i++) { width =r600_mip_minify (w0, i); nbx =r600_fmt_get_nblocksx (format, width);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 224/563 f2fs: fix condition in __allow_reserved_blocks()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chao Yu <[email protected]>
[ Upstream commit e75ce117905d2830976a289e718470f3230fa30a ]
If reserve_root mount option is not assigned, __allow_reserved_blocks() will return false, it's not correct, fix it.
--- fs/f2fs/f2fs.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)
fs/f2fs/f2fs.h +1 -3
@@ -2361,8 +2361,6 @@ static inline bool __allow_reserved_blocks(struct f2fs_sb_info *sbi, {if (!inode)return true; -if (!test_opt (sbi,RESERVE_ROOT )) -return false;if (IS_NOQUOTA (inode))return true;if (uid_eq (F2FS_OPTION (sbi).s_resuid,current_fsuid ()))
@@ -2383,7 +2381,7 @@ static inline unsigned int get_available_block_count(struct f2fs_sb_info *sbi, avail_user_block_count = sbi->user_block_count - sbi->current_reserved_blocks; -if (!__allow_reserved_blocks (sbi, inode, cap)) +if (test_opt (sbi,RESERVE_ROOT ) && !__allow_reserved_blocks (sbi, inode, cap)) avail_user_block_count -=F2FS_OPTION (sbi).root_reserved_blocks;if (unlikely (is_sbi_flag_set (sbi,SBI_CP_DISABLED ))) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 225/563 f2fs: fix to avoid overflow while left shift operation
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chao Yu <[email protected]>
[ Upstream commit 0fe1c6bec54ea68ed8c987b3890f2296364e77bb ]
Should cast type of folio->index from pgoff_t to loff_t to avoid overflow while left shift operation.
--- fs/f2fs/compress.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
fs/f2fs/compress.c +1 -1
@@ -1245,7 +1245,7 @@ int f2fs_truncate_partial_cluster(struct inode *inode, u64 from, bool lock)for (i = cluster_size -1 ; i >=0 ; i--) {struct folio *folio =page_folio (rpages[i]); -loff_t start = folio->index <<PAGE_SHIFT ; +loff_t start = (loff_t )folio->index <<PAGE_SHIFT ;if (from <= start) {folio_zero_segment (folio,0 ,folio_size (folio));
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 226/563 f2fs: fix to zero data after EOF for compressed file correctly
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chao Yu <[email protected]>
[ Upstream commit 0b2cd5092139f499544c77b5107a74e5fdb3a386 ]
generic/091 may fail, then it bisects to the bad commit ba8dac350faf ("f2fs: fix to zero post-eof page").
What will cause generic/091 to fail is something like below Testcase #1:
1. write 16k as compressed blocks
2. truncate to 12k
3. truncate to 20k
4. verify data in range of [12k, 16k], however data is not zero as expected
Script of Testcase #1
mkfs.f2fs -f -O extra_attr,compression /dev/vdb
mount -t f2fs -o compress_extension=* /dev/vdb /mnt/f2fs dd if=/dev/zero of=/mnt/f2fs/file bs=12k count=1
dd if=/dev/random of=/mnt/f2fs/file bs=4k count=1 seek=3 conv=notrunc sync
truncate -s $((12*1024)) /mnt/f2fs/file
truncate -s $((20*1024)) /mnt/f2fs/file
dd if=/mnt/f2fs/file of=/mnt/f2fs/data bs=4k count=1 skip=3 od /mnt/f2fs/data
umount /mnt/f2fs
Analisys:
in step 2), we will redirty all data pages from #0 to #3 in compressed cluster, and zero page #3,
in step 3), f2fs_setattr() will call f2fs_zero_post_eof_page() to drop all page cache post eof, includeing dirtied page #3,
in step 4) when we read data from page #3, it will decompressed cluster and extra random data to page #3, finally, we hit the non-zeroed data post eof.
However, the commit ba8dac350faf ("f2fs: fix to zero post-eof page") just let the issue be reproduced easily, w/o the commit, it can reproduce this bug w/ below Testcase #2:
1. write 16k as compressed blocks
2. truncate to 8k
3. truncate to 12k
4. truncate to 20k
5. verify data in range of [12k, 16k], however data is not zero as expected
Script of Testcase #2
mkfs.f2fs -f -O extra_attr,compression /dev/vdb
mount -t f2fs -o compress_extension=* /dev/vdb /mnt/f2fs dd if=/dev/zero of=/mnt/f2fs/file bs=12k count=1
dd if=/dev/random of=/mnt/f2fs/file bs=4k count=1 seek=3 conv=notrunc sync
truncate -s $((8*1024)) /mnt/f2fs/file
truncate -s $((12*1024)) /mnt/f2fs/file
truncate -s $((20*1024)) /mnt/f2fs/file
echo 3 > /proc/sys/vm/drop_caches
dd if=/mnt/f2fs/file of=/mnt/f2fs/data bs=4k count=1 skip=3 od /mnt/f2fs/data
umount /mnt/f2fs
Anlysis:
in step 2), we will redirty all data pages from #0 to #3 in compressed cluster, and zero page #2 and #3,
in step 3), we will truncate page #3 in page cache,
in step 4), expand file size,
in step 5), hit random data post eof w/ the same reason in Testcase #1.
Root Cause:
In f2fs_truncate_partial_cluster(), after we truncate partial data block on compressed cluster, all pages in cluster including the one post eof will be dirtied, after another tuncation, dirty page post eof will be dropped, however on-disk compressed cluster is still valid, it may include non-zero data post eof, result in exposing previous non-zero data post eof while reading.
Fix:
In f2fs_truncate_partial_cluster(), let change as below to fix:
- call filemap_write_and_wait_range() to flush dirty page
- call truncate_pagecache() to drop pages or zero partial page post eof
- call f2fs_do_truncate_blocks() to truncate non-compress cluster to last valid block
--- fs/f2fs/compress.c | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-)
fs/f2fs/compress.c +16 -7
@@ -1246,19 +1246,28 @@ int f2fs_truncate_partial_cluster(struct inode *inode, u64 from, bool lock)for (i = cluster_size -1 ; i >=0 ; i--) {struct folio *folio =page_folio (rpages[i]);loff_t start = (loff_t )folio->index <<PAGE_SHIFT ; +loff_t offset = from > start ? from - start :0 ; -if (from <= start) { -folio_zero_segment (folio,0 ,folio_size (folio)); - }else { -folio_zero_segment (folio, from - start, -folio_size (folio)); +folio_zero_segment (folio, offset,folio_size (folio)); + +if (from >= start)break ; - } }f2fs_compress_write_end (inode, fsdata, start_idx, true); + + err =filemap_write_and_wait_range (inode->i_mapping, +round_down (from, cluster_size <<PAGE_SHIFT ), +LLONG_MAX ); +if (err) +return err; + +truncate_pagecache (inode, from); + + err =f2fs_do_truncate_blocks (inode, +round_up (from,PAGE_SIZE ), lock); } -return 0 ; +return err; } static int f2fs_write_compressed_pages(struct compress_ctx *cc,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 227/563 drm/bridge: it6505: select REGMAP_I2C
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Chia-I Wu <[email protected]>
[ Upstream commit 21b137f651cf9d981e22d2c60a2a8105f50a6361 ]
Fix
aarch64-linux-gnu-ld: drivers/gpu/drm/bridge/ite-it6505.o: in function `it6505_i2c_probe':
ite-it6505.c:(.text+0x754): undefined reference to `__devm_regmap_init_i2c'
--- drivers/gpu/drm/bridge/Kconfig | 1 + 1 file changed, 1 insertion(+)
drivers/gpu/drm/bridge/Kconfig +1 -0
@@ -122,6 +122,7 @@ config DRM_ITE_IT6505 select EXTCON select CRYPTO select CRYPTO_HASH + select REGMAP_I2C help ITE IT6505 DisplayPort bridge chip driver.
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 228/563 wifi: rtw88: Lock rtwdev->mutex before setting the LED
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Bitterblue Smith <[email protected]>
[ Upstream commit 26a8bf978ae9cd7688af1d08bc8760674d372e22 ]
Some users report that the LED blinking breaks AP mode somehow. Most likely the LED code and the dynamic mechanism are trying to access the hardware registers at the same time. Fix it by locking rtwdev->mutex before setting the LED and unlocking it after.
--- drivers/net/wireless/realtek/rtw88/led.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-)
drivers/net/wireless/realtek/rtw88/led.c +13 -3
@@ -6,13 +6,23 @@#include "debug.h" #include "led.h" -static int rtw_led_set_blocking (struct led_classdev *led, -enum led_brightness brightness) +static void rtw_led_set (struct led_classdev *led, +enum led_brightness brightness) { struct rtw_dev *rtwdev = container_of(led, struct rtw_dev, led_cdev); +mutex_lock (&rtwdev->mutex); + rtwdev->chip->ops->led_set (led, brightness); +mutex_unlock (&rtwdev->mutex); +} + +static int rtw_led_set_blocking (struct led_classdev *led, +enum led_brightness brightness) +{ +rtw_led_set (led, brightness); +return 0 ; }
@@ -37,7 +47,7 @@ void rtw_led_init(struct rtw_dev *rtwdev)return ;if (rtw_hci_type (rtwdev) ==RTW_HCI_TYPE_PCIE ) - led->brightness_set = rtwdev->chip->ops->led_set; + led->brightness_set = rtw_led_set;else led->brightness_set_blocking = rtw_led_set_blocking;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 229/563 HID: steelseries: refactor probe() and remove()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jeongjun Park <[email protected]>
[ Upstream commit a84eeacbf9325fd7f604b80f246aaba157730cd5 ]
steelseries_srws1_probe() still does not use devm_kzalloc() and devm_led_classdev_register(), so there is a lot of code to safely manage heap, which reduces readability and may cause memory leaks due to minor patch mistakes in the future.
Therefore, it should be changed to use devm_kzalloc() and devm_led_classdev_register() to easily and safely manage heap.
Also, the current steelseries driver mainly checks sd->quriks to determine which product a specific HID device is, which is not the correct way.
remove(), unlike probe(), does not receive struct hid_device_id as an argument, so it must check hdev unconditionally to know which product it is.
However, since struct steelseries_device and struct steelseries_srws1_data have different structures, if SRWS1 is removed in remove(), converts hdev->dev, which is initialized to struct steelseries_srws1_data, to struct steelseries_device and uses it. This causes various memory-related bugs as completely unexpected values exist in member variables of the structure.
Therefore, in order to modify probe() and remove() to work properly, Arctis 1, 9 should be added to HID_USB_DEVICE and some functions should be modified to check hdev->product when determining HID device product.
--- drivers/hid/hid-ids.h | 2 + drivers/hid/hid-quirks.c | 2 + drivers/hid/hid-steelseries.c | 109 ++++++++++++---------------------- 3 files changed, 43 insertions(+), 70 deletions(-)
drivers/hid/hid-ids.h +2 -0
@@ -1296,6 +1296,8 @@#define USB_VENDOR_ID_STEELSERIES 0x1038#define USB_DEVICE_ID_STEELSERIES_SRWS1 0x1410 +#define USB_DEVICE_ID_STEELSERIES_ARCTIS_1 0x12b6 +#define USB_DEVICE_ID_STEELSERIES_ARCTIS_9 0x12c2#define USB_VENDOR_ID_SUN 0x0430#define USB_DEVICE_ID_RARITAN_KVM_DONGLE 0xcdab
drivers/hid/hid-quirks.c +2 -0
@@ -695,6 +695,8 @@ static const struct hid_device_id hid_have_special_driver[] = {#endif #if IS_ENABLED(CONFIG_HID_STEELSERIES) { HID_USB_DEVICE(USB_VENDOR_ID_STEELSERIES, USB_DEVICE_ID_STEELSERIES_SRWS1) }, + { HID_USB_DEVICE(USB_VENDOR_ID_STEELSERIES, USB_DEVICE_ID_STEELSERIES_ARCTIS_1) }, + { HID_USB_DEVICE(USB_VENDOR_ID_STEELSERIES, USB_DEVICE_ID_STEELSERIES_ARCTIS_9) }, #endif #if IS_ENABLED(CONFIG_HID_SUNPLUS) { HID_USB_DEVICE(USB_VENDOR_ID_SUNPLUS, USB_DEVICE_ID_SUNPLUS_WDESKTOP) },
drivers/hid/hid-steelseries.c +39 -70
231 lines not on this page · raw message
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 230/563 drm/amdgpu: fix incorrect vm flags to map bo
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jack Xiao <[email protected]>
[ Upstream commit b08425fa77ad2f305fe57a33dceb456be03b653f ]
It should use vm flags instead of pte flags
to specify bo vm attributes.
--- drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c +2 -2
@@ -88,8 +88,8 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm, } r =amdgpu_vm_bo_map (adev, *bo_va, csa_addr,0 , size, -AMDGPU_PTE_READABLE |AMDGPU_PTE_WRITEABLE | -AMDGPU_PTE_EXECUTABLE ); +AMDGPU_VM_PAGE_READABLE |AMDGPU_VM_PAGE_WRITEABLE | +AMDGPU_VM_PAGE_EXECUTABLE );if (r) {DRM_ERROR ("failed to do bo_map on static CSA, err=%d\n" , r);
Signature · 1 line
2.51.0
Re: [PATCH 6.17 230/563] drm/amdgpu: fix incorrect vm flags to map bo
Quoted 10 lines · Greg Kroah-Hartman
6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jack Xiao <[email protected]>
[ Upstream commit
b08425fa77ad2f305fe57a33dceb456be03b653f]It should use vm flags instead of pte flags
to specify bo vm attributes.
Note this was reverted by:
commit be33e8a239aac204d7e9e673c4220ef244eb1ba3
Author: Alex Deucher <[email protected]> Date: Mon Aug 25 13:40:22 2025 -0400
Revert "drm/amdgpu: fix incorrect vm flags to map bo"
This reverts commit b08425fa77ad2f305fe57a33dceb456be03b653f.
Revert this to align with 6.17 because the fixes tag was wrong on this commit.
Quoted 24 lines
Fixes 7946340fa389 ("drm/amdgpu: Move csa related code to separate file")Signed-off-by Jack Xiao <[email protected]>Reviewed-by Likun Gao <[email protected]>Signed-off-by Alex Deucher <[email protected]>Signed-off-by Sasha Levin <[email protected]>--- drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c +2
-2@@ -88,8 +88,8 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm, } r =amdgpu_vm_bo_map (adev, *bo_va, csa_addr,0 , size, -AMDGPU_PTE_READABLE |AMDGPU_PTE_WRITEABLE | -AMDGPU_PTE_EXECUTABLE ); +AMDGPU_VM_PAGE_READABLE |AMDGPU_VM_PAGE_WRITEABLE | +AMDGPU_VM_PAGE_EXECUTABLE );if (r) {DRM_ERROR ("failed to do bo_map on static CSA, err=%d\n" , r);
Signature · 2 lines
js suse labs
Greg Kroah-Hartman
maintainerRe: [PATCH 6.17 230/563] drm/amdgpu: fix incorrect vm flags to map bo
Quoted 17 lines · Jiri Slaby
Quoted 10 lines · Greg Kroah-Hartman
6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jack Xiao <[email protected]>
[ Upstream commit
b08425fa77ad2f305fe57a33dceb456be03b653f]It should use vm flags instead of pte flags
to specify bo vm attributes.Note this was reverted by:
commitbe33e8a239aac204d7e9e673c4220ef244eb1ba3Author: Alex Deucher <[email protected]> Date: Mon Aug 25 13:40:22 2025 -0400
Quoted 6 lines
Revert "drm/amdgpu: fix incorrect vm flags to map bo"
This reverts commit
b08425fa77ad2f305fe57a33dceb456be03b653f.Revert this to align with 6.17 because the fixes tag was wrong on this commit.
Ugh, we already took this patch, and the revert, in previous releases, but it got added here again for some reason. I'll go drop this from all queues now, thanks for catching this!
greg k-h
Greg Kroah-Hartman
maintainerPATCH 231/563 media: zoran: Remove zoran_fh structure
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jacopo Mondi <[email protected]>
[ Upstream commit dc322d13cf417552b59e313e809a6da40b8b36ef ]
The zoran_fh structure is a wrapper around v4l2_fh. Its usage has been mostly removed by commit 83f89a8bcbc3 ("media: zoran: convert to vb2"), but the structure stayed by mistake. It is now used in a single location, assigned from a void pointer and then recast to a void pointer, without being every accessed. Drop it.
--- drivers/media/pci/zoran/zoran.h | 6 ------ drivers/media/pci/zoran/zoran_driver.c | 3 +-- 2 files changed, 1 insertion(+), 8 deletions(-)
drivers/media/pci/zoran/zoran.h +0 -6
@@ -154,12 +154,6 @@ struct zoran_jpg_settings {struct zoran ; -/* zoran_fh contains per-open() settings */ -struct zoran_fh { -struct v4l2_fh fh; -struct zoran *zr; -}; -struct card_info {enum card_type type;char name[32 ];
drivers/media/pci/zoran/zoran_driver.c +1 -2
@@ -511,12 +511,11 @@ static int zoran_s_fmt_vid_cap(struct file *file, void *__fh, struct v4l2_format *fmt) {struct zoran *zr =video_drvdata (file); -struct zoran_fh *fh = __fh;int i;int res =0 ;if (fmt->fmt.pix.pixelformat ==V4L2_PIX_FMT_MJPEG ) -return zoran_s_fmt_vid_out (file, fh, fmt); +return zoran_s_fmt_vid_out (file, __fh, fmt);for (i =0 ; i <NUM_FORMATS ; i++)if (fmt->fmt.pix.pixelformat == zoran_formats[i].fourcc)
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 232/563 phy: rockchip: naneng-combphy: Enable U3 OTG port for RK3568
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jonas Karlman <[email protected]>
[ Upstream commit 7bb14b61b7d03db770b7e8871493f5b9b2be2b79 ]
The boot firmware may disable the U3 port early during boot and leave it up to the controller or PHY driver to re-enable U3 when needed.
The Rockchip USBDP PHY driver currently does this for RK3576 and RK3588, something the Rockchip Naneng Combo PHY driver never does for RK3568. This may result in USB 3.0 ports being limited to only using USB 2.0 or in special cases not working at all on RK3568.
Write to PIPE_GRF USB3OTGx_CON1 reg to ensure the U3 port is enabled when a PHY with PHY_TYPE_USB3 mode is used.
--- drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +12 -0
@@ -137,6 +137,8 @@ struct rockchip_combphy_grfcfg {struct combphy_reg pipe_xpcs_phy_ready;struct combphy_reg pipe_pcie1l0_sel;struct combphy_reg pipe_pcie1l1_sel; +struct combphy_reg u3otg0_port_en; +struct combphy_reg u3otg1_port_en; };struct rockchip_combphy_cfg {
@@ -594,6 +596,14 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv)rockchip_combphy_param_write (priv->phy_grf, &cfg->pipe_txcomp_sel, false);rockchip_combphy_param_write (priv->phy_grf, &cfg->pipe_txelec_sel, false);rockchip_combphy_param_write (priv->phy_grf, &cfg->usb_mode_set, true); +switch (priv->id) { +case 0 : +rockchip_combphy_param_write (priv->pipe_grf, &cfg->u3otg0_port_en, true); +break ; +case 1 : +rockchip_combphy_param_write (priv->pipe_grf, &cfg->u3otg1_port_en, true); +break ; + }break ;case PHY_TYPE_SATA :
@@ -737,6 +747,8 @@ static const struct rockchip_combphy_grfcfg rk3568_combphy_grfcfgs = {/* pipe-grf */ .pipe_con0_for_sata = { 0x0000, 15, 0, 0x00, 0x2220 }, .pipe_xpcs_phy_ready = { 0x0040, 2, 2, 0x00, 0x01 }, + .u3otg0_port_en = { 0x0104, 15, 0, 0x0181, 0x1100 }, + .u3otg1_port_en = { 0x0144, 15, 0, 0x0181, 0x1100 }, }; static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 233/563 drm/bridge: cdns-dsi: Fix the _atomic_check()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Aradhya Bhatia <[email protected]>
[ Upstream commit 04864af849d9ae0dd020798f5b3632d9cf26fa03 ]
Use the "adjusted_mode" for the dsi configuration check, as that is the more appropriate display_mode for validation, and later bridge enable.
Also, fix the mode_valid_check parameter from false to true, as the dsi configuration check is taking place during the check-phase, and the crtc_* mode values are not expected to be populated yet.
--- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +2 -2
@@ -997,10 +997,10 @@ static int cdns_dsi_bridge_atomic_check(struct drm_bridge *bridge,struct cdns_dsi_input *input =bridge_to_cdns_dsi_input (bridge);struct cdns_dsi *dsi =input_to_dsi (input);struct cdns_dsi_bridge_state *dsi_state =to_cdns_dsi_bridge_state (bridge_state); -const struct drm_display_mode *mode = &crtc_state->mode; +const struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;struct cdns_dsi_cfg *dsi_cfg = &dsi_state->dsi_cfg; -return cdns_dsi_check_conf (dsi, mode, dsi_cfg, false); +return cdns_dsi_check_conf (dsi, adjusted_mode, dsi_cfg, true); } static struct drm_bridge_state *
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 234/563 usb: host: max3421-hcd: Fix error pointer dereference in probe cleanup
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dan Carpenter <[email protected]>
[ Upstream commit 186e8f2bdba551f3ae23396caccd452d985c23e3 ]
The kthread_run() function returns error pointers so the max3421_hcd->spi_thread pointer can be either error pointers or NULL. Check for both before dereferencing it.
--- drivers/usb/host/max3421-hcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/usb/host/max3421-hcd.c +1 -1
@@ -1916,7 +1916,7 @@ max3421_probe(struct spi_device *spi)if (hcd) {kfree (max3421_hcd->tx);kfree (max3421_hcd->rx); -if (max3421_hcd->spi_thread) +if (!IS_ERR_OR_NULL (max3421_hcd->spi_thread))kthread_stop (max3421_hcd->spi_thread);usb_put_hcd (hcd); }
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 235/563 usb: misc: qcom_eud: Access EUD_MODE_MANAGER2 through secure calls
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Komal Bajaj <[email protected]>
[ Upstream commit c0485e864a2eaa1d5a84c71e573dd236d0e885ae ]
EUD_MODE_MANAGER2 register is mapped to a memory region that is marked as read-only for operating system running at EL1, enforcing access restrictions that prohibit direct memory-mapped writes via writel().
Attempts to write to this region from HLOS can result in silent failures or memory access violations, particularly when toggling EUD (Embedded USB Debugger) state. To ensure secure register access, modify the driver to use qcom_scm_io_writel(), which routes the write operation to Qualcomm Secure Channel Monitor (SCM). SCM has the necessary permissions to access protected memory regions, enabling reliable control over EUD state.
SC7280, the only user of EUD is also affected, indicating that this could never have worked on a properly fused device.
--- drivers/usb/misc/Kconfig | 1 + drivers/usb/misc/qcom_eud.c | 33 ++++++++++++++++++++++++--------- 2 files changed, 25 insertions(+), 9 deletions(-)
drivers/usb/misc/Kconfig +1 -0
@@ -147,6 +147,7 @@ config USB_APPLEDISPLAY config USB_QCOM_EUD tristate "QCOM Embedded USB Debugger(EUD) Driver" depends on ARCH_QCOM || COMPILE_TEST + select QCOM_SCM select USB_ROLE_SWITCH help This module enables support for Qualcomm Technologies, Inc.
drivers/usb/misc/qcom_eud.c +24 -9
@@ -15,6 +15,7 @@#include <linux/slab.h> #include <linux/sysfs.h> #include <linux/usb/role.h> +#include <linux/firmware/qcom/qcom_scm.h> #define EUD_REG_INT1_EN_MASK 0x0024#define EUD_REG_INT_STATUS_1 0x0044
@@ -34,7 +35,7 @@ struct eud_chip {struct device *dev;struct usb_role_switch *role_sw;void __iomem *base; -void __iomem *mode_mgr; +phys_addr_t mode_mgr;unsigned int int_status;int irq;bool enabled;
@@ -43,18 +44,29 @@ struct eud_chip {static int enable_eud (struct eud_chip *priv) { +int ret; + + ret =qcom_scm_io_writel (priv->mode_mgr +EUD_REG_EUD_EN2 ,1 ); +if (ret) +return ret; +writel (EUD_ENABLE , priv->base +EUD_REG_CSR_EUD_EN );writel (EUD_INT_VBUS |EUD_INT_SAFE_MODE , priv->base +EUD_REG_INT1_EN_MASK ); -writel (1 , priv->mode_mgr +EUD_REG_EUD_EN2 );return usb_role_switch_set_role (priv->role_sw,USB_ROLE_DEVICE ); } -static void disable_eud (struct eud_chip *priv) +static int disable_eud (struct eud_chip *priv) { +int ret; + + ret =qcom_scm_io_writel (priv->mode_mgr +EUD_REG_EUD_EN2 ,0 ); +if (ret) +return ret; +writel (0 , priv->base +EUD_REG_CSR_EUD_EN ); -writel (0 , priv->mode_mgr +EUD_REG_EUD_EN2 ); +return 0 ; } static ssize_t enable_show(struct device *dev,
@@ -82,11 +94,12 @@ static ssize_t enable_store(struct device *dev, chip->enabled = enable; elsedisable_eud (chip ); + }else { -disable_eud (chip); + ret =disable_eud (chip); } -return count; +return ret <0 ? ret : count; }static DEVICE_ATTR_RW (enable);
@@ -178,6 +191,7 @@ static void eud_role_switch_release(void *data)static int eud_probe (struct platform_device *pdev) {struct eud_chip *chip; +struct resource *res;int ret; chip =devm_kzalloc (&pdev->dev,sizeof (*chip),GFP_KERNEL );
@@ -200,9 +214,10 @@ static int eud_probe(struct platform_device *pdev)if (IS_ERR (chip->base))return PTR_ERR (chip->base); - chip->mode_mgr =devm_platform_ioremap_resource (pdev,1 ); -if (IS_ERR (chip->mode_mgr)) -return PTR_ERR (chip->mode_mgr); + res =platform_get_resource (pdev,IORESOURCE_MEM ,1 ); +if (!res) +return -ENODEV ; + chip->mode_mgr = res->start; chip->irq =platform_get_irq (pdev,0 );if (chip->irq <0 )
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 236/563 PCI/pwrctrl: Fix double cleanup on devm_add_action_or_reset() failure
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Geert Uytterhoeven <[email protected]>
[ Upstream commit ab81f2f79c683c94bac622aafafbe8232e547159 ]
When devm_add_action_or_reset() fails, it calls the passed cleanup function. Hence the caller must not repeat that cleanup.
Replace the "goto err_regulator_free" by the actual freeing, as there will never be a need again for a second user of this label.
--- drivers/pci/pwrctrl/slot.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-)
drivers/pci/pwrctrl/slot.c +3 -9
@@ -49,13 +49,14 @@ static int pci_pwrctrl_slot_probe(struct platform_device *pdev) ret =regulator_bulk_enable (slot->num_supplies, slot->supplies);if (ret <0 ) {dev_err_probe (dev, ret,"Failed to enable slot regulators\n" ); - goto err_regulator_free; +regulator_bulk_free (slot->num_supplies, slot->supplies); +return ret; } ret =devm_add_action_or_reset (dev, devm_pci_pwrctrl_slot_power_off, slot);if (ret) - goto err_regulator_disable; +return ret; clk =devm_clk_get_optional_enabled (dev,NULL );if (IS_ERR (clk)) {
@@ -70,13 +71,6 @@ static int pci_pwrctrl_slot_probe(struct platform_device *pdev)return dev_err_probe (dev, ret,"Failed to register pwrctrl driver\n" );return 0 ; - -err_regulator_disable: -regulator_bulk_disable (slot->num_supplies, slot->supplies); -err_regulator_free: -regulator_bulk_free (slot->num_supplies, slot->supplies); - -return ret; }static const struct of_device_id pci_pwrctrl_slot_of_match[] = {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 237/563 misc: pci_endpoint_test: Fix array underflow in pci_endpoint_test_ioctl()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dan Carpenter <[email protected]>
[ Upstream commit 1ad82f9db13d85667366044acdfb02009d576c5a ]
Commit eefb83790a0d ("misc: pci_endpoint_test: Add doorbell test case") added NO_BAR (-1) to the pci_barno enum which, in practical terms, changes the enum from an unsigned int to a signed int. If the user passes a negative number in pci_endpoint_test_ioctl() then it results in an array underflow in pci_endpoint_test_bar().
--- drivers/misc/pci_endpoint_test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/misc/pci_endpoint_test.c +1 -1
@@ -937,7 +937,7 @@ static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,switch (cmd) {case PCITEST_BAR : bar = arg; -if (bar >BAR_5 ) +if (bar <=NO_BAR || bar >BAR_5 ) goto ret;if (is_am654_pci_dev (pdev) && bar ==BAR_0 ) goto ret;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 238/563 serial: max310x: Add error checking in probe()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Dan Carpenter <[email protected]>
[ Upstream commit 672a37ba8af1f2ebcedeb94aea2cdd047f805f30 ]
Check if devm_i2c_new_dummy_device() fails.
--- drivers/tty/serial/max310x.c | 2 ++ 1 file changed, 2 insertions(+)
drivers/tty/serial/max310x.c +2 -0
@@ -1644,6 +1644,8 @@ static int max310x_i2c_probe(struct i2c_client *client) port_client =devm_i2c_new_dummy_device (&client->dev, client->adapter, port_addr); +if (IS_ERR (port_client)) +return PTR_ERR (port_client); regcfg_i2c.name =max310x_regmap_name (i); regmaps[i] =devm_regmap_init_i2c (port_client, ®cfg_i2c);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 239/563 drm/amd/display: Remove redundant semicolons
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Liao Yuanhong <[email protected]>
[ Upstream commit 90b810dd859c0df9db2290da1ac5842e5f031267 ]
Remove unnecessary semicolons.
--- .../gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c | 1 - 1 file changed, 1 deletion(-)
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c +0 -1
@@ -139,7 +139,6 @@ void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs,if (dual_plane) {unsigned int p1_pte_row_height_linear =get_dpte_row_height_linear_c (mode_lib, e2e_pipe_param, num_pipes, pipe_idx); - ;if (src->sw_mode == dm_sw_linear)ASSERT (p1_pte_row_height_linear >=8 );
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 240/563 drm/amd/display: Add NULL pointer checks in dc_stream cursor attribute functions
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Srinivasan Shanmugam <[email protected]>
[ Upstream commit bf4e4b97d0fdc66f04fc19d807e24dd8421b8f11 ]
The function dc_stream_set_cursor_attributes() currently dereferences the stream pointer and nested members stream->ctx->dc->current_state without checking for NULL.
All callers of these functions, such as in dcn30_apply_idle_power_optimizations() and amdgpu_dm_plane_handle_cursor_update(), already perform NULL checks before calling these functions.
Fixes below:drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.c:336 dc_stream_program_cursor_attributes()
error: we previously assumed 'stream' could be null (see line 334)
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.c
327 bool dc_stream_program_cursor_attributes(
328 struct dc_stream_state *stream,
329 const struct dc_cursor_attributes *attributes)
330 {
331 struct dc *dc;
332 bool reset_idle_optimizations = false;
333
334 dc = stream ? stream->ctx->dc : NULL;
^^^^^^The old code assumed stream could be NULL.
335
--> 336 if (dc_stream_set_cursor_attributes(stream, attributes)) {
^^^^^^The refactor added an unchecked dereference.
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.c
313 bool dc_stream_set_cursor_attributes(
314 struct dc_stream_state *stream,
315 const struct dc_cursor_attributes *attributes)
316 {
317 bool result = false;
318
319 if (dc_stream_check_cursor_attributes(stream, stream->ctx->dc->current_state, attributes)) {
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Here.This function used to check for if stream as NULL and return false at the start. Probably we should add that back.
--- drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
drivers/gpu/drm/amd/display/dc/core/dc_stream.c +7 -1
@@ -316,6 +316,9 @@ bool dc_stream_set_cursor_attributes( {bool result = false; +if (!stream) +return false; +if (dc_stream_check_cursor_attributes (stream, stream->ctx->dc->current_state, attributes)) { stream->cursor_attributes = *attributes; result = true;
@@ -331,7 +334,10 @@ bool dc_stream_program_cursor_attributes(struct dc *dc;bool reset_idle_optimizations = false; - dc = stream ? stream->ctx->dc :NULL ; +if (!stream) +return false; + + dc = stream->ctx->dc;if (dc_stream_set_cursor_attributes (stream, attributes)) {dc_z10_restore (dc);
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 241/563 crypto: keembay - Add missing check after sg_nents_for_len()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Thomas Fourier <[email protected]>
[ Upstream commit 4e53be21dd0315c00eaf40cc8f8c0facd4d9a6b2 ]
sg_nents_for_len() returns an int which is negative in case of error.
--- drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c +4 -1
@@ -232,7 +232,7 @@ static int kmb_ocs_dma_prepare(struct ahash_request *req)struct device *dev = rctx->hcu_dev->dev;unsigned int remainder =0 ;unsigned int total; -size_t nents; +int nents;size_t count;int rc;int i;
@@ -253,6 +253,9 @@ static int kmb_ocs_dma_prepare(struct ahash_request *req)/* Determine the number of scatter gather list entries to process. */ nents =sg_nents_for_len (req->src, rctx->sg_data_total - remainder); +if (nents <0 ) +return nents; +/* If there are entries to process, map them. */ if (nents) { rctx->sg_dma_nents = dma_map_sg(dev, req->src, nents,
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 242/563 hwrng: nomadik - add ARM_AMBA dependency
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
------------------
From: Arnd Bergmann <[email protected]>
[ Upstream commit efaa2d815a0e4d1c06750e587100f6f7f4ee5497 ]
Compile-testing this driver is only possible when the AMBA bus driver is available in the kernel:
x86_64-linux-ld: drivers/char/hw_random/nomadik-rng.o: in function `nmk_rng_remove':
nomadik-rng.c:(.text+0x67): undefined reference to `amba_release_regions'
x86_64-linux-ld: drivers/char/hw_random/nomadik-rng.o: in function `nmk_rng_probe':
nomadik-rng.c:(.text+0xee): undefined reference to `amba_request_regions'
x86_64-linux-ld: nomadik-rng.c:(.text+0x18d): undefined reference to `amba_release_regions'
The was previously implied by the 'depends on ARCH_NOMADIK', but needs to be specified for the COMPILE_TEST case.
--- drivers/char/hw_random/Kconfig | 1 + 1 file changed, 1 insertion(+)
drivers/char/hw_random/Kconfig +1 -0
@@ -312,6 +312,7 @@ config HW_RANDOM_INGENIC_TRNG config HW_RANDOM_NOMADIK tristate "ST-Ericsson Nomadik Random Number Generator support" depends on ARCH_NOMADIK || COMPILE_TEST + depends on ARM_AMBA default HW_RANDOM help This driver provides kernel-side support for the Random Number
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 243/563 docs: iio: ad3552r: Fix malformed code-block directive
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
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From: Jorge Marques <[email protected]>
[ Upstream commit 788c57f4766bd5802af9918ea350053a91488c60 ]
Missing required double dot and line break.
--- Documentation/iio/ad3552r.rst | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Documentation/iio/ad3552r.rst +2 -1
@@ -64,7 +64,8 @@ specific debugfs path ``/sys/kernel/debug/iio/iio:deviceX``. Usage examples -------------- -. code-block:: bash +.. code-block:: bash + root:/sys/bus/iio/devices/iio:device0# cat data_source normal root:/sys/bus/iio/devices/iio:device0# echo -n ramp-16bit > data_source
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 244/563 fwctl/mlx5: Fix memory alloc/free in mlx5ctl_fw_rpc()
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
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From: Akhilesh Patil <[email protected]>
[ Upstream commit 7f059e47326746ceebe2a984bd6124459df3b458 ]
Use kvfree() to free memory allocated by kvzalloc() instead of kfree(). Avoid potential memory management issue considering kvzalloc() can internally choose to use either kmalloc() or vmalloc() based on memory request and current system memory state. Hence, use more appropriate kvfree() which automatically determines correct free method to avoid potential hard to debug memory issues. Fix this issue discovered by running spatch static analysis tool using coccinelle script - scripts/coccinelle/api/kfree_mismatch.cocci
--- drivers/fwctl/mlx5/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/fwctl/mlx5/main.c +1 -1
@@ -345,7 +345,7 @@ static void *mlx5ctl_fw_rpc(struct fwctl_uctx *uctx, enum fwctl_rpc_scope scope,*/ if (ret && ret != -EREMOTEIO ) {if (rpc_out != rpc_in) -kfree (rpc_out); +kvfree (rpc_out);return ERR_PTR (ret); }return rpc_out;
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 245/563 scsi: pm80xx: Restore support for expanders
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
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From: Niklas Cassel <[email protected]>
[ Upstream commit eeee1086073e0058243c8554738271561bde81f1 ]
Commit 0f630c58e31a ("scsi: pm80xx: Do not use libsas port ID") broke support for expanders. After the commit, devices behind an expander are no longer detected.
Simply reverting the commit restores support for devices behind an expander.
Instead of reverting the commit (and reintroducing a helper to get the port), get the port directly from the lldd_port pointer in struct asd_sas_port.
--- drivers/scsi/pm8001/pm8001_sas.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
drivers/scsi/pm8001/pm8001_sas.c +2 -3
@@ -477,7 +477,7 @@ int pm8001_queue_command(struct sas_task *task, gfp_t gfp_flags)struct pm8001_device *pm8001_dev = dev->lldd_dev;bool internal_abort =sas_is_internal_abort (task);struct pm8001_hba_info *pm8001_ha; -struct pm8001_port *port =NULL ; +struct pm8001_port *port;struct pm8001_ccb_info *ccb;unsigned long flags;u32 n_elem =0 ;
@@ -502,8 +502,7 @@ int pm8001_queue_command(struct sas_task *task, gfp_t gfp_flags)spin_lock_irqsave (&pm8001_ha->lock, flags); - pm8001_dev = dev->lldd_dev; - port = pm8001_ha->phy[pm8001_dev->attached_phy].port; + port = dev->port->lldd_port;if (!internal_abort && (DEV_IS_GONE (pm8001_dev) || !port || !port->port_attached)) {
Signature · 1 line
2.51.0
Greg Kroah-Hartman
maintainerPATCH 246/563 scsi: pm80xx: Fix array-index-out-of-of-bounds on rmmod
In reply to Greg Kroah-Hartman6.17-stable review patch. If anyone has any objections, please let me know.
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From: Niklas Cassel <[email protected]>
[ Upstream commit 251be2f6037fb7ab399f68cd7428ff274133d693 ]
Since commit f7b705c238d1 ("scsi: pm80xx: Set phy_attached to zero when device is gone") UBSAN reports:
UBSAN: array-index-out-of-bounds in drivers/scsi/pm8001/pm8001_sas.c:786:17 index 28 is out of range for type 'pm8001_phy [16]'
on rmmod when using an expander.
For a direct attached device, attached_phy contains the local phy id. For a device behind an expander, attached_phy contains the remote phy id, not the local phy id.
I.e. while pm8001_ha will have pm8001_ha->chip->n_phy local phys, for a device behind an expander, attached_phy can be much larger than pm8001_ha->chip->n_phy (depending on the amount of phys of the expander).
E.g. on my system pm8001_ha has 8 phys with phy ids 0-7. One of the ports has an expander connected. The expander has 31 phys with phy ids 0-30.
The pm8001_ha->phy array only contains the phys of the HBA. It does not contain the phys of the expander. Thus, it is wrong to use attached_phy to index the pm8001_ha->phy array for a device behind an expander.
Thus, we can only clear phy_attached for devices that are directly attached.
--- drivers/scsi/pm8001/pm8001_sas.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
drivers/scsi/pm8001/pm8001_sas.c +8 -1
@@ -749,6 +749,7 @@ static void pm8001_dev_gone_notify(struct domain_device *dev)unsigned long flags =0 ;struct pm8001_hba_info *pm8001_ha;struct pm8001_device *pm8001_dev = dev->lldd_dev; +struct domain_device *parent_dev = dev->parent; pm8001_ha =pm8001_find_ha_by_dev (dev);spin_lock_irqsave (&pm8001_ha->lock, flags);
@@ -765,7 +766,13 @@ static void pm8001_dev_gone_notify(struct domain_device *dev)spin_lock_irqsave (&pm8001_ha->lock, flags); }PM8001_CHIP_DISP ->dereg_dev_req (pm8001_ha, device_id); - pm8001_ha->phy[pm8001_dev->attached_phy].phy_attached =0 ; + +/* +* The phy array only contains local phys. Thus, we cannot clear +* phy_attached for a device behind an expander. +*/ +if (!(parent_dev &&dev_is_expander (parent_dev->dev_type))) + pm8001_ha->phy[pm8001_dev->attached_phy].phy_attached =0 ;pm8001_free_dev (pm8001_dev); }else {pm8001_dbg (pm8001_ha,DISC ,"Found dev has gone.\n" );
Signature · 1 line
2.51.0