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arm64: dts: qcom: Add Vicharak Axon Mini

PATCH Superseded Ajit Singh 2 participants 9 messages May 19 – Jun 7

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Ajit Singh

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#0 lore raw

v3 cover arm64: dts: qcom: Add Vicharak Axon Mini

Add initial support for the Vicharak Axon Mini, a QCS6490-based single-board computer.

This series adds the Vicharak vendor prefix, documents the board compatible, and adds the initial board DTS.

Tested:
- debug UART
- eMMC
- UFS
- SDIO WLAN
- USB 2.0 host
- PCIe

Changes in v3:
- Dropped unused regulators.
- Pick up Acked-by tags for the binding patches.

Link to V2: https://lore.kernel.org/all/[email protected]/

Changes in v2:
- Drop unused Type-C VBUS regulator.
- Drop invalid camera thermal zone.
- Drop incorrect PM8350C thermal alarm override.
- Fix PCIe1 3.3 V regulator name.
- Drop redundant EUD disable override.
- Keep ICE disabled due to fatal SError during qcom_ice_create().
- Fix pinctrl property ordering.
- Sort top-level label references.
- Add blank lines before status properties.

Ajit Singh (3):
dt-bindings: vendor-prefixes: Add prefix for Vicharak
dt-bindings: arm: qcom: Add Vicharak Axon Mini
arm64: dts: qcom: Add Vicharak Axon Mini

 .../devicetree/bindings/arm/qcom.yaml         |    1 +
 .../devicetree/bindings/vendor-prefixes.yaml  |    2 +
 arch/arm64/boot/dts/qcom/Makefile             |    1 +
 .../dts/qcom/qcs6490-vicharak-axon-mini.dts   | 1025 +++++++++++++++++
 4 files changed, 1029 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts
Signature · 1 line
2.50.1 (Apple Git-155)
author
#1 lore raw

PATCH v3 1/3 dt-bindings: vendor-prefixes: Add prefix for Vicharak

Vicharak develops computing platforms and manufactures single-board computers, including FPGA-integrated SBCs. Add a vendor prefix for them.

Link https://vicharak.in/
Acked-by Krzysztof Kozlowski <[email protected]>
Signed-off-by Ajit Singh <[email protected]>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/vendor-prefixes.yaml +2 -0
index ee7fd3cfe203..1948356337b9 100644
@@ -1767,6 +1767,8 @@ patternProperties:
     description: VIA Technologies, Inc.
   "^vialab,.*":
     description: VIA Labs, Inc.
+  "^vicharak,.*":
+    description: Vicharak Computers Pvt. Ltd.
   "^vicor,.*":
     description: Vicor Corporation
   "^videostrong,.*":
Signature · 1 line
2.50.1 (Apple Git-155)
author
#2 lore raw

PATCH v3 2/3 dt-bindings: arm: qcom: Add Vicharak Axon Mini

In reply to Ajit Singh

The Vicharak Axon Mini is a single-board computer based on the Qualcomm QCM6490 platform.

Add the top-level compatible string for this board.

Acked-by Krzysztof Kozlowski <[email protected]>
Signed-off-by Ajit Singh <[email protected]>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/arm/qcom.yaml +1 -0
index d48c625d3fc4..6924bfe7b949 100644
@@ -361,6 +361,7 @@ properties:
               - radxa,dragon-q6a
               - shift,otter
               - thundercomm,rubikpi3
+              - vicharak,axon-mini
           - const: qcom,qcm6490
 
       - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
Signature · 1 line
2.50.1 (Apple Git-155)
author
#3 lore raw

PATCH v3 3/3 arm64: dts: qcom: Add Vicharak Axon Mini

In reply to Ajit Singh

Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.

This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.

Signed-off-by Ajit Singh <[email protected]>
---
 arch/arm64/boot/dts/qcom/Makefile             |    1 +
 .../dts/qcom/qcs6490-vicharak-axon-mini.dts   | 1025 +++++++++++++++++
 2 files changed, 1026 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts
arch/arm64/boot/dts/qcom/Makefile +1 -0
index f80b5d9cf1e8..d8d04dc88e08 100644
@@ -146,6 +146,7 @@ qcs6490-rb3gen2-industrial-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2-industrial-mezzanine.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2-vision-mezzanine.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-thundercomm-rubikpi3.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-vicharak-axon-mini.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs8300-ride.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-aim300-aiot.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride.dtb
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +1025 -0

1,025 lines not on this page · raw message

Signature · 1 line
2.50.1 (Apple Git-155)
#4 lore raw
Quoted 13 lines · Ajit Singh

Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.

This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.

Signed-off-by Ajit Singh <[email protected]>
---
 arch/arm64/boot/dts/qcom/Makefile             |    1 +
 .../dts/qcom/qcs6490-vicharak-axon-mini.dts   | 1025 +++++++++++++++++
 2 files changed, 1026 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts

arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 673

Quoted 5 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +5 -0
+
+&pcie0_clkreq_n {
+	bias-pull-up;
+	drive-strength = <2>;
+};

Could you please add a /* pinctrl */ comment at the end of the file and group all pinctrl-related changes after it?

arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 989

Quoted 8 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +8 -0
+
+
+&uart5 {
+	status = "okay";
+};
+
+&ufs_mem_hc {
+	/delete-property/ qcom,ice;

This should be explained in the commit message.

Quoted 4 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +4 -0
+
+	reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>;
+	vcc-supply = <&vreg_l7b_2p96>;
+	vcc-max-microamp = <800000>;

arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 1010

Quoted 10 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +10 -0
+	vccq-supply = <&vreg_l9b_1p2>;
+	vccq-max-microamp = <900000>;
+	vccq2-supply = <&vreg_l9b_1p2>;
+	vccq2-max-microamp = <900000>;
+
+	status = "okay";
+};
+
+&usb_2 {
+	dr_mode = "host";

Is it actually host-only?

Quoted 4 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +4 -0
+
+	status = "okay";
+};
+
Signature · 2 lines
With best wishes
Dmitry
author
#5 lore raw
Quoted 1 line · Dmitry Baryshkov

On Tue, May 19, 2026 at 06:26:55PM +0530, Ajit Singh wrote:

Thanks for the review.

Quoted 13 lines
Quoted 13 lines

Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.

This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.

Signed-off-by Ajit Singh <[email protected]>
---
 arch/arm64/boot/dts/qcom/Makefile             |    1 +
 .../dts/qcom/qcs6490-vicharak-axon-mini.dts   | 1025 +++++++++++++++++
 2 files changed, 1026 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts
Quoted 9 lines

arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 673

Quoted 5 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +5 -0
+
+&pcie0_clkreq_n {
+	bias-pull-up;
+	drive-strength = <2>;
+};

Could you please add a /* pinctrl */ comment at the end of the file and group all pinctrl-related changes after it?

Ack

Quoted 11 lines

arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 989

Quoted 8 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +8 -0
+
+
+&uart5 {
+	status = "okay";
+};
+
+&ufs_mem_hc {
+	/delete-property/ qcom,ice;

This should be explained in the commit message.

Ack, I will explain this in the commit message.

ICE is kept disabled because enabling it currently triggers an SError during qcom_ice_create() on this board. I am keeping ICE disabled for the initial board support.

Quoted 8 lines
Quoted 8 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +8 -0
+
+	reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>;
+	vcc-supply = <&vreg_l7b_2p96>;
+	vcc-max-microamp = <800000>;
+	vccq-supply = <&vreg_l9b_1p2>;
+	vccq-max-microamp = <900000>;
+	vccq2-supply = <&vreg_l9b_1p2>;
+	vccq2-max-microamp = <900000>;
Quoted 9 lines

arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 1010

Quoted 6 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +6 -0
+
+	status = "okay";
+};
+
+&usb_2 {
+	dr_mode = "host";

Is it actually host-only?

Yes, this is routed to a USB hub which exposes two USB-A host ports. The board does not use this port for OTG or device mode.

Quoted 8 lines
Quoted 4 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +4 -0
+
+	status = "okay";
+};
+
Signature · 2 lines
With best wishes
Dmitry
#6 lore raw
Quoted 59 lines · Ajit Singh
Quoted 1 line · Dmitry Baryshkov

On Tue, May 19, 2026 at 06:26:55PM +0530, Ajit Singh wrote:

Thanks for the review.

Quoted 13 lines
Quoted 13 lines

Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.

This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.

Signed-off-by Ajit Singh <[email protected]>
---
 arch/arm64/boot/dts/qcom/Makefile             |    1 +
 .../dts/qcom/qcs6490-vicharak-axon-mini.dts   | 1025 +++++++++++++++++
 2 files changed, 1026 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts
Quoted 9 lines

arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 673

Quoted 5 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +5 -0
+
+&pcie0_clkreq_n {
+	bias-pull-up;
+	drive-strength = <2>;
+};

Could you please add a /* pinctrl */ comment at the end of the file and group all pinctrl-related changes after it?

Ack

Quoted 11 lines

arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 989

Quoted 8 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +8 -0
+
+
+&uart5 {
+	status = "okay";
+};
+
+&ufs_mem_hc {
+	/delete-property/ qcom,ice;

This should be explained in the commit message.

Ack, I will explain this in the commit message.

ICE is kept disabled because enabling it currently triggers an SError during qcom_ice_create() on this board. I am keeping ICE disabled for the initial board support.

Quoted 8 lines
Quoted 8 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +8 -0
+
+	reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>;
+	vcc-supply = <&vreg_l7b_2p96>;
+	vcc-max-microamp = <800000>;
+	vccq-supply = <&vreg_l9b_1p2>;
+	vccq-max-microamp = <900000>;
+	vccq2-supply = <&vreg_l9b_1p2>;
+	vccq2-max-microamp = <900000>;
Quoted 9 lines

arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 1010

Quoted 6 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +6 -0
+
+	status = "okay";
+};
+
+&usb_2 {
+	dr_mode = "host";

Is it actually host-only?

Quoted 2 lines

Yes, this is routed to a USB hub which exposes two USB-A host ports. The board does not use this port for OTG or device mode.

Comment it, please.

Quoted 8 lines
Quoted 8 lines
Quoted 4 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +4 -0
+
+	status = "okay";
+};
+
Signature · 2 lines
With best wishes
Dmitry
Signature · 2 lines
With best wishes
Dmitry
author
#8 lore raw
In reply to Ajit Singh

Hi,

Gentle ping for this v3 series.

The binding patches have Acked-by tags, and I am not aware of any remaining review comments on the DTS patch.

Thanks,
Ajit