arm64: dts: qcom: Add Vicharak Axon Mini
v4 cover arm64: dts: qcom: Add Vicharak Axon Mini
Add initial support for the Vicharak Axon Mini, a QCS6490-based single-board computer.
This series adds the Vicharak vendor prefix, documents the board compatible, and adds the initial board DTS.
Tested:
- debug UART
- eMMC
- UFS
- SDIO WLAN
- USB 2.0 host
- PCIe
---
v3: https://lore.kernel.org/all/[email protected]/
Changes in v4:
- Move pinctrl-related changes under a /* pinctrl */ section.
- Explain why UFS ICE is kept disabled in commit msg.
- Add a comment describing the USB 2.0 host-only board routing.
Changes in v3:
- Dropped unused regulators.
- Pick up Acked-by tags for the binding patches.
Changes in v2:
- Drop unused Type-C VBUS regulator.
- Drop invalid camera thermal zone.
- Drop incorrect PM8350C thermal alarm override.
- Fix PCIe1 3.3 V regulator name.
- Drop redundant EUD disable override.
- Keep ICE disabled due to fatal SError during qcom_ice_create().
- Fix pinctrl property ordering.
- Sort top-level label references.
- Add blank lines before status properties.
Ajit Singh (3):
dt-bindings: vendor-prefixes: Add prefix for Vicharak
dt-bindings: arm: qcom: Add Vicharak Axon Mini
arm64: dts: qcom: Add Vicharak Axon Mini
.../devicetree/bindings/arm/qcom.yaml | 1 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/qcs6490-vicharak-axon-mini.dts | 1027 +++++++++++++++++ 4 files changed, 1031 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts
Signature · 1 line
2.50.1 (Apple Git-155)
PATCH v4 1/3 dt-bindings: vendor-prefixes: Add prefix for Vicharak
Vicharak develops computing platforms and manufactures single-board computers, including FPGA-integrated SBCs. Add a vendor prefix for them.
--- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/vendor-prefixes.yaml +2 -0
@@ -1767,6 +1767,8 @@ patternProperties: description: VIA Technologies, Inc. "^vialab,.*": description: VIA Labs, Inc. + "^vicharak,.*": + description: Vicharak Computers Pvt. Ltd. "^vicor,.*": description: Vicor Corporation "^videostrong,.*":
Signature · 1 line
2.50.1 (Apple Git-155)
PATCH v4 2/3 dt-bindings: arm: qcom: Add Vicharak Axon Mini
In reply to Ajit SinghThe Vicharak Axon Mini is a single-board computer based on the Qualcomm QCM6490 platform.
Add the top-level compatible string for this board.
--- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/arm/qcom.yaml +1 -0
@@ -361,6 +361,7 @@ properties: - radxa,dragon-q6a - shift,otter - thundercomm,rubikpi3 + - vicharak,axon-mini - const: qcom,qcm6490 - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
Signature · 1 line
2.50.1 (Apple Git-155)
PATCH v4 3/3 arm64: dts: qcom: Add Vicharak Axon Mini
In reply to Ajit SinghAdd DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during qcom_ice_create() on this board. UFS works without ICE.
--- arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/qcs6490-vicharak-axon-mini.dts | 1027 +++++++++++++++++ 2 files changed, 1028 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts
arch/arm64/boot/dts/qcom/Makefile +1 -0
@@ -146,6 +146,7 @@ qcs6490-rb3gen2-industrial-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2 dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-industrial-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-thundercomm-rubikpi3.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs6490-vicharak-axon-mini.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +1027 -0
1,027 lines not on this page · raw message
Signature · 1 line
2.50.1 (Apple Git-155)
Quoted 9 lines · Ajit Singh
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.
Quoted 7 lines
Signed-off-by Ajit Singh <[email protected]>--- arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/qcs6490-vicharak-axon-mini.dts | 1027 +++++++++++++++++ 2 files changed, 1028 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts
Signature · 2 lines
With best wishes Dmitry
Quoted 11 lines · Ajit Singh
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.Signed-off-by Ajit Singh <[email protected]>---
[...]
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 603
Quoted 10 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +10
-0+ vreg_l12c_1p8: ldo12 { + regulator-name = "vreg_l12c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + /* + * VREG_L12C_1P8 supplies the Ampak WLAN/BT module + * VDDIO and the external 32.768 kHz oscillator. + */
Sorry for the long review timelines on the previous patch, many of us were out for conferences..
Is the oscillator used for that WLAN module? Would you ideally like to be able to turn it on/off?
Perhaps you could get that with a simple pwrseq driver (+Bartosz)
Konrad
Quoted 29 lines · Konrad Dybcio
Quoted 11 lines · Ajit Singh
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.Signed-off-by Ajit Singh <[email protected]>---
[...]
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 603
Quoted 10 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +10
-0+ vreg_l12c_1p8: ldo12 { + regulator-name = "vreg_l12c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + /* + * VREG_L12C_1P8 supplies the Ampak WLAN/BT module + * VDDIO and the external 32.768 kHz oscillator. + */Sorry for the long review timelines on the previous patch, many of us were out for conferences..
Quoted 2 lines
Is the oscillator used for that WLAN module? Would you ideally like to be able to turn it on/off?
yes, oscillator is used for WLAN modules. Oscillator is powered from the same VREG_L12C rail as WLAN VDDIO, so there is no separate regulator control to put in pwrseq. So I think this will work fine?
Quoted 4 lines
Perhaps you could get that with a simple pwrseq driver (+Bartosz)
Konrad
Quoted 30 lines · Ajit Singh
Quoted 29 lines · Konrad Dybcio
Quoted 11 lines · Ajit Singh
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.Signed-off-by Ajit Singh <[email protected]>---
[...]
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 603
Quoted 10 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +10
-0+ vreg_l12c_1p8: ldo12 { + regulator-name = "vreg_l12c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + /* + * VREG_L12C_1P8 supplies the Ampak WLAN/BT module + * VDDIO and the external 32.768 kHz oscillator. + */Sorry for the long review timelines on the previous patch, many of us were out for conferences..
Quoted 6 lines
Quoted 2 lines
Is the oscillator used for that WLAN module? Would you ideally like to be able to turn it on/off?
yes, oscillator is used for WLAN modules. Oscillator is powered from the same
VREG_L12Crail as WLAN VDDIO, so there is no separate regulator control to put in pwrseq. So I think this will work fine?
Probably? My point is that you marked it as always-on, so it will *never* turn off right now. For e.g. Qualcomm wifi, there's some timing spec that needs to be met wrt delays between toggling various regulators and GPIOs going to the module, hence I suggested you may need some pwrseq inbetween to achieve reliable powering on/off
Konrad
Quoted 38 lines · Konrad Dybcio
Quoted 30 lines · Ajit Singh
Quoted 29 lines · Konrad Dybcio
Quoted 11 lines · Ajit Singh
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.Signed-off-by Ajit Singh <[email protected]>---
[...]
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 603
Quoted 10 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +10
-0+ vreg_l12c_1p8: ldo12 { + regulator-name = "vreg_l12c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + /* + * VREG_L12C_1P8 supplies the Ampak WLAN/BT module + * VDDIO and the external 32.768 kHz oscillator. + */Sorry for the long review timelines on the previous patch, many of us were out for conferences..
Quoted 6 lines
Quoted 2 lines
Is the oscillator used for that WLAN module? Would you ideally like to be able to turn it on/off?
yes, oscillator is used for WLAN modules. Oscillator is powered from the same
VREG_L12Crail as WLAN VDDIO, so there is no separate regulator control to put in pwrseq. So I think this will work fine?
Quoted 6 lines
Probably? My point is that you marked it as always-on, so it will *never* turn off right now. For e.g. Qualcomm wifi, there's some timing spec that needs to be met wrt delays between toggling various regulators and GPIOs going to the module, hence I suggested you may need some pwrseq inbetween to achieve reliable powering on/off
Right, I checked the module timing requirements.
The module requires VBAT to be present before or at the same time as VDDIO, and WL_REG_ON to be asserted only after VBAT/VDDIO are valid, around 2 sleep-clock cycles later.
On this board, VBAT is the shared VCC_3V3 rail and is enabled by hardware, so it is already present before VDDIO. VREG_L12C supplies WLAN/BT VDDIO and is kept on. The WL_REG_ON timing is handled by the existing mmc-pwrseq-simple reset GPIO/delay before SDIO enumeration.
So I think the current sequencing matches the module timing requirement.
Quoted 1 line
Konrad
Ajit
Quoted 51 lines · Ajit Singh
Quoted 38 lines · Konrad Dybcio
Quoted 30 lines · Ajit Singh
Quoted 29 lines · Konrad Dybcio
Quoted 11 lines · Ajit Singh
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.Signed-off-by Ajit Singh <[email protected]>---
[...]
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 603
Quoted 10 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +10
-0+ vreg_l12c_1p8: ldo12 { + regulator-name = "vreg_l12c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + /* + * VREG_L12C_1P8 supplies the Ampak WLAN/BT module + * VDDIO and the external 32.768 kHz oscillator. + */Sorry for the long review timelines on the previous patch, many of us were out for conferences..
Quoted 6 lines
Quoted 2 lines
Is the oscillator used for that WLAN module? Would you ideally like to be able to turn it on/off?
yes, oscillator is used for WLAN modules. Oscillator is powered from the same
VREG_L12Crail as WLAN VDDIO, so there is no separate regulator control to put in pwrseq. So I think this will work fine?Quoted 6 lines
Probably? My point is that you marked it as always-on, so it will *never* turn off right now. For e.g. Qualcomm wifi, there's some timing spec that needs to be met wrt delays between toggling various regulators and GPIOs going to the module, hence I suggested you may need some pwrseq inbetween to achieve reliable powering on/off
Right, I checked the module timing requirements.
The module requires VBAT to be present before or at the same time as VDDIO, and
WL_REG_ONto be asserted only after VBAT/VDDIO are valid, around 2 sleep-clock cycles later.
Quoted 6 lines
On this board, VBAT is the shared
VCC_3V3rail and is enabled by hardware, so it is already present before VDDIO.VREG_L12Csupplies WLAN/BT VDDIO and is kept on. TheWL_REG_ONtiming is handled by the existing mmc-pwrseq-simple reset GPIO/delay before SDIO enumeration.So I think the current sequencing matches the module timing requirement.
Since the sequencing is handled, can we drop the always-on property, perhaps by describing the SDIO WLAN?
e.g. in arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts there is:
/* WLAN SDIO channel */
mmc@80118000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <50000000>;
bus-width = <4>;
non-removable;
cap-sd-highspeed;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mc1_a_2_default>;
pinctrl-1 = <&mc1_a_2_sleep>;
/*
* GPIO-controlled voltage enablement: this drives
* the WL_REG_ON line high when we use this device.
* Represented as regulator to fill OCR mask.
*/
vmmc-supply = <&wl_reg>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wifi@1 {
compatible = "brcm,bcm4334-fmac", "brcm,bcm4329-fmac";
reg = <1>;
/* GPIO216 WL_HOST_WAKE */
interrupt-parent = <&gpio6>;
interrupts = <24 IRQ_TYPE_EDGE_FALLING>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wlan_default_mode>;
};
};most notably though, it seems that the brcmfmac driver doesn't even use the regulator framework, probably because all of the SDIO WLANs that Linux supports were wired in a more "embedded" way, where the V(Q)MMC supplies were enough.. unless it's the case here too?
Konrad
Quoted 97 lines · Konrad Dybcio
Quoted 51 lines · Ajit Singh
Quoted 38 lines · Konrad Dybcio
Quoted 30 lines · Ajit Singh
Quoted 29 lines · Konrad Dybcio
Quoted 11 lines · Ajit Singh
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.Signed-off-by Ajit Singh <[email protected]>---
[...]
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 603
Quoted 10 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +10
-0+ vreg_l12c_1p8: ldo12 { + regulator-name = "vreg_l12c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + /* + * VREG_L12C_1P8 supplies the Ampak WLAN/BT module + * VDDIO and the external 32.768 kHz oscillator. + */Sorry for the long review timelines on the previous patch, many of us were out for conferences..
Quoted 6 lines
Quoted 2 lines
Is the oscillator used for that WLAN module? Would you ideally like to be able to turn it on/off?
yes, oscillator is used for WLAN modules. Oscillator is powered from the same
VREG_L12Crail as WLAN VDDIO, so there is no separate regulator control to put in pwrseq. So I think this will work fine?Quoted 6 lines
Probably? My point is that you marked it as always-on, so it will *never* turn off right now. For e.g. Qualcomm wifi, there's some timing spec that needs to be met wrt delays between toggling various regulators and GPIOs going to the module, hence I suggested you may need some pwrseq inbetween to achieve reliable powering on/off
Right, I checked the module timing requirements.
The module requires VBAT to be present before or at the same time as VDDIO, and
WL_REG_ONto be asserted only after VBAT/VDDIO are valid, around 2 sleep-clock cycles later.Quoted 6 lines
On this board, VBAT is the shared
VCC_3V3rail and is enabled by hardware, so it is already present before VDDIO.VREG_L12Csupplies WLAN/BT VDDIO and is kept on. TheWL_REG_ONtiming is handled by the existing mmc-pwrseq-simple reset GPIO/delay before SDIO enumeration.So I think the current sequencing matches the module timing requirement.
Since the sequencing is handled, can we drop the always-on property, perhaps by describing the SDIO WLAN?
e.g. in
arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dtsthere is:/* WLAN SDIO channel */
mmc@80118000 { arm,primecell-periphid = <0x10480180>; max-frequency = <50000000>; bus-width = <4>; non-removable; cap-sd-highspeed; pinctrl-names = "default", "sleep"; pinctrl-0 = <&mc1_a_2_default>; pinctrl-1 = <&mc1_a_2_sleep>; /* * GPIO-controlled voltage enablement: this drives * the WL_REG_ON line high when we use this device. * Represented as regulator to fill OCR mask. */ vmmc-supply = <&wl_reg>; #address-cells = <1>; #size-cells = <0>; status = "okay"; wifi@1 { compatible = "brcm,bcm4334-fmac", "brcm,bcm4329-fmac"; reg = <1>; /* GPIO216 WL_HOST_WAKE */ interrupt-parent = <&gpio6>; interrupts = <24 IRQ_TYPE_EDGE_FALLING>; interrupt-names = "host-wake"; pinctrl-names = "default"; pinctrl-0 = <&wlan_default_mode>; }; };
Quoted 4 lines
most notably though, it seems that the brcmfmac driver doesn't even use the regulator framework, probably because all of the SDIO WLANs that Linux supports were wired in a more "embedded" way, where the V(Q)MMC supplies were enough.. unless it's the case here too?
It might not be possible to drop regulator-always-on for VREG_L12C here. The SDHC2 host already has its own vmmc/vqmmc rails:
vqmmc-supply = <&vreg_l2c_1p62>;
vmmc-supply = <&vreg_l6c_2p96>;
VREG_L12C is a separate module-side VDDIO rail for the AP6272S WLAN/BT module. There is no separate GPIO-controlled enable for this rail;
as you said, since brcmfmac does not appear to consume an extra VDDIO regulator from the SDIO child node, so unless there is a preferred way to model this module-side VDDIO rail, I think VREG_L12C still needs to stay always-on.
Quoted 2 lines
Konrad
Ajit
Quoted 17 lines · Ajit Singh
Quoted 16 lines · Konrad Dybcio
Quoted 15 lines · Ajit Singh
Quoted 14 lines · Konrad Dybcio
Quoted 13 lines · Ajit Singh
Quoted 12 lines · Konrad Dybcio
Quoted 11 lines · Ajit Singh
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.Signed-off-by Ajit Singh <[email protected]>---
[...]
Quoted 12 lines
Quoted 5 lines
most notably though, it seems that the brcmfmac driver doesn't even use the regulator framework, probably because all of the SDIO WLANs that Linux supports were wired in a more "embedded" way, where the V(Q)MMC supplies were enough.. unless it's the case here too?
It might not be possible to drop regulator-always-on for
VREG_L12Chere. The SDHC2 host already has its own vmmc/vqmmc rails:vqmmc-supply = <
&vreg_l2c_1p62>;
vmmc-supply = <&vreg_l6c_2p96>;
Quoted 6 lines
VREG_L12Cis a separate module-side VDDIO rail for the AP6272S WLAN/BT module. There is no separate GPIO-controlled enable for this rail;as you said, since brcmfmac does not appear to consume an extra VDDIO regulator from the SDIO child node, so unless there is a preferred way to model this module-side VDDIO rail, I think
VREG_L12Cstill needs to stay always-on.
OK, let's get this merged then
Konrad
Quoted 11 lines · Ajit Singh
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.Signed-off-by Ajit Singh <[email protected]>---
[...]
Quoted 9 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +9
-0+ vreg_l16b_1p1: ldo16 { + regulator-name = "vreg_l16b_1p1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + regulator-always-on; + regulator-boot-on; + };
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 467
Quoted 10 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +10
-0+ + vreg_l17b_1p7: ldo17 { + regulator-name = "vreg_l17b_1p7"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + regulator-always-on; + regulator-boot-on; + };
Any reason for these two to be always-on?
[...]
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 967
Quoted 3 lines
+&usb_2 {
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +2
-0+ /* Routed to an onboard USB hub for two USB-A host ports. */ + dr_mode = "host";
Do they need to be powered/power sequenced in any way? see drivers/usb/misc/onboard_usb_dev.c and e.g. qcs6490-rb3gen2.dts -> usb5e3,610
Konrad
Quoted 1 line · Konrad Dybcio
On 6/7/26 1:36 PM, Ajit Singh wrote:
Thanks for review, Konrad!
Quoted 27 lines
Quoted 11 lines
Add DTS for the Vicharak Axon Mini board based on the Qualcomm QCS6490 SoC.
This adds debug UART, eMMC, UFS, SDIO WLAN, USB 2.0 host, PCIe support along with regulators.
The UFS ICE block is kept disabled because enabling it currently causes an SError during
qcom_ice_create()on this board. UFS works without ICE.Signed-off-by Ajit Singh <[email protected]>---
[...]
Quoted 13 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +13
-0+ vreg_l16b_1p1: ldo16 { + regulator-name = "vreg_l16b_1p1"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_l17b_1p7: ldo17 { + regulator-name = "vreg_l17b_1p7"; + regulator-min-microvolt = <1700000>;
Quoted 8 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 467
Quoted 6 lines
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +6
-0+ regulator-max-microvolt = <1900000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + + regulator-always-on; + regulator-boot-on; + };Any reason for these two to be always-on?
vreg_l17b_1p7 supplies VDDD of the ES8388 audio codec, and vreg_l16b_1p1 supplies the CH7218A eDP-to-HDMI bridge. Both consumers are not described in this initial DTS and will be added in follow-up patches.
So yes, these do not need to be always-on in this patch. I will drop regulator-always-on and regulator-boot-on for both.
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arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts line 967
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+&usb_2 {
arch/arm64/boot/dts/qcom/qcs6490-vicharak-axon-mini.dts new file +2
-0+ /* Routed to an onboard USB hub for two USB-A host ports. */ + dr_mode = "host";Do they need to be powered/power sequenced in any way? see
drivers/usb/misc/onboard_usb_dev.cand e.g.qcs6490-rb3gen2.dts-> usb5e3,610
Thanks, I checked it. For Axon-mini USB hub is powered from the shared VCC_3V3 rail, which is enabled by board hardware. There is no hub-specific reset so I think no power sequencing is required here.
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Konrad
Ajit