Nuvoton NPCM FIU DTS fixes and binding conversion

The NPCM7xx FIU controller nodes only describe the control register block, but they still advertise a second "memory" entry in reg-names. Drop the bogus name so the DTS matches the resources actually present in each node.

Signed-off-by Tomer Maimon <[email protected]>

---
 arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The alias mapping convention for NPCM8XX was corrupted during the conversion to YAML. --

commit 04ac00da42e73e1f171a2c2d3fdb84bc4768096a
Author: Tomer Maimon <[email protected]>

spi: dt-bindings: nuvoton,npcm-fiu: Convert to DT schema

This commit converts the Nuvoton NPCM FIU binding to the DT schema format.

Quoted 5 lines

Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.yaml new file +0 -0

new file mode 100644
index 0000000000000..0f95def019105

[ ... ]

Quoted 5 lines

Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.yaml new file +5 -0

+description: |
+  NPCM FIU supports single, dual and quad communication interface.
+
+  The NPCM7XX supports three FIU modules:
+    FIU0 and FIUx support two chip selects

Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.yaml line 29

Quoted 10 lines

Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.yaml new file +10 -0

+    FIU3 supports four chip selects.
+
+  The NPCM8XX supports four FIU modules:
+    FIU0 and FIUx support two chip selects
+    FIU1 and FIU3 support four chip selects.
+
+  Alias convention:
+    The '/aliases' node should define:
+      For NPCM7xx:  fiu0=&fiu0; fiu1=&fiu3; fiu2=&fiux;
+      For NPCM8xx:  fiu0=&fiu0; fiu1=&fiu3; fiu2=&fiux; fiu3=&fiu1;

[Severity: Low]
Does this new alias mapping for NPCM8xx correctly match the original text binding?

The original text binding in nuvoton,npcm-fiu.txt mapped the aliases as:

In the NPCM8XX BMC:
fiu0 represent fiu 0 controller
fiu1 represent fiu 1 controller
fiu2 represent fiu 3 controller
fiu3 represent fiu x controller

The converted documentation maps fiu1 to fiu3, fiu2 to fiux, and fiu3 to fiu1. Could you confirm if this change in the documentation was intentional?

--
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2

Convert the Nuvoton NPCM FIU binding to DT schema format.

Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.yaml new file +48 -0

@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/nuvoton,npcm-fiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton NPCM Flash Interface Unit (FIU) SPI Controller
+
+maintainers:
+  - Tomer Maimon <[email protected]>
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+description: |
+  NPCM FIU supports single, dual and quad communication interface.
+
+  The NPCM7XX supports three FIU modules:
+    FIU0 and FIUx support two chip selects
+    FIU3 supports four chip selects.
+
+  The NPCM8XX supports four FIU modules:
+    FIU0 and FIUx support two chip selects
+    FIU1 and FIU3 support four chip selects.
+
+  Alias convention:
+    The '/aliases' node should define:
+      For NPCM7xx:  fiu0=&fiu0; fiu1=&fiu3; fiu2=&fiux;
+      For NPCM8xx:  fiu0=&fiu0; fiu1=&fiu3; fiu2=&fiux; fiu3=&fiu1;
+
+properties:
+  compatible:
+    enum:
+      - nuvoton,npcm750-fiu # Poleg NPCM7XX
+      - nuvoton,npcm845-fiu # Arbel NPCM8XX
+
+  reg:
+    minItems: 1
+    items:
+      - description: FIU registers
+      - description: Memory-mapped flash contents (optional)
+
+  reg-names:
+    minItems: 1
+    items:
+      - const: control
+      - const: memory
+

Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.yaml new file +12 -0

+
+  nuvoton,spix-mode:
+    type: boolean
+    description: Enable SPIX mode for an expansion bus to an ASIC or CPLD.
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - clocks
+
+unevaluatedProperties: false