FAILED: patch "[PATCH] drm/xe/guc_ads: allocate UM queues in VRAM on dGFX" failed to apply to 6.18-stable tree
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[email protected]
maintainerThe patch below does not apply to the 6.18-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.18.y
git checkout FETCH_HEAD
git cherry-pick -x f342810a141f8a7e8b3786a6e4b6c0695a078a74
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '2026082047-manned-outer-503f@gregkh' --subject-prefix 'PATCH 6.18.y' 'HEAD^..'
Possible dependencies:
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From f342810a141f8a7e8b3786a6e4b6c0695a078a74 Mon Sep 17 00:00:00 2001
From: Jia Yao <[email protected]>
Date: Tue, 4 Aug 2026 16:50:56 +0000
Subject: [PATCH] drm/xe/guc_ads: allocate UM queues in VRAM on dGFX
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On iGPU, the UM queue BO is allocated in system memory. On dGFX, the BO was previously created in system memory and later reallocated in xe_guc_realloc_post_hwconfig(). Allocate the UM queue BO directly in VRAM on dGFX, where it is ultimately required.
drivers/gpu/drm/xe/xe_guc.c +0 -6
@@ -714,12 +714,6 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)if (ret)return ret; -if (guc->ads.um_queue_bo) { - ret =xe_managed_bo_reinit_in_vram (xe, tile, &guc->ads.um_queue_bo); -if (ret) -return ret; - } -return 0 ; }
drivers/gpu/drm/xe/xe_guc_ads.c +5 -3
@@ -393,15 +393,17 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)/* * Allocate a separate BO for the HW fault ring (UM queues). * -* Round the size up to the next power of two so that +* Round the size up to the next power of two so that on iGPU * (system memory, no IOMMU) the TTM pool issues a single * alloc_pages(order=N) call, maximising the chance of getting * a physically contiguous block. GuC requires contiguous DPA. */ -size_t um_size =roundup_pow_of_two (GUC_UM_QUEUE_SIZE * +size_t um_size =IS_DGFX (xe) ? +GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX : +roundup_pow_of_two (GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX ); -u32 um_flags =XE_BO_FLAG_SYSTEM | +u32 um_flags =XE_BO_FLAG_VRAM_IF_DGFX (tile) |XE_BO_FLAG_GGTT |XE_BO_FLAG_GGTT_INVALIDATE |XE_BO_FLAG_PINNED_NORESTORE ;
PATCH 1/1 drm/xe/guc_ads: allocate UM queues in VRAM on dGFX
On iGPU, the UM queue BO is allocated in system memory. On dGFX, the BO was previously created in system memory and later reallocated in xe_guc_realloc_post_hwconfig(). Allocate the UM queue BO directly in VRAM on dGFX, where it is ultimately required.
--- drivers/gpu/drm/xe/xe_guc.c | 6 ------ drivers/gpu/drm/xe/xe_guc_ads.c | 8 +++++--- 2 files changed, 5 insertions(+), 9 deletions(-)
drivers/gpu/drm/xe/xe_guc.c +0 -6
@@ -700,12 +700,6 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)if (ret)return ret; -if (guc->ads.um_queue_bo) { - ret =xe_managed_bo_reinit_in_vram (xe, tile, &guc->ads.um_queue_bo); -if (ret) -return ret; - } -return 0 ; }
drivers/gpu/drm/xe/xe_guc_ads.c +5 -3
@@ -392,15 +392,17 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)/* * Allocate a separate BO for the HW fault ring (UM queues). * -* Round the size up to the next power of two so that +* Round the size up to the next power of two so that on iGPU * (system memory, no IOMMU) the TTM pool issues a single * alloc_pages(order=N) call, maximising the chance of getting * a physically contiguous block. GuC requires contiguous DPA. */ -size_t um_size =roundup_pow_of_two (GUC_UM_QUEUE_SIZE * +size_t um_size =IS_DGFX (xe) ? +GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX : +roundup_pow_of_two (GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX ); -u32 um_flags =XE_BO_FLAG_SYSTEM | +u32 um_flags =XE_BO_FLAG_VRAM_IF_DGFX (tile) |XE_BO_FLAG_GGTT |XE_BO_FLAG_GGTT_INVALIDATE |XE_BO_FLAG_PINNED_NORESTORE ;
Signature · 1 line
2.43.0
Greg KH
maintainerRe: [PATCH 6.18.y] drm/xe/guc_ads: allocate UM queues in VRAM on dGFX
Quoted 67 lines · Jia Yao
On iGPU, the UM queue BO is allocated in system memory. On dGFX, the BO was previously created in system memory and later reallocated in
xe_guc_realloc_post_hwconfig(). Allocate the UM queue BO directly in VRAM on dGFX, where it is ultimately required.Fixes 9c57bc08652a ("drm/xe/lnl: Drop force_probe requirement")Cc Gwan-gyeong Mun <[email protected]>Cc Matthew Auld <[email protected]>Cc <[email protected]> # v6.12+Signed-off-by Jia Yao <[email protected]>Reviewed-by Matthew Auld <[email protected]>Signed-off-by Matthew Auld <[email protected]>(cherry picked from commit ace076ef0a854ab5940bacc539bf66afd61d118c)Signed-off-by Thomas Hellström <[email protected]>(cherry picked from commit f342810a141f8a7e8b3786a6e4b6c0695a078a74)--- drivers/gpu/drm/xe/xe_guc.c | 6 ------ drivers/gpu/drm/xe/xe_guc_ads.c | 8 +++++--- 2 files changed, 5 insertions(+), 9 deletions(-)drivers/gpu/drm/xe/xe_guc.c +0
-6@@ -700,12 +700,6 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)if (ret)return ret; -if (guc->ads.um_queue_bo) { - ret =xe_managed_bo_reinit_in_vram (xe, tile, &guc->ads.um_queue_bo); -if (ret) -return ret; - } -return 0 ; }drivers/gpu/drm/xe/xe_guc_ads.c +5
-3@@ -392,15 +392,17 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)/* * Allocate a separate BO for the HW fault ring (UM queues). * -* Round the size up to the next power of two so that +* Round the size up to the next power of two so that on iGPU * (system memory, no IOMMU) the TTM pool issues a single * alloc_pages(order=N) call, maximising the chance of getting * a physically contiguous block. GuC requires contiguous DPA. */ -size_t um_size =roundup_pow_of_two (GUC_UM_QUEUE_SIZE * +size_t um_size =IS_DGFX (xe) ? +GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX : +roundup_pow_of_two (GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX ); -u32 um_flags =XE_BO_FLAG_SYSTEM | +u32 um_flags =XE_BO_FLAG_VRAM_IF_DGFX (tile) |XE_BO_FLAG_GGTT |XE_BO_FLAG_GGTT_INVALIDATE |XE_BO_FLAG_PINNED_NORESTORE ;Signature · 1 line
2.43.0
Does not apply at all, are you sure you made this properly?
thanks,
greg k-h
Greg KH
maintainerRe: [PATCH 6.18.y] drm/xe/guc_ads: allocate UM queues in VRAM on dGFX
Quoted 71 lines · Greg KH
Quoted 67 lines · Jia Yao
On iGPU, the UM queue BO is allocated in system memory. On dGFX, the BO was previously created in system memory and later reallocated in
xe_guc_realloc_post_hwconfig(). Allocate the UM queue BO directly in VRAM on dGFX, where it is ultimately required.Fixes 9c57bc08652a ("drm/xe/lnl: Drop force_probe requirement")Cc Gwan-gyeong Mun <[email protected]>Cc Matthew Auld <[email protected]>Cc <[email protected]> # v6.12+Signed-off-by Jia Yao <[email protected]>Reviewed-by Matthew Auld <[email protected]>Signed-off-by Matthew Auld <[email protected]>(cherry picked from commit ace076ef0a854ab5940bacc539bf66afd61d118c)Signed-off-by Thomas Hellström <[email protected]>(cherry picked from commit f342810a141f8a7e8b3786a6e4b6c0695a078a74)--- drivers/gpu/drm/xe/xe_guc.c | 6 ------ drivers/gpu/drm/xe/xe_guc_ads.c | 8 +++++--- 2 files changed, 5 insertions(+), 9 deletions(-)drivers/gpu/drm/xe/xe_guc.c +0
-6@@ -700,12 +700,6 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)if (ret)return ret; -if (guc->ads.um_queue_bo) { - ret =xe_managed_bo_reinit_in_vram (xe, tile, &guc->ads.um_queue_bo); -if (ret) -return ret; - } -return 0 ; }drivers/gpu/drm/xe/xe_guc_ads.c +5
-3@@ -392,15 +392,17 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)/* * Allocate a separate BO for the HW fault ring (UM queues). * -* Round the size up to the next power of two so that +* Round the size up to the next power of two so that on iGPU * (system memory, no IOMMU) the TTM pool issues a single * alloc_pages(order=N) call, maximising the chance of getting * a physically contiguous block. GuC requires contiguous DPA. */ -size_t um_size =roundup_pow_of_two (GUC_UM_QUEUE_SIZE * +size_t um_size =IS_DGFX (xe) ? +GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX : +roundup_pow_of_two (GUC_UM_QUEUE_SIZE *GUC_UM_HW_QUEUE_MAX ); -u32 um_flags =XE_BO_FLAG_SYSTEM | +u32 um_flags =XE_BO_FLAG_VRAM_IF_DGFX (tile) |XE_BO_FLAG_GGTT |XE_BO_FLAG_GGTT_INVALIDATE |XE_BO_FLAG_PINNED_NORESTORE ;Signature · 1 line
2.43.0Does not apply at all, are you sure you made this properly?
Quoted 3 lines
thanks,
greg k-h
Ah, it needed to be applied after a different one? Can you send these 3 patches as a patch series, as that will tell us what order to apply them in. Same for the 6.12 versions.
thanks,
greg k-h
Sasha Levin
maintainerRe: [PATCH 6.18.y] drm/xe/guc_ads: allocate UM queues in VRAM on dGFX
Quoted 3 lines · Greg KH
Ah, it needed to be applied after a different one? Can you send these 3 patches as a patch series, as that will tell us what order to apply them in. Same for the 6.12 versions.
Jia Yao, on top of the series formatting there is a second problem: the set as sent does not build on either branch.
Patch 1 calls xe_guc_using_main_gamctrl_queues(), which has no definition on 6.18 or 6.12 - it only exists on 7.1. On 6.12 the same patch also uses XE_BO_FLAG_PINNED_NORESTORE, which is undefined there.
Signature · 2 lines
Thanks, Sasha