ASoC: mediatek: mt8195: Fix clock error handling

PATCH In review [email protected] 2 participants 18 messages Oct 14 – Oct 16

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2026-10-14 11:28 UTC #0 lore raw

v3 cover ASoC: mediatek: mt8195: Fix clock error handling

From: bui duc phuc <[email protected]>

Hi all,

This series improves error handling in the MT8195 ASoC driver, mainly by checking and propagating errors from clock operations.

Link v1:
https://lore.kernel.org/all/[email protected]/
Changes in v2:
- Check for negative return from mtk_afe_fe_startup().

Link v2:
https://lore.kernel.org/all/[email protected]/
Changes in v3:

 -  Add Ajay Kumar Nandam's Reviewed-by tag.
 -  Add error handling in mt8195_afe_enable_main_clock().
 -  Add error handling in mt8195_afe_fe_trigger().
 -  Update the commit message for the DAPM error handling.

Compile-tested only.

Best regards,
Phuc

bui duc phuc (16):
ASoC: mediatek: mt8195: Fix tuner clock error handling
ASoC: mediatek: mt8195: Use dev_err_probe() in mt8195_afe_init_clock()
ASoC: mediatek: mt8195: Fix register access clock error handling
ASoC: mediatek: mt8195: Fix timing system clock error handling
ASoC: mediatek: mt8195: Fix main clock error handling
ASoC: mediatek: mt8195: Fix paired memif clock error handling
ASoC: mediatek: mt8195: Fix FE startup error handling
ASoC: mediatek: mt8195: Check paired MEMIF clock enable in FE trigger
ASoC: mediatek: mt8195: Fix runtime resume error handling
ASoC: mediatek: mt8195: Remove redundant error message
ASoC: mediatek: mt8195: Propagate IRQ lookup errors
ASoC: mediatek: mt8195: Fix ETDM MCLK error handling
ASoC: mediatek: mt8195: Fix ETDM startup error handling
ASoC: mediatek: mt8195: Fix HDMI TX startup error handling
ASoC: mediatek: mt8195: Fix ETDM probe error handling
ASoC: mediatek: mt8195: Fix clock parent error handling

 sound/soc/mediatek/mt8195/mt8195-afe-clk.c  |  86 +++++++++++----
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c  | 111 ++++++++++++++------
 sound/soc/mediatek/mt8195/mt8195-dai-adda.c |   3 +-
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c |  99 ++++++++++++-----
 4 files changed, 221 insertions(+), 78 deletions(-)

Signature · 1 line

2.43.0

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author

2026-10-14 11:28 UTC #1 lore raw

PATCH v3 1/16 ASoC: mediatek: mt8195: Fix tuner clock error handling

From: bui duc phuc <[email protected]>

Check and propagate errors from mt8195_afe_enable_clk(). If enabling the tuner clock fails, disable the previously enabled APLL clock.

Fixes ff5a90173d98 ("ASoC: mediatek: mt8195: enable apll tuner")

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 24 +++++++++++++++++-----
 1 file changed, 19 insertions(+), 5 deletions(-)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c +19 -5

index 618d8400913a..ec1ea5b988ff 100644
@@ -241,21 +241,35 @@ static int mt8195_afe_enable_tuner_clk(struct mtk_base_afe *afe,
 				       unsigned int id)
 {
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
+	int ret;
 
 	switch (id) {
 	case MT8195_AUD_PLL1:
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
+		if (ret)
+			return ret;
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);
+		if (ret) {
+			mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
+			return ret;
+		}
 		break;
 	case MT8195_AUD_PLL2:
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
-		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
+		if (ret)
+			return ret;
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);
+		if (ret) {
+			mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
+			return ret;
+		}
 		break;
 	default:
+		ret = 0;
 		break;
 	}
 
-	return 0;
+	return ret;
 }
 
 static int mt8195_afe_disable_tuner_clk(struct mtk_base_afe *afe,

Signature · 1 line

2.43.0

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author

2026-10-14 11:28 UTC #2 lore raw

PATCH v3 2/16 ASoC: mediatek: mt8195: Use dev_err_probe() in mt8195_afe_init_clock()

In reply to [email protected]

From: bui duc phuc <[email protected]>

Use dev_err_probe() when obtaining clocks to avoid redundant error messages, particularly for probe deferral.

Reviewed-by Ajay Kumar Nandam <[email protected]>

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c +3 -6

index ec1ea5b988ff..12d8159338be 100644
@@ -397,12 +397,9 @@ int mt8195_afe_init_clock(struct mtk_base_afe *afe)
 
 	for (i = 0; i < MT8195_CLK_NUM; i++) {
 		afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);
-		if (IS_ERR(afe_priv->clk[i])) {
-			dev_dbg(afe->dev, "%s(), devm_clk_get %s fail, ret %ld\n",
-				__func__, aud_clks[i],
-				PTR_ERR(afe_priv->clk[i]));
-			return PTR_ERR(afe_priv->clk[i]);
-		}
+		if (IS_ERR(afe_priv->clk[i]))
+			return dev_err_probe(afe->dev, PTR_ERR(afe_priv->clk[i]),
+					     "failed to get clock %s\n", aud_clks[i]);
 	}
 
 	/* initial tuner */

Signature · 1 line

2.43.0

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author

2026-10-14 11:28 UTC #3 lore raw

PATCH v3 3/16 ASoC: mediatek: mt8195: Fix register access clock error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check the return value of mt8195_afe_enable_clk() when enabling the register access clocks.

If enabling a clock fails, disable the clocks that were already enabled and propagate the error to the caller

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

Reviewed-by Ajay Kumar Nandam <[email protected]>

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c +12 -3

index 12d8159338be..34c828fdea29 100644
@@ -599,7 +599,7 @@ static int mt8195_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_t
 int mt8195_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)
 {
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
-	int i;
+	int i, ret;
 	static const unsigned int clk_array[] = {
 		MT8195_CLK_SCP_ADSP_AUDIODSP, /* bus clock for infra */
 		MT8195_CLK_TOP_AUDIO_H_SEL, /* clock for ADSP bus */

@@ -611,10 +611,19 @@ int mt8195_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)
 		MT8195_CLK_AUD_A1SYS, /* AFE HW clock */
 	};
 
-	for (i = 0; i < ARRAY_SIZE(clk_array); i++)
-		mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+	for (i = 0; i < ARRAY_SIZE(clk_array); i++) {
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+		if (ret)
+			goto err_disable_clk;
+	}
 
 	return 0;
+
+err_disable_clk:
+	while (--i >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[clk_array[i]]);
+
+	return ret;
 }
 
 int mt8195_afe_disable_reg_rw_clk(struct mtk_base_afe *afe)

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:28 UTC #4 lore raw

PATCH v3 4/16 ASoC: mediatek: mt8195: Fix timing system clock error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check the return value of mt8195_afe_enable_clk() when enabling the timing system clocks.

If enabling a clock fails, disable the clocks that were already enabled and propagate the error to the caller. In mt8195_afe_enable_main_clock(), return the error instead of continuing with AFE clock enable.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c +12 -3

index 34c828fdea29..03d2c4fd1f85 100644
@@ -662,7 +662,7 @@ static int mt8195_afe_disable_afe_on(struct mtk_base_afe *afe)
 static int mt8195_afe_enable_timing_sys(struct mtk_base_afe *afe)
 {
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
-	int i;
+	int i, ret;
 	static const unsigned int clk_array[] = {
 		MT8195_CLK_AUD_A1SYS,
 		MT8195_CLK_AUD_A2SYS,

@@ -673,13 +673,22 @@ static int mt8195_afe_enable_timing_sys(struct mtk_base_afe *afe)
 		MT8195_TOP_CG_26M_TIMING,
 	};
 
-	for (i = 0; i < ARRAY_SIZE(clk_array); i++)
-		mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+	for (i = 0; i < ARRAY_SIZE(clk_array); i++) {
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
+		if (ret)
+			goto err_disable_clk;
+	}
 
 	for (i = 0; i < ARRAY_SIZE(cg_array); i++)
 		mt8195_afe_enable_top_cg(afe, cg_array[i]);
 
 	return 0;
+
+err_disable_clk:
+	while (--i >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[clk_array[i]]);
+
+	return ret;
 }
 
 static int mt8195_afe_disable_timing_sys(struct mtk_base_afe *afe)

Signature · 1 line

2.43.0

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author

2026-10-14 11:28 UTC #5 lore raw

PATCH v3 5/16 ASoC: mediatek: mt8195: Fix main clock error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check the return values of clock enable functions and propagate errors to the caller.

Disable previously enabled clocks on failure to match the main clock disable sequence.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 23 +++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

sound/soc/mediatek/mt8195/mt8195-afe-clk.c +20 -3

index 03d2c4fd1f85..44cddc2b1564 100644
@@ -716,14 +716,31 @@ static int mt8195_afe_disable_timing_sys(struct mtk_base_afe *afe)
 
 int mt8195_afe_enable_main_clock(struct mtk_base_afe *afe)
 {
-	mt8195_afe_enable_timing_sys(afe);
+	int ret;
+
+	ret = mt8195_afe_enable_timing_sys(afe);
+	if (ret)
+		return ret;
 
 	mt8195_afe_enable_afe_on(afe);
 
-	mt8195_afe_enable_apll_tuner(afe, MT8195_AUD_PLL1);
-	mt8195_afe_enable_apll_tuner(afe, MT8195_AUD_PLL2);
+	ret = mt8195_afe_enable_apll_tuner(afe, MT8195_AUD_PLL1);
+	if (ret)
+		goto err_disable_afe_on;
+
+	ret = mt8195_afe_enable_apll_tuner(afe, MT8195_AUD_PLL2);
+	if (ret)
+		goto err_disable_apll1_tuner;
 
 	return 0;
+
+err_disable_apll1_tuner:
+	mt8195_afe_disable_apll_tuner(afe, MT8195_AUD_PLL1);
+err_disable_afe_on:
+	mt8195_afe_disable_afe_on(afe);
+	mt8195_afe_disable_timing_sys(afe);
+
+	return ret;
 }
 
 int mt8195_afe_disable_main_clock(struct mtk_base_afe *afe)

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:28 UTC #6 lore raw

PATCH v3 6/16 ASoC: mediatek: mt8195: Fix paired memif clock error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors when preparing and enabling the paired DL8/DL10 memif clocks.

If enabling the second clock fails, undo the clock that was already prepared or enabled to keep the clock state balanced.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 24 ++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +20 -4

index 52c3381e6766..1d3e01e2c3e7 100644
@@ -286,15 +286,23 @@ mt8195_afe_paired_memif_clk_prepare(struct snd_pcm_substream *substream,
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
 	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
 	int clk_id;
+	int ret;
 
 	if (id != MT8195_AFE_MEMIF_DL8 && id != MT8195_AFE_MEMIF_DL10)
 		return 0;
 
 	if (enable) {
 		clk_id = MT8195_CLK_AUD_MEMIF_DL10;
-		mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		if (ret)
+			return ret;
 		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
-		mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_prepare_clk(afe, afe_priv->clk[clk_id]);
+		if (ret) {
+			clk_id = MT8195_CLK_AUD_MEMIF_DL10;
+			mt8195_afe_unprepare_clk(afe, afe_priv->clk[clk_id]);
+			return ret;
+		}
 	} else {
 		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
 		mt8195_afe_unprepare_clk(afe, afe_priv->clk[clk_id]);

@@ -315,6 +323,7 @@ mt8195_afe_paired_memif_clk_enable(struct snd_pcm_substream *substream,
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
 	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
 	int clk_id;
+	int ret;
 
 	if (id != MT8195_AFE_MEMIF_DL8 && id != MT8195_AFE_MEMIF_DL10)
 		return 0;

@@ -322,11 +331,18 @@ mt8195_afe_paired_memif_clk_enable(struct snd_pcm_substream *substream,
 	if (enable) {
 		/* DL8_DL10_MEM */
 		clk_id = MT8195_CLK_AUD_MEMIF_DL10;
-		mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		if (ret)
+			return ret;
 		udelay(1);
 		/* DL8_DL10_AGENT */
 		clk_id = MT8195_CLK_AUD_MEMIF_DL8;
-		mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		ret = mt8195_afe_enable_clk_atomic(afe, afe_priv->clk[clk_id]);
+		if (ret) {
+			clk_id = MT8195_CLK_AUD_MEMIF_DL10;
+			mt8195_afe_disable_clk_atomic(afe, afe_priv->clk[clk_id]);
+			return ret;
+		}
 	} else {
 		/* DL8_DL10_AGENT */
 		clk_id = MT8195_CLK_AUD_MEMIF_DL8;

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:28 UTC #7 lore raw

PATCH v3 7/16 ASoC: mediatek: mt8195: Fix FE startup error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors from paired memif clock preparation and PCM hardware constraints during FE startup.

Unprepare the paired memif clocks and shut down the FE when a later startup step fails to avoid leaving resources enabled on error.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

Signed-off-by bui duc phuc <[email protected]>

---

Changes in v2:
- Check for negative return from mtk_afe_fe_startup().

 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 44 ++++++++++++++--------
 1 file changed, 29 insertions(+), 15 deletions(-)

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +29 ~~-15~~

index 1d3e01e2c3e7..02736949ae6a 100644
@@ -364,24 +364,38 @@ static int mt8195_afe_fe_startup(struct snd_pcm_substream *substream,
 	int id = snd_soc_rtd_to_cpu(rtd, 0)->id;
 	int ret = 0;
 
-	mt8195_afe_paired_memif_clk_prepare(substream, dai, 1);
+	ret = mt8195_afe_paired_memif_clk_prepare(substream, dai, 1);
+	if (ret)
+		return ret;
 
 	ret = mtk_afe_fe_startup(substream, dai);
-
-	snd_pcm_hw_constraint_step(runtime, 0,
-				   SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
-				   MT8195_MEMIF_BUFFER_BYTES_ALIGN);
-
-	if (id != MT8195_AFE_MEMIF_DL7)
-		goto out;
-
-	ret = snd_pcm_hw_constraint_minmax(runtime,
-					   SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
-					   1,
-					   MT8195_MEMIF_DL7_MAX_PERIOD_SIZE);
 	if (ret < 0)
-		dev_dbg(afe->dev, "hw_constraint_minmax failed\n");
-out:
+		goto err_clk_unprepare;
+
+	ret = snd_pcm_hw_constraint_step(runtime, 0,
+					 SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+					 MT8195_MEMIF_BUFFER_BYTES_ALIGN);
+	if (ret)
+		goto err_fe_shutdow;
+
+	if (id == MT8195_AFE_MEMIF_DL7) {
+		ret = snd_pcm_hw_constraint_minmax(runtime,
+						   SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
+						   1,
+						   MT8195_MEMIF_DL7_MAX_PERIOD_SIZE);
+		if (ret < 0) {
+			dev_dbg(afe->dev, "hw_constraint_minmax failed\n");
+			goto err_fe_shutdow;
+		}
+	}
+
+	return 0;
+
+err_fe_shutdow:
+	mtk_afe_fe_shutdown(substream, dai);
+err_clk_unprepare:
+	mt8195_afe_paired_memif_clk_prepare(substream, dai, 0);
+
 	return ret;
 }

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:29 UTC #8 lore raw

PATCH v3 8/16 ASoC: mediatek: mt8195: Check paired MEMIF clock enable in FE trigger

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check the return value of mt8195_afe_paired_memif_clk_enable() on START/RESUME. On failure, stop the MEMIF and disable the channel merge before returning the error.

Also skip enabling the paired clock if mtk_afe_fe_trigger() fails.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +8 -1

index 02736949ae6a..4216c47a56c9 100644
@@ -466,7 +466,14 @@ static int mt8195_afe_fe_trigger(struct snd_pcm_substream *substream, int cmd,
 	switch (cmd) {
 	case SNDRV_PCM_TRIGGER_START:
 	case SNDRV_PCM_TRIGGER_RESUME:
-		mt8195_afe_paired_memif_clk_enable(substream, dai, 1);
+		if (ret)
+			break;
+
+		ret = mt8195_afe_paired_memif_clk_enable(substream, dai, 1);
+		if (ret) {
+			mtk_afe_fe_trigger(substream, SNDRV_PCM_TRIGGER_STOP, dai);
+			mt8195_afe_enable_cm(afe, cm, false);
+		}
 		break;
 	case SNDRV_PCM_TRIGGER_STOP:
 	case SNDRV_PCM_TRIGGER_SUSPEND:

Signature · 1 line

2.43.0

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author

2026-10-14 11:29 UTC #9 lore raw

PATCH v3 9/16 ASoC: mediatek: mt8195: Fix runtime resume error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors when enabling the register access and main clocks during runtime resume.

If regcache_sync() or main clock enable fails, restore regmap cache-only mode and disable the register access clocks before returning the error.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 23 +++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +18 -5

index 4216c47a56c9..19047887ee21 100644
@@ -2965,18 +2965,31 @@ static int mt8195_afe_runtime_resume(struct device *dev)
 {
 	struct mtk_base_afe *afe = dev_get_drvdata(dev);
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
+	int ret;
 
-	mt8195_afe_enable_reg_rw_clk(afe);
+	ret = mt8195_afe_enable_reg_rw_clk(afe);
+	if (ret)
+		return ret;
 
 	if (!afe->regmap || afe_priv->pm_runtime_bypass_reg_ctl)
-		goto skip_regmap;
+		return 0;
 
 	regcache_cache_only(afe->regmap, false);
-	regcache_sync(afe->regmap);
+	ret = regcache_sync(afe->regmap);
+	if (ret)
+		goto err_restore_cache;
+
+	ret = mt8195_afe_enable_main_clock(afe);
+	if (ret)
+		goto err_restore_cache;
 
-	mt8195_afe_enable_main_clock(afe);
-skip_regmap:
 	return 0;
+
+err_restore_cache:
+	regcache_cache_only(afe->regmap, true);
+	mt8195_afe_disable_reg_rw_clk(afe);
+
+	return ret;
 }
 
 static int init_memif_priv_data(struct mtk_base_afe *afe)

Signature · 1 line

2.43.0

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author

2026-10-14 11:29 UTC #10 lore raw

PATCH v3 10/16 ASoC: mediatek: mt8195: Remove redundant error message

In reply to [email protected]

From: bui duc phuc <[email protected]>

The errors handled here are already reported by the called functions, either directly or deeper in the call chain. Therefore, the additional dev_warn() and dev_err_probe() call is redundant and can be removed.

Reviewed-by Ajay Kumar Nandam <[email protected]>

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +4 -5

index 19047887ee21..75d4d0578bcc 100644
@@ -3090,7 +3090,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
 	/* initial audio related clock */
 	ret = mt8195_afe_init_clock(afe);
 	if (ret)
-		return dev_err_probe(dev, ret, "init clock error\n");
+		return ret;
 
 	/* reset controller to reset audio regs before regmap cache */
 	rstc = devm_reset_control_get_exclusive(dev, "audiosys");

@@ -3137,7 +3137,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
 	ret = devm_request_irq(dev, irq_id, mt8195_afe_irq_handler,
 			       IRQF_TRIGGER_NONE, "asys-isr", (void *)afe);
 	if (ret)
-		return dev_err_probe(dev, ret, "could not request_irq for asys-isr\n");
+		return ret;
 
 	/* init sub_dais */
 	INIT_LIST_HEAD(&afe->sub_dais);

@@ -3195,10 +3195,9 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
 	/* register component */
 	ret = devm_snd_soc_register_component(dev, &mtk_afe_pcm_platform,
 					      afe->dai_drivers, afe->num_dai_drivers);
-	if (ret) {
-		dev_warn(dev, "err_platform\n");
+	if (ret)
 		goto err_pm_put;
-	}
+
 
 	ret = regmap_multi_reg_write(afe->regmap, mt8195_afe_reg_defaults,
 				     ARRAY_SIZE(mt8195_afe_reg_defaults));

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:29 UTC #11 lore raw

PATCH v3 11/16 ASoC: mediatek: mt8195: Propagate IRQ lookup errors

In reply to [email protected]

From: bui duc phuc <[email protected]>

Propagate the error returned by platform_get_irq() instead of replacing it with -ENXIO.

This preserves errors such as -EPROBE_DEFER for proper handling by the caller.

Fixes 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")

Reviewed-by Ajay Kumar Nandam <[email protected]>

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-afe-pcm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +1 -1

index 75d4d0578bcc..13e5bc02fac5 100644
@@ -3132,7 +3132,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev)
 	/* request irq */
 	irq_id = platform_get_irq(pdev, 0);
 	if (irq_id < 0)
-		return -ENXIO;
+		return irq_id;
 
 	ret = devm_request_irq(dev, irq_id, mt8195_afe_irq_handler,
 			       IRQF_TRIGGER_NONE, "asys-isr", (void *)afe);

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:29 UTC #12 lore raw

PATCH v3 12/16 ASoC: mediatek: mt8195: Fix ETDM MCLK error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Propagate errors from mt8195_afe_enable_clk() when enabling the ETDM MCLK instead of always returning success.

This allows callers to properly handle failures when enabling the MCLK.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")

Reviewed-by Ajay Kumar Nandam <[email protected]>

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +1 -3

index 1a20adb2cbf5..fba51c552eec 100644
@@ -1549,9 +1549,7 @@ static int mtk_dai_etdm_enable_mclk(struct mtk_base_afe *afe, int dai_id)
 	if (clkdiv_id < 0)
 		return -EINVAL;
 
-	mt8195_afe_enable_clk(afe, afe_priv->clk[clkdiv_id]);
-
-	return 0;
+	return mt8195_afe_enable_clk(afe, afe_priv->clk[clkdiv_id]);
 }
 
 static int mtk_dai_etdm_disable_mclk(struct mtk_base_afe *afe, int dai_id)

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:29 UTC #13 lore raw

PATCH v3 13/16 ASoC: mediatek: mt8195: Fix ETDM startup error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors when enabling the ETDM MCLK and clock gates during startup.

If enabling a clock fails, disable the clocks that were already enabled to keep the clock state balanced.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")

Reviewed-by Ajay Kumar Nandam <[email protected]>

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 50 ++++++++++++++++-----
 1 file changed, 40 insertions(+), 10 deletions(-)

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +40 ~~-10~~

index fba51c552eec..1270fcac6b3f 100644
@@ -1575,36 +1575,66 @@ static int mtk_dai_etdm_startup(struct snd_pcm_substream *substream,
 	int cg_id;
 	int mst_dai_id;
 	int slv_dai_id;
-	int i;
+	int i, ret;
 
 	if (is_cowork_mode(dai)) {
 		mst_dai_id = get_etdm_cowork_master_id(dai);
 		if (!mt8195_afe_etdm_is_valid(mst_dai_id))
 			return -EINVAL;
 
-		mtk_dai_etdm_enable_mclk(afe, mst_dai_id);
+		ret = mtk_dai_etdm_enable_mclk(afe, mst_dai_id);
+		if (ret)
+			return ret;
 		cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(mst_dai_id);
-		if (cg_id >= 0)
-			mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+		if (cg_id >= 0) {
+			ret = mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+			if (ret)
+				goto err_disable_mclk;
+		}
 
 		mst_etdm_data = afe_priv->dai_priv[mst_dai_id];
 
 		for (i = 0; i < mst_etdm_data->cowork_slv_count; i++) {
 			slv_dai_id = mst_etdm_data->cowork_slv_id[i];
 			cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(slv_dai_id);
-			if (cg_id >= 0)
-				mt8195_afe_enable_clk(afe,
-						      afe_priv->clk[cg_id]);
+			if (cg_id >= 0) {
+				ret = mt8195_afe_enable_clk(afe,
+							    afe_priv->clk[cg_id]);
+				if (ret)
+					goto err_disable_slv_clk;
+			}
 		}
 	} else {
-		mtk_dai_etdm_enable_mclk(afe, dai->id);
+		ret = mtk_dai_etdm_enable_mclk(afe, dai->id);
+		if (ret)
+			return ret;
 
 		cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(dai->id);
-		if (cg_id >= 0)
-			mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+		if (cg_id >= 0) {
+			ret = mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+			if (ret)
+				goto err_disable_mclk;
+		}
 	}
 
 	return 0;
+
+err_disable_slv_clk:
+	while (--i >= 0) {
+		slv_dai_id = mst_etdm_data->cowork_slv_id[i];
+		cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(slv_dai_id);
+		if (cg_id >= 0)
+			mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);
+	}
+
+	cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(mst_dai_id);
+	if (cg_id >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);
+
+err_disable_mclk:
+	mtk_dai_etdm_disable_mclk(afe, is_cowork_mode(dai) ? mst_dai_id : dai->id);
+
+	return ret;
 }
 
 static void mtk_dai_etdm_shutdown(struct snd_pcm_substream *substream,

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:29 UTC #14 lore raw

PATCH v3 14/16 ASoC: mediatek: mt8195: Fix HDMI TX startup error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Check and propagate errors when enabling the clock gate and MCLK during HDMI TX/DP TX startup.

If MCLK enabling fails, disable the clock gate that was already enabled before returning the error.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +15 -3

index 1270fcac6b3f..11317cdd14ab 100644
@@ -2321,13 +2321,25 @@ static int mtk_dai_hdmitx_dptx_startup(struct snd_pcm_substream *substream,
 	struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
 	int cg_id = mtk_dai_etdm_get_cg_id_by_dai_id(dai->id);
+	int ret;
 
-	if (cg_id >= 0)
-		mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+	if (cg_id >= 0) {
+		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[cg_id]);
+		if (ret)
+			return ret;
+	}
 
-	mtk_dai_etdm_enable_mclk(afe, dai->id);
+	ret = mtk_dai_etdm_enable_mclk(afe, dai->id);
+	if (ret)
+		goto err_disable_cg_clk;
 
 	return 0;
+
+err_disable_cg_clk:
+	if (cg_id >= 0)
+		mt8195_afe_disable_clk(afe, afe_priv->clk[cg_id]);
+
+	return ret;
 }
 
 static void mtk_dai_hdmitx_dptx_shutdown(struct snd_pcm_substream *substream,

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:29 UTC #15 lore raw

PATCH v3 15/16 ASoC: mediatek: mt8195: Fix ETDM probe error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

Use pm_runtime_resume_and_get() to properly handle runtime PM errors during ETDM probe.

Propagate errors from MCLK configuration and enabling instead of ignoring them.

Fixes 1de9a54acafb ("ASoC: mediatek: mt8195: support etdm in platform driver")

Signed-off-by bui duc phuc <[email protected]>

---
 sound/soc/mediatek/mt8195/mt8195-dai-etdm.c | 27 ++++++++++++++-------
 1 file changed, 18 insertions(+), 9 deletions(-)

sound/soc/mediatek/mt8195/mt8195-dai-etdm.c +18 -9

index 11317cdd14ab..8fa830a57502 100644
@@ -2503,6 +2503,7 @@ static int mtk_dai_etdm_probe(struct snd_soc_dai *dai)
 	struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
 	struct mt8195_afe_private *afe_priv = afe->platform_priv;
 	struct mtk_dai_etdm_priv *etdm_data;
+	int ret;
 
 	dev_dbg(dai->dev, "%s id %d\n", __func__, dai->id);

@@ -2510,15 +2511,23 @@ static int mtk_dai_etdm_probe(struct snd_soc_dai *dai)
 		return -EINVAL;
 
 	etdm_data = afe_priv->dai_priv[dai->id];
-	if (etdm_data->mclk_freq) {
-		dev_dbg(afe->dev, "MCLK always on, rate %d\n",
-			etdm_data->mclk_freq);
-		pm_runtime_get_sync(afe->dev);
-		mtk_dai_etdm_mclk_configure(afe, dai->id);
-		mtk_dai_etdm_enable_mclk(afe, dai->id);
-		pm_runtime_put_sync(afe->dev);
-	}
-	return 0;
+	if (!etdm_data->mclk_freq)
+		return 0;
+
+	dev_dbg(afe->dev, "MCLK always on, rate %d\n",
+		etdm_data->mclk_freq);
+	ret = pm_runtime_resume_and_get(afe->dev);
+	if (ret)
+		return ret;
+	ret = mtk_dai_etdm_mclk_configure(afe, dai->id);
+	if (ret)
+		goto err_put_pm;
+	ret = mtk_dai_etdm_enable_mclk(afe, dai->id);
+
+err_put_pm:
+	pm_runtime_put_sync(afe->dev);
+
+	return ret;
 }
 
 static const struct snd_soc_dai_ops mtk_dai_hdmitx_dptx_ops = {

Signature · 1 line

2.43.0

[email protected]

author

2026-10-14 11:29 UTC #16 lore raw

PATCH v3 16/16 ASoC: mediatek: mt8195: Fix clock parent error handling

In reply to [email protected]

From: bui duc phuc <[email protected]>

mtk_audio_hires_event() ignores the return value of mt8195_afe_set_clk_parent(), so a failure to set the clock parent goes unnoticed.

Return the error so that the DAPM core reports it.

Signed-off-by bui duc phuc <[email protected]>

---

Changes in v3:
- Update the commit message for the DAPM error handling.

 sound/soc/mediatek/mt8195/mt8195-dai-adda.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

sound/soc/mediatek/mt8195/mt8195-dai-adda.c +1 -2

index 94abde15ea09..8a58a142064d 100644
@@ -262,9 +262,8 @@ static int mtk_audio_hires_event(struct snd_soc_dapm_widget *w,
 	default:
 		return 0;
 	}
-	mt8195_afe_set_clk_parent(afe, clk, clk_parent);
 
-	return 0;
+	return mt8195_afe_set_clk_parent(afe, clk, clk_parent);
 }
 
 static struct mtk_dai_adda_priv *get_adda_priv_by_name(struct mtk_base_afe *afe,

Signature · 1 line

2.43.0

Mark Brown

maintainer

2026-10-16 10:29 UTC #17 lore raw

In reply to [email protected]

Quoted 10 lines · On Wed, 14 Oct 2026 18:27:35 +0700, [email protected] wrote:

ASoC: mediatek: mt8195: Fix clock error handling
From: bui duc phuc <[email protected]>
Hi all,
This series improves error handling in the MT8195 ASoC driver, mainly by checking and propagating errors from clock operations.
[...]

Applied to

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-7.4

Thanks!

[01/16] ASoC: mediatek: mt8195: Fix tuner clock error handling

        https://git.kernel.org/broonie/sound/c/8e5a2eabb0d7
[02/16] ASoC: mediatek: mt8195: Use dev_err_probe() in mt8195_afe_init_clock()
        https://git.kernel.org/broonie/sound/c/ad1617e53609
[03/16] ASoC: mediatek: mt8195: Fix register access clock error handling
        https://git.kernel.org/broonie/sound/c/c23390ecf5c0
[04/16] ASoC: mediatek: mt8195: Fix timing system clock error handling
        https://git.kernel.org/broonie/sound/c/f18c0a8e528e
[05/16] ASoC: mediatek: mt8195: Fix main clock error handling
        https://git.kernel.org/broonie/sound/c/9f1b48c658ac
[06/16] ASoC: mediatek: mt8195: Fix paired memif clock error handling
        https://git.kernel.org/broonie/sound/c/c0ec135cf3fd
[07/16] ASoC: mediatek: mt8195: Fix FE startup error handling
        https://git.kernel.org/broonie/sound/c/b1db7408c8e0
[08/16] ASoC: mediatek: mt8195: Check paired MEMIF clock enable in FE trigger
        https://git.kernel.org/broonie/sound/c/a2ae972c75a1
[09/16] ASoC: mediatek: mt8195: Fix runtime resume error handling
        https://git.kernel.org/broonie/sound/c/933fbfb66488
[10/16] ASoC: mediatek: mt8195: Remove redundant error message
        https://git.kernel.org/broonie/sound/c/9f9ba582ac82
[11/16] ASoC: mediatek: mt8195: Propagate IRQ lookup errors
        https://git.kernel.org/broonie/sound/c/9d5dedb285fb
[12/16] ASoC: mediatek: mt8195: Fix ETDM MCLK error handling
        https://git.kernel.org/broonie/sound/c/91dce9c7eec2
[13/16] ASoC: mediatek: mt8195: Fix ETDM startup error handling
        https://git.kernel.org/broonie/sound/c/8e67c67f3fd2
[14/16] ASoC: mediatek: mt8195: Fix HDMI TX startup error handling
        https://git.kernel.org/broonie/sound/c/1d6f1785d903
[15/16] ASoC: mediatek: mt8195: Fix ETDM probe error handling
        https://git.kernel.org/broonie/sound/c/ca3ac9a7eec1
[16/16] ASoC: mediatek: mt8195: Fix clock parent error handling
        https://git.kernel.org/broonie/sound/c/a4276a80c62e

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks,
Mark