ASoC: mediatek: mt8196: Fix clock error handling
Subsystems (3)
cover ASoC: mediatek: mt8196: Fix clock error handling
From: bui duc phuc <[email protected]>
Hi all,
This series improves error handling in the MT8196 ASoC driver, mainly by checking and propagating errors from clock operations.
Compile-tested only.
Best regards,
Phuc
bui duc phuc (10):
ASoC: mediatek: mt8196: fix APLL mux error handling
ASoC: mediatek: mt8196: fix APLL enable error handling
ASoC: mediatek: mt8196: fix MCK error handling
ASoC: mediatek: mt8196: fix register access clock error handling
ASoC: mediatek: mt8196: propagate main clock errors
ASoC: mediatek: mt8196: use dev_err_probe() in mt8196_init_clock()
ASoC: mediatek: mt8196: fix runtime resume error handling
ASoC: mediatek: mt8196: remove redundant error message
ASoC: mediatek: mt8196: propagate I2S clock errors
ASoC: mediatek: mt8196: propagate TDM clock errors
sound/soc/mediatek/mt8196/mt8196-afe-clk.c | 145 ++++++++++++++------- sound/soc/mediatek/mt8196/mt8196-afe-pcm.c | 28 ++-- sound/soc/mediatek/mt8196/mt8196-dai-i2s.c | 17 ++- sound/soc/mediatek/mt8196/mt8196-dai-tdm.c | 16 ++- 4 files changed, 136 insertions(+), 70 deletions(-)
Signature · 1 line
2.43.0
PATCH 1/10 ASoC: mediatek: mt8196: fix APLL mux error handling
From: bui duc phuc <[email protected]>
Propagate errors from clock operations in the enable path and clean up previously enabled clocks when a later operation fails.
For the disable path, continue disabling all clocks even if a clock operation fails. Do not propagate the errors so that the disable path can perform as much cleanup as possible.
--- sound/soc/mediatek/mt8196/mt8196-afe-clk.c | 56 +++++++++++++--------- 1 file changed, 34 insertions(+), 22 deletions(-)
sound/soc/mediatek/mt8196/mt8196-afe-clk.c +34 -22
@@ -220,33 +220,39 @@ static int apll1_mux_setting(struct mtk_base_afe *afe, bool enable) ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG1 ],MT8196_AUD_ENG1_CLK );if (ret) -return ret; + goto err_disable_eng1; ret =mt8196_afe_enable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ]);if (ret) -return ret; + goto err_restore_eng1; ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ], apll_rate);if (ret) -return ret; + goto err_disable_audio_h; }else { - ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG1 ], -MT8196_AFE_26M ); -if (ret) -return ret; +mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG1 ], +MT8196_AFE_26M );mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG1 ]); - ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ], -MT8196_AFE_26M ); -if (ret) -return ret; +mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ], +MT8196_AFE_26M );mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ]); }return 0 ; + +err_disable_audio_h: +mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ]); +err_restore_eng1: +mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG1 ], +MT8196_AFE_26M ); +err_disable_eng1: +mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG1 ]); + +return ret; }static int apll2_mux_setting (struct mtk_base_afe *afe,bool enable)
@@ -268,33 +274,39 @@ static int apll2_mux_setting(struct mtk_base_afe *afe, bool enable) ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG2 ],MT8196_AUD_ENG2_CLK );if (ret) -return ret; + goto err_disable_eng2; ret =mt8196_afe_enable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ]);if (ret) -return ret; + goto err_restore_eng2; ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ], apll_rate);if (ret) -return ret; + goto err_disable_audio_h; }else { - ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG2 ], -MT8196_AFE_26M ); -if (ret) -return ret; +mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG2 ], +MT8196_AFE_26M );mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG2 ]); - ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ], -MT8196_AFE_26M ); -if (ret) -return ret; +mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ], +MT8196_AFE_26M );mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ]); }return 0 ; + +err_disable_audio_h: +mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ]); +err_restore_eng2: +mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG2 ], +MT8196_AFE_26M ); +err_disable_eng2: +mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUD_ENG2 ]); + +return ret; }int mt8196_apll1_enable (struct mtk_base_afe *afe)
Signature · 1 line
2.43.0
PATCH 2/10 ASoC: mediatek: mt8196: fix APLL enable error handling
In reply to [email protected]From: bui duc phuc <[email protected]>
Propagate errors from the APLL mux and clock enable operations instead of ignoring them or returning success on failure.
Clean up previously enabled clocks and disable the APLL tuner when a later clock operation fails, restoring the APLL mux state before returning the error.
--- sound/soc/mediatek/mt8196/mt8196-afe-clk.c | 47 ++++++++++++++++------ 1 file changed, 34 insertions(+), 13 deletions(-)
sound/soc/mediatek/mt8196/mt8196-afe-clk.c +34 -13
@@ -314,15 +314,17 @@ int mt8196_apll1_enable(struct mtk_base_afe *afe)int ret;/* setting for APLL */ -apll1_mux_setting (afe, true); + ret =apll1_mux_setting (afe, true); +if (ret) +return ret; ret =mt8196_afe_enable_top_cg (afe,MT8196_CG_APLL1_CK );if (ret) - goto err_clk_apll1; + goto err_disable_mux; ret =mt8196_afe_enable_top_cg (afe,MT8196_PDN_APLL_TUNER1 );if (ret) - goto err_clk_apll1_tuner; + goto err_disable_apll1_ck;/* sel 44.1kHz:1, apll_div:7, upper bound:3 */ regmap_update_bits(afe->regmap, AFE_APLL1_TUNER_CFG,
@@ -336,14 +338,22 @@ int mt8196_apll1_enable(struct mtk_base_afe *afe) 0x1 << FREQ_TUNER_EN_SFT);/* audio apll1 on */ -mt8196_afe_enable_top_cg (afe,MT8196_AUDIO_APLL1_EN_ON ); + ret =mt8196_afe_enable_top_cg (afe,MT8196_AUDIO_APLL1_EN_ON ); +if (ret) + goto err_disable_tuner;return 0 ; -err_clk_apll1_tuner: +err_disable_tuner: +regmap_update_bits (afe->regmap,AFE_APLL1_TUNER_CFG , +FREQ_TUNER_EN_MASK_SFT , +0x0 );mt8196_afe_disable_top_cg (afe,MT8196_PDN_APLL_TUNER1 ); -err_clk_apll1: +err_disable_apll1_ck:mt8196_afe_disable_top_cg (afe,MT8196_CG_APLL1_CK ); +err_disable_mux: +apll1_mux_setting (afe, false); +return ret; }
@@ -367,15 +377,17 @@ int mt8196_apll2_enable(struct mtk_base_afe *afe)int ret;/* setting for APLL */ -apll2_mux_setting (afe, true); + ret =apll2_mux_setting (afe, true); +if (ret) +return ret; ret =mt8196_afe_enable_top_cg (afe,MT8196_CG_APLL2_CK );if (ret) - goto err_clk_apll2; + goto err_disable_mux; ret =mt8196_afe_enable_top_cg (afe,MT8196_PDN_APLL_TUNER2 );if (ret) - goto err_clk_apll2_tuner; + goto err_disable_apll2_ck;/* sel 48kHz: 2, apll_div: 7, upper bound: 3*/ regmap_update_bits(afe->regmap, AFE_APLL2_TUNER_CFG,
@@ -389,14 +401,23 @@ int mt8196_apll2_enable(struct mtk_base_afe *afe) 0x1 << FREQ_TUNER_EN_SFT);/* audio apll2 on */ -mt8196_afe_enable_top_cg (afe,MT8196_AUDIO_APLL2_EN_ON ); + ret =mt8196_afe_enable_top_cg (afe,MT8196_AUDIO_APLL2_EN_ON ); +if (ret) + goto err_disable_tuner2; +return 0 ; -err_clk_apll2_tuner: +err_disable_tuner2: +regmap_update_bits (afe->regmap,AFE_APLL2_TUNER_CFG , +FREQ_TUNER_EN_MASK_SFT , +0x0 );mt8196_afe_disable_top_cg (afe,MT8196_PDN_APLL_TUNER2 ); -err_clk_apll2: +err_disable_apll2_ck:mt8196_afe_disable_top_cg (afe,MT8196_CG_APLL2_CK ); -return 0 ; +err_disable_mux: +apll2_mux_setting (afe, false); + +return ret; }void mt8196_apll2_disable (struct mtk_base_afe *afe)
Signature · 1 line
2.43.0
PATCH 3/10 ASoC: mediatek: mt8196: fix MCK error handling
In reply to [email protected]From: bui duc phuc <[email protected]>
Disable the clock if setting its rate fails after the clock has been enabled, preventing it from being left enabled on the error path.
--- sound/soc/mediatek/mt8196/mt8196-afe-clk.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
sound/soc/mediatek/mt8196/mt8196-afe-clk.c +3 -1
@@ -502,8 +502,10 @@ int mt8196_mck_enable(struct mtk_base_afe *afe, int mck_id, int rate)return ret; ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[div_clk_id], rate); -if (ret) +if (ret) { +mt8196_afe_disable_clk (afe, afe_priv->clk[div_clk_id]);return ret; + }return 0 ; }
Signature · 1 line
2.43.0
PATCH 4/10 ASoC: mediatek: mt8196: fix register access clock error handling
In reply to [email protected]From: bui duc phuc <[email protected]>
Propagate errors from clock operations and disable previously enabled clocks when a later operation fails.
This ensures that the register access clocks are properly cleaned up on the error path.
--- sound/soc/mediatek/mt8196/mt8196-afe-clk.c | 25 +++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/mediatek/mt8196/mt8196-afe-clk.c +20 -5
@@ -546,26 +546,41 @@ int mt8196_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)int ret;/* bus clock for AFE external access, like DRAM */ -mt8196_afe_enable_clk (afe, afe_priv->clk[MT8196_CLK_TOP_ADSP_SEL ]); + ret =mt8196_afe_enable_clk (afe, afe_priv->clk[MT8196_CLK_TOP_ADSP_SEL ]); +if (ret) +return ret;/* bus clock for AFE internal access, like AFE SRAM */ -mt8196_afe_enable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIOINTBUS ]); + ret =mt8196_afe_enable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIOINTBUS ]); +if (ret) + goto err_disable_adsp_sel; ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIOINTBUS ],MT8196_AFE_26M );if (ret) -return ret; + goto err_disable_audiointbus;/* enable audio h clock */ -mt8196_afe_enable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ]); + ret =mt8196_afe_enable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ]); +if (ret) + goto err_disable_audiointbus; ret =mt8196_afe_set_clk_rate (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ],MT8196_AFE_26M );if (ret) -return ret; + goto err_disable_audio_h;/* AFE hw clock */ /* IPM2.0: USE HOPPING & 26M */ /* set in the regmap_register_patch */ return 0 ; + +err_disable_audio_h: +mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIO_H ]); +err_disable_audiointbus: +mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_VLP_MUX_AUDIOINTBUS ]); +err_disable_adsp_sel: +mt8196_afe_disable_clk (afe, afe_priv->clk[MT8196_CLK_TOP_ADSP_SEL ]); + +return ret; }int mt8196_afe_disable_reg_rw_clk (struct mtk_base_afe *afe)
Signature · 1 line
2.43.0
PATCH 5/10 ASoC: mediatek: mt8196: propagate main clock errors
In reply to [email protected]From: bui duc phuc <[email protected]>
Propagate errors from the main clock enable and disable operations instead of always returning success.
--- sound/soc/mediatek/mt8196/mt8196-afe-clk.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
sound/soc/mediatek/mt8196/mt8196-afe-clk.c +2 -4
@@ -598,14 +598,12 @@ int mt8196_afe_disable_reg_rw_clk(struct mtk_base_afe *afe)int mt8196_afe_enable_main_clock (struct mtk_base_afe *afe) { -mt8196_afe_enable_top_cg (afe,MT8196_AUDIO_26M_EN_ON ); -return 0 ; +return mt8196_afe_enable_top_cg (afe,MT8196_AUDIO_26M_EN_ON ); }int mt8196_afe_disable_main_clock (struct mtk_base_afe *afe) { -mt8196_afe_disable_top_cg (afe,MT8196_AUDIO_26M_EN_ON ); -return 0 ; +return mt8196_afe_disable_top_cg (afe,MT8196_AUDIO_26M_EN_ON ); }int mt8196_init_clock (struct mtk_base_afe *afe)
Signature · 1 line
2.43.0
PATCH 6/10 ASoC: mediatek: mt8196: use dev_err_probe() in mt8196_init_clock()
In reply to [email protected]From: bui duc phuc <[email protected]>
Use dev_err_probe() when obtaining clocks to avoid redundant error messages, particularly for probe deferral.
--- sound/soc/mediatek/mt8196/mt8196-afe-clk.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)
sound/soc/mediatek/mt8196/mt8196-afe-clk.c +3 -4
@@ -618,10 +618,9 @@ int mt8196_init_clock(struct mtk_base_afe *afe)for (i =0 ; i <MT8196_CLK_NUM ; i++) { afe_priv->clk[i] =devm_clk_get (afe->dev, aud_clks[i]); -if (IS_ERR (afe_priv->clk[i])) { -dev_err (afe->dev,"devm_clk_get %s fail\n" , aud_clks[i]); -return PTR_ERR (afe_priv->clk[i]); - } +if (IS_ERR (afe_priv->clk[i])) +return dev_err_probe (afe->dev,PTR_ERR (afe_priv->clk[i]), +"failed to get clock %s\n" , aud_clks[i]); }return 0 ;
Signature · 1 line
2.43.0
PATCH 7/10 ASoC: mediatek: mt8196: fix runtime resume error handling
In reply to [email protected]From: bui duc phuc <[email protected]>
Propagate errors from regcache_sync() and main clock enable operations instead of ignoring them.
On failure, restore cache-only mode, disable register access clocks, and clear the 26M clock request as needed to clean up the runtime resume state.
--- sound/soc/mediatek/mt8196/mt8196-afe-pcm.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-)
sound/soc/mediatek/mt8196/mt8196-afe-pcm.c +15 -3
@@ -2211,7 +2211,7 @@ static int mt8196_afe_runtime_suspend(struct device *dev)static int mt8196_afe_runtime_resume (struct device *dev) {struct mtk_base_afe *afe =dev_get_drvdata (dev); -int ret =0 ; +int ret; ret =mt8196_afe_enable_reg_rw_clk (afe);if (ret)
@@ -2222,7 +2222,9 @@ static int mt8196_afe_runtime_resume(struct device *dev) goto skip_regmap; }regcache_cache_only (afe->regmap, false); -regcache_sync (afe->regmap); + ret =regcache_sync (afe->regmap); +if (ret) + goto err_set_cache_only;/* set audio 26M request */ regmap_update_bits (afe->regmap,AFE_SPM_CONTROL_REQ ,0x1 ,0x1 );
@@ -2233,10 +2235,20 @@ static int mt8196_afe_runtime_resume(struct device *dev) CPU_HD_ALIGN_MASK_SFT, 0 << CPU_HD_ALIGN_SFT);/* enable AFE */ -mt8196_afe_enable_main_clock (afe); + ret =mt8196_afe_enable_main_clock (afe); +if (ret) + goto err_reset_26m_req; skip_regmap:return 0 ; + +err_reset_26m_req: +regmap_update_bits (afe->regmap,AFE_SPM_CONTROL_REQ ,0x1 ,0x0 ); +err_set_cache_only: +regcache_cache_only (afe->regmap, true); +mt8196_afe_disable_reg_rw_clk (afe); + +return ret; }static int mt8196_afe_component_probe (struct snd_soc_component *component)
Signature · 1 line
2.43.0
PATCH 8/10 ASoC: mediatek: mt8196: remove redundant error message
In reply to [email protected]From: bui duc phuc <[email protected]>
The errors handled here are already reported by the called functions, either directly or deeper in the call chain. Therefore, the additional dev_warn() and dev_err_probe() call is redundant and can be removed.
--- sound/soc/mediatek/mt8196/mt8196-afe-pcm.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-)
sound/soc/mediatek/mt8196/mt8196-afe-pcm.c +4 -6
@@ -2360,7 +2360,7 @@ static int mt8196_afe_pcm_dev_probe(struct platform_device *pdev)/* init audio related clock */ ret =mt8196_init_clock (afe);if (ret) -return dev_err_probe (dev, ret,"init clock error.\n" ); +return ret;/* init memif */ /* IPM2.0 no need banding */
@@ -2394,13 +2394,13 @@ static int mt8196_afe_pcm_dev_probe(struct platform_device *pdev)/* request irq */ irq_id =platform_get_irq (pdev,0 );if (irq_id <0 ) -return dev_err_probe (dev, irq_id,"no irq found" ); +return irq_id; ret =devm_request_irq (dev, irq_id, mt8196_afe_irq_handler,IRQF_TRIGGER_NONE ,"Afe_ISR_Handle" , afe);if (ret) -return dev_err_probe (dev, ret,"could not request_irq for Afe_ISR_Handle\n" ); +return ret;/* init sub_dais */ INIT_LIST_HEAD (&afe->sub_dais);
@@ -2469,10 +2469,8 @@ static int mt8196_afe_pcm_dev_probe(struct platform_device *pdev) &mt8196_afe_component, afe->dai_drivers, afe->num_dai_drivers); -if (ret) { -dev_err (dev,"afe component err\n" ); +if (ret)return ret; - }return 0 ;
Signature · 1 line
2.43.0
PATCH 9/10 ASoC: mediatek: mt8196: propagate I2S clock errors
In reply to [email protected]From: bui duc phuc <[email protected]>
Propagate errors from APLL and MCK clock operations in the DAPM event callbacks instead of always returning success.
--- sound/soc/mediatek/mt8196/mt8196-dai-i2s.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-)
sound/soc/mediatek/mt8196/mt8196-dai-i2s.c +11 -6
@@ -985,27 +985,30 @@ static int mtk_apll_event(struct snd_soc_dapm_widget *w, {struct snd_soc_component *cmpnt =snd_soc_dapm_to_component (w->dapm);struct mtk_base_afe *afe =snd_soc_component_get_drvdata (cmpnt); +int ret;dev_dbg (cmpnt->dev,"name %s, event 0x%x\n" , w->name, event);switch (event) {case SND_SOC_DAPM_PRE_PMU :if (strcmp (w->name,APLL1_W_NAME ) ==0 ) -mt8196_apll1_enable (afe); + ret =mt8196_apll1_enable (afe);else -mt8196_apll2_enable (afe); + ret =mt8196_apll2_enable (afe);break ;case SND_SOC_DAPM_POST_PMD :if (strcmp (w->name,APLL1_W_NAME ) ==0 )mt8196_apll1_disable (afe);else mt8196_apll2_disable (afe); + ret =0 ;break ;default : + ret =0 ;break ; } -return 0 ; +return ret; } static int mtk_mclk_en_event(struct snd_soc_dapm_widget *w,
@@ -1015,6 +1018,7 @@ static int mtk_mclk_en_event(struct snd_soc_dapm_widget *w,struct snd_soc_component *cmpnt =snd_soc_dapm_to_component (w->dapm);struct mtk_base_afe *afe =snd_soc_component_get_drvdata (cmpnt);struct mtk_afe_i2s_priv *i2s_priv; +int ret;dev_dbg (cmpnt->dev,"name %s, event 0x%x\n" , w->name, event);
@@ -1025,17 +1029,18 @@ static int mtk_mclk_en_event(struct snd_soc_dapm_widget *w,switch (event) {case SND_SOC_DAPM_PRE_PMU : -mt8196_mck_enable (afe, i2s_priv->mclk_id, i2s_priv->mclk_rate); + ret =mt8196_mck_enable (afe, i2s_priv->mclk_id, i2s_priv->mclk_rate);break ;case SND_SOC_DAPM_POST_PMD : i2s_priv->mclk_rate =0 ; -mt8196_mck_disable (afe, i2s_priv->mclk_id); + ret =mt8196_mck_disable (afe, i2s_priv->mclk_id);break ;default : + ret =0 ;break ; } -return 0 ; +return ret; }static const struct snd_soc_dapm_widget mtk_dai_i2s_widgets[] = {
Signature · 1 line
2.43.0
PATCH 10/10 ASoC: mediatek: mt8196: propagate TDM clock errors
In reply to [email protected]From: bui duc phuc <[email protected]>
Propagate errors from BCK and MCK clock operations in the DAPM event callbacks instead of always returning success.
--- sound/soc/mediatek/mt8196/mt8196-dai-tdm.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-)
sound/soc/mediatek/mt8196/mt8196-dai-tdm.c +10 -6
@@ -256,22 +256,24 @@ static int mtk_tdm_bck_en_event(struct snd_soc_dapm_widget *w,struct mt8196_afe_private *afe_priv = afe->platform_priv;int dai_id =get_tdm_id_by_name (w->name);struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; +int ret;dev_dbg (cmpnt->dev,"name %s, event 0x%x, dai_id %d\n" , w->name, event, dai_id);switch (event) {case SND_SOC_DAPM_PRE_PMU : -mt8196_mck_enable (afe, tdm_priv->bck_id, tdm_priv->bck_rate); + ret =mt8196_mck_enable (afe, tdm_priv->bck_id, tdm_priv->bck_rate);break ;case SND_SOC_DAPM_POST_PMD : -mt8196_mck_disable (afe, tdm_priv->bck_id); + ret =mt8196_mck_disable (afe, tdm_priv->bck_id);break ;default : + ret =0 ;break ; } -return 0 ; +return ret; } static int mtk_tdm_mck_en_event(struct snd_soc_dapm_widget *w,
@@ -283,23 +285,25 @@ static int mtk_tdm_mck_en_event(struct snd_soc_dapm_widget *w,struct mt8196_afe_private *afe_priv = afe->platform_priv;int dai_id =get_tdm_id_by_name (w->name);struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[dai_id]; +int ret;dev_dbg (cmpnt->dev,"name %s, event 0x%x, dai_id %d\n" , w->name, event, dai_id);switch (event) {case SND_SOC_DAPM_PRE_PMU : -mt8196_mck_enable (afe, tdm_priv->mclk_id, tdm_priv->mclk_rate); + ret =mt8196_mck_enable (afe, tdm_priv->mclk_id, tdm_priv->mclk_rate);break ;case SND_SOC_DAPM_POST_PMD : tdm_priv->mclk_rate =0 ; -mt8196_mck_disable (afe, tdm_priv->mclk_id); + ret =mt8196_mck_disable (afe, tdm_priv->mclk_id);break ;default : + ret =0 ;break ; } -return 0 ; +return ret; }static const struct snd_soc_dapm_widget mtk_dai_tdm_widgets[] = {
Signature · 1 line
2.43.0
Mark Brown
maintainerQuoted 10 lines · On Tue, 29 Sep 2026 13:11:11 +0700, [email protected] wrote:
ASoC: mediatek: mt8196: Fix clock error handling
From: bui duc phuc <[email protected]>
Hi all,
This series improves error handling in the MT8196 ASoC driver, mainly by checking and propagating errors from clock operations.
[...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-7.4
Thanks!
[01/10] ASoC: mediatek: mt8196: fix APLL mux error handling
https://git.kernel.org/broonie/misc/c/5a0caca149f2 [02/10] ASoC: mediatek: mt8196: fix APLL enable error handling https://git.kernel.org/broonie/misc/c/23239cabb6d1 [03/10] ASoC: mediatek: mt8196: fix MCK error handling https://git.kernel.org/broonie/misc/c/bc0cd0eb0303 [04/10] ASoC: mediatek: mt8196: fix register access clock error handling https://git.kernel.org/broonie/misc/c/2844ba593741 [05/10] ASoC: mediatek: mt8196: propagate main clock errors https://git.kernel.org/broonie/misc/c/c33bc2dd217d [06/10] ASoC: mediatek: mt8196: use dev_err_probe() in mt8196_init_clock() https://git.kernel.org/broonie/misc/c/b6f0d0e800b5 [07/10] ASoC: mediatek: mt8196: fix runtime resume error handling https://git.kernel.org/broonie/misc/c/3a9a93cafb37 [08/10] ASoC: mediatek: mt8196: remove redundant error message https://git.kernel.org/broonie/misc/c/35a7f9f4cd4d [09/10] ASoC: mediatek: mt8196: propagate I2S clock errors https://git.kernel.org/broonie/misc/c/6c14a59bc503 [10/10] ASoC: mediatek: mt8196: propagate TDM clock errors https://git.kernel.org/broonie/misc/c/d09412f79d70
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
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Thanks,
Mark