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BCMBCA PMB power, clock, reset and hardware monitoring support

PATCH In review Linus Walleij 2 participants 16 messages Nov 11

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Device tree bindings Documentation Common clk Hardware monitoring +4 more subsystems
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Linus Walleij

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#0 lore raw

v4 cover BCMBCA PMB power, clock, reset and hardware monitoring support

This is another of these big upfront design binding and driver hoards that is the consequence of adding new SoC support.

My stake is to be able to boot and test a full featured Cortex-A7 system and the BCM6846 XG6846B is one such system on my desk.

It's been cooking for a while in various prototype forms.

IMPLEMENTATION:

The PMC contains various stuff so this needs to be a simple MFD node so more things can be added into it later.

Inside the PMC is the PMB, the power management bus. This bridges to several individual peripherals which are very clearly distinct devices on that bus.

Handle the PMB with an MFD driver with power domain, clock, reset and hwmon providers.

Expose the standard BPCM peripheral, memory, USB and PCIe domains and a combined XRDP domain covering XRDP, the three Runners and WAN. Keep the peripheral and memory domains always on. The power domain provider now owns zone transitions, leaving the reset provider to pulse resets. The CPU and PLL blocks use different register layouts and are excluded. This new power domain integration has not been tested on hardware.

The BCM6846 XRDP reset sequence enabled full-MTU traffic on all four LAN ports and copper WAN and has been tested on that series. The zone power-up sequence also passed direct CFE flash boot in the Linux 6.18 OpenWrt port; this folded v7.3-rc1 revision still needs hardware testing.

MERGE STRATEGY:

Through an MFD immutable branch once everyone ACKs the subdrivers, it will take time I guess. Queue the bindings and drivers in MFD.

Updates to peripheral schemas and device trees to accommodate the power domains will be submitted separately.

The patches were authored with the assistance of an LLM.

Signed-off-by Linus Walleij <[email protected]>

---
Changes in v4:
- Reset: simplify sequence dispatch, rely on core translation defaults and
clarify power-domain ordering before reset pulses.
- MFD transport: disable unsafe regmap debugfs access and keep register
reads, writes and bit updates serialized in the callbacks.
- Introduce the PMB binding, child bindings and IDs before the PMC binding
so binding checks work at every commit.
- Expand PMB as Power Management Bus throughout.
- Sort the PMC and PMB example children by name and drop unused labels.
- Link to v3: https://patch.msgid.link/[email protected]

Changes in v3:
- Add a PMB power domain subdriver and binding with a combined XRDP domain.
- Move XRDP, Runner and WAN power sequencing out of the reset driver.
- Register the power domain MFD child.
- MFD transport: simplify cell registration, drop unused state and
property.h, and add the bcmbca-pmb subject prefix.
- Power domains: default to MFD_BCMBCA_PMB.
- MFD transport and reset: use mutex guards; reset: use
str_assert_deassert().
- Clock: use the reference clock as parent, limit CLK_GET_RATE_NOCACHE to
PLL outputs, drop CLK_IGNORE_UNUSED and simplify Runner registration.
- Clock and reset: suppress manual bind/unbind.
- MFD transport, clock, reset and hwmon: drop redundant mod_devicetable.h;
clock: drop slab.h.
- Power domain, clock, reset and hwmon drivers and PMC/PMB bindings: drop vendor-source references from comments.
- Link to v2: https://patch.msgid.link/[email protected]

Changes in v2:
- Use a shared PMB regmap in all child drivers, keeping keyhole semaphore
handling and timeout recovery inside the MFD provider.
- Drop PCIe reset IDs and sequences pending proper power and lane
configuration handling.
- Power up the XRDP, Runner and WAN zones before the XRDP reset pulse,
preserving the sequence tested with direct CFE flash boot in OpenWrt.
- Describe clock, reset and PVTMON PMB child nodes with separate
compatibles.
- Move the PMB transport and accessor header under MFD and register
clock, reset and PVTMON MFD cells matched to their child DT nodes.
Select reset variants through OF match data.
- Add PMB clock support and PVTMON clock and reset bindings.
- Add PVTMON hwmon support for temperature and all seven voltage inputs,
retaining the zero-cell thermal sensor through the hwmon bridge.
- Drop the unnecessary literal block marker from the PMC description.
- Use the BCM6846-specific "brcm,bcm6846-pmc" compatible.
- Expand PMC as "Power Management Controller" throughout.
- Move the LLM assistance disclosure from trailers to the cover letter.
- Drop the RFC prefix.
- Link to v1: https://patch.msgid.link/[email protected]

---
Linus Walleij (7):
dt-bindings: soc: Describe the BCM6846 Power Management Bus
dt-bindings: mfd: Describe the BCM6846 PMC complex
mfd: bcmbca-pmb: Add a shared BCMBCA PMC3 PMB transport
pmdomain: bcm: Add BCMBCA PMB power domains
reset: Add BCMBCA block resets through the PMB
clk: bcm: Add BCMBCA PMB clocks
hwmon: Add Broadcom PMB PVTMON monitoring

 .../bindings/clock/brcm,bcm6846-pmb-clock.yaml     |  39 +++
 .../bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml    |  42 +++
 .../devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml  |  87 +++++
 .../bindings/power/brcm,bcm6846-pmb-power.yaml     |  44 +++
 .../bindings/reset/brcm,bcm6846-pmb-reset.yaml     |  31 ++
 .../bindings/soc/bcm/brcm,bcm6846-pmb.yaml         |  90 +++++
 Documentation/hwmon/bcm_pmb_pvtmon.rst             |  53 +++
 Documentation/hwmon/index.rst                      |   1 +
 MAINTAINERS                                        |  20 ++
 drivers/clk/bcm/Kconfig                            |  11 +
 drivers/clk/bcm/Makefile                           |   1 +
 drivers/clk/bcm/clk-bcmbca-pmb.c                   | 388 +++++++++++++++++++++
 drivers/hwmon/Kconfig                              |  18 +
 drivers/hwmon/Makefile                             |   1 +
 drivers/hwmon/bcm_pmb_pvtmon.c                     | 231 ++++++++++++
 drivers/mfd/Kconfig                                |  11 +
 drivers/mfd/Makefile                               |   1 +
 drivers/mfd/bcmbca_pmc3_pmb.c                      | 308 ++++++++++++++++
 drivers/pmdomain/bcm/Kconfig                       |  10 +
 drivers/pmdomain/bcm/Makefile                      |   1 +
 drivers/pmdomain/bcm/bcmbca-pmb.c                  | 279 +++++++++++++++
 drivers/reset/Kconfig                              |  13 +
 drivers/reset/Makefile                             |   1 +
 drivers/reset/reset-bcmbca-pmb.c                   | 227 ++++++++++++
 include/dt-bindings/clock/brcm,bcm6846-pmb.h       |  42 +++
 include/dt-bindings/power/brcm,bcm6846-pmb.h       |  12 +
 include/dt-bindings/reset/brcm,bcm6846-pmb.h       |  11 +
 include/linux/mfd/bcmbca-pmb.h                     |  11 +
 28 files changed, 1984 insertions(+)

---
base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
change-id: 20261013-xg6846b-bcmbca-xrdp-reset-de71b80c25a4

Best regards,

Signature · 1 line
Linus Walleij <[email protected]>
author
#1 lore raw

PATCH v4 1/7 dt-bindings: soc: Describe the BCM6846 Power Management Bus

The third generation Power Management Controller (PMC3) accesses SoC block control and reset registers through the Power Management Bus (PMB). Describe the BCM6846 PMB and its child controllers.

Add bindings for the power, clock, reset and PVTMON child controllers, and headers defining their clock, reset and power-domain IDs. Include the combined XRDP, Runner and WAN power domain and the zero-cell PVTMON thermal sensor.

Signed-off-by Linus Walleij <[email protected]>

---
I considered even just using the PMB but the PMC has more stuff and it seems natural to let it live in a simple-mfd node.

---
 .../bindings/clock/brcm,bcm6846-pmb-clock.yaml     | 39 ++++++++++
 .../bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml    | 42 ++++++++++
 .../bindings/power/brcm,bcm6846-pmb-power.yaml     | 44 +++++++++++
 .../bindings/reset/brcm,bcm6846-pmb-reset.yaml     | 31 ++++++++
 .../bindings/soc/bcm/brcm,bcm6846-pmb.yaml         | 90 ++++++++++++++++++++++
 MAINTAINERS                                        | 12 +++
 include/dt-bindings/clock/brcm,bcm6846-pmb.h       | 42 ++++++++++
 include/dt-bindings/power/brcm,bcm6846-pmb.h       | 12 +++
 include/dt-bindings/reset/brcm,bcm6846-pmb.h       | 11 +++
 9 files changed, 323 insertions(+)
Documentation/devicetree/bindings/clock/brcm,bcm6846-pmb-clock.yaml new file +39 -0
new file mode 100644
index 000000000000..406125622f7a
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/brcm,bcm6846-pmb-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM6846 PMB clocks
+
+maintainers:
+  - Linus Walleij <[email protected]>
+
+description:
+  The Power Management Bus (PMB) provides access to the RDP and BIU PLL
+  outputs, the Runner clock, the crystal output, the PVTMON acquisition
+  clock and the clock gates in block power-control zones. Clock indices
+  are defined in dt-bindings/clock/brcm,bcm6846-pmb.h.
+  The PLLs and crystal output use a 50 MHz reference clock.
+  Zone clocks require their associated blocks to be powered.
+
+properties:
+  compatible:
+    const: brcm,bcm6846-pmb-clock
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    const: ref
+
+  '#clock-cells':
+    const: 1
+
+required:
+  - compatible
+  - clocks
+  - clock-names
+  - '#clock-cells'
+
+additionalProperties: false
Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml new file +42 -0

42 lines not on this page · raw message

Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml new file +44 -0

44 lines not on this page · raw message

Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml new file +31 -0
new file mode 100644
index 000000000000..a70149d078cc
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/brcm,bcm6846-pmb-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM6846 Power Management Bus reset controller
+
+maintainers:
+  - Linus Walleij <[email protected]>
+
+description:
+  The reset controller is a child of the Power Management Bus (PMB)
+  controller and uses its indirect register interface.
+
+  Each reset specifier identifies a logical reset group, which may span
+  several blocks that must be reset together.
+
+properties:
+  compatible:
+    const: brcm,bcm6846-pmb-reset
+
+  '#reset-cells':
+    const: 1
+    description: Reset group ID from dt-bindings/reset/brcm,bcm6846-pmb.h
+
+required:
+  - compatible
+  - '#reset-cells'
+
+additionalProperties: false
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +90 -0

90 lines not on this page · raw message

MAINTAINERS +12 -0
index 93abbb315065..e9112393e56b 100644
@@ -5444,6 +5444,18 @@ N:	bcm[9]?6856
 N:	bcm[9]?6858
 N:	bcm[9]?6878
 
+BROADCOM BCMBCA PMC3 PMB DRIVER
+M:	Linus Walleij <[email protected]>
+S:	Maintained
+F:	Documentation/devicetree/bindings/clock/brcm,bcm6846-pmb-clock.yaml
+F:	Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml
+F:	Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml
+F:	Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml
+F:	Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml
+F:	include/dt-bindings/clock/brcm,bcm6846-pmb.h
+F:	include/dt-bindings/power/brcm,bcm6846-pmb.h
+F:	include/dt-bindings/reset/brcm,bcm6846-pmb.h
+
 BROADCOM BDC DRIVER
 M:	Justin Chen <[email protected]>
 M:	Al Cooper <[email protected]>
include/dt-bindings/clock/brcm,bcm6846-pmb.h new file +42 -0

42 lines not on this page · raw message

include/dt-bindings/power/brcm,bcm6846-pmb.h new file +12 -0
new file mode 100644
index 000000000000..abdd01c94bc5
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+#ifndef _DT_BINDINGS_POWER_BCM6846_PMB_H
+#define _DT_BINDINGS_POWER_BCM6846_PMB_H
+
+#define BCM6846_PD_PERIPH	0
+#define BCM6846_PD_MEMC		1
+#define BCM6846_PD_USB20		2
+#define BCM6846_PD_XRDP		3
+#define BCM6846_PD_PCIE0		4
+#define BCM6846_PD_PCIE1		5
+
+#endif
include/dt-bindings/reset/brcm,bcm6846-pmb.h new file +11 -0
new file mode 100644
index 000000000000..ce68adb10108
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+#ifndef _DT_BINDINGS_RESET_BRCM_BCM6846_PMB_H
+#define _DT_BINDINGS_RESET_BRCM_BCM6846_PMB_H
+
+/* XRDP packet engine and its three Runner cores. */
+#define BCM6846_RESET_XRDP	0
+
+/* Process, voltage and temperature monitor analog acquisition reset. */
+#define BCM6846_RESET_PVTMON	1
+
+#endif
Signature · 1 line
2.56.0
AI review
#2 lore raw

Re: [PATCH v4 1/7] dt-bindings: soc: Describe the BCM6846 Power Management Bus

Thank you for your contribution! Sashiko AI review found 1 potential issue to consider: - [Medium] dt-bindings: soc: bcm6846-pmb: child nodes split single PMB by Linux subsystem --

Thank you for your contribution! Sashiko AI review found 1 potential issue to consider:
- [Medium] dt-bindings: soc: bcm6846-pmb: child nodes split single PMB by Linux subsystem
--

commit 6235ca071e36f4e363a6b36688dc2c4a38089eb7
Author: Linus Walleij <[email protected]>

dt-bindings: soc: Describe the BCM6846 Power Management Bus

This commit adds Devicetree binding schemas and header constants for the Broadcom BCM6846 Power Management Bus (PMB) and its clock, power, reset, and PVTMON child controllers.

Quoted 5 lines
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +0 -0
new file mode 100644
index 0000000000000..9782a27ff0759

[ ... ]

Quoted 16 lines
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +16 -0
+  Child nodes describe independent hardware blocks accessed over the PMB.
+  These provide global resources and even resources for each other.
+
+properties:
+  compatible:
+    const: brcm,bcm6846-pmb
+
+  reg:
+    maxItems: 1
+    description: PMB configuration, keyhole and address mapping registers
+
+  power-controller:
+    type: object
+    $ref: /schemas/power/brcm,bcm6846-pmb-power.yaml#
+
+  clock-controller:

Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml line 45

Quoted 10 lines
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +10 -0
+    type: object
+    $ref: /schemas/clock/brcm,bcm6846-pmb-clock.yaml#
+
+  reset-controller:
+    type: object
+    $ref: /schemas/reset/brcm,bcm6846-pmb-reset.yaml#
+
+  hwmon:
+    type: object
+    $ref: /schemas/hwmon/brcm,bcm6846-pmb-pvtmon.yaml#

[Severity: Medium]
As reported by Philipp Zabel on RFC [1], should #clock-cells, #power-domain-cells, #reset-cells, #thermal-sensor-cells, and the reference clock be placed directly on the brcm,bcm6846-pmb node instead of requiring four address-less child nodes?

The child nodes have no hardware address space of their own and partition the PMB keyhole interface by Linux subsystem rather than independent hardware blocks, encoding the Linux MFD driver split into the Devicetree ABI. In the driver patches in this series, power-controller, clock-controller, and reset-controller all access the same BPCM slave devices through the parent regmap, with power-controller and clock-controller modifying different bitfields of the same 32-bit BPCM zone control words (offset 32 + zone * 8). Similarly, the clocks and resets properties on the hwmon child node (BCM6846_CLK_PVTMON and BCM6846_RESET_PVTMON) toggle bits 12:8, 2, and 0 of PVTMON's own PVTMON_CONFIG register (bus 1, device 6, word 17).

The Linux driver for brcm,bcm6846-pmb can still instantiate child platform or auxiliary devices internally while exposing the provider cells on the parent PMB node.

[1] https://lore.kernel.org/r/[email protected]

Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1
author
#3 lore raw

Re: [PATCH v4 1/7] dt-bindings: soc: Describe the BCM6846 Power Management Bus

Quoted 5 lines · On Wed, Nov 11, 2026 at 12:11 PM <[email protected]> wrote:

[Severity: Medium]
As reported by Philipp Zabel on RFC [1], should #clock-cells, #power-domain-cells, #reset-cells, #thermal-sensor-cells, and the reference clock be placed directly on the brcm,bcm6846-pmb node instead of requiring four address-less child nodes?

As was pointed out at device tree review these are different discrete devices and it does not properly model the hardware to bring them all into one node, they also use resoures from each other so this will look super-messy if the same node is requesting a host of resources from itsef.

IOW look at the later submissions and it's clear that this doesn't work.

Yours,
Linus Walleij

author
#4 lore raw

PATCH v4 2/7 dt-bindings: mfd: Describe the BCM6846 PMC complex

In reply to Linus Walleij

The third generation Power Management Controller (PMC3) has different subdevices.

Identify the parent with the BCM6846-specific "brcm,bcm6846-pmc" compatible.

Describe the complex as a simple-mfd with a PMB bus child owning its register resource. Include the PMB power, clock and reset controllers and PVTMON, with its acquisition clock and reset resources.

Signed-off-by Linus Walleij <[email protected]>
---
 .../devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml  | 87 ++++++++++++++++++++++
 MAINTAINERS                                        |  1 +
 2 files changed, 88 insertions(+)
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml new file +87 -0
new file mode 100644
index 000000000000..6082e30d37ec
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/brcm,bcm6846-pmc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM6846 Power Management Controller
+
+maintainers:
+  - Linus Walleij <[email protected]>
+
+description:
+  The third generation Power Management Controller (PMC3) contains several
+  register banks. This binding describes the Power Management Bus (PMB)
+  interface within Procmon. The PMB child owns its register bank. The parent
+  provides address translation and does not own a register bank.
+
+properties:
+  compatible:
+    items:
+      - const: brcm,bcm6846-pmc
+      - const: simple-mfd
+
+  ranges:
+    maxItems: 1
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+patternProperties:
+  '^bus@[0-9a-f]+$':
+    $ref: /schemas/soc/bcm/brcm,bcm6846-pmb.yaml#
+    description: PMB configuration, keyhole and address mapping registers
+
+required:
+  - compatible
+  - ranges
+  - '#address-cells'
+  - '#size-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/brcm,bcm6846-pmb.h>
+    #include <dt-bindings/reset/brcm,bcm6846-pmb.h>
+
+    system-controller@ffb00000 {
+        /* Broadcom BCM6846 Power Management Controller complex */
+        compatible = "brcm,bcm6846-pmc", "simple-mfd";
+        ranges = <0x0 0xffb00000 0x21000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        /* Power Management Bus */
+        bus@20100 {
+            compatible = "brcm,bcm6846-pmb";
+            reg = <0x20100 0x200>;
+
+            pmb_clk: clock-controller {
+                compatible = "brcm,bcm6846-pmb-clock";
+                clocks = <&osc50m>;
+                clock-names = "ref";
+                #clock-cells = <1>;
+            };
+
+            hwmon {
+                compatible = "brcm,bcm6846-pmb-pvtmon";
+                clocks = <&pmb_clk BCM6846_CLK_PVTMON>;
+                resets = <&pmb_reset BCM6846_RESET_PVTMON>;
+                #thermal-sensor-cells = <0>;
+            };
+
+            power-controller {
+                compatible = "brcm,bcm6846-pmb-power";
+                #power-domain-cells = <1>;
+            };
+
+            pmb_reset: reset-controller {
+                compatible = "brcm,bcm6846-pmb-reset";
+                #reset-cells = <1>;
+            };
+        };
+    };
MAINTAINERS +1 -0
index e9112393e56b..e11fc5064dc5 100644
@@ -5449,6 +5449,7 @@ M:	Linus Walleij <[email protected]>
 S:	Maintained
 F:	Documentation/devicetree/bindings/clock/brcm,bcm6846-pmb-clock.yaml
 F:	Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml
+F:	Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml
 F:	Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml
 F:	Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml
 F:	Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml
Signature · 1 line
2.56.0
AI review
#5 lore raw

Re: [PATCH v4 2/7] dt-bindings: mfd: Describe the BCM6846 PMC complex

Sashiko has reviewed this patch and found no issues.
Quoted 11 lines

The third generation Power Management Controller (PMC3) has different subdevices.

Identify the parent with the BCM6846-specific "brcm,bcm6846-pmc" compatible.

Describe the complex as a simple-mfd with a PMB bus child owning its register resource. Include the PMB power, clock and reset controllers and PVTMON, with its acquisition clock and reset resources.

Signed-off-by Linus Walleij <[email protected]>

Sashiko has reviewed this patch and found no issues.

Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2
author
#6 lore raw

PATCH v4 3/7 mfd: bcmbca-pmb: Add a shared BCMBCA PMC3 PMB transport

In reply to Linus Walleij

Add an MFD driver for shared access to the Power Management Bus (PMB) of the third generation Power Management Controller (PMC3), initially for BCM6846.

Expose an uncached regmap to all children, encoding the bus, device and word offset in each register address. Keep keyhole semaphore acquisition and transaction recovery inside the MFD driver.

A software timeout does not abort a transaction. If the keyhole is still busy, retain its hardware lock and reject new callers until delayed work observes completion and releases it.

The keyhole register layout differs from older Broadcom PMB controllers. Match only BCM6846 for now.

Signed-off-by Linus Walleij <[email protected]>
---
 MAINTAINERS                    |   2 +
 drivers/mfd/Kconfig            |  11 ++
 drivers/mfd/Makefile           |   1 +
 drivers/mfd/bcmbca_pmc3_pmb.c  | 308 +++++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/bcmbca-pmb.h |  11 ++
 5 files changed, 333 insertions(+)
MAINTAINERS +2 -0
index e11fc5064dc5..9c9ef7eddb10 100644
@@ -5453,9 +5453,11 @@ F:	Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml
 F:	Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml
 F:	Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml
 F:	Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml
+F:	drivers/mfd/bcmbca_pmc3_pmb.c
 F:	include/dt-bindings/clock/brcm,bcm6846-pmb.h
 F:	include/dt-bindings/power/brcm,bcm6846-pmb.h
 F:	include/dt-bindings/reset/brcm,bcm6846-pmb.h
+F:	include/linux/mfd/bcmbca-pmb.h
 
 BROADCOM BDC DRIVER
 M:	Justin Chen <[email protected]>
drivers/mfd/Kconfig +11 -0
index 87ed55c155f0..95e93ea155e1 100644
@@ -173,6 +173,17 @@ config MFD_ATMEL_SMC
 	bool
 	select MFD_SYSCON
 
+config MFD_BCMBCA_PMB
+	bool "Broadcom BCMBCA Power Management Bus"
+	depends on ARCH_BCMBCA || COMPILE_TEST
+	depends on OF
+	select MFD_CORE
+	select REGMAP
+	help
+	  Provide shared Power Management Bus (PMB) access through the third
+	  generation Power Management Controller (PMC3), initially on
+	  BCM6846.
+
 config MFD_BCM590XX
 	tristate "Broadcom BCM590xx PMUs"
 	select MFD_CORE
drivers/mfd/Makefile +1 -0
index f8101d2a9ce9..f00f5caabe04 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_MFD_88PM886_PMIC)	+= 88pm886.o
 obj-$(CONFIG_MFD_ACT8945A)	+= act8945a.o
 obj-$(CONFIG_MFD_SM501)		+= sm501.o
 obj-$(CONFIG_ARCH_BCM2835)	+= bcm2835-pm.o
+obj-$(CONFIG_MFD_BCMBCA_PMB)	+= bcmbca_pmc3_pmb.o
 obj-$(CONFIG_MFD_BCM590XX)	+= bcm590xx.o
 obj-$(CONFIG_MFD_BD9571MWV)	+= bd9571mwv.o
 obj-$(CONFIG_MFD_BQ257XX)	+= bq257xx.o
drivers/mfd/bcmbca_pmc3_pmb.c new file +308 -0

308 lines not on this page · raw message

include/linux/mfd/bcmbca-pmb.h new file +11 -0
new file mode 100644
index 000000000000..36e2b42bf053
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __LINUX_MFD_BCMBCA_PMB_H
+#define __LINUX_MFD_BCMBCA_PMB_H
+
+#include <linux/types.h>
+
+/* Logical regmap addresses: 8-bit bus, 8-bit device, 16-bit word offset. */
+#define BCMBCA_PMB_REG(bus, device, offset) \
+	(((u32)(bus) << 24) | ((u32)(device) << 16) | (offset))
+
+#endif
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#7 lore raw

Re: [PATCH v4 3/7] mfd: bcmbca-pmb: Add a shared BCMBCA PMC3 PMB transport

Sashiko has reviewed this patch and found no issues.
Quoted 8 lines

Add an MFD driver for shared access to the Power Management Bus (PMB) of the third generation Power Management Controller (PMC3), initially for BCM6846.

Expose an uncached regmap to all children, encoding the bus, device and word offset in each register address. Keep keyhole semaphore acquisition and transaction recovery inside the MFD driver.

Quoted 8 lines

A software timeout does not abort a transaction. If the keyhole is still busy, retain its hardware lock and reject new callers until delayed work observes completion and releases it.

The keyhole register layout differs from older Broadcom PMB controllers. Match only BCM6846 for now.

Signed-off-by Linus Walleij <[email protected]>

Sashiko has reviewed this patch and found no issues.

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author
#8 lore raw

PATCH v4 4/7 pmdomain: bcm: Add BCMBCA PMB power domains

In reply to Linus Walleij

Implement BCM6846 BPCM power domains.

Group XRDP, its three Runner cores and WAN in vendor xrdp_pmb[] order, so consumers can power the complete packet engine before resetting it.

Also expose peripheral, memory, USB and PCIe domains. Keep the peripheral and memory domains always on; exclude CPU and PLL blocks with different register layouts.

Signed-off-by Linus Walleij <[email protected]>
---
 MAINTAINERS                       |   1 +
 drivers/pmdomain/bcm/Kconfig      |  10 ++
 drivers/pmdomain/bcm/Makefile     |   1 +
 drivers/pmdomain/bcm/bcmbca-pmb.c | 279 ++++++++++++++++++++++++++++++++++++++
 4 files changed, 291 insertions(+)
MAINTAINERS +1 -0
index 9c9ef7eddb10..6702e9c447ae 100644
@@ -5454,6 +5454,7 @@ F:	Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml
 F:	Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml
 F:	Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml
 F:	drivers/mfd/bcmbca_pmc3_pmb.c
+F:	drivers/pmdomain/bcm/bcmbca-pmb.c
 F:	include/dt-bindings/clock/brcm,bcm6846-pmb.h
 F:	include/dt-bindings/power/brcm,bcm6846-pmb.h
 F:	include/dt-bindings/reset/brcm,bcm6846-pmb.h
drivers/pmdomain/bcm/Kconfig +10 -0
index b28c9f6d256b..fb0c2baea156 100644
@@ -31,6 +31,16 @@ config BCM_PMB
 	  This enables support for the Broadcom's PMB (Power Management Bus) that
 	  is used for disabling and enabling SoC devices.
 
+config BCMBCA_PMB_POWER
+	bool "Broadcom BCMBCA PMB power domains"
+	depends on MFD_BCMBCA_PMB
+	depends on PM
+	default MFD_BCMBCA_PMB
+	select PM_GENERIC_DOMAINS
+	help
+	  Provide power domains for BCM6846 blocks through the shared PMC3
+	  Power Management Bus regmap, including the XRDP packet processor.
+
 config BCM63XX_POWER
 	bool "BCM63xx power domain driver"
 	depends on BMIPS_GENERIC || (COMPILE_TEST && OF)
drivers/pmdomain/bcm/Makefile +1 -0
index 6bfbe4e4db13..ed8a1d3d4c10 100644
@@ -3,3 +3,4 @@ obj-$(CONFIG_BCM_PMB)			+= bcm-pmb.o
 obj-$(CONFIG_BCM2835_POWER)		+= bcm2835-power.o
 obj-$(CONFIG_BCM63XX_POWER)		+= bcm63xx-power.o
 obj-$(CONFIG_RASPBERRYPI_POWER)		+= raspberrypi-power.o
+obj-$(CONFIG_BCMBCA_PMB_POWER)		+= bcmbca-pmb.o
drivers/pmdomain/bcm/bcmbca-pmb.c new file +279 -0

279 lines not on this page · raw message

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2.56.0
AI review
#9 lore raw

Re: [PATCH v4 4/7] pmdomain: bcm: Add BCMBCA PMB power domains

Sashiko has reviewed this patch and found no issues.
Quoted 10 lines

Implement BCM6846 BPCM power domains.

Group XRDP, its three Runner cores and WAN in vendor xrdp_pmb[] order, so consumers can power the complete packet engine before resetting it.

Also expose peripheral, memory, USB and PCIe domains. Keep the peripheral and memory domains always on; exclude CPU and PLL blocks with different register layouts.

Signed-off-by Linus Walleij <[email protected]>

Sashiko has reviewed this patch and found no issues.

Signature · 1 line
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author
#10 lore raw

PATCH v4 5/7 reset: Add BCMBCA block resets through the PMB

In reply to Linus Walleij

Implement the BCM6846 XRDP reset group through the shared PMB regmap. Assert all blocks before releasing any of them, preserving the vendor reset masks and ordering. Provide the independent PVTMON acquisition reset as well. Serialize complete sequences and hold blocks in reset on failure.

Consumers must enable their power domains before triggering a reset pulse (i.e. the cycle of asserting/deasserting reset).

Suppress bind attributes: it's not good to be able to unbind the reset driver for the SoC manually.

Signed-off-by Linus Walleij <[email protected]>

---
I kept the suppress_bind_attributes around: it looks dangerous to be able to unbind the reset driver.

---
 MAINTAINERS                      |   1 +
 drivers/reset/Kconfig            |  13 +++
 drivers/reset/Makefile           |   1 +
 drivers/reset/reset-bcmbca-pmb.c | 227 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 242 insertions(+)
MAINTAINERS +1 -0
index 6702e9c447ae..1b7247b8c717 100644
@@ -5455,6 +5455,7 @@ F:	Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml
 F:	Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml
 F:	drivers/mfd/bcmbca_pmc3_pmb.c
 F:	drivers/pmdomain/bcm/bcmbca-pmb.c
+F:	drivers/reset/reset-bcmbca-pmb.c
 F:	include/dt-bindings/clock/brcm,bcm6846-pmb.h
 F:	include/dt-bindings/power/brcm,bcm6846-pmb.h
 F:	include/dt-bindings/reset/brcm,bcm6846-pmb.h
drivers/reset/Kconfig +13 -0
index eda9c698a95f..7371aead0b17 100644
@@ -49,6 +49,19 @@ config RESET_BCM6345
 	help
 	  This enables the reset controller driver for BCM6345 SoCs.
 
+config RESET_BCMBCA_PMB
+	tristate "Broadcom BCMBCA PMB reset controller"
+	depends on ARCH_BCMBCA || COMPILE_TEST
+	depends on OF && HAS_IOMEM
+	depends on MFD_BCMBCA_PMB
+	select REGMAP
+	default MFD_BCMBCA_PMB
+	help
+	  Reset BCMBCA blocks through the Power Management Bus (PMB) of
+	  the third generation Power Management Controller (PMC3).
+
+	  The module will be called reset-bcmbca-pmb.
+
 config RESET_BERLIN
 	tristate "Berlin Reset Driver"
 	depends on ARCH_BERLIN || COMPILE_TEST
drivers/reset/Makefile +1 -0
index 489fafd6bbe3..26c8a73f774f 100644
@@ -11,6 +11,7 @@ obj-$(CONFIG_RESET_ASPEED) += reset-aspeed.o
 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
 obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
+obj-$(CONFIG_RESET_BCMBCA_PMB) += reset-bcmbca-pmb.o
 obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
 obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o
 obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
drivers/reset/reset-bcmbca-pmb.c new file +227 -0

227 lines not on this page · raw message

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2.56.0
AI review
#11 lore raw

Re: [PATCH v4 5/7] reset: Add BCMBCA block resets through the PMB

Sashiko has reviewed this patch and found no issues.
Quoted 6 lines

Implement the BCM6846 XRDP reset group through the shared PMB regmap. Assert all blocks before releasing any of them, preserving the vendor reset masks and ordering. Provide the independent PVTMON acquisition reset as well. Serialize complete sequences and hold blocks in reset on failure.

Quoted 7 lines

Consumers must enable their power domains before triggering a reset pulse (i.e. the cycle of asserting/deasserting reset).

Suppress bind attributes: it's not good to be able to unbind the reset driver for the SoC manually.

Signed-off-by Linus Walleij <[email protected]>

Sashiko has reviewed this patch and found no issues.

Signature · 1 line
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author
#12 lore raw

PATCH v4 6/7 clk: bcm: Add BCMBCA PMB clocks

In reply to Linus Walleij

Add a BCM6846 clock provider for the Power Management Bus (PMB) MFD cell. Expose six outputs from each of the RDP and BIU PLLs, the Runner clock divided from RDP PLL channel 1, the crystal output, PVTMON and block-zone clock gates.

PVTMON and zone clocks provide gate control only.

Signed-off-by Linus Walleij <[email protected]>
---
 MAINTAINERS                      |   1 +
 drivers/clk/bcm/Kconfig          |  11 ++
 drivers/clk/bcm/Makefile         |   1 +
 drivers/clk/bcm/clk-bcmbca-pmb.c | 388 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 401 insertions(+)
MAINTAINERS +1 -0
index 1b7247b8c717..2a280ca7d162 100644
@@ -5453,6 +5453,7 @@ F:	Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml
 F:	Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml
 F:	Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml
 F:	Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml
+F:	drivers/clk/bcm/clk-bcmbca-pmb.c
 F:	drivers/mfd/bcmbca_pmc3_pmb.c
 F:	drivers/pmdomain/bcm/bcmbca-pmb.c
 F:	drivers/reset/reset-bcmbca-pmb.c
drivers/clk/bcm/Kconfig +11 -0
index a972d763eb77..58f815383886 100644
@@ -1,5 +1,16 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
+config CLK_BCMBCA_PMB
+	tristate "Broadcom BCMBCA PMB clocks"
+	depends on MFD_BCMBCA_PMB
+	select REGMAP
+	default MFD_BCMBCA_PMB
+	help
+	  Provide BCM6846 PLL output, Runner, crystal, PVTMON and block-zone
+	  clocks through the Power Management Bus.
+
+	  The module will be called clk-bcmbca-pmb.
+
 config CLK_BCM2711_DVP
 	tristate "Broadcom BCM2711 DVP support"
 	depends on ARCH_BCM2835 ||COMPILE_TEST
drivers/clk/bcm/Makefile +1 -0
index d0b6f4b1fb08..7123eefff138 100644
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_CLK_BCMBCA_PMB)	+= clk-bcmbca-pmb.o
 obj-$(CONFIG_CLK_BCM_63XX)	+= clk-bcm63xx.o
 obj-$(CONFIG_CLK_BCM_63XX_GATE)	+= clk-bcm63xx-gate.o
 obj-$(CONFIG_CLK_BCM63268_TIMER) += clk-bcm63268-timer.o
drivers/clk/bcm/clk-bcmbca-pmb.c new file +388 -0

388 lines not on this page · raw message

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AI review
#13 lore raw

Re: [PATCH v4 6/7] clk: bcm: Add BCMBCA PMB clocks

Sashiko has reviewed this patch and found no issues.
Quoted 8 lines

Add a BCM6846 clock provider for the Power Management Bus (PMB) MFD cell. Expose six outputs from each of the RDP and BIU PLLs, the Runner clock divided from RDP PLL channel 1, the crystal output, PVTMON and block-zone clock gates.

PVTMON and zone clocks provide gate control only.

Signed-off-by Linus Walleij <[email protected]>

Sashiko has reviewed this patch and found no issues.

Signature · 1 line
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author
#14 lore raw

PATCH v4 7/7 hwmon: Add Broadcom PMB PVTMON monitoring

In reply to Linus Walleij

Expose the BCM6846 die temperature and seven voltage inputs through hwmon using the shared Power Management Bus (PMB) regmap.

Register the temperature channel with the thermal framework so existing zero-cell device-tree thermal sensor references work.

Poll for valid samples with a bounded timeout, releasing the PMB lock between reads. Report temperature in millidegrees Celsius, including negative values, and voltages in millivolts.

Acked-by Guenter Roeck <[email protected]>
Signed-off-by Linus Walleij <[email protected]>
---
 Documentation/hwmon/bcm_pmb_pvtmon.rst |  53 ++++++++
 Documentation/hwmon/index.rst          |   1 +
 MAINTAINERS                            |   2 +
 drivers/hwmon/Kconfig                  |  18 +++
 drivers/hwmon/Makefile                 |   1 +
 drivers/hwmon/bcm_pmb_pvtmon.c         | 231 +++++++++++++++++++++++++++++++++
 6 files changed, 306 insertions(+)
Documentation/hwmon/bcm_pmb_pvtmon.rst new file +53 -0
new file mode 100644
index 000000000000..8d2412daeed1
@@ -0,0 +1,53 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+Kernel driver bcm_pmb_pvtmon
+============================
+
+Supported chips:
+
+  * Broadcom BCM6846 PVTMON
+
+    Access: Power Management Bus (PMB), bus 1, device 6
+
+Author: Linus Walleij <[email protected]>
+
+Description
+-----------
+
+The process, voltage and temperature monitor (PVTMON) measures die
+temperature and seven voltage inputs. The driver uses the shared PMB MFD
+transport and obtains its clock and reset from the sibling providers.
+
+With CONFIG_THERMAL_OF enabled, the temperature channel also supplies
+device-tree thermal zones. The PVTMON node uses #thermal-sensor-cells = <0>;
+voltage inputs do not have thermal sensor indices.
+
+Sysfs attributes
+----------------
+
+All attributes are read-only. Temperature is reported in millidegrees
+Celsius and voltages in millivolts, using the BCM6846 vendor conversion
+formulas and input-divider ratios.
+
+================ ================================
+Attribute        Description
+================ ================================
+temp1_input      Die temperature
+in0_input        First 0.85 V input
+in1_input        Second 0.85 V input
+in2_input        VIN input
+in3_input        1.0 V input
+in4_input        1.8 V input
+in5_input        3.3 V input
+in6_input        Diagnostic test input
+in0_label        V0.85_1
+in1_label        V0.85_2
+in2_label        VIN
+in3_label        V1.0
+in4_label        V1.8
+in5_label        V3.3
+in6_label        Vtest
+================ ================================
+
+Labels follow the vendor channel names. Vtest is a diagnostic ADC input,
+not a supply rail. The driver does not change the analog test routing.
Documentation/hwmon/index.rst +1 -0
index 199ca79621e9..5a579391cf9e 100644
@@ -54,6 +54,7 @@ Hardware Monitoring Kernel Drivers
    axiado-pwm-fan
    axiado-tsadc
    bcm54140
+   bcm_pmb_pvtmon
    bel-pfe
    bpa-rs600
    cgbc-hwmon
MAINTAINERS +2 -0
index 2a280ca7d162..f38003b144c5 100644
@@ -5453,7 +5453,9 @@ F:	Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml
 F:	Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml
 F:	Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml
 F:	Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml
+F:	Documentation/hwmon/bcm_pmb_pvtmon.rst
 F:	drivers/clk/bcm/clk-bcmbca-pmb.c
+F:	drivers/hwmon/bcm_pmb_pvtmon.c
 F:	drivers/mfd/bcmbca_pmc3_pmb.c
 F:	drivers/pmdomain/bcm/bcmbca-pmb.c
 F:	drivers/reset/reset-bcmbca-pmb.c
drivers/hwmon/Kconfig +18 -0
index 18c682e1a475..5e42c3dc70f1 100644
@@ -334,6 +334,24 @@ config SENSORS_AXIADO_TSADC
 	  This driver can also be built as a module. If so, the module
 	  will be called axiado-tsadc.
 
+config SENSORS_BCM_PMB_PVTMON
+	tristate "Broadcom PMB PVTMON hardware monitoring"
+	depends on ARCH_BCMBCA || COMPILE_TEST
+	depends on MFD_BCMBCA_PMB
+	depends on COMMON_CLK
+	depends on RESET_CONTROLLER
+	select CLK_BCMBCA_PMB
+	select RESET_BCMBCA_PMB
+	select REGMAP
+	default MFD_BCMBCA_PMB
+	help
+	  Enable temperature and voltage monitoring through the
+	  Power Management Bus on Broadcom BCM6846. With THERMAL_OF enabled, the
+	  temperature channel also supplies the thermal zones described in
+	  the device tree.
+
+	  This driver can also be built as a module called bcm_pmb_pvtmon.
+
 config SENSORS_K8TEMP
 	tristate "AMD Athlon64/FX or Opteron temperature sensor"
 	depends on X86 && PCI
drivers/hwmon/Makefile +1 -0
index d4c345ed7261..edf8e8d2f345 100644
@@ -62,6 +62,7 @@ obj-$(CONFIG_SENSORS_ATXP1)	+= atxp1.o
 obj-$(CONFIG_SENSORS_AXI_FAN_CONTROL) += axi-fan-control.o
 obj-$(CONFIG_SENSORS_AXIADO_PWM_FAN) += axiado-pwm-fan.o
 obj-$(CONFIG_SENSORS_AXIADO_TSADC)	+= axiado-tsadc.o
+obj-$(CONFIG_SENSORS_BCM_PMB_PVTMON) += bcm_pmb_pvtmon.o
 obj-$(CONFIG_SENSORS_CGBC)	+= cgbc-hwmon.o
 obj-$(CONFIG_SENSORS_CHIPCAP2) += chipcap2.o
 obj-$(CONFIG_SENSORS_CORETEMP)	+= coretemp.o
drivers/hwmon/bcm_pmb_pvtmon.c new file +231 -0

231 lines not on this page · raw message

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2.56.0
AI review
#15 lore raw

Re: [PATCH v4 7/7] hwmon: Add Broadcom PMB PVTMON monitoring

Sashiko has reviewed this patch and found no issues.
Quoted 6 lines

Expose the BCM6846 die temperature and seven voltage inputs through hwmon using the shared Power Management Bus (PMB) regmap.

Register the temperature channel with the thermal framework so existing zero-cell device-tree thermal sensor references work.

Quoted 6 lines

Poll for valid samples with a bounded timeout, releasing the PMB lock between reads. Report temperature in millidegrees Celsius, including negative values, and voltages in millivolts.

Acked-by Guenter Roeck <[email protected]>
Signed-off-by Linus Walleij <[email protected]>

Sashiko has reviewed this patch and found no issues.

Signature · 1 line
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