BCMBCA PMB power, clock, reset and hardware monitoring support
Subsystems (8)
v3 cover BCMBCA PMB power, clock, reset and hardware monitoring support
This is another of these big upfront design binding and driver hoards that is the consequence of adding new SoC support.
My stake is to be able to boot and test a full featured Cortex-A7 system and the BCM6846 XG6846B is one such system on my desk.
It's been cooking for a while in various prototype forms.
IMPLEMENTATION:
The PMC contains various stuff so this needs to be a simple MFD node so more things can be added into it later.
Inside the PMC is the PMB, the processor monitor bus. This bridges to several individual peripherals which are very clearly distinct devices on that bus.
Handle the PMB with an MFD driver with power domain, clock, reset and hwmon providers.
Expose the standard BPCM peripheral, memory, USB and PCIe domains and a combined XRDP domain covering XRDP, the three Runners and WAN. Keep the peripheral and memory domains always on. The power domain provider now owns zone transitions, leaving the reset provider to pulse resets. The CPU and PLL blocks use different register layouts and are excluded. This new power domain integration has not been tested on hardware.
The BCM6846 XRDP reset sequence enabled full-MTU traffic on all four LAN ports and copper WAN and has been tested on that series. The zone power-up sequence also passed direct CFE flash boot in the Linux 6.18 OpenWrt port; this folded v7.3-rc1 revision still needs hardware testing.
MERGE STRATEGY:
Through an MFD immutable branch once everyone ACKs the subdrivers, it will take time I guess. Queue the bindings and drivers in MFD.
Updates to peripheral schemas and device trees to accommodate the power domains will be submitted separately.
The patches were authored with the assistance of an LLM.
---
Changes in v3:
- Add a PMB power domain subdriver and binding with a combined XRDP domain.
- Move XRDP, Runner and WAN power sequencing out of the reset driver.
- Register the power domain MFD child.
- MFD transport: simplify cell registration, drop unused state and
property.h, and add the bcmbca-pmb subject prefix.
- Power domains: default to MFD_BCMBCA_PMB.
- MFD transport and reset: use mutex guards; reset: use
str_assert_deassert().
- Clock: use the reference clock as parent, limit CLK_GET_RATE_NOCACHE to
PLL outputs, drop CLK_IGNORE_UNUSED and simplify Runner registration.
- Clock and reset: suppress manual bind/unbind.
- MFD transport, clock, reset and hwmon: drop redundant mod_devicetable.h;
clock: drop slab.h.
- Power domain, clock, reset and hwmon drivers and PMC/PMB bindings: drop vendor-source references from comments.
- Link to v2: https://patch.msgid.link/[email protected]
Changes in v2:
- Use a shared PMB regmap in all child drivers, keeping keyhole semaphore
handling and timeout recovery inside the MFD provider.
- Drop PCIe reset IDs and sequences pending proper power and lane
configuration handling.
- Power up the XRDP, Runner and WAN zones before the XRDP reset pulse,
preserving the sequence tested with direct CFE flash boot in OpenWrt.
- Describe clock, reset and PVTMON PMB child nodes with separate
compatibles.
- Move the PMB transport and accessor header under MFD and register
clock, reset and PVTMON MFD cells matched to their child DT nodes.
Select reset variants through OF match data.
- Add PMB clock support and PVTMON clock and reset bindings.
- Add PVTMON hwmon support for temperature and all seven voltage inputs,
retaining the zero-cell thermal sensor through the hwmon bridge.
- Drop the unnecessary literal block marker from the PMC description.
- Use the BCM6846-specific "brcm,bcm6846-pmc" compatible.
- Expand PMC as "Power Management Controller" throughout.
- Move the LLM assistance disclosure from trailers to the cover letter.
- Drop the RFC prefix.
- Link to v1: https://patch.msgid.link/[email protected]
---
Linus Walleij (7):
dt-bindings: mfd: Describe the BCM6846 PMC complex
dt-bindings: soc: Describe the BCM6846 Processor Monitor Bus
mfd: bcmbca-pmb: Add a shared BCMBCA PMC3 PMB transport
pmdomain: bcm: Add BCMBCA PMB power domains
reset: Add BCMBCA block resets through the PMB
clk: bcm: Add BCMBCA PMB clocks
hwmon: Add Broadcom PMB PVTMON monitoring
.../bindings/clock/brcm,bcm6846-pmb-clock.yaml | 39 +++ .../bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml | 42 +++ .../devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml | 87 +++++ .../bindings/power/brcm,bcm6846-pmb-power.yaml | 44 +++ .../bindings/reset/brcm,bcm6846-pmb-reset.yaml | 31 ++ .../bindings/soc/bcm/brcm,bcm6846-pmb.yaml | 90 +++++ Documentation/hwmon/bcm_pmb_pvtmon.rst | 53 +++ Documentation/hwmon/index.rst | 1 + MAINTAINERS | 20 ++ drivers/clk/bcm/Kconfig | 11 + drivers/clk/bcm/Makefile | 1 + drivers/clk/bcm/clk-bcmbca-pmb.c | 388 +++++++++++++++++++++ drivers/hwmon/Kconfig | 18 + drivers/hwmon/Makefile | 1 + drivers/hwmon/bcm_pmb_pvtmon.c | 231 ++++++++++++ drivers/mfd/Kconfig | 11 + drivers/mfd/Makefile | 1 + drivers/mfd/bcmbca_pmc3_pmb.c | 286 +++++++++++++++ drivers/pmdomain/bcm/Kconfig | 10 + drivers/pmdomain/bcm/Makefile | 1 + drivers/pmdomain/bcm/bcmbca-pmb.c | 279 +++++++++++++++ drivers/reset/Kconfig | 13 + drivers/reset/Makefile | 1 + drivers/reset/reset-bcmbca-pmb.c | 243 +++++++++++++ include/dt-bindings/clock/brcm,bcm6846-pmb.h | 42 +++ include/dt-bindings/power/brcm,bcm6846-pmb.h | 12 + include/dt-bindings/reset/brcm,bcm6846-pmb.h | 11 + include/linux/mfd/bcmbca-pmb.h | 11 + 28 files changed, 1978 insertions(+)
---
base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
change-id: 20261013-xg6846b-bcmbca-xrdp-reset-de71b80c25a4
Best regards,
Signature · 1 line
Linus Walleij <[email protected]>
PATCH v3 1/7 dt-bindings: mfd: Describe the BCM6846 PMC complex
The third generation Power Management Controller (PMC3) has different subdevices.
Identify the parent with the BCM6846-specific "brcm,bcm6846-pmc" compatible.
Describe the complex as a simple-mfd with a PMB bus child owning its register resource. Include the PMB clock and reset controllers and PVTMON, with its acquisition clock and reset resources.
--- .../devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml | 82 ++++++++++++++++++++++ MAINTAINERS | 5 ++ 2 files changed, 87 insertions(+)
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml new file +82 -0
@@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/brcm,bcm6846-pmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6846 Power Management Controller + +maintainers: + - Linus Walleij <[email protected]> + +description: + The third generation Power Management Controller (PMC3) contains several + register banks. This binding describes the Processor Monitor Bus (PMB) + interface within Procmon. The PMB child owns its register bank. The parent + provides address translation and does not own a register bank. + +properties: + compatible: + items: + - const: brcm,bcm6846-pmc + - const: simple-mfd + + ranges: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + '^bus@[0-9a-f]+$': + $ref: /schemas/soc/bcm/brcm,bcm6846-pmb.yaml# + description: PMB configuration, keyhole and address mapping registers + +required: + - compatible + - ranges + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/brcm,bcm6846-pmb.h> + #include <dt-bindings/reset/brcm,bcm6846-pmb.h> + + system-controller@ffb00000 { + /* Broadcom BCM6846 Power Management Controller complex */ + compatible = "brcm,bcm6846-pmc", "simple-mfd"; + ranges = <0x0 0xffb00000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + + /* Processor Monitor Bus */ + bus@20100 { + compatible = "brcm,bcm6846-pmb"; + reg = <0x20100 0x200>; + + pmb_clk: clock-controller { + compatible = "brcm,bcm6846-pmb-clock"; + clocks = <&osc50m>; + clock-names = "ref"; + #clock-cells = <1>; + }; + + pmb_reset: reset-controller { + compatible = "brcm,bcm6846-pmb-reset"; + #reset-cells = <1>; + }; + + hwmon { + compatible = "brcm,bcm6846-pmb-pvtmon"; + clocks = <&pmb_clk BCM6846_CLK_PVTMON>; + resets = <&pmb_reset BCM6846_RESET_PVTMON>; + #thermal-sensor-cells = <0>; + }; + }; + };
MAINTAINERS +5 -0
@@ -5444,6 +5444,11 @@ N: bcm[9]?6856 N: bcm[9]?6858 N: bcm[9]?6878 +BROADCOM BCMBCA PMC3 PMB DRIVER +M: Linus Walleij <[email protected]> +S: Maintained +F: Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml + BROADCOM BDC DRIVER M: Justin Chen <[email protected]> M: Al Cooper <[email protected]>
Signature · 1 line
2.56.0
[email protected]
AI reviewRe: [PATCH v3 1/7] dt-bindings: mfd: Describe the BCM6846 PMC complex
Thank you for your contribution! Sashiko AI review found 3 potential issues to consider: - [Low] dt-bindings: mfd: brcm,bcm6846-pmc references files added in next patch - [Low] dt-bindings: mfd…
Thank you for your contribution! Sashiko AI review found 3 potential issues to consider:
- [Low] dt-bindings: mfd: brcm,bcm6846-pmc references files added in next patch
- [Low] dt-bindings: mfd: brcm,bcm6846-pmc example child nodes out of name order
- [Low] dt-bindings: mfd: brcm,bcm6846-pmc expands PMB as Processor Monitor Bus
--
commit 843b048574d4c45f386b5f401c61ae92d14a122f
Author: Linus Walleij <[email protected]>
dt-bindings: mfd: Describe the BCM6846 PMC complex
This commit adds a Device Tree binding schema for the Broadcom BCM6846 third generation Power Management Controller (PMC3) complex.
Quoted 12 lines
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml new file +6
-0@@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/brcm,bcm6846-pmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# +
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml line 16
Quoted 10 lines
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml new file +10
-0+title: Broadcom BCM6846 Power Management Controller + +maintainers: + - Linus Walleij <[email protected]> + +description: + The third generation Power Management Controller (PMC3) contains several + register banks. This binding describes the Processor Monitor Bus (PMB) + interface within Procmon. The PMB child owns its register bank. The parent + provides address translation and does not own a register bank.
[Severity: Low]
As reported by William Zhang on v2 [1], should PMB be expanded as Power Management Bus instead of Processor Monitor Bus here and in the example comment below, matching Documentation/devicetree/bindings/power/brcm,bcm-pmb.yaml?
Quoted 23 lines
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml new file +23
-0+ +properties: + compatible: + items: + - const: brcm,bcm6846-pmc + - const: simple-mfd + + ranges: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + '^bus@[0-9a-f]+$': + $ref: /schemas/soc/bcm/brcm,bcm6846-pmb.yaml# + description: PMB configuration, keyhole and address mapping registers + +required: + - compatible
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml line 49
Quoted 10 lines
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml new file +10
-0+ - ranges + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/brcm,bcm6846-pmb.h> + #include <dt-bindings/reset/brcm,bcm6846-pmb.h>
[Severity: Low]
As reported by Krzysztof Kozlowski on RFC [2], does make dt_binding_check fail at this commit because /schemas/soc/bcm/brcm,bcm6846-pmb.yaml#, the dt-bindings/clock/brcm,bcm6846-pmb.h and dt-bindings/reset/brcm,bcm6846-pmb.h headers, and the child node bindings used in the example are not introduced until the next patch in the series, commit "dt-bindings: soc: Describe the BCM6846 Processor Monitor Bus"? Ordering that patch before this one would keep dt_binding_check bisectable across the series.
Quoted 21 lines
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml new file +21
-0+ + system-controller@ffb00000 { + /* Broadcom BCM6846 Power Management Controller complex */ + compatible = "brcm,bcm6846-pmc", "simple-mfd"; + ranges = <0x0 0xffb00000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + + /* Processor Monitor Bus */ + bus@20100 { + compatible = "brcm,bcm6846-pmb"; + reg = <0x20100 0x200>; + + pmb_clk: clock-controller { + compatible = "brcm,bcm6846-pmb-clock"; + clocks = <&osc50m>; + clock-names = "ref"; + #clock-cells = <1>; + }; + + pmb_reset: reset-controller {
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml line 80
Quoted 10 lines
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml new file +10
-0+ compatible = "brcm,bcm6846-pmb-reset"; + #reset-cells = <1>; + }; + + hwmon { + compatible = "brcm,bcm6846-pmb-pvtmon"; + clocks = <&pmb_clk BCM6846_CLK_PVTMON>; + resets = <&pmb_reset BCM6846_RESET_PVTMON>; + #thermal-sensor-cells = <0>; + };
[Severity: Low]
Should the hwmon node be placed before reset-controller so that the child nodes without unit addresses under bus@20100 are ordered alphabetically by node name? Otherwise scripts/dtc/dt-check-style --mode=strict warns that child node hwmon is out of name order.
[1] https://lore.kernel.org/r/CAHi4H7GOMM9K6XG15vPyFMLOza3QQ7QPxUkCi85jA_e9D6YbKg@mail.gmail.com
[2] https://lore.kernel.org/r/[email protected]
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1
Rob Herring (Arm)
maintainerRe: [PATCH v3 1/7] dt-bindings: mfd: Describe the BCM6846 PMC complex
In reply to Linus WalleijQuoted 10 lines · Linus Walleij
The third generation Power Management Controller (PMC3) has different subdevices.
Identify the parent with the BCM6846-specific "brcm,bcm6846-pmc" compatible.
Describe the complex as a simple-mfd with a PMB bus child owning its register resource. Include the PMB clock and reset controllers and PVTMON, with its acquisition clock and reset resources.
Quoted 6 lines
Signed-off-by Linus Walleij <[email protected]>--- .../devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml | 82 ++++++++++++++++++++++ MAINTAINERS | 5 ++ 2 files changed, 87 insertions(+)
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml: Unresolvable reference: /schemas/soc/bcm/brcm,bcm6846-pmb.yaml# Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.example.dts:18:18: fatal error: dt-bindings/clock/brcm,bcm6846-pmb.h: No such file or directory
18 | #include <dt-bindings/clock/brcm,bcm6846-pmb.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[2]: *** [scripts/Makefile.dtbs:140: Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.example.dtb] Error 1 make[2]: *** Waiting for unfinished jobs....
make[1]: *** [/builds/robherring/linux-dt-review/Makefile:1726: dt_binding_check] Error 2
make: *** [Makefile:248: __sub-make] Error 2
doc reference errors (make refcheckdocs):
See https://patchwork.kernel.org/project/devicetree/patch/[email protected]
The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
PATCH v3 2/7 dt-bindings: soc: Describe the BCM6846 Processor Monitor Bus
In reply to Linus WalleijThe third generation Power Management Controller (PMC3) accesses SoC block control and reset registers through the Processor Monitor Bus (PMB). Describe the BCM6846 PMC and PMB.
Describe the power controller child and all supported power domain IDs, including the combined XRDP, Runner and WAN domain.
---
I considered even just using the PMB but the PMC has more stuff and it seems natural to let it live in a simple-mfd node.
--- .../bindings/clock/brcm,bcm6846-pmb-clock.yaml | 39 ++++++++++ .../bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml | 42 ++++++++++ .../devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml | 5 ++ .../bindings/power/brcm,bcm6846-pmb-power.yaml | 44 +++++++++++ .../bindings/reset/brcm,bcm6846-pmb-reset.yaml | 31 ++++++++ .../bindings/soc/bcm/brcm,bcm6846-pmb.yaml | 90 ++++++++++++++++++++++ MAINTAINERS | 8 ++ include/dt-bindings/clock/brcm,bcm6846-pmb.h | 42 ++++++++++ include/dt-bindings/power/brcm,bcm6846-pmb.h | 12 +++ include/dt-bindings/reset/brcm,bcm6846-pmb.h | 11 +++ 10 files changed, 324 insertions(+)
Documentation/devicetree/bindings/clock/brcm,bcm6846-pmb-clock.yaml new file +39 -0
@@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/brcm,bcm6846-pmb-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6846 PMB clocks + +maintainers: + - Linus Walleij <[email protected]> + +description: + The Processor Monitor Bus (PMB) provides access to the RDP and BIU PLL + outputs, the Runner clock, the crystal output, the PVTMON acquisition + clock and the clock gates in block power-control zones. Clock indices + are defined in dt-bindings/clock/brcm,bcm6846-pmb.h. + The PLLs and crystal output use a 50 MHz reference clock. + Zone clocks require their associated blocks to be powered. + +properties: + compatible: + const: brcm,bcm6846-pmb-clock + + clocks: + maxItems: 1 + + clock-names: + const: ref + + '#clock-cells': + const: 1 + +required: + - compatible + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false
Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml new file +42 -0
42 lines not on this page · raw message
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml +5 -0
@@ -60,6 +60,11 @@ examples: compatible = "brcm,bcm6846-pmb"; reg = <0x20100 0x200>; + pmb_power: power-controller { + compatible = "brcm,bcm6846-pmb-power"; + #power-domain-cells = <1>; + }; + pmb_clk: clock-controller { compatible = "brcm,bcm6846-pmb-clock"; clocks = <&osc50m>;
Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml new file +44 -0
44 lines not on this page · raw message
Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml new file +31 -0
@@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/brcm,bcm6846-pmb-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6846 Processor Monitor Bus reset controller + +maintainers: + - Linus Walleij <[email protected]> + +description: + The reset controller is a child of the Processor Monitor Bus (PMB) + controller and uses its indirect register interface. + + Each reset specifier identifies a logical reset group, which may span + several blocks that must be reset together. + +properties: + compatible: + const: brcm,bcm6846-pmb-reset + + '#reset-cells': + const: 1 + description: Reset group ID from dt-bindings/reset/brcm,bcm6846-pmb.h + +required: + - compatible + - '#reset-cells' + +additionalProperties: false
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +90 -0
90 lines not on this page · raw message
MAINTAINERS +8 -0
@@ -5447,7 +5447,15 @@ N: bcm[9]?6878 BROADCOM BCMBCA PMC3 PMB DRIVER M: Linus Walleij <[email protected]> S: Maintained +F: Documentation/devicetree/bindings/clock/brcm,bcm6846-pmb-clock.yaml +F: Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml F: Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml +F: Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml +F: Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml +F: Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml +F: include/dt-bindings/clock/brcm,bcm6846-pmb.h +F: include/dt-bindings/power/brcm,bcm6846-pmb.h +F: include/dt-bindings/reset/brcm,bcm6846-pmb.h BROADCOM BDC DRIVER M: Justin Chen <[email protected]>
include/dt-bindings/clock/brcm,bcm6846-pmb.h new file +42 -0
42 lines not on this page · raw message
include/dt-bindings/power/brcm,bcm6846-pmb.h new file +12 -0
@@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +#ifndef _DT_BINDINGS_POWER_BCM6846_PMB_H +#define _DT_BINDINGS_POWER_BCM6846_PMB_H + +#define BCM6846_PD_PERIPH 0 +#define BCM6846_PD_MEMC 1 +#define BCM6846_PD_USB20 2 +#define BCM6846_PD_XRDP 3 +#define BCM6846_PD_PCIE0 4 +#define BCM6846_PD_PCIE1 5 + +#endif
include/dt-bindings/reset/brcm,bcm6846-pmb.h new file +11 -0
@@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +#ifndef _DT_BINDINGS_RESET_BRCM_BCM6846_PMB_H +#define _DT_BINDINGS_RESET_BRCM_BCM6846_PMB_H + +/* XRDP packet engine and its three Runner cores. */ +#define BCM6846_RESET_XRDP 0 + +/* Process, voltage and temperature monitor analog acquisition reset. */ +#define BCM6846_RESET_PVTMON 1 + +#endif
Signature · 1 line
2.56.0
[email protected]
AI reviewRe: [PATCH v3 2/7] dt-bindings: soc: Describe the BCM6846 Processor Monitor Bus
Thank you for your contribution! Sashiko AI review found 5 potential issues to consider: - [Low] dt-bindings: hwmon: brcm,bcm6846-pmb-pvtmon uses additionalProperties with $ref - [Low] dt-bindings…
Thank you for your contribution! Sashiko AI review found 5 potential issues to consider:
- [Low] dt-bindings: hwmon: brcm,bcm6846-pmb-pvtmon uses additionalProperties with $ref
- [Low] dt-bindings: soc: brcm,bcm6846-pmb ordered after dependent brcm,bcm6846-pmc
- [Low] dt-bindings: soc: brcm,bcm6846-pmb examples violate dt-check-style strict rules
- [Low] dt-bindings: soc: bcm: driver-model child nodes in brcm,bcm6846-pmb
- [Low] dt-bindings: soc: bcm6846-pmb: expand PMB as Power Management Bus
--
commit 6ce40c3812dd052e5e8e3945888002592aa196c2
Author: Linus Walleij <[email protected]>
dt-bindings: soc: Describe the BCM6846 Processor Monitor Bus
This commit adds Device Tree binding schemas and header constants for the Broadcom BCM6846 Processor Monitor Bus (PMB) and its clock, hwmon, power, and reset child controllers.
Quoted 6 lines
Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml new file +0
-0@@ -0,0 +1,42 @@
[ ... ]
Quoted 15 lines
Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml new file +15
-0+allOf: + - $ref: /schemas/thermal/thermal-sensor.yaml# + +properties: + compatible: + const: brcm,bcm6846-pmb-pvtmon + + clocks: + maxItems: 1 + description: PVTMON acquisition clock + + resets: + maxItems: 1 + description: PVTMON analog-acquisition reset +
Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml line 42
Quoted 10 lines
Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml new file +10
-0+ '#thermal-sensor-cells': + const: 0 + +required: + - compatible + - clocks + - resets + - '#thermal-sensor-cells' + +additionalProperties: false
[Severity: Low]
Should this schema use unevaluatedProperties: false instead of
additionalProperties: false? Because it references /schemas/thermal/thermal-sensor.yaml# via allOf, additionalProperties: false prevents properties defined only in the referenced schema from being evaluated cleanly.
Quoted 6 lines
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml +0
-0@@ -60,6 +60,11 @@ examples: compatible = "brcm,bcm6846-pmb";
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml examples: · line 70
Quoted 10 lines
Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml +5
-0reg = <0x20100 0x200>; + pmb_power: power-controller { + compatible = "brcm,bcm6846-pmb-power"; + #power-domain-cells = <1>; + }; + pmb_clk: clock-controller { compatible = "brcm,bcm6846-pmb-clock"; clocks = <&osc50m>;
[Severity: Low]
Should this commit be ordered before commit "dt-bindings: mfd: Describe the BCM6846 PMC complex"?
That earlier commit introduces brcm,bcm6846-pmc.yaml referencing /schemas/soc/bcm/brcm,bcm6846-pmb.yaml# and including dt-bindings/clock/brcm,bcm6846-pmb.h and dt-bindings/reset/brcm,bcm6846-pmb.h before this commit adds them, which breaks make dt_binding_check bisectability at the parent commit. In addition, the commit message here still states that it describes the PMC and only mentions the power controller child, omitting the clock, reset, and PVTMON schemas and headers introduced in this patch.
Quoted 11 lines
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +5
-0@@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/bcm/brcm,bcm6846-pmb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml line 15
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Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +10
-0+ +title: Broadcom BCM6846 Processor Monitor Bus + +maintainers: + - Linus Walleij <[email protected]> + +description: + The Processor Monitor Bus (PMB) connects the third generation Power + Management Controller (PMC3) to the control registers of miscellaneous + independent hardware blocks.
[Severity: Low]
As reported by William Zhang on v2 [1], PMB stands for Power Management Bus rather than Processor Monitor Bus. The commit subject, commit message, and all five new binding schemas in this patch still expand PMB as Processor Monitor Bus.
[ ... ]
Quoted 5 lines
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +5
-0+ power-controller: + type: object + $ref: /schemas/power/brcm,bcm6846-pmb-power.yaml# + + clock-controller:
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml line 45
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Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +10
-0+ type: object + $ref: /schemas/clock/brcm,bcm6846-pmb-clock.yaml# + + reset-controller: + type: object + $ref: /schemas/reset/brcm,bcm6846-pmb-reset.yaml# + + hwmon: + type: object + $ref: /schemas/hwmon/brcm,bcm6846-pmb-pvtmon.yaml#
[Severity: Low]
As reported by Philipp Zabel on RFC [2], should #power-domain-cells, #clock-cells, #reset-cells, #thermal-sensor-cells, and the reference clock live directly on the brcm,bcm6846-pmb node instead of using four addressless child nodes?
Neither power-controller nor reset-controller has any DT resources of its own, and the power, clock, reset, and hwmon drivers all access shared 32-bit BPCM zone control and PVTMON_CONFIG registers over the parent PMB keyhole interface. Folding the provider cells into the brcm,bcm6846-pmb node avoids encoding the Linux MFD sub-driver split into the Device Tree ABI while still allowing the MFD driver to instantiate child devices internally.
[ ... ]
Quoted 14 lines
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +14
-0+ pmb_power: power-controller { + compatible = "brcm,bcm6846-pmb-power"; + #power-domain-cells = <1>; + }; + + pmb_clk: clock-controller { + compatible = "brcm,bcm6846-pmb-clock"; + clocks = <&osc50m>; + clock-names = "ref"; + #clock-cells = <1>; + }; + + pmb_reset: reset-controller { + compatible = "brcm,bcm6846-pmb-reset";
Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml line 90
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Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +10
-0+ #reset-cells = <1>; + }; + + hwmon { + compatible = "brcm,bcm6846-pmb-pvtmon"; + clocks = <&pmb_clk BCM6846_CLK_PVTMON>; + resets = <&pmb_reset BCM6846_RESET_PVTMON>; + #thermal-sensor-cells = <0>; + }; + };
[Severity: Low]
Does this example (and the matching example in brcm,bcm6846-pmc.yaml) trigger unused-labels and child-name-order warnings under scripts/dtc/dt-check-style --mode=strict? The pmb_power label is never referenced in the example, and the unaddressed child nodes under the PMB node are not in alphabetical order (clock-controller, hwmon, power-controller, reset-controller).
[1] https://lore.kernel.org/r/CAHi4H7GOMM9K6XG15vPyFMLOza3QQ7QPxUkCi85jA_e9D6YbKg@mail.gmail.com
[2] https://lore.kernel.org/r/[email protected]
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=2
William Zhang
maintainerRe: [PATCH v3 2/7] dt-bindings: soc: Describe the BCM6846 Processor Monitor Bus
In reply to Linus WalleijQuoted 3 lines · Linus Walleij
The third generation Power Management Controller (PMC3) accesses SoC block control and reset registers through the Processor Monitor Bus
Power Management Bus. Need to update all the instances in this patch series.
Quoted 421 lines
(PMB). Describe the BCM6846 PMC and PMB.
Describe the power controller child and all supported power domain IDs, including the combined XRDP, Runner and WAN domain.
Signed-off-by Linus Walleij <[email protected]>---
I considered even just using the PMB but the PMC has more stuff and it seems natural to let it live in a simple-mfd node.--- .../bindings/clock/brcm,bcm6846-pmb-clock.yaml | 39 ++++++++++ .../bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml | 42 ++++++++++ .../devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml | 5 ++ .../bindings/power/brcm,bcm6846-pmb-power.yaml | 44 +++++++++++ .../bindings/reset/brcm,bcm6846-pmb-reset.yaml | 31 ++++++++ .../bindings/soc/bcm/brcm,bcm6846-pmb.yaml | 90 ++++++++++++++++++++++ MAINTAINERS | 8 ++ include/dt-bindings/clock/brcm,bcm6846-pmb.h | 42 ++++++++++ include/dt-bindings/power/brcm,bcm6846-pmb.h | 12 +++ include/dt-bindings/reset/brcm,bcm6846-pmb.h | 11 +++ 10 files changed, 324 insertions(+)Documentation/devicetree/bindings/clock/brcm,bcm6846-pmb-clock.yaml new file +39
-0@@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/brcm,bcm6846-pmb-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6846 PMB clocks + +maintainers: + - Linus Walleij <[email protected]> + +description: + The Processor Monitor Bus (PMB) provides access to the RDP and BIU PLL + outputs, the Runner clock, the crystal output, the PVTMON acquisition + clock and the clock gates in block power-control zones. Clock indices + are defined in dt-bindings/clock/brcm,bcm6846-pmb.h. + The PLLs and crystal output use a 50 MHz reference clock. + Zone clocks require their associated blocks to be powered. + +properties: + compatible: + const: brcm,bcm6846-pmb-clock + + clocks: + maxItems: 1 + + clock-names: + const: ref + + '#clock-cells': + const: 1 + +required: + - compatible + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: falseDocumentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml new file +42
-0@@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/brcm,bcm6846-pmb-pvtmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6846 PMB process, voltage and temperature monitor + +maintainers: + - Linus Walleij <[email protected]> + +description: + The process, voltage and temperature monitor (PVTMON) is a child of + the Processor Monitor Bus (PMB) controller and uses its indirect + register interface. It measures die temperature and seven voltages, + including a diagnostic test input. + +allOf: + - $ref: /schemas/thermal/thermal-sensor.yaml# + +properties: + compatible: + const: brcm,bcm6846-pmb-pvtmon + + clocks: + maxItems: 1 + description: PVTMON acquisition clock + + resets: + maxItems: 1 + description: PVTMON analog-acquisition reset + + '#thermal-sensor-cells': + const: 0 + +required: + - compatible + - clocks + - resets + - '#thermal-sensor-cells' + +additionalProperties: falseDocumentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml +5
-0@@ -60,6 +60,11 @@ examples: compatible = "brcm,bcm6846-pmb"; reg = <0x20100 0x200>; + pmb_power: power-controller { + compatible = "brcm,bcm6846-pmb-power"; + #power-domain-cells = <1>; + }; + pmb_clk: clock-controller { compatible = "brcm,bcm6846-pmb-clock"; clocks = <&osc50m>;Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml new file +44
-0@@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/brcm,bcm6846-pmb-power.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6846 Processor Monitor Bus power controller + +maintainers: + - Linus Walleij <[email protected]> + +description: | + The power controller is a child of the Processor Monitor Bus (PMB) + controller and accesses BPCM power zones through the parent regmap. + A domain includes all power zones of a block. The XRDP domain groups + XRDP, its three Runner cores and WAN, matching the vendor power sequence. + + Domain IDs are defined in dt-bindings/power/brcm,bcm6846-pmb.h: + BCM6846_PD_PERIPH: peripheral block (bus 0, device 0, four zones) + BCM6846_PD_MEMC: memory controller (bus 1, device 8, one zone) + BCM6846_PD_USB20: USB 2.0 (bus 1, device 10, four zones) + BCM6846_PD_XRDP: XRDP (bus 1, device 12, three zones), Runner cores + (bus 1, devices 14, 15 and 16, one zone each) and WAN + (bus 1, device 11, three zones) + BCM6846_PD_PCIE0: PCIe 0 (bus 0, device 18, one zone) + BCM6846_PD_PCIE1: PCIe 1 (bus 0, device 19, one zone) + + Peripheral and memory domains remain powered because they provide + resources required for system operation. CPU and PLL blocks use different + register layouts and are outside the scope of this provider. + +properties: + compatible: + const: brcm,bcm6846-pmb-power + + '#power-domain-cells': + const: 1 + description: Power domain ID from dt-bindings/power/brcm,bcm6846-pmb.h + +required: + - compatible + - '#power-domain-cells' + +additionalProperties: falseDocumentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml new file +31
-0@@ -0,0 +1,31 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/brcm,bcm6846-pmb-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6846 Processor Monitor Bus reset controller + +maintainers: + - Linus Walleij <[email protected]> + +description: + The reset controller is a child of the Processor Monitor Bus (PMB) + controller and uses its indirect register interface. + + Each reset specifier identifies a logical reset group, which may span + several blocks that must be reset together. + +properties: + compatible: + const: brcm,bcm6846-pmb-reset + + '#reset-cells': + const: 1 + description: Reset group ID from dt-bindings/reset/brcm,bcm6846-pmb.h + +required: + - compatible + - '#reset-cells' + +additionalProperties: falseDocumentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml new file +90
-0@@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/bcm/brcm,bcm6846-pmb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6846 Processor Monitor Bus + +maintainers: + - Linus Walleij <[email protected]> + +description: + The Processor Monitor Bus (PMB) connects the third generation Power + Management Controller (PMC3) to the control registers of miscellaneous + independent hardware blocks. + + The controller provides configuration, arbitration and four keyhole + interfaces for indirect register access. + + Child nodes describe independent hardware blocks accessed over the PMB. + These provide global resources and even resources for each other. + +properties: + compatible: + const: brcm,bcm6846-pmb + + reg: + maxItems: 1 + description: PMB configuration, keyhole and address mapping registers + + power-controller: + type: object + $ref: /schemas/power/brcm,bcm6846-pmb-power.yaml# + + clock-controller: + type: object + $ref: /schemas/clock/brcm,bcm6846-pmb-clock.yaml# + + reset-controller: + type: object + $ref: /schemas/reset/brcm,bcm6846-pmb-reset.yaml# + + hwmon: + type: object + $ref: /schemas/hwmon/brcm,bcm6846-pmb-pvtmon.yaml# + +required: + - compatible + - reg + - power-controller + - clock-controller + - reset-controller + - hwmon + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/brcm,bcm6846-pmb.h> + #include <dt-bindings/reset/brcm,bcm6846-pmb.h> + + /* Processor Monitor Bus */ + bus@ffb20100 { + compatible = "brcm,bcm6846-pmb"; + reg = <0xffb20100 0x200>; + + pmb_power: power-controller { + compatible = "brcm,bcm6846-pmb-power"; + #power-domain-cells = <1>; + }; + + pmb_clk: clock-controller { + compatible = "brcm,bcm6846-pmb-clock"; + clocks = <&osc50m>; + clock-names = "ref"; + #clock-cells = <1>; + }; + + pmb_reset: reset-controller { + compatible = "brcm,bcm6846-pmb-reset"; + #reset-cells = <1>; + }; + + hwmon { + compatible = "brcm,bcm6846-pmb-pvtmon"; + clocks = <&pmb_clk BCM6846_CLK_PVTMON>; + resets = <&pmb_reset BCM6846_RESET_PVTMON>; + #thermal-sensor-cells = <0>; + }; + };MAINTAINERS +8
-0@@ -5447,7 +5447,15 @@ N: bcm[9]?6878 BROADCOM BCMBCA PMC3 PMB DRIVER M: Linus Walleij <[email protected]> S: Maintained +F: Documentation/devicetree/bindings/clock/brcm,bcm6846-pmb-clock.yaml +F: Documentation/devicetree/bindings/hwmon/brcm,bcm6846-pmb-pvtmon.yaml F: Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml +F: Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml +F: Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml +F: Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml +F: include/dt-bindings/clock/brcm,bcm6846-pmb.h +F: include/dt-bindings/power/brcm,bcm6846-pmb.h +F: include/dt-bindings/reset/brcm,bcm6846-pmb.h BROADCOM BDC DRIVER M: Justin Chen <[email protected]>include/dt-bindings/clock/brcm,bcm6846-pmb.h new file +42
-0@@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +#ifndef _DT_BINDINGS_CLOCK_BRCM_BCM6846_PMB_H +#define _DT_BINDINGS_CLOCK_BRCM_BCM6846_PMB_H + +#define BCM6846_CLK_RDPPLL_CH0 0 +#define BCM6846_CLK_RDPPLL_CH1 1 +#define BCM6846_CLK_RDPPLL_CH2 2 +#define BCM6846_CLK_RDPPLL_CH3 3 +#define BCM6846_CLK_RDPPLL_CH4 4 +#define BCM6846_CLK_RDPPLL_CH5 5 +#define BCM6846_CLK_BIUPLL_CH0 6 +#define BCM6846_CLK_BIUPLL_CH1 7 +#define BCM6846_CLK_BIUPLL_CH2 8 +#define BCM6846_CLK_BIUPLL_CH3 9 +#define BCM6846_CLK_BIUPLL_CH4 10 +#define BCM6846_CLK_BIUPLL_CH5 11 +#define BCM6846_CLK_RUNNER 12 +#define BCM6846_CLK_XTAL_OUT 13 +#define BCM6846_CLK_PVTMON 14 +#define BCM6846_CLK_PERIPH_ZONE0 15 +#define BCM6846_CLK_PERIPH_ZONE1 16 +#define BCM6846_CLK_PERIPH_ZONE2 17 +#define BCM6846_CLK_PERIPH_ZONE3 18 +#define BCM6846_CLK_MEMC 19 +#define BCM6846_CLK_USB_ZONE0 20 +#define BCM6846_CLK_USB_ZONE1 21 +#define BCM6846_CLK_USB_ZONE2 22 +#define BCM6846_CLK_USB_ZONE3 23 +#define BCM6846_CLK_WAN_ZONE0 24 +#define BCM6846_CLK_WAN_ZONE1 25 +#define BCM6846_CLK_WAN_ZONE2 26 +#define BCM6846_CLK_XRDP_ZONE0 27 +#define BCM6846_CLK_XRDP_ZONE1 28 +#define BCM6846_CLK_XRDP_ZONE2 29 +#define BCM6846_CLK_RUNNER0 30 +#define BCM6846_CLK_RUNNER1 31 +#define BCM6846_CLK_RUNNER2 32 +#define BCM6846_CLK_PCIE0 33 +#define BCM6846_CLK_PCIE1 34 +#define BCM6846_CLK_BIU 35 + +#endif include/dt-bindings/power/brcm,bcm6846-pmb.h new file +12
-0@@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +#ifndef _DT_BINDINGS_POWER_BCM6846_PMB_H +#define _DT_BINDINGS_POWER_BCM6846_PMB_H + +#define BCM6846_PD_PERIPH 0 +#define BCM6846_PD_MEMC 1 +#define BCM6846_PD_USB20 2 +#define BCM6846_PD_XRDP 3 +#define BCM6846_PD_PCIE0 4 +#define BCM6846_PD_PCIE1 5 + +#endif include/dt-bindings/reset/brcm,bcm6846-pmb.h new file +11
-1@@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +#ifndef _DT_BINDINGS_RESET_BRCM_BCM6846_PMB_H +#define _DT_BINDINGS_RESET_BRCM_BCM6846_PMB_H + +/* XRDP packet engine and its three Runner cores. */ +#define BCM6846_RESET_XRDP 0 + +/* Process, voltage and temperature monitor analog acquisition reset. */ +#define BCM6846_RESET_PVTMON 1 + +#endif --2.56.0
PATCH v3 3/7 mfd: bcmbca-pmb: Add a shared BCMBCA PMC3 PMB transport
In reply to Linus WalleijAdd an MFD driver for shared access to the Processor Monitor Bus (PMB) of the third generation Power Management Controller (PMC3), initially for BCM6846.
Expose an uncached regmap to all children, encoding the bus, device and word offset in each register address. Keep keyhole semaphore acquisition and transaction recovery inside the MFD driver.
A software timeout does not abort a transaction. If the keyhole is still busy, retain its hardware lock and reject new callers until delayed work observes completion and releases it.
The keyhole register layout differs from older Broadcom PMB controllers. Match only BCM6846 for now.
--- MAINTAINERS | 2 + drivers/mfd/Kconfig | 11 ++ drivers/mfd/Makefile | 1 + drivers/mfd/bcmbca_pmc3_pmb.c | 286 +++++++++++++++++++++++++++++++++++++++++ include/linux/mfd/bcmbca-pmb.h | 11 ++ 5 files changed, 311 insertions(+)
MAINTAINERS +2 -0
@@ -5453,9 +5453,11 @@ F: Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml F: Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml F: Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml F: Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml +F: drivers/mfd/bcmbca_pmc3_pmb.c F: include/dt-bindings/clock/brcm,bcm6846-pmb.h F: include/dt-bindings/power/brcm,bcm6846-pmb.h F: include/dt-bindings/reset/brcm,bcm6846-pmb.h +F: include/linux/mfd/bcmbca-pmb.h BROADCOM BDC DRIVER M: Justin Chen <[email protected]>
drivers/mfd/Kconfig +11 -0
@@ -173,6 +173,17 @@ config MFD_ATMEL_SMC bool select MFD_SYSCON +config MFD_BCMBCA_PMB + bool "Broadcom BCMBCA Processor Monitor Bus" + depends on ARCH_BCMBCA || COMPILE_TEST + depends on OF + select MFD_CORE + select REGMAP + help + Provide shared Processor Monitor Bus (PMB) access through the third + generation Power Management Controller (PMC3), initially on + BCM6846. + config MFD_BCM590XX tristate "Broadcom BCM590xx PMUs" select MFD_CORE
drivers/mfd/Makefile +1 -0
@@ -11,6 +11,7 @@ obj-$(CONFIG_MFD_88PM886_PMIC) += 88pm886.o obj-$(CONFIG_MFD_ACT8945A) += act8945a.o obj-$(CONFIG_MFD_SM501) += sm501.o obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o +obj-$(CONFIG_MFD_BCMBCA_PMB) += bcmbca_pmc3_pmb.o obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o obj-$(CONFIG_MFD_BQ257XX) += bq257xx.o
drivers/mfd/bcmbca_pmc3_pmb.c new file +286 -0
286 lines not on this page · raw message
include/linux/mfd/bcmbca-pmb.h new file +11 -0
@@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __LINUX_MFD_BCMBCA_PMB_H +#define __LINUX_MFD_BCMBCA_PMB_H + +#include <linux/types.h> + +/* Logical regmap addresses: 8-bit bus, 8-bit device, 16-bit word offset. */ +#define BCMBCA_PMB_REG (bus, device, offset) \ + (((u32)(bus) << 24) | ((u32)(device) << 16) | (offset)) + +#endif
Signature · 1 line
2.56.0
[email protected]
AI reviewRe: [PATCH v3 3/7] mfd: bcmbca-pmb: Add a shared BCMBCA PMC3 PMB transport
Thank you for your contribution! Sashiko AI review found 1 potential issue to consider: - [Medium] mfd: bcmbca_pmc3_pmb: debugfs stall, WARN_ON, and HW read in regmap init --
Thank you for your contribution! Sashiko AI review found 1 potential issue to consider:
- [Medium] mfd: bcmbca_pmc3_pmb: debugfs stall, WARN_ON, and HW read in regmap init
--
commit df29cb4d33202540fcf38b25c63a3a8cd862dcfb
Author: Linus Walleij <[email protected]>
mfd: bcmbca-pmb: Add a shared BCMBCA PMC3 PMB transport
This commit adds an MFD driver for the Broadcom BCMBCA PMC3 Processor Monitor Bus (PMB) that exposes a shared uncached regmap to child devices.
Quoted 5 lines
drivers/mfd/bcmbca_pmc3_pmb.c new file +0
-0
[ ... ]
Quoted 5 lines
drivers/mfd/bcmbca_pmc3_pmb.c new file +5
-0+static bool bcmbca_pmb_precious_reg (struct device *dev,unsigned int reg) +{ +/* Do not let debugfs probe unimplemented or firmware-owned registers. */ +return true; +}
drivers/mfd/bcmbca_pmc3_pmb.c line 183
Quoted 10 lines
drivers/mfd/bcmbca_pmc3_pmb.c new file +10
-0+ +static struct regmap *bcmbca_pmb_regmap_init (struct bcmbca_pmb *pmb) +{ +const struct regmap_config config = { + .reg_bits =32 , + .val_bits =32 , + .reg_stride =1 , + .max_register =BCMBCA_PMB_REG (3 ,255 ,65535 ), + .cache_type =REGCACHE_NONE , + .precious_reg = bcmbca_pmb_precious_reg,
[Severity: Medium]
Does marking every register precious in bcmbca_pmb_precious_reg() while setting max_register to BCMBCA_PMB_REG(3, 255, 65535) (0x03ffffff) with reg_stride = 1 cause a 67M-iteration stall, a WARN_ON(), and an unintended hardware read when the regmap debugfs files are read?
When the debugfs "registers" or "range" file is read, regmap_debugfs_get_dump_start() scans all 67,108,864 addresses from 0 to map->max_register under map->cache_lock. Because regmap_printable() is false for every address, map->debugfs_off_cache stays empty, WARN_ON(list_empty(&map->debugfs_off_cache)) fires on every read, and regmap_debugfs_get_dump_start() returns base (0). regmap_read_debugfs() then starts its loop at start_reg (0) without checking regmap_printable() on the first iteration and calls regmap_read(map, 0, &val), issuing a hardware PMB read to BCMBCA_PMB_REG(0, 0, 0).
In addition, because neither readable_reg nor writeable_reg is set, reading the debugfs "access" file causes regmap_access_show() to format all 67,108,864 addresses into a single_open() seq_file buffer until a >1 GiB allocation fails with -ENOMEM.
Omitting max_register and precious_reg from config (leaving max_register at 0 without max_register_is_0) avoids creating the debugfs "registers", "range", and "access" files while bcmbca_pmb_op() continues to validate the bus and offset bounds.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=3
PATCH v3 4/7 pmdomain: bcm: Add BCMBCA PMB power domains
In reply to Linus WalleijImplement BCM6846 BPCM power domains.
Group XRDP, its three Runner cores and WAN in vendor xrdp_pmb[] order, so consumers can power the complete packet engine before resetting it.
Also expose peripheral, memory, USB and PCIe domains. Keep the peripheral and memory domains always on; exclude CPU and PLL blocks with different register layouts.
--- MAINTAINERS | 1 + drivers/pmdomain/bcm/Kconfig | 10 ++ drivers/pmdomain/bcm/Makefile | 1 + drivers/pmdomain/bcm/bcmbca-pmb.c | 279 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 291 insertions(+)
MAINTAINERS +1 -0
@@ -5454,6 +5454,7 @@ F: Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml F: Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml F: Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml F: drivers/mfd/bcmbca_pmc3_pmb.c +F: drivers/pmdomain/bcm/bcmbca-pmb.c F: include/dt-bindings/clock/brcm,bcm6846-pmb.h F: include/dt-bindings/power/brcm,bcm6846-pmb.h F: include/dt-bindings/reset/brcm,bcm6846-pmb.h
drivers/pmdomain/bcm/Kconfig +10 -0
@@ -31,6 +31,16 @@ config BCM_PMB This enables support for the Broadcom's PMB (Power Management Bus) that is used for disabling and enabling SoC devices. +config BCMBCA_PMB_POWER + bool "Broadcom BCMBCA PMB power domains" + depends on MFD_BCMBCA_PMB + depends on PM + default MFD_BCMBCA_PMB + select PM_GENERIC_DOMAINS + help + Provide power domains for BCM6846 blocks through the shared PMC3 + Processor Monitor Bus regmap, including the XRDP packet processor. + config BCM63XX_POWER bool "BCM63xx power domain driver" depends on BMIPS_GENERIC || (COMPILE_TEST && OF)
drivers/pmdomain/bcm/Makefile +1 -0
@@ -3,3 +3,4 @@ obj-$(CONFIG_BCM_PMB) += bcm-pmb.o obj-$(CONFIG_BCM2835_POWER) += bcm2835-power.o obj-$(CONFIG_BCM63XX_POWER) += bcm63xx-power.o obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o +obj-$(CONFIG_BCMBCA_PMB_POWER) += bcmbca-pmb.o
drivers/pmdomain/bcm/bcmbca-pmb.c new file +279 -0
279 lines not on this page · raw message
Signature · 1 line
2.56.0
[email protected]
AI reviewRe: [PATCH v3 4/7] pmdomain: bcm: Add BCMBCA PMB power domains
Sashiko has reviewed this patch and found no issues.
Quoted 10 lines
Implement BCM6846 BPCM power domains.
Group XRDP, its three Runner cores and WAN in vendor xrdp_pmb[] order, so consumers can power the complete packet engine before resetting it.
Also expose peripheral, memory, USB and PCIe domains. Keep the peripheral and memory domains always on; exclude CPU and PLL blocks with different register layouts.
Signed-off-by Linus Walleij <[email protected]>
Sashiko has reviewed this patch and found no issues.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=4
PATCH v3 5/7 reset: Add BCMBCA block resets through the PMB
In reply to Linus WalleijImplement the BCM6846 XRDP reset group through the shared PMB regmap. Assert all blocks before releasing any of them, preserving the vendor reset masks and ordering. Provide the independent PVTMON acquisition reset as well. Serialize complete sequences and hold blocks in reset on failure.
Power domain consumers must enable their domains before requesting a reset. Zone transitions belong to the PMB power domain subdriver.
--- MAINTAINERS | 1 + drivers/reset/Kconfig | 13 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-bcmbca-pmb.c | 243 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 258 insertions(+)
MAINTAINERS +1 -0
@@ -5455,6 +5455,7 @@ F: Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml F: Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml F: drivers/mfd/bcmbca_pmc3_pmb.c F: drivers/pmdomain/bcm/bcmbca-pmb.c +F: drivers/reset/reset-bcmbca-pmb.c F: include/dt-bindings/clock/brcm,bcm6846-pmb.h F: include/dt-bindings/power/brcm,bcm6846-pmb.h F: include/dt-bindings/reset/brcm,bcm6846-pmb.h
drivers/reset/Kconfig +13 -0
@@ -49,6 +49,19 @@ config RESET_BCM6345 help This enables the reset controller driver for BCM6345 SoCs. +config RESET_BCMBCA_PMB + tristate "Broadcom BCMBCA PMB reset controller" + depends on ARCH_BCMBCA || COMPILE_TEST + depends on OF && HAS_IOMEM + depends on MFD_BCMBCA_PMB + select REGMAP + default MFD_BCMBCA_PMB + help + Reset BCMBCA blocks through the Processor Monitor Bus (PMB) of + the third generation Power Management Controller (PMC3). + + The module will be called reset-bcmbca-pmb. + config RESET_BERLIN tristate "Berlin Reset Driver" depends on ARCH_BERLIN || COMPILE_TEST
drivers/reset/Makefile +1 -0
@@ -11,6 +11,7 @@ obj-$(CONFIG_RESET_ASPEED) += reset-aspeed.o obj-$(CONFIG_RESET_ATH79) += reset-ath79.o obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o +obj-$(CONFIG_RESET_BCMBCA_PMB) += reset-bcmbca-pmb.o obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o
drivers/reset/reset-bcmbca-pmb.c new file +243 -0
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[email protected]
AI reviewRe: [PATCH v3 5/7] reset: Add BCMBCA block resets through the PMB
Thank you for your contribution! Sashiko AI review found 1 potential issue to consider: - [Low] reset: bcmbca-pmb: redundant reset callback in bcmbca_pmb_reset_group --
Thank you for your contribution! Sashiko AI review found 1 potential issue to consider:
- [Low] reset: bcmbca-pmb: redundant reset callback in bcmbca_pmb_reset_group
--
commit cb99ec1412a9c3107e489e88034ee115dfafb214
Author: Linus Walleij <[email protected]>
reset: Add BCMBCA block resets through the PMB
This commit adds a reset controller driver for Broadcom BCMBCA blocks controlled through the PMC3 Processor Monitor Bus regmap, implementing the BCM6846 XRDP reset group and PVTMON acquisition reset.
Quoted 6 lines
drivers/reset/reset-bcmbca-pmb.c new file +0
-0@@ -0,0 +1,243 @@
[ ... ]
Quoted 11 lines
drivers/reset/reset-bcmbca-pmb.c new file +11
-0+struct bcmbca_pmb_reset ; + +struct bcmbca_pmb_reset_group { +const char *name; +int (*reset)(struct bcmbca_pmb_reset *rst, +const struct bcmbca_pmb_reset_group *group); +const struct bcmbca_pmb_reset_block *blocks; +unsigned int num_blocks; +/* Minimum reset assertion hold time in microseconds. */ +unsigned int assert_hold_us; +};
[ ... ]
Quoted 16 lines
drivers/reset/reset-bcmbca-pmb.c new file +16
-0+static const struct bcmbca_pmb_reset_group bcm6846_pmb_reset_groups[] = { + [BCM6846_RESET_XRDP ] = { + .name ="XRDP" , + .reset = bcmbca_pmb_reset_sequence, + .blocks = bcm6846_xrdp_resets, + .num_blocks =ARRAY_SIZE (bcm6846_xrdp_resets), + .assert_hold_us =10 , + }, + [BCM6846_RESET_PVTMON ] = { + .name ="PVTMON" , + .reset = bcmbca_pmb_reset_sequence, + .blocks = &bcm6846_pvtmon_reset, + .num_blocks =1 , + .assert_hold_us =1000 , + }, +};
[ ... ]
Quoted 4 lines
drivers/reset/reset-bcmbca-pmb.c new file +4
-0+static int bcmbca_pmb_reset (struct reset_controller_dev *rcdev,unsigned long id) +{ + struct bcmbca_pmb_reset *rst = container_of(rcdev, struct bcmbca_pmb_reset, rcdev); +const struct bcmbca_pmb_reset_group *group;
drivers/reset/reset-bcmbca-pmb.c line 194
Quoted 10 lines
drivers/reset/reset-bcmbca-pmb.c new file +10
-0+ +if (id >= rst->variant->num_groups) +return -EINVAL ; + group = &rst->variant->groups[id]; +if (!group->reset) +return -EINVAL ; + +guard (mutex)(&rst->lock); +return group->reset (rst, group); +}
[Severity: Low]
As reported by Philipp Zabel on RFC [1], is the reset callback pointer in struct bcmbca_pmb_reset_group still needed now that XRDP zone power transitions live in the PMB power domain driver?
Every entry in bcm6846_pmb_reset_groups[] sets .reset to bcmbca_pmb_reset_sequence, so bcmbca_pmb_reset() could call bcmbca_pmb_reset_sequence(rst, group) directly and drop the callback field along with the forward declarations of struct bcmbca_pmb_reset and bcmbca_pmb_reset_sequence().
[1] https://lore.kernel.org/r/[email protected]
Signature · 1 line
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Philipp Zabel
maintainerRe: [PATCH v3 5/7] reset: Add BCMBCA block resets through the PMB
In reply to Linus WalleijQuoted 8 lines · Linus Walleij
Implement the BCM6846 XRDP reset group through the shared PMB regmap. Assert all blocks before releasing any of them, preserving the vendor reset masks and ordering. Provide the independent PVTMON acquisition reset as well. Serialize complete sequences and hold blocks in reset on failure.
Power domain consumers must enable their domains before requesting a reset.
Before requesting or before (de)asserting?
Quoted 1 line
Zone transitions belong to the PMB power domain subdriver.
Why mention it here?
Quoted 8 lines
Signed-off-by Linus Walleij <[email protected]>--- MAINTAINERS | 1 + drivers/reset/Kconfig | 13 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-bcmbca-pmb.c | 243 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 258 insertions(+)
[...]
Quoted 6 lines
drivers/reset/reset-bcmbca-pmb.c new file +0
-0@@ -0,0 +1,243 @@
[...]
drivers/reset/reset-bcmbca-pmb.c line 35
Quoted 4 lines
drivers/reset/reset-bcmbca-pmb.c new file +4
-0+struct bcmbca_pmb_reset_group { +const char *name; +int (*reset)(struct bcmbca_pmb_reset *rst, +const struct bcmbca_pmb_reset_group *group);
This is again an unnecessary indirection.
[...]
Quoted 36 lines
drivers/reset/reset-bcmbca-pmb.c new file +36
-0+static int bcmbca_pmb_reset_sequence (struct bcmbca_pmb_reset *rst, +const struct bcmbca_pmb_reset_group *group) +{ +const struct bcmbca_pmb_reset_block *block; +enum { +PASS_ASSERT , +PASS_DEASSERT , + } pass; +unsigned int i; +int ret; + +if (!group->num_blocks) +return -EINVAL ; + +/* Assert every block before releasing any of them. */ +for (pass =PASS_ASSERT ; pass <=PASS_DEASSERT ; pass++) { +for (i =0 ; i < group->num_blocks; i++) { + block = &group->blocks[i]; + ret =regmap_update_bits (rst->regmap, +BCMBCA_PMB_REG (block->bus, block->device, + block->offset), block->mask, + pass ==PASS_DEASSERT ? block->deassert_value : + block->assert_value); +if (ret) + goto cleanup; + } +if (pass ==PASS_ASSERT && group->assert_hold_us) +usleep_range (group->assert_hold_us, group->assert_hold_us *2 ); + } +cleanup: +if (ret) { +dev_err (rst->rcdev.dev,"%s %s failed at PMB bus %u device %u: %d\n" , + group->name,str_assert_deassert (pass ==PASS_ASSERT ), + block->bus, block->device, ret); +bcmbca_pmb_reset_cleanup (rst, group); + }
drivers/reset/reset-bcmbca-pmb.c line 187
Quoted 10 lines
drivers/reset/reset-bcmbca-pmb.c new file +10
-0+return ret; +} + +static int bcmbca_pmb_reset (struct reset_controller_dev *rcdev,unsigned long id) +{ + struct bcmbca_pmb_reset *rst = container_of(rcdev, struct bcmbca_pmb_reset, rcdev); +const struct bcmbca_pmb_reset_group *group; + +if (id >= rst->variant->num_groups) +return -EINVAL ;
Since .nr_resets is set to rst->variant->num_groups, this was already checked by fwnode_reset_simple_xlate() before the reset controller was created.
drivers/reset/reset-bcmbca-pmb.c line 193
Quoted 6 lines
drivers/reset/reset-bcmbca-pmb.c new file +6
-0+ group = &rst->variant->groups[id]; +if (!group->reset) +return -EINVAL ; + +guard (mutex)(&rst->lock); +return group->reset (rst, group);
Call bcmbca_pmb_reset_sequence() directly or fold it in here.
Quoted 18 lines
drivers/reset/reset-bcmbca-pmb.c new file +18
-0+} + +static const struct reset_control_ops bcmbca_pmb_reset_ops = { + .reset = bcmbca_pmb_reset, +}; + +static int bcmbca_pmb_reset_probe (struct platform_device *pdev) +{ +struct device *dev = &pdev->dev; +struct regmap *regmap =dev_get_regmap (dev->parent,NULL ); +struct bcmbca_pmb_reset *rst; + +if (!regmap) +return -ENODEV ; + + rst =devm_kzalloc (dev,sizeof (*rst),GFP_KERNEL ); +if (!rst) +return -ENOMEM ;
drivers/reset/reset-bcmbca-pmb.c line 221
Quoted 10 lines
drivers/reset/reset-bcmbca-pmb.c new file +10
-0+ rst->variant =device_get_match_data (dev); +if (!rst->variant) +return -ENODEV ; + rst->regmap = regmap; +mutex_init (&rst->lock); + rst->rcdev.owner =THIS_MODULE ; + rst->rcdev.dev = dev; + rst->rcdev.ops = &bcmbca_pmb_reset_ops; + rst->rcdev.of_node = dev->of_node; + rst->rcdev.of_reset_n_cells =1 ;
Do not set of_reset_n_cells, .of_xlate isn't set either.
reset_controller_register() sets .fwnode_xlate = fwnode_reset_simple_xlate() and fwnode_reset_n_cells = 1 by default, of_reset_n_cells will be ignored in this case.
Quoted 6 lines
drivers/reset/reset-bcmbca-pmb.c new file +6
-0+ rst->rcdev.nr_resets = rst->variant->num_groups; +return devm_reset_controller_register (dev, &rst->rcdev); +} + +static const struct of_device_id bcmbca_pmb_reset_of_match[] = { + { .compatible ="brcm,bcm6846-pmb-reset" , .data = &bcm6846_pmb_variant },
drivers/reset/reset-bcmbca-pmb.c line 237
Quoted 10 lines
drivers/reset/reset-bcmbca-pmb.c new file +10
-0+ { } +}; +MODULE_DEVICE_TABLE (of, bcmbca_pmb_reset_of_match); + +static struct platform_driver bcmbca_pmb_reset_driver = { + .probe = bcmbca_pmb_reset_probe, + .driver = { + .name ="brcm-pmb-reset" , + .of_match_table = bcmbca_pmb_reset_of_match, + .suppress_bind_attrs = true,
This is new. Why?
regards
Philipp
Re: [PATCH v3 5/7] reset: Add BCMBCA block resets through the PMB
Quoted 8 lines · Philipp Zabel
Quoted 6 lines · Linus Walleij
Implement the BCM6846 XRDP reset group through the shared PMB regmap. Assert all blocks before releasing any of them, preserving the vendor reset masks and ordering. Provide the independent PVTMON acquisition reset as well. Serialize complete sequences and hold blocks in reset on failure.
Quoted 4 lines
Quoted 2 lines
Power domain consumers must enable their domains before requesting a reset.
Before requesting or before (de)asserting?
Before (de)asserting, I'll clarify or just drop the comments because it's kinda obvious.
Quoted 3 lines
Quoted 1 line
Zone transitions belong to the PMB power domain subdriver.
Why mention it here?
Thinking aloud while working on the whole patch series.
Quoted 8 lines
drivers/reset/reset-bcmbca-pmb.c line 237
Quoted 6 lines
drivers/reset/reset-bcmbca-pmb.c new file +6
-0+static struct platform_driver bcmbca_pmb_reset_driver = { + .probe = bcmbca_pmb_reset_probe, + .driver = { + .name ="brcm-pmb-reset" , + .of_match_table = bcmbca_pmb_reset_of_match, + .suppress_bind_attrs = true,This is new. Why?
Other patches in the series got review comments (I think from Sashiko) that as usual it is possible to build a system where you can wreac havoc in sysfs by interectively unbinding and binding the drivers if you wanna, and it's seen as a bad thing.
So I made the same change everywhere.
I'll look into the rest of the comments and (hjopefully) fix them.
Yours,
Linus Walleij
PATCH v3 6/7 clk: bcm: Add BCMBCA PMB clocks
In reply to Linus WalleijAdd a BCM6846 clock provider for the Processor Monitor Bus (PMB) MFD cell. Expose six outputs from each of the RDP and BIU PLLs, the Runner clock divided from RDP PLL channel 1, the crystal output, PVTMON and block-zone clock gates.
PVTMON and zone clocks provide gate control only.
--- MAINTAINERS | 1 + drivers/clk/bcm/Kconfig | 11 ++ drivers/clk/bcm/Makefile | 1 + drivers/clk/bcm/clk-bcmbca-pmb.c | 388 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 401 insertions(+)
MAINTAINERS +1 -0
@@ -5453,6 +5453,7 @@ F: Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml F: Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml F: Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml F: Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml +F: drivers/clk/bcm/clk-bcmbca-pmb.c F: drivers/mfd/bcmbca_pmc3_pmb.c F: drivers/pmdomain/bcm/bcmbca-pmb.c F: drivers/reset/reset-bcmbca-pmb.c
drivers/clk/bcm/Kconfig +11 -0
@@ -1,5 +1,16 @@ # SPDX-License-Identifier: GPL-2.0-only +config CLK_BCMBCA_PMB + tristate "Broadcom BCMBCA PMB clocks" + depends on MFD_BCMBCA_PMB + select REGMAP + default MFD_BCMBCA_PMB + help + Provide BCM6846 PLL output, Runner, crystal, PVTMON and block-zone + clocks through the Processor Monitor Bus. + + The module will be called clk-bcmbca-pmb. + config CLK_BCM2711_DVP tristate "Broadcom BCM2711 DVP support" depends on ARCH_BCM2835 ||COMPILE_TEST
drivers/clk/bcm/Makefile +1 -0
@@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_CLK_BCMBCA_PMB) += clk-bcmbca-pmb.o obj-$(CONFIG_CLK_BCM_63XX) += clk-bcm63xx.o obj-$(CONFIG_CLK_BCM_63XX_GATE) += clk-bcm63xx-gate.o obj-$(CONFIG_CLK_BCM63268_TIMER) += clk-bcm63268-timer.o
drivers/clk/bcm/clk-bcmbca-pmb.c new file +388 -0
388 lines not on this page · raw message
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2.56.0
[email protected]
AI reviewRe: [PATCH v3 6/7] clk: bcm: Add BCMBCA PMB clocks
Sashiko has reviewed this patch and found no issues.
Quoted 8 lines
Add a BCM6846 clock provider for the Processor Monitor Bus (PMB) MFD cell. Expose six outputs from each of the RDP and BIU PLLs, the Runner clock divided from RDP PLL channel 1, the crystal output, PVTMON and block-zone clock gates.
PVTMON and zone clocks provide gate control only.
Signed-off-by Linus Walleij <[email protected]>
Sashiko has reviewed this patch and found no issues.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=6
PATCH v3 7/7 hwmon: Add Broadcom PMB PVTMON monitoring
In reply to Linus WalleijExpose the BCM6846 die temperature and seven voltage inputs through hwmon using the shared Processor Monitor Bus (PMB) regmap.
Register the temperature channel with the thermal framework so existing zero-cell device-tree thermal sensor references work.
Poll for valid samples with a bounded timeout, releasing the PMB lock between reads. Report temperature in millidegrees Celsius, including negative values, and voltages in millivolts.
--- Documentation/hwmon/bcm_pmb_pvtmon.rst | 53 ++++++++ Documentation/hwmon/index.rst | 1 + MAINTAINERS | 2 + drivers/hwmon/Kconfig | 18 +++ drivers/hwmon/Makefile | 1 + drivers/hwmon/bcm_pmb_pvtmon.c | 231 +++++++++++++++++++++++++++++++++ 6 files changed, 306 insertions(+)
Documentation/hwmon/bcm_pmb_pvtmon.rst new file +53 -0
@@ -0,0 +1,53 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Kernel driver bcm_pmb_pvtmon +============================ + +Supported chips: + + * Broadcom BCM6846 PVTMON + + Access: Processor Monitor Bus (PMB), bus 1, device 6 + +Author: Linus Walleij <[email protected]> + +Description +----------- + +The process, voltage and temperature monitor (PVTMON) measures die +temperature and seven voltage inputs. The driver uses the shared PMB MFD +transport and obtains its clock and reset from the sibling providers. + +With CONFIG_THERMAL_OF enabled, the temperature channel also supplies +device-tree thermal zones. The PVTMON node uses #thermal-sensor-cells = <0>; +voltage inputs do not have thermal sensor indices. + +Sysfs attributes +---------------- + +All attributes are read-only. Temperature is reported in millidegrees +Celsius and voltages in millivolts, using the BCM6846 vendor conversion +formulas and input-divider ratios. + +================ ================================ +Attribute Description +================ ================================ +temp1_input Die temperature +in0_input First 0.85 V input +in1_input Second 0.85 V input +in2_input VIN input +in3_input 1.0 V input +in4_input 1.8 V input +in5_input 3.3 V input +in6_input Diagnostic test input +in0_label V0.85_1 +in1_label V0.85_2 +in2_label VIN +in3_label V1.0 +in4_label V1.8 +in5_label V3.3 +in6_label Vtest +================ ================================ + +Labels follow the vendor channel names. Vtest is a diagnostic ADC input, +not a supply rail. The driver does not change the analog test routing.
Documentation/hwmon/index.rst +1 -0
@@ -54,6 +54,7 @@ Hardware Monitoring Kernel Drivers axiado-pwm-fan axiado-tsadc bcm54140 + bcm_pmb_pvtmon bel-pfe bpa-rs600 cgbc-hwmon
MAINTAINERS +2 -0
@@ -5453,7 +5453,9 @@ F: Documentation/devicetree/bindings/mfd/brcm,bcm6846-pmc.yaml F: Documentation/devicetree/bindings/power/brcm,bcm6846-pmb-power.yaml F: Documentation/devicetree/bindings/reset/brcm,bcm6846-pmb-reset.yaml F: Documentation/devicetree/bindings/soc/bcm/brcm,bcm6846-pmb.yaml +F: Documentation/hwmon/bcm_pmb_pvtmon.rst F: drivers/clk/bcm/clk-bcmbca-pmb.c +F: drivers/hwmon/bcm_pmb_pvtmon.c F: drivers/mfd/bcmbca_pmc3_pmb.c F: drivers/pmdomain/bcm/bcmbca-pmb.c F: drivers/reset/reset-bcmbca-pmb.c
drivers/hwmon/Kconfig +18 -0
@@ -334,6 +334,24 @@ config SENSORS_AXIADO_TSADC This driver can also be built as a module. If so, the module will be called axiado-tsadc. +config SENSORS_BCM_PMB_PVTMON + tristate "Broadcom PMB PVTMON hardware monitoring" + depends on ARCH_BCMBCA || COMPILE_TEST + depends on MFD_BCMBCA_PMB + depends on COMMON_CLK + depends on RESET_CONTROLLER + select CLK_BCMBCA_PMB + select RESET_BCMBCA_PMB + select REGMAP + default MFD_BCMBCA_PMB + help + Enable temperature and voltage monitoring through the Processor + Monitor Bus on Broadcom BCM6846. With THERMAL_OF enabled, the + temperature channel also supplies the thermal zones described in + the device tree. + + This driver can also be built as a module called bcm_pmb_pvtmon. + config SENSORS_K8TEMP tristate "AMD Athlon64/FX or Opteron temperature sensor" depends on X86 && PCI
drivers/hwmon/Makefile +1 -0
@@ -62,6 +62,7 @@ obj-$(CONFIG_SENSORS_ATXP1) += atxp1.o obj-$(CONFIG_SENSORS_AXI_FAN_CONTROL) += axi-fan-control.o obj-$(CONFIG_SENSORS_AXIADO_PWM_FAN) += axiado-pwm-fan.o obj-$(CONFIG_SENSORS_AXIADO_TSADC) += axiado-tsadc.o +obj-$(CONFIG_SENSORS_BCM_PMB_PVTMON) += bcm_pmb_pvtmon.o obj-$(CONFIG_SENSORS_CGBC) += cgbc-hwmon.o obj-$(CONFIG_SENSORS_CHIPCAP2) += chipcap2.o obj-$(CONFIG_SENSORS_CORETEMP) += coretemp.o
drivers/hwmon/bcm_pmb_pvtmon.c new file +231 -0
231 lines not on this page · raw message
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2.56.0
[email protected]
AI reviewRe: [PATCH v3 7/7] hwmon: Add Broadcom PMB PVTMON monitoring
Sashiko has reviewed this patch and found no issues.
Quoted 6 lines
Expose the BCM6846 die temperature and seven voltage inputs through hwmon using the shared Processor Monitor Bus (PMB) regmap.
Register the temperature channel with the thermal framework so existing zero-cell device-tree thermal sensor references work.
Quoted 6 lines
Poll for valid samples with a bounded timeout, releasing the PMB lock between reads. Report temperature in millidegrees Celsius, including negative values, and voltages in millivolts.
Acked-by Guenter Roeck <[email protected]>Signed-off-by Linus Walleij <[email protected]>
Sashiko has reviewed this patch and found no issues.
Signature · 1 line
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=7