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dt-bindings: arm: rockchip: Add MNT Reform 2 (RCORE)

PATCH Superseded Patrick Wildt 2 participants 5 messages Feb 17, 2025 – Mar 1, 2025

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Device tree bindings Arm Rockchip

v4 of 5 Superseded Latest is v5 →

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Patrick Wildt

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#0 lore raw

PATCH v4 1/2 dt-bindings: arm: rockchip: Add MNT Reform 2 (RCORE)

Document board compatible bindings for the MNT Reform 2 with it's RCORE SoM, which is based on Firefly's iCore-3588Q.

Signed-off-by Patrick Wildt <[email protected]>
Acked-by Krzysztof Kozlowski <[email protected]>

---
Changes for v4:
- Added acked-by
Changes for v3:
- Split DT as it's based on a Firefly iCore-3588Q SoM Changes for v2:
- No changes

 Documentation/devicetree/bindings/arm/rockchip.yaml | 7 +++++++
 1 file changed, 7 insertions(+)
Documentation/devicetree/bindings/arm/rockchip.yaml +7 -0
index 522a6f0450ea..e21c5c8fc2a3 100644
@@ -178,6 +178,13 @@ properties:
           - const: engicam,px30-core
           - const: rockchip,px30
 
+      - description: Firefly iCore-3588Q-based boards
+        items:
+          - enum:
+              - mntre,reform2-rcore
+          - const: firefly,icore-3588q
+          - const: rockchip,rk3588
+
       - description: Firefly Core-3588J-based boards
         items:
           - enum:
Signature · 1 line
2.48.1
author
#1 lore raw

PATCH v4 2/2 arm64: dts: rockchip: add MNT Reform 2

MNT Reform 2 is an open source laptop with replaceable CPU modules, including a version with the RK3588-based MNT RCORE[1], which is based on Firefly's iCore-3588Q SoM:

- Rockchip RK3588
- Quad A76 and Quad A55 CPU
- 6 TOPS NPU
- up to 32GB LPDDR4x RAM
- SD Card slot
- Gigabit ethernet port
- HDMI port
- 2x mPCIe ports for WiFi or NVMe
- 3x USB 3.0 Type-A HOST port

[1] https://shop.mntre.com/products/mnt-reform

Signed-off-by Lukas F. Hartmann <[email protected]>
Signed-off-by Patrick Wildt <[email protected]>

---
Changes for v4:
- Added chassis-type.
- Removed unused nodes.
- Sorted nodes alphabetically.
Changes for v3:
- Split DT as it's based on a Firefly iCore-3588Q SoM. Changes for v2:
- Aligned with bindings and schemas to appease DTB check warnings.
- Aligned with format of other RK3588 boards for consistency.

 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../rockchip/rk3588-firefly-icore-3588q.dtsi  | 451 ++++++++++++++++++
 .../boot/dts/rockchip/rk3588-mnt-reform2.dts  | 336 +++++++++++++
 3 files changed, 788 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
arch/arm64/boot/dts/rockchip/Makefile +1 -0
index def1222c1907..88381d9a20e3 100644
@@ -145,6 +145,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-firefly-itx-3588j.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-h96-max-v58.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-mnt-reform2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb
arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi new file +451 -0

451 lines not on this page · raw message

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +336 -0

336 lines not on this page · raw message

Signature · 1 line
2.48.1
maintainer
#2 lore raw

Re: [PATCH v4 2/2] arm64: dts: rockchip: add MNT Reform 2

Hi Patrick,

Am Montag, 17. Februar 2025, 21:22:28 MEZ schrieb Patrick Wildt:

Quoted 14 lines

MNT Reform 2 is an open source laptop with replaceable CPU modules, including a version with the RK3588-based MNT RCORE[1], which is based on Firefly's iCore-3588Q SoM:

- Rockchip RK3588
- Quad A76 and Quad A55 CPU
- 6 TOPS NPU
- up to 32GB LPDDR4x RAM
- SD Card slot
- Gigabit ethernet port
- HDMI port
- 2x mPCIe ports for WiFi or NVMe
- 3x USB 3.0 Type-A HOST port

Quoted 4 lines

[1] https://shop.mntre.com/products/mnt-reform

Signed-off-by Lukas F. Hartmann <[email protected]>
Signed-off-by Patrick Wildt <[email protected]>

bureaucracy question, what is Lukas' relationship with the patch? Two options:
(1) Lukas initially developed the patch, then the "From:" should be set accordingly
(2) Both of you developed it together, then we should have a

Co-Developed-by Lukas F. Hartmann <[email protected]>

up there

Some more style things below...

Quoted 44 lines

---
Changes for v4:
- Added chassis-type.
- Removed unused nodes.
- Sorted nodes alphabetically.
Changes for v3:
- Split DT as it's based on a Firefly iCore-3588Q SoM. Changes for v2:
- Aligned with bindings and schemas to appease DTB check warnings.
- Aligned with format of other RK3588 boards for consistency.

 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../rockchip/rk3588-firefly-icore-3588q.dtsi  | 451 ++++++++++++++++++
 .../boot/dts/rockchip/rk3588-mnt-reform2.dts  | 336 +++++++++++++
 3 files changed, 788 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
arch/arm64/boot/dts/rockchip/Makefile +1 -0
index def1222c1907..88381d9a20e3 100644
@@ -145,6 +145,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-firefly-itx-3588j.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-h96-max-v58.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-mnt-reform2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb
arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi new file +8 -0
new file mode 100644
index 000000000000..898a7b29692f
@@ -0,0 +1,451 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+#include "rk3588.dtsi"
+
+/ {

arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi line 18

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi new file +10 -0
+	compatible = "firefly,icore-3588q", "rockchip,rk3588";
+
+	aliases {
+		mmc0 = &sdhci;
+	};
+};
+
+&cpu_b0 {
+	cpu-supply = <&vdd_cpu_big0_s0>;
+	mem-supply = <&vdd_cpu_big0_s0>;

you don't need the unspecified mem-supply for the cpu cores, that is vendor-kernel voodoo and not part of the upstream binding.

Same for all cores.

Quoted 33 lines
arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi new file +1 -0
+};
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +26 -0
new file mode 100644
index 000000000000..936dd959524f
@@ -0,0 +1,336 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2024 MNT Research GmbH
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+
+#include "rk3588-firefly-icore-3588q.dtsi"
+
+/ {
+	model = "MNT Reform 2 with RCORE RK3588 Module";
+	compatible = "mntre,reform2-rcore", "firefly,icore-3588q", "rockchip,rk3588";
+	chassis-type = "laptop";
+
+	aliases {
+		ethernet0 = &gmac0;
+		mmc1 = &sdmmc;
+	};
+

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts line 36

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +10 -0
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm8 0 10000 0>;
+		enable-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
+		brightness-levels = <0 8 16 32 64 128 160 200 255>;
+		default-brightness-level = <128>;

please sort standard properties alphabetically (compatible at the top, status at the bottom, rest alphabetically)

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts line 184

Quoted 5 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +5 -0
+	};
+
+&pcie2x1l2 {
+	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+	pinctrl-0 = <&pcie2_0_rst>;

more sorting

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts line 196

Quoted 9 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +8 -0
+	status = "okay";
+};
+
 
+&pcie3x4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie3_reset>;
+	reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
+	num-lanes = <1>;

again sorting

Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +5 -0
+	vpcie3v3-supply = <&vcc3v3_pcie30>;
+	status = "okay";
+};
+
 
+&sdmmc {

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts line 247

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +10 -0
+	bus-width = <4>;
+	max-frequency = <40000000>;
+	no-sdio;
+	no-mmc;
+	no-1-8-v;
+	cap-sd-highspeed;
+	vqmmc-supply = <&vcc3v3_pcie30>;
+	vmmc-supply = <&vcc3v3_pcie30>;
+	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+	disable-wp;

more sorting

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts

Quoted 3 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +3 -0
+	status = "okay";
+};
+

Heiko

author
#3 lore raw

Re: [PATCH v4 2/2] arm64: dts: rockchip: add MNT Reform 2

Quoted 22 lines · Heiko Stuebner

Hi Patrick,

Am Montag, 17. Februar 2025, 21:22:28 MEZ schrieb Patrick Wildt:

Quoted 14 lines

MNT Reform 2 is an open source laptop with replaceable CPU modules, including a version with the RK3588-based MNT RCORE[1], which is based on Firefly's iCore-3588Q SoM:

- Rockchip RK3588
- Quad A76 and Quad A55 CPU
- 6 TOPS NPU
- up to 32GB LPDDR4x RAM
- SD Card slot
- Gigabit ethernet port
- HDMI port
- 2x mPCIe ports for WiFi or NVMe
- 3x USB 3.0 Type-A HOST port

Quoted 4 lines

[1] https://shop.mntre.com/products/mnt-reform

Signed-off-by Lukas F. Hartmann <[email protected]>
Signed-off-by Patrick Wildt <[email protected]>
Quoted 8 lines

bureaucracy question, what is Lukas' relationship with the patch? Two options:
(1) Lukas initially developed the patch, then the "From:" should be set accordingly
(2) Both of you developed it together, then we should have a

Co-Developed-by Lukas F. Hartmann <[email protected]>

up there

Thanks, will send a v5 with Co-developed-by tag added! :)

Quoted 3 lines

Some more style things below...

Are there further execptions to the alphabetical rule? For regulators I often see min before max, which I think makes sense to understand the range but isn't technically alphabetical. The same for pinctrl-0 and pinctrl-names.

Thanks,
Patrick

Quoted 156 lines
Quoted 45 lines

---
Changes for v4:
- Added chassis-type.
- Removed unused nodes.
- Sorted nodes alphabetically.
Changes for v3:
- Split DT as it's based on a Firefly iCore-3588Q SoM. Changes for v2:
- Aligned with bindings and schemas to appease DTB check warnings.
- Aligned with format of other RK3588 boards for consistency.

 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../rockchip/rk3588-firefly-icore-3588q.dtsi  | 451 ++++++++++++++++++
 .../boot/dts/rockchip/rk3588-mnt-reform2.dts  | 336 +++++++++++++
 3 files changed, 788 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
arch/arm64/boot/dts/rockchip/Makefile +1 -0
index def1222c1907..88381d9a20e3 100644
@@ -145,6 +145,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-firefly-itx-3588j.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-friendlyelec-cm3588-nas.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-h96-max-v58.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-mnt-reform2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb
arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi new file +8 -0
new file mode 100644
index 000000000000..898a7b29692f
@@ -0,0 +1,451 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+#include "rk3588.dtsi"
+
+/ {

arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi line 18

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi new file +10 -0
+	compatible = "firefly,icore-3588q", "rockchip,rk3588";
+
+	aliases {
+		mmc0 = &sdhci;
+	};
+};
+
+&cpu_b0 {
+	cpu-supply = <&vdd_cpu_big0_s0>;
+	mem-supply = <&vdd_cpu_big0_s0>;

you don't need the unspecified mem-supply for the cpu cores, that is vendor-kernel voodoo and not part of the upstream binding.

Same for all cores.

Quoted 33 lines
arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi new file +1 -0
+};
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +26 -0
new file mode 100644
index 000000000000..936dd959524f
@@ -0,0 +1,336 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2024 MNT Research GmbH
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include <dt-bindings/usb/pd.h>
+
+#include "rk3588-firefly-icore-3588q.dtsi"
+
+/ {
+	model = "MNT Reform 2 with RCORE RK3588 Module";
+	compatible = "mntre,reform2-rcore", "firefly,icore-3588q", "rockchip,rk3588";
+	chassis-type = "laptop";
+
+	aliases {
+		ethernet0 = &gmac0;
+		mmc1 = &sdmmc;
+	};
+

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts line 36

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +10 -0
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm8 0 10000 0>;
+		enable-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
+		brightness-levels = <0 8 16 32 64 128 160 200 255>;
+		default-brightness-level = <128>;

please sort standard properties alphabetically (compatible at the top, status at the bottom, rest alphabetically)

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts line 184

Quoted 5 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +5 -0
+	};
+
+&pcie2x1l2 {
+	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+	pinctrl-0 = <&pcie2_0_rst>;

more sorting

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts line 196

Quoted 9 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +8 -0
+	status = "okay";
+};
+
 
+&pcie3x4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie3_reset>;
+	reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
+	num-lanes = <1>;

again sorting

Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +5 -0
+	vpcie3v3-supply = <&vcc3v3_pcie30>;
+	status = "okay";
+};
+
 
+&sdmmc {

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts line 247

Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +10 -0
+	bus-width = <4>;
+	max-frequency = <40000000>;
+	no-sdio;
+	no-mmc;
+	no-1-8-v;
+	cap-sd-highspeed;
+	vqmmc-supply = <&vcc3v3_pcie30>;
+	vmmc-supply = <&vcc3v3_pcie30>;
+	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+	disable-wp;

more sorting

arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts

Quoted 3 lines
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts new file +3 -0
+	status = "okay";
+};
+

Heiko

maintainer
#4 lore raw

Re: [PATCH v4 2/2] arm64: dts: rockchip: add MNT Reform 2

Am Samstag, 1. März 2025, 11:32:06 MEZ schrieb Patrick Wildt:

Quoted 35 lines · Heiko Stuebner
Quoted 22 lines

Hi Patrick,

Am Montag, 17. Februar 2025, 21:22:28 MEZ schrieb Patrick Wildt:

Quoted 14 lines

MNT Reform 2 is an open source laptop with replaceable CPU modules, including a version with the RK3588-based MNT RCORE[1], which is based on Firefly's iCore-3588Q SoM:

- Rockchip RK3588
- Quad A76 and Quad A55 CPU
- 6 TOPS NPU
- up to 32GB LPDDR4x RAM
- SD Card slot
- Gigabit ethernet port
- HDMI port
- 2x mPCIe ports for WiFi or NVMe
- 3x USB 3.0 Type-A HOST port

Quoted 4 lines

[1] https://shop.mntre.com/products/mnt-reform

Signed-off-by Lukas F. Hartmann <[email protected]>
Signed-off-by Patrick Wildt <[email protected]>
Quoted 8 lines

bureaucracy question, what is Lukas' relationship with the patch? Two options:
(1) Lukas initially developed the patch, then the "From:" should be set accordingly
(2) Both of you developed it together, then we should have a

Co-Developed-by Lukas F. Hartmann <[email protected]>

up there

Thanks, will send a v5 with Co-developed-by tag added! :)

Quoted 1 line
Quoted 7 lines
Quoted 2 lines

Some more style things below...

Are there further execptions to the alphabetical rule? For regulators I often see min before max, which I think makes sense to understand the range but isn't technically alphabetical. The same for pinctrl-0 and pinctrl-names.

The "preferred" rules are in [0], and in recent times I've come to appreciate not needing to explain exceptions ;-) .

But I do see them as guidelines, especially in a leaf-dt (for a device) concessions are possible.

So yes, I can definitly see min before max as beneficial and if you want to sort that way, that is fine by me

Heiko

[0] https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/dts-coding-style.rst#n112