ARM: S3C24XX: convert s3c2410, s3c2440 s3c2442 to common clock framework
Subsystems (7)
v2 cover ARM: S3C24XX: convert s3c2410, s3c2440 s3c2442 to common clock framework
At least, here is v2 of the common clock conversion of s3c2410 - s3c2442. If suitable this will finish the conversion of s3c24xx arches.
Tested on an Openmoko Neo Freerunner (GTA02).
It is meant to go on top of the s3c2412 ccf conversion already in linux-samsung.
changes since v1:
- add already received Acks and Reviews
- remove patches that were already part of the s3c2412 submission
- implement suggestions from Tomasz Figa:
- in cpufreq-utils only request mpll clock the first time
- in dclk driver
- use variant list to describe SoC differences
- do not provide a dt binding at this time, as the dclk parts should probably be part of the pinctrl driver In any case this can be solved when the first dt platform needs support for the external clock outputs
- in clk-s3c2410
- fix sentinels
- rename dt-bindings header
- don't export XTI clock id
Heiko Stuebner (9):
ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when
using ccf
clk: samsung: add clock driver for external clock outputs
ARM: S3C24XX: enable usage of common dclk if common clock framework is
enabled
dt-bindings: add documentation for s3c2410 clock controller
clk: samsung: add clock controller driver for s3c2410, s3c2440 and
s3c2442
ARM: S3C24XX: add platform code for conversion to the common clock
framework
ARM: S3C24XX: convert s3c2440 and s3c2442 to common clock framework
ARM: S3C24XX: convert s3c2410 to common clock framework
ARM: S3C24XX: remove legacy clock code
.../bindings/clock/samsung,s3c2410-clock.txt | 50 +++ arch/arm/mach-s3c24xx/Kconfig | 50 ++- arch/arm/mach-s3c24xx/Makefile | 6 +- arch/arm/mach-s3c24xx/clock-dclk.c | 195 --------- arch/arm/mach-s3c24xx/clock-s3c2410.c | 285 ------------ arch/arm/mach-s3c24xx/clock-s3c2440.c | 217 ---------- arch/arm/mach-s3c24xx/clock-s3c244x.c | 141 ------ arch/arm/mach-s3c24xx/common.c | 45 +- arch/arm/mach-s3c24xx/common.h | 11 +- arch/arm/mach-s3c24xx/cpufreq-utils.c | 14 + arch/arm/mach-s3c24xx/include/mach/regs-clock.h | 18 - arch/arm/mach-s3c24xx/include/mach/regs-gpio.h | 3 - arch/arm/mach-s3c24xx/mach-amlm5900.c | 9 +- arch/arm/mach-s3c24xx/mach-anubis.c | 15 +- arch/arm/mach-s3c24xx/mach-at2440evb.c | 10 +- arch/arm/mach-s3c24xx/mach-bast.c | 15 +- arch/arm/mach-s3c24xx/mach-gta02.c | 8 +- arch/arm/mach-s3c24xx/mach-h1940.c | 10 +- arch/arm/mach-s3c24xx/mach-mini2440.c | 10 +- arch/arm/mach-s3c24xx/mach-n30.c | 12 +- arch/arm/mach-s3c24xx/mach-nexcoder.c | 10 +- arch/arm/mach-s3c24xx/mach-osiris.c | 15 +- arch/arm/mach-s3c24xx/mach-otom.c | 10 +- arch/arm/mach-s3c24xx/mach-qt2410.c | 9 +- arch/arm/mach-s3c24xx/mach-rx1950.c | 15 +- arch/arm/mach-s3c24xx/mach-rx3715.c | 10 +- arch/arm/mach-s3c24xx/mach-smdk2410.c | 9 +- arch/arm/mach-s3c24xx/mach-smdk2440.c | 10 +- arch/arm/mach-s3c24xx/mach-tct_hammer.c | 9 +- arch/arm/mach-s3c24xx/mach-vr1000.c | 15 +- arch/arm/mach-s3c24xx/pm.c | 12 - arch/arm/mach-s3c24xx/s3c2410.c | 56 --- arch/arm/mach-s3c24xx/s3c2442.c | 111 ----- arch/arm/mach-s3c24xx/s3c244x.c | 59 +-- drivers/clk/samsung/Makefile | 2 + drivers/clk/samsung/clk-s3c2410-dclk.c | 440 +++++++++++++++++++ drivers/clk/samsung/clk-s3c2410.c | 477 +++++++++++++++++++++ include/dt-bindings/clock/s3c2410.h | 62 +++ 38 files changed, 1276 insertions(+), 1179 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt delete mode 100644 arch/arm/mach-s3c24xx/clock-dclk.c delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2410.c delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2440.c delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c244x.c create mode 100644 drivers/clk/samsung/clk-s3c2410-dclk.c create mode 100644 drivers/clk/samsung/clk-s3c2410.c create mode 100644 include/dt-bindings/clock/s3c2410.h
Signature · 1 line
1.9.0
PATCH v2 1/9 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
The s3c24xx cpufreq driver needs to change the mpll speed and was doing this by writing raw values from a translation table into the MPLLCON register.
Change this to use a regular clk_set_rate call when using the common clock framework and only write the raw value in the samsung_clock case.
To not needing to create additional infrastructure for this, the mpll clock is requested at the first call to s3c2410_set_fvco().
--- arch/arm/mach-s3c24xx/cpufreq-utils.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
arch/arm/mach-s3c24xx/cpufreq-utils.c +14 -0
@@ -14,6 +14,7 @@#include <linux/errno.h> #include <linux/cpufreq.h> #include <linux/io.h> +#include <linux/clk.h> #include <mach/map.h> #include <mach/regs-clock.h>
@@ -60,5 +61,18 @@ void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)*/ void s3c2410_set_fvco (struct s3c_cpufreq_config *cfg) { +#ifdef CONFIG_SAMSUNG_CLOCK __raw_writel (cfg->pll.driver_data,S3C2410_MPLLCON ); +#endif + +#ifdef CONFIG_COMMON_CLK +static struct clk *mpll; + +if (!mpll) + mpll = clk_get(NULL, "mpll") +if (IS_ERR (mpll)) +return ; + +clk_set_rate (mpll, cfg->pll.frequency); +#endif }
Signature · 1 line
1.9.0
PATCH v2 1/9 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
Hello.
Quoted 19 lines · Heiko St?bner
The s3c24xx cpufreq driver needs to change the mpll speed and was doing this by writing raw values from a translation table into the MPLLCON register.
Change this to use a regular
clk_set_ratecall when using the common clock framework and only write the raw value in thesamsung_clockcase.To not needing to create additional infrastructure for this, the mpll clock is requested at the first call to
s3c2410_set_fvco().Signed-off-by Heiko Stuebner <[email protected]>--- arch/arm/mach-s3c24xx/cpufreq-utils.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)arch/arm/mach-s3c24xx/cpufreq-utils.c +0
-0
[...]
arch/arm/mach-s3c24xx/cpufreq-utils.c void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) · line 71
Quoted 12 lines
arch/arm/mach-s3c24xx/cpufreq-utils.c +7
-0@@ -60,5 +61,18 @@ void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)*/ void s3c2410_set_fvco (struct s3c_cpufreq_config *cfg) { +#ifdef CONFIG_SAMSUNG_CLOCK __raw_writel (cfg->pll.driver_data,S3C2410_MPLLCON ); +#endif + +#ifdef CONFIG_COMMON_CLK +static struct clk *mpll; + +if (!mpll)
You are testing uninitialized variable. This check wouldn't make much
sense even if the variable was initialized.
arch/arm/mach-s3c24xx/cpufreq-utils.c void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) · line 78
Quoted 7 lines
arch/arm/mach-s3c24xx/cpufreq-utils.c +6
-0+ mpll = clk_get(NULL, "mpll") +if (IS_ERR (mpll)) +return ; + +clk_set_rate (mpll, cfg->pll.frequency); +#endif }
WBR, Sergei
PATCH v2 1/9 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
Hi,
Quoted 26 lines · Sergei Shtylyov
Hello.
Quoted 21 lines · Heiko St?bner
The s3c24xx cpufreq driver needs to change the mpll speed and was doing this by writing raw values from a translation table into the MPLLCON register.
Change this to use a regular
clk_set_ratecall when using the common clock framework and only write the raw value in thesamsung_clockcase.To not needing to create additional infrastructure for this, the mpll clock
is requested at the first call tos3c2410_set_fvco().Signed-off-by Heiko Stuebner <[email protected]>--- arch/arm/mach-s3c24xx/cpufreq-utils.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)arch/arm/mach-s3c24xx/cpufreq-utils.c +0
-0[...]
Quoted 16 lines
arch/arm/mach-s3c24xx/cpufreq-utils.c void s3c2410_cpufreq_setrefresh(struct · line 72
Quoted 13 lines
arch/arm/mach-s3c24xx/cpufreq-utils.c +7
-0@@ -60,5 +61,18 @@ void s3c2410_cpufreq_setrefresh(structs3c_cpufreq_config *cfg) */ void s3c2410_set_fvco (struct s3c_cpufreq_config *cfg) { +#ifdef CONFIG_SAMSUNG_CLOCK __raw_writel (cfg->pll.driver_data,S3C2410_MPLLCON ); +#endif + +#ifdef CONFIG_COMMON_CLK +static struct clk *mpll; + +if (!mpll)You are testing uninitialized variable. This check wouldn't make
much sense even if the variable was initialized.
I should probably add that NULL is considered a valid clock handle by Common Clock Framework.
If there is really no way to pass the clock to this function then probably a global variable initialized by some code running earlier than this function could be called would be a better choice.
Anyway, Heiko, thanks for working on this. I'll try to review rest of the series soon. (I'm attending the ELC next week, though, so I'm not sure if I find some time then, though.)
Best regards,
Tomasz
PATCH v2 1/9 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
Am Mittwoch, 23. April 2014, 22:55:51 schrieb Tomasz Figa:
Quoted 52 lines
Hi,
Quoted 49 lines · Sergei Shtylyov
Hello.
Quoted 22 lines · Heiko Stübner
The s3c24xx cpufreq driver needs to change the mpll speed and was doing this by writing raw values from a translation table into the MPLLCON register.
Change this to use a regular
clk_set_ratecall when using the common clock framework and only write the raw value in thesamsung_clockcase.To not needing to create additional infrastructure for this, the mpll clock
is requested at the first call tos3c2410_set_fvco().Signed-off-by Heiko Stuebner <[email protected]>---
arch/arm/mach-s3c24xx/cpufreq-utils.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)arch/arm/mach-s3c24xx/cpufreq-utils.c +0
-0[...]
Quoted 9 lines
arch/arm/mach-s3c24xx/cpufreq-utils.c +0
-0@@ -60,5 +61,18 @@ void s3c2410_cpufreq_setrefresh(structs3c_cpufreq_config *cfg) */ void s3c2410_set_fvco (struct s3c_cpufreq_config *cfg) {arch/arm/mach-s3c24xx/cpufreq-utils.c void s3c2410_cpufreq_setrefresh(struct · line 71
Quoted 10 lines
arch/arm/mach-s3c24xx/cpufreq-utils.c +7
-0+#ifdef CONFIG_SAMSUNG_CLOCK __raw_writel (cfg->pll.driver_data,S3C2410_MPLLCON ); +#endif + +#ifdef CONFIG_COMMON_CLK +static struct clk *mpll; + +if (!mpll)You are testing uninitialized variable. This check wouldn't make
Quoted 8 lines
Quoted 1 line
much sense even if the variable was initialized.
I should probably add that NULL is considered a valid clock handle by Common Clock Framework.
If there is really no way to pass the clock to this function then probably a global variable initialized by some code running earlier than this function could be called would be a better choice.
*grrr* :-) ... ok I'll try to find another way (again) to do this
Quoted 3 lines
Anyway, Heiko, thanks for working on this. I'll try to review rest of the series soon. (I'm attending the ELC next week, though, so I'm not sure if I find some time then, though.)
Just as a reminder, there isn't this much to still review, as you Acked/Reviewed most of the series in v1 and only this patch as well as 2 and 5 still need a review/ack - and the only changes are fixes for your comments ;-)
Heiko
PATCH v2 1/9 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
Quoted 1 line · Heiko St?bner
[...]
Quoted 4 lines
Quoted 3 lines
Anyway, Heiko, thanks for working on this. I'll try to review rest of the series soon. (I'm attending the ELC next week, though, so I'm not sure if I find some time then, though.)
Yeah, this series is really good to us.
Quoted 6 lines
Just as a reminder, there isn't this much to still review, as you Acked/Reviewed most of the series in v1 and only this patch as well as 2 and 5
still need a review/ack - and the only changes are fixes for your comments ;-)
I think so. Since I will apply this series in this week, if any big comments, please let us know.
Heiko, thanks for the v2.1 as well.
- Kukjin
PATCH v2 1/9 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
Hi,
Quoted 17 lines · Kukjin Kim
Quoted 1 line · Heiko St?bner
[...]
Quoted 4 lines
Quoted 3 lines
Anyway, Heiko, thanks for working on this. I'll try to review rest of the series soon. (I'm attending the ELC next week, though, so I'm not sure if I find some time then, though.)
Yeah, this series is really good to us.
Quoted 6 lines
Just as a reminder, there isn't this much to still review, as you Acked/Reviewed most of the series in v1 and only this patch as well as 2 and 5
still need a review/ack - and the only changes are fixes for your comments ;-)
Quoted 4 lines
I think so. Since I will apply this series in this week, if any big comments, please let us know.
Heiko, thanks for the v2.1 as well.
Just found time to look through this series and it looks fine. So if not applied yet, feel free to add
to clk: patches.
Also we still need to ping DT maintainers, as they should ask patch 4/9 before it is merged.
Best regards,
Tomasz
PATCH v2 1/9 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
In reply to Kukjin KimHi Kukjin,
Quoted 11 lines · Kukjin Kim
Quoted 1 line · Heiko St?bner
[...]
Quoted 4 lines
Quoted 3 lines
Anyway, Heiko, thanks for working on this. I'll try to review rest of the series soon. (I'm attending the ELC next week, though, so I'm not sure if I find some time then, though.)
Yeah, this series is really good to us.
Quoted 8 lines
Quoted 6 lines
Just as a reminder, there isn't this much to still review, as you Acked/Reviewed most of the series in v1 and only this patch as well as 2 and 5
still need a review/ack - and the only changes are fixes for your comments ;-)I think so. Since I will apply this series in this week, if any big comments, please let us know.
This needs to be synchronized with series for Exynos5260 and support for multiple clock providers. Let me prepare a branch for you to pull from my tree with all necessary dependencies.
Best regards,
Tomasz
PATCH v2 1/9 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
In reply to Sergei ShtylyovQuoted 21 lines · Sergei Shtylyov
Quoted 20 lines
The s3c24xx cpufreq driver needs to change the mpll speed and was doing this by writing raw values from a translation table into the MPLLCON register.
Change this to use a regular
clk_set_ratecall when using the common clock framework and only write the raw value in thesamsung_clockcase.To not needing to create additional infrastructure for this, the mpll clock is requested at the first call to
s3c2410_set_fvco().Signed-off-by Heiko Stuebner <[email protected]>--- arch/arm/mach-s3c24xx/cpufreq-utils.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)arch/arm/mach-s3c24xx/cpufreq-utils.c +0
-0[...]
Quoted 16 lines
arch/arm/mach-s3c24xx/cpufreq-utils.c void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config · line 72
Quoted 13 lines
arch/arm/mach-s3c24xx/cpufreq-utils.c +7
-0@@ -60,5 +61,18 @@ void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config*cfg) */ void s3c2410_set_fvco (struct s3c_cpufreq_config *cfg) { +#ifdef CONFIG_SAMSUNG_CLOCK __raw_writel (cfg->pll.driver_data,S3C2410_MPLLCON ); +#endif + +#ifdef CONFIG_COMMON_CLK +static struct clk *mpll; + +if (!mpll)You are testing uninitialized variable. This check wouldn't make much
sense even if the variable was initialized.
Oops, I didn't notice *static*... :-> The code makes more sense now.
Quoted 7 lines
Quoted 7 lines
arch/arm/mach-s3c24xx/cpufreq-utils.c +6
-0+ mpll = clk_get(NULL, "mpll") +if (IS_ERR (mpll)) +return ; + +clk_set_rate (mpll, cfg->pll.frequency); +#endif }
WBR, Sergei
PATCH v2 1/9 ARM: S3C24XX: cpufreq-utils: don't write raw values to MPLLCON when using ccf
In reply to Heiko StübnerThe s3c24xx cpufreq driver needs to change the mpll speed and was doing this by writing raw values from a translation table into the MPLLCON register.
Change this to use a regular clk_set_rate call when using the common clock framework and only write the raw value in the samsung_clock case.
The s3c cpufreq driver does already aquire the mpll, so simply add a reference to struct s3c_cpufreq_config to let set_fvco access it.
While struct clk is opaque the differenciation between samsung clock and common clock is kept, as the samsung-clock mpll clk does not implement a real set_rate.
--- arch/arm/mach-s3c24xx/cpufreq-utils.c | 8 ++++++++ arch/arm/plat-samsung/include/plat/cpu-freq-core.h | 1 + drivers/cpufreq/s3c24xx-cpufreq.c | 1 + 3 files changed, 10 insertions(+)
arch/arm/mach-s3c24xx/cpufreq-utils.c +8 -0
@@ -14,6 +14,7 @@#include <linux/errno.h> #include <linux/cpufreq.h> #include <linux/io.h> +#include <linux/clk.h> #include <mach/map.h> #include <mach/regs-clock.h>
@@ -60,5 +61,12 @@ void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)*/ void s3c2410_set_fvco (struct s3c_cpufreq_config *cfg) { +#ifdef CONFIG_SAMSUNG_CLOCK __raw_writel (cfg->pll.driver_data,S3C2410_MPLLCON ); +#endif + +#ifdef CONFIG_COMMON_CLK +if (!IS_ERR (cfg->mpll)) +clk_set_rate (cfg->mpll, cfg->pll.frequency); +#endif }
arch/arm/plat-samsung/include/plat/cpu-freq-core.h +1 -0
@@ -119,6 +119,7 @@ struct s3c_plltab {struct s3c_cpufreq_config {struct s3c_freq freq;struct s3c_freq max; +struct clk *mpll;struct cpufreq_frequency_table pll;struct s3c_clkdivs divs;struct s3c_cpufreq_info *info;/* for core, not drivers */
drivers/cpufreq/s3c24xx-cpufreq.c +1 -0
@@ -141,6 +141,7 @@ static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg)static void s3c_cpufreq_setfvco (struct s3c_cpufreq_config *cfg) { + cfg->mpll = _clk_mpll; (cfg->info->set_fvco)(cfg); }
Signature · 1 line
1.9.0
PATCH v2 2/9 clk: samsung: add clock driver for external clock outputs
In reply to Heiko StübnerThis adds a driver for controlling the external clock outputs of s3c24xx architectures including the dclk muxes and dividers.
The driver at the moment only supports the legacy non-dt boards using these clock outputs. The clock-output control itself is part of the system-controller mainly controlled by the pinctrl drivers. So it should most likely be integrated there for dt platforms.
--- drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-s3c2410-dclk.c | 440 +++++++++++++++++++++++++++++++++ 2 files changed, 441 insertions(+) create mode 100644 drivers/clk/samsung/clk-s3c2410-dclk.c
drivers/clk/samsung/Makefile +1 -0
@@ -8,6 +8,7 @@ obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5250.o obj-$(CONFIG_SOC_EXYNOS5420) += clk-exynos5420.o obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o obj-$(CONFIG_ARCH_EXYNOS) += clk-exynos-audss.o +obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
drivers/clk/samsung/clk-s3c2410-dclk.c new file +440 -0
440 lines not on this page · raw message
Signature · 1 line
1.9.0
PATCH v2 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
In reply to Heiko StübnerAdd platform device and select the correct implementation automatically depending on wether the old samsung_clock or the common clock framework is enabled.
This is only done for machines already using the old dclk implementation, as everybody else should move to use dt anyway.
The machine-specific settings for the external clocks will have to be set by somebody with knowledge about the specific hardware.
--- arch/arm/mach-s3c24xx/Kconfig | 22 +++++++++++++++++----- arch/arm/mach-s3c24xx/common.c | 14 ++++++++++++++ arch/arm/mach-s3c24xx/common.h | 2 ++ arch/arm/mach-s3c24xx/mach-anubis.c | 5 +++++ arch/arm/mach-s3c24xx/mach-bast.c | 5 +++++ arch/arm/mach-s3c24xx/mach-osiris.c | 5 +++++ arch/arm/mach-s3c24xx/mach-rx1950.c | 5 +++++ arch/arm/mach-s3c24xx/mach-vr1000.c | 5 +++++ arch/arm/mach-s3c24xx/s3c244x.c | 2 ++ 9 files changed, 60 insertions(+), 5 deletions(-)
arch/arm/mach-s3c24xx/Kconfig +17 -5
@@ -18,6 +18,13 @@ config PLAT_S3C24XX help Base platform code for any Samsung S3C24XX device +config S3C2410_COMMON_DCLK + bool + select REGMAP_MMIO + help + Temporary symbol to build the dclk driver based on the common clock + framework. + menu "SAMSUNG S3C24XX SoCs Support" comment "S3C24XX SoCs"
@@ -264,7 +271,8 @@ config ARCH_BAST select ISA select MACH_BAST_IDE select S3C2410_IOTIMING if ARM_S3C2410_CPUFREQ - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_NOR select S3C24XX_SIMTEC_PM if PM select S3C24XX_SIMTEC_USB
@@ -345,7 +353,8 @@ config MACH_TCT_HAMMER config MACH_VR1000 bool "Thorcom VR1000" select MACH_BAST_IDE - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_NOR select S3C24XX_SIMTEC_PM if PM select S3C24XX_SIMTEC_USB
@@ -530,7 +539,8 @@ config MACH_ANUBIS bool "Simtec Electronics ANUBIS" select HAVE_PATA_PLATFORM select S3C2440_XTAL_12000000 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_GPIO_EXTRA64 select S3C24XX_SIMTEC_PM if PM select S3C_DEV_USB_HOST
@@ -571,7 +581,8 @@ config MACH_OSIRIS bool "Simtec IM2440D20 (OSIRIS) module" select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ select S3C2440_XTAL_12000000 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_GPIO_EXTRA128 select S3C24XX_SIMTEC_PM if PM select S3C_DEV_NAND
@@ -643,7 +654,8 @@ config MACH_RX1950 select PM_H1940 if PM select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ select S3C2440_XTAL_16934400 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C24XX_COMMON_DCLK if COMMON_CLK select S3C24XX_PWM select S3C_DEV_NAND help
arch/arm/mach-s3c24xx/common.c +14 -0
@@ -554,3 +554,17 @@ void __init s3c2443_init_clocks(int xtal) s3c2443_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR); }#endif + +#if defined(CONFIG_CPU_S3C2410 ) || defined(CONFIG_CPU_S3C2440 ) || \ + defined(CONFIG_CPU_S3C2442 ) +static struct resource s3c2410_dclk_resource[] = { + [0 ] =DEFINE_RES_MEM (0x56000084 ,0x4 ), +}; + +struct platform_device s3c2410_device_dclk = { + .name ="s3c2410-dclk" , + .id =0 , + .num_resources =ARRAY_SIZE (s3c2410_dclk_resource), + .resource = s3c2410_dclk_resource, +}; +#endif
arch/arm/mach-s3c24xx/common.h +2 -0
@@ -114,6 +114,8 @@ extern struct platform_device s3c2412_device_dma;extern struct platform_device s3c2440_device_dma;extern struct platform_device s3c2443_device_dma; +extern struct platform_device s3c2410_device_dclk; +#ifdef CONFIG_S3C2412_COMMON_CLK void __init s3c2412_common_clk_init (struct device_node *np,unsigned long xti_f,unsigned long ext_f,void __iomem *reg_base);
arch/arm/mach-s3c24xx/mach-anubis.c +5 -0
@@ -352,6 +352,7 @@ static struct platform_device anubis_device_sm501 = {/* Standard Anubis devices */ static struct platform_device *anubis_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_ohci, &s3c_device_wdt, &s3c_device_adc,
@@ -364,6 +365,7 @@ static struct platform_device *anubis_devices[] __initdata = { &anubis_device_sm501, }; +#ifdef CONFIG_SAMSUNG_CLOCK static struct clk *anubis_clocks[]__initdata = { &s3c24xx_dclk0, &s3c24xx_dclk1,
@@ -371,6 +373,7 @@ static struct clk *anubis_clocks[] __initdata = { &s3c24xx_clkout1, &s3c24xx_uclk, }; +#endif /* I2C devices. */
@@ -394,6 +397,7 @@ static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = {static void __init anubis_map_io (void ) { +#ifdef CONFIG_SAMSUNG_CLOCK /* initialise the clocks */ s3c24xx_dclk0.parent = &clk_upll;
@@ -408,6 +412,7 @@ static void __init anubis_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1;s3c24xx_register_clocks (anubis_clocks,ARRAY_SIZE (anubis_clocks)); +#endif s3c24xx_init_io (anubis_iodesc,ARRAY_SIZE (anubis_iodesc));s3c24xx_init_clocks (0 );
arch/arm/mach-s3c24xx/mach-bast.c +5 -0
@@ -523,6 +523,7 @@ static struct s3c_hwmon_pdata bast_hwmon_info = {// cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0 static struct platform_device *bast_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_ohci, &s3c_device_lcd, &s3c_device_wdt,
@@ -537,6 +538,7 @@ static struct platform_device *bast_devices[] __initdata = { &bast_sio, }; +#ifdef CONFIG_SAMSUNG_CLK static struct clk *bast_clocks[]__initdata = { &s3c24xx_dclk0, &s3c24xx_dclk1,
@@ -544,6 +546,7 @@ static struct clk *bast_clocks[] __initdata = { &s3c24xx_clkout1, &s3c24xx_uclk, }; +#endif static struct s3c_cpufreq_board __initdata bast_cpufreq = { .refresh =7800 ,/* 7.8usec */
@@ -558,6 +561,7 @@ static struct s3c24xx_audio_simtec_pdata __initdata bast_audio = {static void __init bast_map_io (void ) { +#ifdef CONFIG_SAMSUNG_CLOCK /* initialise the clocks */ s3c24xx_dclk0.parent = &clk_upll;
@@ -572,6 +576,7 @@ static void __init bast_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1;s3c24xx_register_clocks (bast_clocks,ARRAY_SIZE (bast_clocks)); +#endif s3c_hwmon_set_platdata (&bast_hwmon_info);
arch/arm/mach-s3c24xx/mach-osiris.c +5 -0
@@ -344,12 +344,14 @@ static struct i2c_board_info osiris_i2c_devs[] __initdata = {/* Standard Osiris devices */ static struct platform_device *osiris_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_i2c0, &s3c_device_wdt, &s3c_device_nand, &osiris_pcmcia, }; +#ifdef CONFIG_SAMSUNG_CLOCK static struct clk *osiris_clocks[]__initdata = { &s3c24xx_dclk0, &s3c24xx_dclk1,
@@ -357,6 +359,7 @@ static struct clk *osiris_clocks[] __initdata = { &s3c24xx_clkout1, &s3c24xx_uclk, }; +#endif static struct s3c_cpufreq_board __initdata osiris_cpufreq = { .refresh =7800 ,/* refresh period is 7.8usec */
@@ -368,6 +371,7 @@ static void __init osiris_map_io(void) {unsigned long flags; +#ifdef CONFIG_SAMSUNG_CLOCK /* initialise the clocks */ s3c24xx_dclk0.parent = &clk_upll;
@@ -382,6 +386,7 @@ static void __init osiris_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1;s3c24xx_register_clocks (osiris_clocks,ARRAY_SIZE (osiris_clocks)); +#endif s3c24xx_init_io (osiris_iodesc,ARRAY_SIZE (osiris_iodesc));s3c24xx_init_clocks (0 );
arch/arm/mach-s3c24xx/mach-rx1950.c +5 -0
@@ -710,6 +710,7 @@ static struct i2c_board_info rx1950_i2c_devices[] = { };static struct platform_device *rx1950_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_lcd, &s3c_device_wdt, &s3c_device_i2c0,
@@ -728,17 +729,21 @@ static struct platform_device *rx1950_devices[] __initdata = { &rx1950_leds, }; +#ifdef CONFIG_SAMSUNG_CLOCK static struct clk *rx1950_clocks[]__initdata = { &s3c24xx_clkout0, &s3c24xx_clkout1, }; +#endif static void __init rx1950_map_io (void ) { +#ifdef CONFIG_SAMSUNG_CLOCK s3c24xx_clkout0.parent = &clk_h; s3c24xx_clkout1.parent = &clk_f;s3c24xx_register_clocks (rx1950_clocks,ARRAY_SIZE (rx1950_clocks)); +#endif s3c24xx_init_io (rx1950_iodesc,ARRAY_SIZE (rx1950_iodesc));s3c24xx_init_clocks (16934000 );
arch/arm/mach-s3c24xx/mach-vr1000.c +5 -0
@@ -286,6 +286,7 @@ static struct i2c_board_info vr1000_i2c_devs[] __initdata = {/* devices for this board */ static struct platform_device *vr1000_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_ohci, &s3c_device_lcd, &s3c_device_wdt,
@@ -299,6 +300,7 @@ static struct platform_device *vr1000_devices[] __initdata = { &vr1000_led3, }; +#ifdef CONFIG_SAMSUNG_CLOCK static struct clk *vr1000_clocks[]__initdata = { &s3c24xx_dclk0, &s3c24xx_dclk1,
@@ -306,6 +308,7 @@ static struct clk *vr1000_clocks[] __initdata = { &s3c24xx_clkout1, &s3c24xx_uclk, }; +#endif static void vr1000_power_off (void ) {
@@ -314,6 +317,7 @@ static void vr1000_power_off(void)static void __init vr1000_map_io (void ) { +#if CONFIG_SAMSUNG_CLOCK /* initialise clock sources */ s3c24xx_dclk0.parent = &clk_upll;
@@ -328,6 +332,7 @@ static void __init vr1000_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1;s3c24xx_register_clocks (vr1000_clocks,ARRAY_SIZE (vr1000_clocks)); +#endif pm_power_off = vr1000_power_off;
arch/arm/mach-s3c24xx/s3c244x.c +2 -0
@@ -46,6 +46,7 @@#include <plat/nand-core.h> #include <plat/watchdog-reset.h> +#include "common.h" #include "regs-dsc.h" static struct map_desc s3c244x_iodesc[]__initdata = {
@@ -74,6 +75,7 @@ void __init s3c244x_map_io(void)s3c_nand_setname ("s3c2440-nand" ); s3c_device_ts.name ="s3c2440-ts" ; s3c_device_usbgadget.name ="s3c2440-usbgadget" ; + s3c2410_device_dclk.name ="s3c2440-dclk" ; } void __init_or_cpufreq s3c244x_setup_clocks(void)
Signature · 1 line
1.9.0
PATCH v2 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
Add platform device and select the correct implementation automatically depending on wether the old samsung_clock or the common clock framework is enabled.
This is only done for machines already using the old dclk implementation, as everybody else should move to use dt anyway.
The machine-specific settings for the external clocks will have to be set by somebody with knowledge about the specific hardware.
---
adapted to apply against v3.16-next/clk-s3c24xx
arch/arm/mach-s3c24xx/Kconfig | 22 +++++++++++++++++----- arch/arm/mach-s3c24xx/common.c | 14 ++++++++++++++ arch/arm/mach-s3c24xx/common.h | 2 ++ arch/arm/mach-s3c24xx/mach-anubis.c | 5 +++++ arch/arm/mach-s3c24xx/mach-bast.c | 5 +++++ arch/arm/mach-s3c24xx/mach-osiris.c | 5 +++++ arch/arm/mach-s3c24xx/mach-rx1950.c | 5 +++++ arch/arm/mach-s3c24xx/mach-vr1000.c | 5 +++++ arch/arm/mach-s3c24xx/s3c244x.c | 2 ++ 9 files changed, 60 insertions(+), 5 deletions(-)
arch/arm/mach-s3c24xx/Kconfig +17 -5
@@ -18,6 +18,13 @@ config PLAT_S3C24XX help Base platform code for any Samsung S3C24XX device +config S3C2410_COMMON_DCLK + bool + select REGMAP_MMIO + help + Temporary symbol to build the dclk driver based on the common clock + framework. + menu "SAMSUNG S3C24XX SoCs Support" comment "S3C24XX SoCs"
@@ -264,7 +271,8 @@ config ARCH_BAST select ISA select MACH_BAST_IDE select S3C2410_IOTIMING if ARM_S3C2410_CPUFREQ - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_NOR select S3C24XX_SIMTEC_PM if PM select S3C24XX_SIMTEC_USB
@@ -345,7 +353,8 @@ config MACH_TCT_HAMMER config MACH_VR1000 bool "Thorcom VR1000" select MACH_BAST_IDE - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_NOR select S3C24XX_SIMTEC_PM if PM select S3C24XX_SIMTEC_USB
@@ -530,7 +539,8 @@ config MACH_ANUBIS bool "Simtec Electronics ANUBIS" select HAVE_PATA_PLATFORM select S3C2440_XTAL_12000000 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_PM if PM select S3C_DEV_USB_HOST help
@@ -571,7 +581,8 @@ config MACH_OSIRIS bool "Simtec IM2440D20 (OSIRIS) module" select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ select S3C2440_XTAL_12000000 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_PM if PM select S3C_DEV_NAND select S3C_DEV_USB_HOST
@@ -643,7 +654,8 @@ config MACH_RX1950 select PM_H1940 if PM select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ select S3C2440_XTAL_16934400 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C24XX_COMMON_DCLK if COMMON_CLK select S3C24XX_PWM select S3C_DEV_NAND help
arch/arm/mach-s3c24xx/common.c +14 -0
@@ -554,3 +554,17 @@ void __init s3c2443_init_clocks(int xtal) s3c2443_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR); }#endif + +#if defined(CONFIG_CPU_S3C2410 ) || defined(CONFIG_CPU_S3C2440 ) || \ + defined(CONFIG_CPU_S3C2442 ) +static struct resource s3c2410_dclk_resource[] = { + [0 ] =DEFINE_RES_MEM (0x56000084 ,0x4 ), +}; + +struct platform_device s3c2410_device_dclk = { + .name ="s3c2410-dclk" , + .id =0 , + .num_resources =ARRAY_SIZE (s3c2410_dclk_resource), + .resource = s3c2410_dclk_resource, +}; +#endif
arch/arm/mach-s3c24xx/common.h +2 -0
@@ -114,6 +114,8 @@ extern struct platform_device s3c2412_device_dma;extern struct platform_device s3c2440_device_dma;extern struct platform_device s3c2443_device_dma; +extern struct platform_device s3c2410_device_dclk; +#ifdef CONFIG_S3C2412_COMMON_CLK void __init s3c2412_common_clk_init (struct device_node *np,unsigned long xti_f,unsigned long ext_f,void __iomem *reg_base);
arch/arm/mach-s3c24xx/mach-anubis.c +5 -0
@@ -352,6 +352,7 @@ static struct platform_device anubis_device_sm501 = {/* Standard Anubis devices */ static struct platform_device *anubis_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_ohci, &s3c_device_wdt, &s3c_device_adc,
@@ -364,6 +365,7 @@ static struct platform_device *anubis_devices[] __initdata = { &anubis_device_sm501, }; +#ifdef CONFIG_SAMSUNG_CLOCK static struct clk *anubis_clocks[]__initdata = { &s3c24xx_dclk0, &s3c24xx_dclk1,
@@ -371,6 +373,7 @@ static struct clk *anubis_clocks[] __initdata = { &s3c24xx_clkout1, &s3c24xx_uclk, }; +#endif /* I2C devices. */
@@ -394,6 +397,7 @@ static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = {static void __init anubis_map_io (void ) { +#ifdef CONFIG_SAMSUNG_CLOCK /* initialise the clocks */ s3c24xx_dclk0.parent = &clk_upll;
@@ -408,6 +412,7 @@ static void __init anubis_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1;s3c24xx_register_clocks (anubis_clocks,ARRAY_SIZE (anubis_clocks)); +#endif s3c24xx_init_io (anubis_iodesc,ARRAY_SIZE (anubis_iodesc));s3c24xx_init_clocks (0 );
arch/arm/mach-s3c24xx/mach-bast.c +5 -0
@@ -523,6 +523,7 @@ static struct s3c_hwmon_pdata bast_hwmon_info = {// cat /sys/devices/platform/s3c24xx-adc/s3c-hwmon/in_0 static struct platform_device *bast_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_ohci, &s3c_device_lcd, &s3c_device_wdt,
@@ -537,6 +538,7 @@ static struct platform_device *bast_devices[] __initdata = { &bast_sio, }; +#ifdef CONFIG_SAMSUNG_CLK static struct clk *bast_clocks[]__initdata = { &s3c24xx_dclk0, &s3c24xx_dclk1,
@@ -544,6 +546,7 @@ static struct clk *bast_clocks[] __initdata = { &s3c24xx_clkout1, &s3c24xx_uclk, }; +#endif static struct s3c_cpufreq_board __initdata bast_cpufreq = { .refresh =7800 ,/* 7.8usec */
@@ -558,6 +561,7 @@ static struct s3c24xx_audio_simtec_pdata __initdata bast_audio = {static void __init bast_map_io (void ) { +#ifdef CONFIG_SAMSUNG_CLOCK /* initialise the clocks */ s3c24xx_dclk0.parent = &clk_upll;
@@ -572,6 +576,7 @@ static void __init bast_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1;s3c24xx_register_clocks (bast_clocks,ARRAY_SIZE (bast_clocks)); +#endif s3c_hwmon_set_platdata (&bast_hwmon_info);
arch/arm/mach-s3c24xx/mach-osiris.c +5 -0
@@ -344,12 +344,14 @@ static struct i2c_board_info osiris_i2c_devs[] __initdata = {/* Standard Osiris devices */ static struct platform_device *osiris_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_i2c0, &s3c_device_wdt, &s3c_device_nand, &osiris_pcmcia, }; +#ifdef CONFIG_SAMSUNG_CLOCK static struct clk *osiris_clocks[]__initdata = { &s3c24xx_dclk0, &s3c24xx_dclk1,
@@ -357,6 +359,7 @@ static struct clk *osiris_clocks[] __initdata = { &s3c24xx_clkout1, &s3c24xx_uclk, }; +#endif static struct s3c_cpufreq_board __initdata osiris_cpufreq = { .refresh =7800 ,/* refresh period is 7.8usec */
@@ -368,6 +371,7 @@ static void __init osiris_map_io(void) {unsigned long flags; +#ifdef CONFIG_SAMSUNG_CLOCK /* initialise the clocks */ s3c24xx_dclk0.parent = &clk_upll;
@@ -382,6 +386,7 @@ static void __init osiris_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1;s3c24xx_register_clocks (osiris_clocks,ARRAY_SIZE (osiris_clocks)); +#endif s3c24xx_init_io (osiris_iodesc,ARRAY_SIZE (osiris_iodesc));s3c24xx_init_clocks (0 );
arch/arm/mach-s3c24xx/mach-rx1950.c +5 -0
@@ -710,6 +710,7 @@ static struct i2c_board_info rx1950_i2c_devices[] = { };static struct platform_device *rx1950_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_lcd, &s3c_device_wdt, &s3c_device_i2c0,
@@ -728,17 +729,21 @@ static struct platform_device *rx1950_devices[] __initdata = { &rx1950_leds, }; +#ifdef CONFIG_SAMSUNG_CLOCK static struct clk *rx1950_clocks[]__initdata = { &s3c24xx_clkout0, &s3c24xx_clkout1, }; +#endif static void __init rx1950_map_io (void ) { +#ifdef CONFIG_SAMSUNG_CLOCK s3c24xx_clkout0.parent = &clk_h; s3c24xx_clkout1.parent = &clk_f;s3c24xx_register_clocks (rx1950_clocks,ARRAY_SIZE (rx1950_clocks)); +#endif s3c24xx_init_io (rx1950_iodesc,ARRAY_SIZE (rx1950_iodesc));s3c24xx_init_clocks (16934000 );
arch/arm/mach-s3c24xx/mach-vr1000.c +5 -0
@@ -286,6 +286,7 @@ static struct i2c_board_info vr1000_i2c_devs[] __initdata = {/* devices for this board */ static struct platform_device *vr1000_devices[]__initdata = { + &s3c2410_device_dclk, &s3c_device_ohci, &s3c_device_lcd, &s3c_device_wdt,
@@ -299,6 +300,7 @@ static struct platform_device *vr1000_devices[] __initdata = { &vr1000_led3, }; +#ifdef CONFIG_SAMSUNG_CLOCK static struct clk *vr1000_clocks[]__initdata = { &s3c24xx_dclk0, &s3c24xx_dclk1,
@@ -306,6 +308,7 @@ static struct clk *vr1000_clocks[] __initdata = { &s3c24xx_clkout1, &s3c24xx_uclk, }; +#endif static void vr1000_power_off (void ) {
@@ -314,6 +317,7 @@ static void vr1000_power_off(void)static void __init vr1000_map_io (void ) { +#if CONFIG_SAMSUNG_CLOCK /* initialise clock sources */ s3c24xx_dclk0.parent = &clk_upll;
@@ -328,6 +332,7 @@ static void __init vr1000_map_io(void) s3c24xx_uclk.parent = &s3c24xx_clkout1;s3c24xx_register_clocks (vr1000_clocks,ARRAY_SIZE (vr1000_clocks)); +#endif pm_power_off = vr1000_power_off;
arch/arm/mach-s3c24xx/s3c244x.c +2 -0
@@ -46,6 +46,7 @@#include <plat/nand-core.h> #include <plat/watchdog-reset.h> +#include "common.h" #include "regs-dsc.h" static struct map_desc s3c244x_iodesc[]__initdata = {
@@ -74,6 +75,7 @@ void __init s3c244x_map_io(void)s3c_nand_setname ("s3c2440-nand" ); s3c_device_ts.name ="s3c2440-ts" ; s3c_device_usbgadget.name ="s3c2440-usbgadget" ; + s3c2410_device_dclk.name ="s3c2440-dclk" ; } void __init_or_cpufreq s3c244x_setup_clocks(void)
Signature · 1 line
1.9.0
PATCH 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
Quoted 4 lines · Heiko St?bner
Add platform device and select the correct implementation automatically depending on wether the old
samsung_clockor the common clock framework is enabled.
Quoted 8 lines
This is only done for machines already using the old dclk implementation, as everybody else should move to use dt anyway.
The machine-specific settings for the external clocks will have to be set by somebody with knowledge about the specific hardware.
Signed-off-by Heiko Stuebner <[email protected]>Reviewed-by Tomasz Figa <[email protected]>
It seems this one just hit linux-next (in next-20140509).
Quoted 57 lines
arch/arm/mach-s3c24xx/Kconfig +15
-4@@ -18,6 +18,13 @@ config PLAT_S3C24XX help Base platform code for any Samsung S3C24XX device +config S3C2410_COMMON_DCLK + bool + select REGMAP_MMIO + help + Temporary symbol to build the dclk driver based on the common clock + framework. + menu "SAMSUNG S3C24XX SoCs Support" comment "S3C24XX SoCs"@@ -264,7 +271,8 @@ config ARCH_BAST select ISA select MACH_BAST_IDE select S3C2410_IOTIMING if ARM_S3C2410_CPUFREQ - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_NOR select S3C24XX_SIMTEC_PM if PM select S3C24XX_SIMTEC_USB@@ -345,7 +353,8 @@ config MACH_TCT_HAMMER config MACH_VR1000 bool "Thorcom VR1000" select MACH_BAST_IDE - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_NOR select S3C24XX_SIMTEC_PM if PM select S3C24XX_SIMTEC_USB@@ -530,7 +539,8 @@ config MACH_ANUBIS bool "Simtec Electronics ANUBIS" select HAVE_PATA_PLATFORM select S3C2440_XTAL_12000000 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_PM if PM select S3C_DEV_USB_HOST help@@ -571,7 +581,8 @@ config MACH_OSIRIS bool "Simtec IM2440D20 (OSIRIS) module" select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ select S3C2440_XTAL_12000000 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C2410_COMMON_DCLK if COMMON_CLK select S3C24XX_SIMTEC_PM if PM select S3C_DEV_NAND select S3C_DEV_USB_HOST
arch/arm/mach-s3c24xx/Kconfig config MACH_RX1950 · line 658
Quoted 6 lines
arch/arm/mach-s3c24xx/Kconfig +2
-1@@ -643,7 +654,8 @@ config MACH_RX1950 select PM_H1940 if PM select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ select S3C2440_XTAL_16934400 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C24XX_COMMON_DCLK if COMMON_CLK
This looks like a typo. Did you mean S3C2410_COMMON_DCLK?
arch/arm/mach-s3c24xx/Kconfig config MACH_RX1950 · line 661
Quoted 3 lines
arch/arm/mach-s3c24xx/Kconfig +0
-0select S3C24XX_PWM select S3C_DEV_NAND help
Paul Bolle
PATCH 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
Quoted 8 lines · Paul Bolle
Quoted 7 lines · Heiko St?bner
Add platform device and select the correct implementation automatically depending on wether the old
samsung_clockor the common clock framework is enabled.This is only done for machines already using the old dclk implementation, as everybody else should move to use dt anyway.
Quoted 8 lines
Quoted 5 lines
The machine-specific settings for the external clocks will have to be set by somebody with knowledge about the specific hardware.
Signed-off-by Heiko Stuebner <[email protected]>Reviewed-by Tomasz Figa <[email protected]>It seems this one just hit linux-next (in next-20140509).
Which is bad, because:
a) it conflicts with patches already applied in samsung-clk tree,
b) the DT binding added by patch 4/9 has not been acked .
Kukjin, might I ask you to drop this series from your tree and let me send you a pull request with necessary dependencies and this series applied properly to resolve merge conflicts, as I suggested before in one of my replies to this thread?
Best regards,
Tomasz
PATCH v2 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
Am Freitag, 9. Mai 2014, 19:53:21 schrieb Tomasz Figa:
Quoted 12 lines · Paul Bolle
Quoted 11 lines · Heiko Stübner
Quoted 10 lines
Add platform device and select the correct implementation automatically depending on wether the old
samsung_clockor the common clock framework is enabled.This is only done for machines already using the old dclk implementation, as everybody else should move to use dt anyway.
The machine-specific settings for the external clocks will have to be set by somebody with knowledge about the specific hardware.
Quoted 7 lines
Quoted 4 lines
Quoted 2 lines
Signed-off-by Heiko Stuebner <[email protected]>Reviewed-by Tomasz Figa <[email protected]>It seems this one just hit linux-next (in next-20140509).
Which is bad, because:
a) it conflicts with patches already applied in samsung-clk tree,
I remember seeing patches regarding more than one clk-samsung clock providers. Do you need any additional changes for s3c24xx from me for this?
Quoted 1 line
b) the DT binding added by patch 4/9 has not been acked .
I'm not 100% sure if this is necessary, as the binding is similar to most other Samsung bindings and looking through recent clock binding changes I didn't find any that seemed to have a special dt-maintainer ack - including Exynos ones. Also if I remember correctly there was this "if we don't respond, carry on" policy around :-) .
Heiko
Quoted 7 lines
Kukjin, might I ask you to drop this series from your tree and let me send you a pull request with necessary dependencies and this series applied properly to resolve merge conflicts, as I suggested before in one of my replies to this thread?
Best regards,
Tomasz
PATCH 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
Hi Heiko,
Quoted 16 lines · Heiko St?bner
Am Freitag, 9. Mai 2014, 19:53:21 schrieb Tomasz Figa:
Quoted 15 lines · Paul Bolle
Quoted 14 lines · Heiko St?bner
Quoted 12 lines
Add platform device and select the correct implementation automatically depending on wether the old
samsung_clockor the common clock framework is enabled.This is only done for machines already using the old dclk implementation, as everybody else should move to use dt anyway.
The machine-specific settings for the external clocks will have to be set by somebody with knowledge about the specific hardware.
Signed-off-by Heiko Stuebner <[email protected]>Reviewed-by Tomasz Figa <[email protected]>
Quoted 8 lines
Quoted 4 lines
Quoted 1 line
It seems this one just hit linux-next (in next-20140509).
Which is bad, because:
a) it conflicts with patches already applied in samsung-clk tree,I remember seeing patches regarding more than one clk-samsung clock providers. Do you need any additional changes for s3c24xx from me for this?
Yes, that's the problem here. If you could do it, I would appreciate it, but if you don't have time then I can handle this. The changes needed are mostly trivial - basically every common samsung_clk function gets new argument to a context structure. The branch to base on would be for_3.16/exynos5260 in samsung-clk tree.
Quoted 9 lines
Quoted 2 lines
b) the DT binding added by patch 4/9 has not been acked .
I'm not 100% sure if this is necessary, as the binding is similar to most other Samsung bindings and looking through recent clock binding changes I didn't find any that seemed to have a special dt-maintainer ack - including Exynos ones. Also if I remember correctly there was this "if we don't respond, carry on" policy around :-) .
Well, for me this could go as is, but rules should be followed and the rules are ACK or 3 weeks and a ping without response. So we need to wait at least to next Wednesday to bypass DT review.
Best regards,
Tomasz
PATCH v2 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
Hi Tomasz,
Am Samstag, 10. Mai 2014, 01:11:45 schrieb Tomasz Figa:
Quoted 43 lines · Heiko Stübner
Quoted 18 lines
Am Freitag, 9. Mai 2014, 19:53:21 schrieb Tomasz Figa:
Quoted 17 lines · Paul Bolle
Quoted 16 lines · Heiko Stübner
Quoted 14 lines
Add platform device and select the correct implementation automatically depending on wether the old
samsung_clockor the common clock framework is enabled.This is only done for machines already using the old dclk implementation,
as everybody else should move to use dt anyway.The machine-specific settings for the external clocks will have to be set
by somebody with knowledge about the specific hardware.Signed-off-by Heiko Stuebner <[email protected]>Reviewed-by Tomasz Figa <[email protected]>Quoted 8 lines
Quoted 4 lines
Quoted 1 line
It seems this one just hit linux-next (in next-20140509).
Which is bad, because:
a) it conflicts with patches already applied in samsung-clk tree,I remember seeing patches regarding more than one clk-samsung clock providers. Do you need any additional changes for s3c24xx from me for this?
Yes, that's the problem here. If you could do it, I would appreciate it, but if you don't have time then I can handle this. The changes needed are mostly trivial - basically every common
samsung_clkfunction gets new argument to a context structure. The branch to base on would be for_3.16/exynos5260 in samsung-clk tree.Quoted 8 lines
Quoted 1 line
b) the DT binding added by patch 4/9 has not been acked .
I'm not 100% sure if this is necessary, as the binding is similar to most other Samsung bindings and looking through recent clock binding changes I didn't find any that seemed to have a special dt-maintainer ack - including
Exynos ones. Also if I remember correctly there was this "if we don't respond, carry on" policy around :-) .
Quoted 3 lines
Well, for me this could go as is, but rules should be followed and the rules are ACK or 3 weeks and a ping without response. So we need to wait at least to next Wednesday to bypass DT review.
so I only remembered the abbreviated version of this :-) [without the 3 weeks requirement]. My guess is I should be able to adapt it to this change and also fix the typo Paul found until then.
Heiko
PATCH 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
Quoted 17 lines · Heiko St?bner
Hi Tomasz,
Quoted 15 lines
Quoted 8 lines
Quoted 4 lines
Quoted 1 line
It seems this one just hit linux-next (in next-20140509).
Which is bad, because:
a) it conflicts with patches already applied in samsung-clk tree,I remember seeing patches regarding more than one clk-samsung clock providers. Do you need any additional changes for s3c24xx from me for this?
Yes, that's the problem here. If you could do it, I would appreciate it, but if you don't have time then I can handle this. The changes needed are mostly trivial - basically every common
samsung_clkfunction gets new argument to a context structure. The branch to base on would be for_3.16/exynos5260 in samsung-clk tree.
I think, would be better if we could fix the conflicts with Hekio's additional patches...basically nobody wants revert something for next tree once it is landed. But in this case, it's up to Tomasz...
Probably, Heiko resubmitted? Is it based on the branch Tomasz memtioned, I didn't check it yet?..
Tomasz, do you still want me to drop this series in samsung tree now? Additional patches would be helpful to me because other dependency i.e., exynos5260...for me.
Quoted 9 lines
Quoted 9 lines
Quoted 8 lines
Quoted 1 line
b) the DT binding added by patch 4/9 has not been acked .
I'm not 100% sure if this is necessary, as the binding is similar to most other Samsung bindings and looking through recent clock binding changes I didn't find any that seemed to have a special dt-maintainer ack - including
Exynos ones. Also if I remember correctly there was this "if we don't respond, carry on" policy around :-) .
Quoted 8 lines
Quoted 3 lines
Well, for me this could go as is, but rules should be followed and the rules are ACK or 3 weeks and a ping without response. So we need to wait at least to next Wednesday to bypass DT review.
so I only remembered the abbreviated version of this :-) [without the 3 weeks requirement]. My guess is I should be able to adapt it to this change and also fix the typo Paul found until then.
In my memory, not 3 weeks...maybe 1week or 10days?...
- Kukjin
PATCH v2 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
Hi Kukjin,
Am Dienstag, 13. Mai 2014, 07:47:57 schrieb Kukjin Kim:
Quoted 22 lines · Heiko Stübner
Quoted 16 lines
Hi Tomasz,
Quoted 14 lines
Quoted 8 lines
Quoted 4 lines
Quoted 1 line
It seems this one just hit linux-next (in next-20140509).
Which is bad, because:
a) it conflicts with patches already applied in samsung-clk tree,I remember seeing patches regarding more than one clk-samsung clock providers. Do you need any additional changes for s3c24xx from me for this?
Yes, that's the problem here. If you could do it, I would appreciate it, but if you don't have time then I can handle this. The changes needed are mostly trivial - basically every common
samsung_clkfunction gets new argument to a context structure. The branch to base on would be for_3.16/exynos5260 in samsung-clk tree.I think, would be better if we could fix the conflicts with Hekio's additional patches...basically nobody wants revert something for next tree once it is landed. But in this case, it's up to Tomasz...
Quoted 6 lines
Probably, Heiko resubmitted? Is it based on the branch Tomasz memtioned, I didn't check it yet?..
Tomasz, do you still want me to drop this series in samsung tree now? Additional patches would be helpful to me because other dependency i.e., exynos5260...for me.
I submitted a v3 series yesterday, that is based on Tomasz' branch. This prevents build errors from happening. I'll let you two decide how you want to handle this :-)
I can also produce fixup patches if you two decide to keep the v2 series and just fix the conflicts.
Heiko
PATCH v2 3/9 ARM: S3C24XX: enable usage of common dclk if common clock framework is enabled
In reply to Paul BolleAm Freitag, 9. Mai 2014, 18:49:41 schrieb Paul Bolle:
Quoted 11 lines
arch/arm/mach-s3c24xx/Kconfig config MACH_RX1950 · line 660
Quoted 9 lines
arch/arm/mach-s3c24xx/Kconfig +2
-1@@ -643,7 +654,8 @@ config MACH_RX1950 select PM_H1940 if PM select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ select S3C2440_XTAL_16934400 - select S3C24XX_DCLK + select S3C24XX_DCLK if SAMSUNG_CLOCK + select S3C24XX_COMMON_DCLK if COMMON_CLKThis looks like a typo. Did you mean
S3C2410_COMMON_DCLK?
yep that is a typo, S3C2410_COMMON_DCLK is the correct one.
Heiko
PATCH v2 4/9 dt-bindings: add documentation for s3c2410 clock controller
In reply to Heiko StübnerDescribe the clock controller of s3c2410, s3c2440 and s3c2442.
--- .../bindings/clock/samsung,s3c2410-clock.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt
Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt new file +50 -0
@@ -0,0 +1,50 @@ +* Samsung S3C2410 Clock Controller + +The S3C2410 clock controller generates and supplies clock to various controllers +within the SoC. The clock binding described here is applicable to the s3c2410, +s3c2440 and s3c2442 SoCs in the s3c24x family. + +Required Properties: + +- compatible: should be one of the following. + - "samsung,s3c2410-clock" - controller compatible with S3C2410 SoC. + - "samsung,s3c2440-clock" - controller compatible with S3C2440 SoC. + - "samsung,s3c2442-clock" - controller compatible with S3C2442 SoC. +- reg: physical base address of the controller and length of memory mapped + region. +- #clock-cells: should be 1. + +Each clock is assigned an identifier and client nodes can use this identifier +to specify the clock which they consume. Some of the clocks are available only +on a particular SoC. + +All available clocks are defined as preprocessor macros in +dt-bindings/clock/samsung,s3c2410-clock.h header and can be used in device +tree sources. + +External clocks: + +The xti clock used as input for the plls is generated outside the SoC. It is +expected that is are defined using standard clock bindings with a +clock-output-names value of "xti". + +Example: Clock controller node: + + clocks: clock-controller@4c000000 { + compatible = "samsung,s3c2410-clock"; + reg = <0x4c000000 0x20>; + #clock-cells = <1>; + }; + +Example: UART controller node that consumes the clock generated by the clock + controller (refer to the standard clock bindings for information about + "clocks" and "clock-names" properties): + + serial@50004000 { + compatible = "samsung,s3c2440-uart"; + reg = <0x50004000 0x4000>; + interrupts = <1 23 3 4>, <1 23 4 4>; + clock-names = "uart", "clk_uart_baud2"; + clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>; + status = "disabled"; + };
Signature · 1 line
1.9.0
[ATTN] Re: [PATCH v2 4/9] dt-bindings: add documentation for s3c2410 clock controller
Rob, Pawel, Mark, Ian, Kumar,
Quoted 8 lines · Heiko St?bner
Describe the clock controller of s3c2410, s3c2440 and s3c2442.
Signed-off-by Heiko Stuebner <[email protected]>Acked-by Tomasz Figa <[email protected]>--- .../bindings/clock/samsung,s3c2410-clock.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+)create mode 100644
Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt
Might we ask you to take a look, please?
Best regards,
Tomasz
PATCH v2 5/9 clk: samsung: add clock controller driver for s3c2410, s3c2440 and s3c2442
In reply to Heiko StübnerThis driver can handle the clock controllers of the socs mentioned above, as they share a common clock tree with only small differences.
The clock structure is built according to the manuals of the included SoCs and might include changes in comparison to the previous clock structure.
As pll-rate-tables only the 12mhz variants are currently included. The original code was wrongly checking for 169mhz xti values [a 0 to much at the end], so the original 16mhz pll table would have never been included and its values are so obscure that I have no possibility to at least check their sane-ness. When using the formula from the manual the resulting frequency is near the table value but still slightly off.
--- drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-s3c2410.c | 477 ++++++++++++++++++++++++++++++++++++ include/dt-bindings/clock/s3c2410.h | 62 +++++ 3 files changed, 540 insertions(+) create mode 100644 drivers/clk/samsung/clk-s3c2410.c create mode 100644 include/dt-bindings/clock/s3c2410.h
drivers/clk/samsung/Makefile +1 -0
@@ -8,6 +8,7 @@ obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5250.o obj-$(CONFIG_SOC_EXYNOS5420) += clk-exynos5420.o obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o obj-$(CONFIG_ARCH_EXYNOS) += clk-exynos-audss.o +obj-$(CONFIG_S3C2410_COMMON_CLK)+= clk-s3c2410.o obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o
drivers/clk/samsung/clk-s3c2410.c new file +477 -0
477 lines not on this page · raw message
include/dt-bindings/clock/s3c2410.h new file +62 -0
62 lines not on this page · raw message
Signature · 1 line
1.9.0
PATCH v2 6/9 ARM: S3C24XX: add platform code for conversion to the common clock framework
In reply to Heiko StübnerThis adds the necessary init functions to init the clocks from the common clock framework and necessary CONFIG_SAMSUNG_CLOCK ifdefs around the legacy clock code.
This also includes empty stubs for the *_setup_clocks functions that are called from the cpufreq driver on resume.
--- arch/arm/mach-s3c24xx/Kconfig | 5 +++++ arch/arm/mach-s3c24xx/common.c | 25 +++++++++++++++++++++++++ arch/arm/mach-s3c24xx/common.h | 7 +++++++ arch/arm/mach-s3c24xx/s3c2410.c | 6 ++++++ arch/arm/mach-s3c24xx/s3c2442.c | 3 ++- arch/arm/mach-s3c24xx/s3c244x.c | 6 ++++++ 6 files changed, 51 insertions(+), 1 deletion(-)
arch/arm/mach-s3c24xx/Kconfig +5 -0
@@ -18,6 +18,11 @@ config PLAT_S3C24XX help Base platform code for any Samsung S3C24XX device +config S3C2410_COMMON_CLK + bool + help + Build the s3c2410 clock driver based on the common clock framework. + config S3C2410_COMMON_DCLK bool select REGMAP_MMIO
arch/arm/mach-s3c24xx/common.c +25 -0
@@ -53,6 +53,7 @@#include <plat/cpu-freq.h> #include <plat/pll.h> #include <plat/pwm-core.h> +#include <plat/watchdog-reset.h> #include "common.h"
@@ -534,6 +535,14 @@ struct platform_device s3c2443_device_dma = { };#endif +#if defined(CONFIG_COMMON_CLK ) && defined(CONFIG_CPU_S3C2410 ) +void __init s3c2410_init_clocks (int xtal) +{ +s3c2410_common_clk_init (NULL , xtal,0 ,S3C24XX_VA_CLKPWR ); +samsung_wdt_reset_init (S3C24XX_VA_WATCHDOG ); +} +#endif +#ifdef CONFIG_CPU_S3C2412 void __init s3c2412_init_clocks (int xtal) {
@@ -548,6 +557,22 @@ void __init s3c2416_init_clocks(int xtal) }#endif +#if defined(CONFIG_COMMON_CLK ) && defined(CONFIG_CPU_S3C2440 ) +void __init s3c2440_init_clocks (int xtal) +{ +s3c2410_common_clk_init (NULL , xtal,1 ,S3C24XX_VA_CLKPWR ); +samsung_wdt_reset_init (S3C24XX_VA_WATCHDOG ); +} +#endif + +#if defined(CONFIG_COMMON_CLK ) && defined(CONFIG_CPU_S3C2442 ) +void __init s3c2442_init_clocks (int xtal) +{ +s3c2410_common_clk_init (NULL , xtal,2 ,S3C24XX_VA_CLKPWR ); +samsung_wdt_reset_init (S3C24XX_VA_WATCHDOG ); +} +#endif +#ifdef CONFIG_CPU_S3C2443 void __init s3c2443_init_clocks (int xtal) {
arch/arm/mach-s3c24xx/common.h +7 -0
@@ -77,6 +77,7 @@ extern void s3c244x_restart(enum reboot_mode mode, const char *cmd);#ifdef CONFIG_CPU_S3C2440 extern int s3c2440_init (void );extern void s3c2440_map_io (void ); +extern void s3c2440_init_clocks (int xtal);extern void s3c2440_init_irq (void );#else #define s3c2440_init NULL
@@ -86,6 +87,7 @@ extern void s3c2440_init_irq(void);#ifdef CONFIG_CPU_S3C2442 extern int s3c2442_init (void );extern void s3c2442_map_io (void ); +extern void s3c2442_init_clocks (int xtal);extern void s3c2442_init_irq (void );#else #define s3c2442_init NULL
@@ -116,6 +118,11 @@ extern struct platform_device s3c2443_device_dma;extern struct platform_device s3c2410_device_dclk; +#ifdef CONFIG_S3C2410_COMMON_CLK +void __init s3c2410_common_clk_init (struct device_node *np,unsigned long xti_f, +int current_soc, +void __iomem *reg_base); +#endif #ifdef CONFIG_S3C2412_COMMON_CLK void __init s3c2412_common_clk_init (struct device_node *np,unsigned long xti_f,unsigned long ext_f,void __iomem *reg_base);
arch/arm/mach-s3c24xx/s3c2410.c +6 -0
@@ -83,6 +83,7 @@ void __init s3c2410_map_io(void)iotable_init (s3c2410_iodesc,ARRAY_SIZE (s3c2410_iodesc)); } +#ifdef CONFIG_SAMSUNG_CLOCK void __init_or_cpufreq s3c2410_setup_clocks(void) {struct clk *xtal_clk;
@@ -142,6 +143,11 @@ void __init s3c2410_init_clocks(int xtal)clkdev_add_table (s3c2410_clk_lookup,ARRAY_SIZE (s3c2410_clk_lookup));samsung_wdt_reset_init (S3C24XX_VA_WATCHDOG ); } +#else +void __init_or_cpufreq s3c2410_setup_clocks(void) +{ +} +#endif struct bus_type s3c2410_subsys = { .name ="s3c2410-core" ,
arch/arm/mach-s3c24xx/s3c2442.c +2 -1
@@ -53,6 +53,7 @@#include "common.h" +#ifdef CONFIG_SAMSUNG_CLOCK /* S3C2442 extended clock support */ static unsigned long s3c2442_camif_upll_round(struct clk *clk,
@@ -162,7 +163,7 @@ static __init int s3c2442_clk_init(void) }arch_initcall (s3c2442_clk_init); - +#endif static struct device s3c2442_dev = { .bus = &s3c2442_subsys,
arch/arm/mach-s3c24xx/s3c244x.c +6 -0
@@ -78,6 +78,7 @@ void __init s3c244x_map_io(void) s3c2410_device_dclk.name ="s3c2440-dclk" ; } +#ifdef CONFIG_SAMSUNG_CLOCK void __init_or_cpufreq s3c244x_setup_clocks(void) {struct clk *xtal_clk;
@@ -138,6 +139,11 @@ void __init s3c244x_init_clocks(int xtal)s3c2410_baseclk_add ();samsung_wdt_reset_init (S3C24XX_VA_WATCHDOG ); } +#else +void __init_or_cpufreq s3c244x_setup_clocks(void) +{ +} +#endif /* Since the S3C2442 and S3C2440 share items, put both subsystems here */
Signature · 1 line
1.9.0
PATCH v2 7/9 ARM: S3C24XX: convert s3c2440 and s3c2442 to common clock framework
In reply to Heiko StübnerConvert all machines using these cpus to use the ccf clock driver instead of the legacy Samsung clock implementation.
Some of the more esotheric machines will probably need a fixup, as they do strange things to the clkout outputs, that I did not really understand nor have the hardware to check.
--- arch/arm/mach-s3c24xx/Kconfig | 8 ++++---- arch/arm/mach-s3c24xx/Makefile | 4 ++-- arch/arm/mach-s3c24xx/common.c | 4 ---- arch/arm/mach-s3c24xx/mach-anubis.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-at2440evb.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-gta02.c | 8 ++++++-- arch/arm/mach-s3c24xx/mach-mini2440.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-nexcoder.c | 15 ++++++++++++--- arch/arm/mach-s3c24xx/mach-osiris.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-rx1950.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-rx3715.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-smdk2440.c | 10 +++++++--- 12 files changed, 73 insertions(+), 36 deletions(-)
arch/arm/mach-s3c24xx/Kconfig +4 -4
@@ -73,10 +73,10 @@ config CPU_S3C2416 config CPU_S3C2440 bool "SAMSUNG S3C2440" - depends on SAMSUNG_CLOCK + select COMMON_CLK select CPU_ARM920T select CPU_LLSERIAL_S3C2440 - select S3C2410_CLOCK + select S3C2410_COMMON_CLK select S3C2410_PM if PM select S3C2440_DMA if S3C24XX_DMA help
@@ -84,10 +84,10 @@ config CPU_S3C2440 config CPU_S3C2442 bool "SAMSUNG S3C2442" - depends on SAMSUNG_CLOCK + select COMMON_CLK select CPU_ARM920T select CPU_LLSERIAL_S3C2440 - select S3C2410_CLOCK + select S3C2410_COMMON_CLK select S3C2410_DMA if S3C24XX_DMA select S3C2410_PM if PM help
arch/arm/mach-s3c24xx/Makefile +2 -2
@@ -29,9 +29,9 @@ obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep-s3c2412.o obj-$(CONFIG_CPU_S3C2416) += s3c2416.o obj-$(CONFIG_S3C2416_PM) += pm-s3c2416.o -obj-$(CONFIG_CPU_S3C2440) += s3c2440.o clock-s3c2440.o +obj-$(CONFIG_CPU_S3C2440) += s3c2440.o obj-$(CONFIG_CPU_S3C2442) += s3c2442.o -obj-$(CONFIG_CPU_S3C244X) += s3c244x.o clock-s3c244x.o +obj-$(CONFIG_CPU_S3C244X) += s3c244x.o obj-$(CONFIG_S3C2440_DMA) += dma-s3c2440.o obj-$(CONFIG_S3C2440_PLL_12000000) += pll-s3c2440-12000000.o obj-$(CONFIG_S3C2440_PLL_16934400) += pll-s3c2440-16934400.o
arch/arm/mach-s3c24xx/common.c +0 -4
@@ -92,7 +92,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32440000, .idmask = 0xffffffff, .map_io = s3c2440_map_io, - .init_clocks = s3c244x_init_clocks, .init_uarts = s3c244x_init_uarts, .init = s3c2440_init, .name = name_s3c2440
@@ -101,7 +100,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32440001, .idmask = 0xffffffff, .map_io = s3c2440_map_io, - .init_clocks = s3c244x_init_clocks, .init_uarts = s3c244x_init_uarts, .init = s3c2440_init, .name = name_s3c2440a
@@ -110,7 +108,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32440aaa, .idmask = 0xffffffff, .map_io = s3c2442_map_io, - .init_clocks = s3c244x_init_clocks, .init_uarts = s3c244x_init_uarts, .init = s3c2442_init, .name = name_s3c2442
@@ -119,7 +116,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32440aab, .idmask = 0xffffffff, .map_io = s3c2442_map_io, - .init_clocks = s3c244x_init_clocks, .init_uarts = s3c244x_init_uarts, .init = s3c2442_init, .name = name_s3c2442b
arch/arm/mach-s3c24xx/mach-anubis.c +7 -3
@@ -46,7 +46,6 @@#include <net/ax88796.h> -#include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> #include <linux/platform_data/asoc-s3c24xx_simtec.h>
@@ -415,7 +414,6 @@ static void __init anubis_map_io(void)#endif s3c24xx_init_io (anubis_iodesc,ARRAY_SIZE (anubis_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (anubis_uartcfgs,ARRAY_SIZE (anubis_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 );
@@ -433,6 +431,12 @@ static void __init anubis_map_io(void) } } +static void __init anubis_init_time (void ) +{ +s3c2440_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init anubis_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -452,6 +456,6 @@ MACHINE_START(ANUBIS, "Simtec-Anubis") .map_io = anubis_map_io, .init_machine = anubis_init, .init_irq = s3c2440_init_irq, - .init_time = samsung_timer_init, + .init_time = anubis_init_time, .restart = s3c244x_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-at2440evb.c +7 -3
@@ -45,7 +45,6 @@#include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> #include <linux/platform_data/mmc-s3cmci.h>
@@ -192,11 +191,16 @@ static struct platform_device *at2440evb_devices[] __initdata = {static void __init at2440evb_map_io (void ) {s3c24xx_init_io (at2440evb_iodesc,ARRAY_SIZE (at2440evb_iodesc)); -s3c24xx_init_clocks (16934400 );s3c24xx_init_uarts (at2440evb_uartcfgs,ARRAY_SIZE (at2440evb_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init at2440evb_init_time (void ) +{ +s3c2440_init_clocks (16934400 ); +samsung_timer_init (); +} +static void __init at2440evb_init (void ) {s3c24xx_fb_set_platdata (&at2440evb_fb_info);
@@ -213,6 +217,6 @@ MACHINE_START(AT2440EVB, "AT2440EVB") .map_io = at2440evb_map_io, .init_machine = at2440evb_init, .init_irq = s3c2440_init_irq, - .init_time = samsung_timer_init, + .init_time = at2440evb_init_time, .restart = s3c244x_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-gta02.c +6 -2
@@ -501,7 +501,6 @@ static struct platform_device gta02_buttons_device = {static void __init gta02_map_io (void ) {s3c24xx_init_io (gta02_iodesc,ARRAY_SIZE (gta02_iodesc)); -s3c24xx_init_clocks (12000000 );s3c24xx_init_uarts (gta02_uartcfgs,ARRAY_SIZE (gta02_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); }
@@ -585,6 +584,11 @@ static void __init gta02_machine_init(void)regulator_has_full_constraints (); } +static void __init gta02_init_time (void ) +{ +s3c2442_init_clocks (12000000 ); +samsung_timer_init (); +}MACHINE_START (NEO1973_GTA02 ,"GTA02" )/* Maintainer: Nelson Castillo <[email protected]> */
@@ -592,6 +596,6 @@ MACHINE_START(NEO1973_GTA02, "GTA02") .map_io = gta02_map_io, .init_irq = s3c2442_init_irq, .init_machine = gta02_machine_init, - .init_time = samsung_timer_init, + .init_time = gta02_init_time, .restart = s3c244x_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-mini2440.c +7 -3
@@ -54,7 +54,6 @@#include <linux/mtd/partitions.h> #include <plat/gpio-cfg.h> -#include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/samsung-time.h>
@@ -525,11 +524,16 @@ static struct platform_device *mini2440_devices[] __initdata = {static void __init mini2440_map_io (void ) {s3c24xx_init_io (mini2440_iodesc,ARRAY_SIZE (mini2440_iodesc)); -s3c24xx_init_clocks (12000000 );s3c24xx_init_uarts (mini2440_uartcfgs,ARRAY_SIZE (mini2440_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init mini2440_init_time (void ) +{ +s3c2440_init_clocks (12000000 ); +samsung_timer_init (); +} +/* * mini2440_features string *
@@ -690,6 +694,6 @@ MACHINE_START(MINI2440, "MINI2440") .map_io = mini2440_map_io, .init_machine = mini2440_init, .init_irq = s3c2440_init_irq, - .init_time = samsung_timer_init, + .init_time = mini2440_init_time, .restart = s3c244x_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-nexcoder.c +12 -3
@@ -42,7 +42,6 @@#include <linux/platform_data/i2c-s3c2410.h> #include <plat/gpio-cfg.h> -#include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/samsung-time.h>
@@ -135,13 +134,23 @@ static void __init nexcoder_sensorboard_init(void)static void __init nexcoder_map_io (void ) {s3c24xx_init_io (nexcoder_iodesc,ARRAY_SIZE (nexcoder_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (nexcoder_uartcfgs,ARRAY_SIZE (nexcoder_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 );nexcoder_sensorboard_init (); } +static void __init nexcoder_init_time (void ) +{ +/* +* for whatever reason the nexcoder called s3c24xx_init_clocks(0) +* meaning a xti value of 0Hz, so this machine will most likely +* not work out of the box and needs a fixup. +*/ +s3c2440_init_clocks (0 ); +samsung_timer_init (); +} +static void __init nexcoder_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -154,6 +163,6 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") .map_io = nexcoder_map_io, .init_machine = nexcoder_init, .init_irq = s3c2440_init_irq, - .init_time = samsung_timer_init, + .init_time = nexcoder_init_time, .restart = s3c244x_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-osiris.c +7 -3
@@ -39,7 +39,6 @@#include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/cpu-freq.h> #include <plat/devs.h>
@@ -389,7 +388,6 @@ static void __init osiris_map_io(void)#endif s3c24xx_init_io (osiris_iodesc,ARRAY_SIZE (osiris_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (osiris_uartcfgs,ARRAY_SIZE (osiris_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 );
@@ -413,6 +411,12 @@ static void __init osiris_map_io(void)local_irq_restore (flags); } +static void __init osiris_init_time (void ) +{ +s3c2440_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init osiris_init (void ) {register_syscore_ops (&osiris_pm_syscore_ops);
@@ -434,6 +438,6 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS") .map_io = osiris_map_io, .init_irq = s3c2440_init_irq, .init_machine = osiris_init, - .init_time = samsung_timer_init, + .init_time = osiris_init_time, .restart = s3c244x_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-rx1950.c +7 -3
@@ -53,7 +53,6 @@#include <mach/regs-lcd.h> #include <mach/gpio-samsung.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/pm.h>
@@ -746,7 +745,6 @@ static void __init rx1950_map_io(void)#endif s3c24xx_init_io (rx1950_iodesc,ARRAY_SIZE (rx1950_iodesc)); -s3c24xx_init_clocks (16934000 );s3c24xx_init_uarts (rx1950_uartcfgs,ARRAY_SIZE (rx1950_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 );
@@ -759,6 +757,12 @@ static void __init rx1950_map_io(void)s3c_pm_init (); } +static void __init rx1950_init_time (void ) +{ +s3c2442_init_clocks (16934000 ); +samsung_timer_init (); +} +static void __init rx1950_init_machine (void ) {int i;
@@ -821,6 +825,6 @@ MACHINE_START(RX1950, "HP iPAQ RX1950") .reserve = rx1950_reserve, .init_irq = s3c2442_init_irq, .init_machine = rx1950_init_machine, - .init_time = samsung_timer_init, + .init_time = rx1950_init_time, .restart = s3c244x_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-rx3715.c +7 -3
@@ -45,7 +45,6 @@#include <mach/regs-lcd.h> #include <mach/gpio-samsung.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/pm.h>
@@ -179,11 +178,16 @@ static struct platform_device *rx3715_devices[] __initdata = {static void __init rx3715_map_io (void ) {s3c24xx_init_io (rx3715_iodesc,ARRAY_SIZE (rx3715_iodesc)); -s3c24xx_init_clocks (16934000 );s3c24xx_init_uarts (rx3715_uartcfgs,ARRAY_SIZE (rx3715_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init rx3715_init_time (void ) +{ +s3c2440_init_clocks (16934000 ); +samsung_timer_init (); +} +/* H1940 and RX3715 need to reserve this for suspend */ static void __init rx3715_reserve (void ) {
@@ -210,6 +214,6 @@ MACHINE_START(RX3715, "IPAQ-RX3715") .reserve = rx3715_reserve, .init_irq = s3c2440_init_irq, .init_machine = rx3715_init_machine, - .init_time = samsung_timer_init, + .init_time = rx3715_init_time, .restart = s3c244x_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-smdk2440.c +7 -3
@@ -38,7 +38,6 @@#include <mach/fb.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/samsung-time.h>
@@ -159,11 +158,16 @@ static struct platform_device *smdk2440_devices[] __initdata = {static void __init smdk2440_map_io (void ) {s3c24xx_init_io (smdk2440_iodesc,ARRAY_SIZE (smdk2440_iodesc)); -s3c24xx_init_clocks (16934400 );s3c24xx_init_uarts (smdk2440_uartcfgs,ARRAY_SIZE (smdk2440_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init smdk2440_init_time (void ) +{ +s3c2440_init_clocks (16934400 ); +samsung_timer_init (); +} +static void __init smdk2440_machine_init (void ) {s3c24xx_fb_set_platdata (&smdk2440_fb_info);
@@ -180,6 +184,6 @@ MACHINE_START(S3C2440, "SMDK2440") .init_irq = s3c2440_init_irq, .map_io = smdk2440_map_io, .init_machine = smdk2440_machine_init, - .init_time = samsung_timer_init, + .init_time = smdk2440_init_time, .restart = s3c244x_restart,MACHINE_END
Signature · 1 line
1.9.0
PATCH v2 8/9 ARM: S3C24XX: convert s3c2410 to common clock framework
In reply to Heiko StübnerConvert the machines using the s3c2410 to use the new driver based on the common clock framework instead of the legacy Samsung clock driver.
As with the s3c244x, machines using the clkout output will need a fixup from someone with the hardware.
--- arch/arm/mach-s3c24xx/Kconfig | 4 ++-- arch/arm/mach-s3c24xx/common.c | 2 -- arch/arm/mach-s3c24xx/mach-amlm5900.c | 9 +++++++-- arch/arm/mach-s3c24xx/mach-bast.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-h1940.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-n30.c | 12 ++++++++---- arch/arm/mach-s3c24xx/mach-nexcoder.c | 7 +------ arch/arm/mach-s3c24xx/mach-otom.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-qt2410.c | 9 +++++++-- arch/arm/mach-s3c24xx/mach-smdk2410.c | 9 +++++++-- arch/arm/mach-s3c24xx/mach-tct_hammer.c | 9 +++++++-- arch/arm/mach-s3c24xx/mach-vr1000.c | 10 +++++++--- 12 files changed, 67 insertions(+), 34 deletions(-)
arch/arm/mach-s3c24xx/Kconfig +2 -2
@@ -37,10 +37,10 @@ comment "S3C24XX SoCs" config CPU_S3C2410 bool "SAMSUNG S3C2410" default y - depends on SAMSUNG_CLOCK + select COMMON_CLK select CPU_ARM920T select CPU_LLSERIAL_S3C2410 - select S3C2410_CLOCK + select S3C2410_COMMON_CLK select S3C2410_DMA if S3C24XX_DMA select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ select S3C2410_PM if PM
arch/arm/mach-s3c24xx/common.c +0 -2
@@ -74,7 +74,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32410000, .idmask = 0xffffffff, .map_io = s3c2410_map_io, - .init_clocks = s3c2410_init_clocks, .init_uarts = s3c2410_init_uarts, .init = s3c2410_init, .name = name_s3c2410
@@ -83,7 +82,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32410002, .idmask = 0xffffffff, .map_io = s3c2410_map_io, - .init_clocks = s3c2410_init_clocks, .init_uarts = s3c2410_init_uarts, .init = s3c2410a_init, .name = name_s3c2410a
arch/arm/mach-s3c24xx/mach-amlm5900.c +7 -2
@@ -161,11 +161,16 @@ static struct platform_device *amlm5900_devices[] __initdata = {static void __init amlm5900_map_io (void ) {s3c24xx_init_io (amlm5900_iodesc,ARRAY_SIZE (amlm5900_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (amlm5900_uartcfgs,ARRAY_SIZE (amlm5900_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init amlm5900_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +#ifdef CONFIG_FB_S3C2410 static struct s3c2410fb_display __initdata amlm5900_lcd_info = { .width = 160,
@@ -241,6 +246,6 @@ MACHINE_START(AML_M5900, "AML_M5900") .map_io = amlm5900_map_io, .init_irq = s3c2410_init_irq, .init_machine = amlm5900_init, - .init_time = samsung_timer_init, + .init_time = amlm5900_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-bast.c +7 -3
@@ -50,7 +50,6 @@#include <mach/regs-lcd.h> #include <mach/gpio-samsung.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/cpu-freq.h> #include <plat/devs.h>
@@ -581,11 +580,16 @@ static void __init bast_map_io(void)s3c_hwmon_set_platdata (&bast_hwmon_info);s3c24xx_init_io (bast_iodesc,ARRAY_SIZE (bast_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (bast_uartcfgs,ARRAY_SIZE (bast_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init bast_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init bast_init (void ) {register_syscore_ops (&bast_pm_syscore_ops);
@@ -613,6 +617,6 @@ MACHINE_START(BAST, "Simtec-BAST") .map_io = bast_map_io, .init_irq = s3c2410_init_irq, .init_machine = bast_init, - .init_time = samsung_timer_init, + .init_time = bast_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-h1940.c +7 -3
@@ -56,7 +56,6 @@#include <mach/regs-lcd.h> #include <mach/gpio-samsung.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/gpio-cfg.h>
@@ -646,7 +645,6 @@ static struct platform_device *h1940_devices[] __initdata = {static void __init h1940_map_io (void ) {s3c24xx_init_io (h1940_iodesc,ARRAY_SIZE (h1940_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (h1940_uartcfgs,ARRAY_SIZE (h1940_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 );
@@ -662,6 +660,12 @@ static void __init h1940_map_io(void)WARN_ON (gpiochip_add (&h1940_latch_gpiochip)); } +static void __init h1940_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +/* H1940 and RX3715 need to reserve this for suspend */ static void __init h1940_reserve (void ) {
@@ -739,6 +743,6 @@ MACHINE_START(H1940, "IPAQ-H1940") .reserve = h1940_reserve, .init_irq = s3c2410_init_irq, .init_machine = h1940_init, - .init_time = samsung_timer_init, + .init_time = h1940_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-n30.c +8 -4
@@ -45,7 +45,6 @@#include <linux/platform_data/i2c-s3c2410.h> #include <plat/regs-serial.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <linux/platform_data/mmc-s3cmci.h>
@@ -535,11 +534,16 @@ static void __init n30_map_io(void) {s3c24xx_init_io (n30_iodesc,ARRAY_SIZE (n30_iodesc));n30_hwinit (); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (n30_uartcfgs,ARRAY_SIZE (n30_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init n30_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +/* GPB3 is the line that controls the pull-up for the USB D+ line */ static void __init n30_init (void )
@@ -591,7 +595,7 @@ MACHINE_START(N30, "Acer-N30")Ben Dooks <[email protected]> */ .atag_offset = 0x100, - .init_time = samsung_timer_init, + .init_time = n30_init_time, .init_machine = n30_init, .init_irq = s3c2410_init_irq, .map_io = n30_map_io,
@@ -602,7 +606,7 @@ MACHINE_START(N35, "Acer-N35")/* Maintainer: Christer Weinigel <[email protected]> */ .atag_offset = 0x100, - .init_time = samsung_timer_init, + .init_time = n30_init_time, .init_machine = n30_init, .init_irq = s3c2410_init_irq, .map_io = n30_map_io,
arch/arm/mach-s3c24xx/mach-nexcoder.c +1 -6
@@ -142,12 +142,7 @@ static void __init nexcoder_map_io(void)static void __init nexcoder_init_time (void ) { -/* -* for whatever reason the nexcoder called s3c24xx_init_clocks(0) -* meaning a xti value of 0Hz, so this machine will most likely -* not work out of the box and needs a fixup. -*/ -s3c2440_init_clocks (0 ); +s3c2440_init_clocks (12000000 );samsung_timer_init (); }
arch/arm/mach-s3c24xx/mach-otom.c +7 -3
@@ -29,7 +29,6 @@#include <mach/hardware.h> #include <mach/regs-gpio.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/regs-serial.h>
@@ -100,11 +99,16 @@ static struct platform_device *otom11_devices[] __initdata = {static void __init otom11_map_io (void ) {s3c24xx_init_io (otom11_iodesc,ARRAY_SIZE (otom11_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (otom11_uartcfgs,ARRAY_SIZE (otom11_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init otom11_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init otom11_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -117,6 +121,6 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1") .map_io = otom11_map_io, .init_machine = otom11_init, .init_irq = s3c2410_init_irq, - .init_time = samsung_timer_init, + .init_time = otom11_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-qt2410.c +7 -2
@@ -304,11 +304,16 @@ __setup("tft=", qt2410_tft_setup);static void __init qt2410_map_io (void ) {s3c24xx_init_io (qt2410_iodesc,ARRAY_SIZE (qt2410_iodesc)); -s3c24xx_init_clocks (12 *1000 *1000 );s3c24xx_init_uarts (smdk2410_uartcfgs,ARRAY_SIZE (smdk2410_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init qt2410_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init qt2410_machine_init (void ) {s3c_nand_set_platdata (&qt2410_nand_info);
@@ -346,6 +351,6 @@ MACHINE_START(QT2410, "QT2410") .map_io = qt2410_map_io, .init_irq = s3c2410_init_irq, .init_machine = qt2410_machine_init, - .init_time = samsung_timer_init, + .init_time = qt2410_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-smdk2410.c +7 -2
@@ -99,11 +99,16 @@ static struct platform_device *smdk2410_devices[] __initdata = {static void __init smdk2410_map_io (void ) {s3c24xx_init_io (smdk2410_iodesc,ARRAY_SIZE (smdk2410_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (smdk2410_uartcfgs,ARRAY_SIZE (smdk2410_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init smdk2410_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init smdk2410_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -118,6 +123,6 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc .map_io = smdk2410_map_io, .init_irq = s3c2410_init_irq, .init_machine = smdk2410_init, - .init_time = samsung_timer_init, + .init_time = smdk2410_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-tct_hammer.c +7 -2
@@ -135,11 +135,16 @@ static struct platform_device *tct_hammer_devices[] __initdata = {static void __init tct_hammer_map_io (void ) {s3c24xx_init_io (tct_hammer_iodesc,ARRAY_SIZE (tct_hammer_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (tct_hammer_uartcfgs,ARRAY_SIZE (tct_hammer_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init tct_hammer_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init tct_hammer_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -151,6 +156,6 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER") .map_io = tct_hammer_map_io, .init_irq = s3c2410_init_irq, .init_machine = tct_hammer_init, - .init_time = samsung_timer_init, + .init_time = tct_hammer_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-vr1000.c +7 -3
@@ -42,7 +42,6 @@#include <mach/regs-gpio.h> #include <mach/gpio-samsung.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/regs-serial.h>
@@ -337,11 +336,16 @@ static void __init vr1000_map_io(void) pm_power_off = vr1000_power_off;s3c24xx_init_io (vr1000_iodesc,ARRAY_SIZE (vr1000_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (vr1000_uartcfgs,ARRAY_SIZE (vr1000_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init vr1000_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init vr1000_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -362,6 +366,6 @@ MACHINE_START(VR1000, "Thorcom-VR1000") .map_io = vr1000_map_io, .init_machine = vr1000_init, .init_irq = s3c2410_init_irq, - .init_time = samsung_timer_init, + .init_time = vr1000_init_time, .restart = s3c2410_restart,MACHINE_END
Signature · 1 line
1.9.0
PATCH v2 8/9 ARM: S3C24XX: convert s3c2410 to common clock framework
Convert the machines using the s3c2410 to use the new driver based on the common clock framework instead of the legacy Samsung clock driver.
As with the s3c244x, machines using the clkout output will need a fixup from someone with the hardware.
---
adapted to apply against v3.16-next/clk-s3c24xx
arch/arm/mach-s3c24xx/Kconfig | 4 ++-- arch/arm/mach-s3c24xx/common.c | 2 -- arch/arm/mach-s3c24xx/mach-amlm5900.c | 9 +++++++-- arch/arm/mach-s3c24xx/mach-bast.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-h1940.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-n30.c | 12 ++++++++---- arch/arm/mach-s3c24xx/mach-nexcoder.c | 7 +------ arch/arm/mach-s3c24xx/mach-otom.c | 10 +++++++--- arch/arm/mach-s3c24xx/mach-qt2410.c | 9 +++++++-- arch/arm/mach-s3c24xx/mach-smdk2410.c | 9 +++++++-- arch/arm/mach-s3c24xx/mach-tct_hammer.c | 9 +++++++-- arch/arm/mach-s3c24xx/mach-vr1000.c | 10 +++++++--- 12 files changed, 67 insertions(+), 34 deletions(-)
arch/arm/mach-s3c24xx/Kconfig +2 -2
@@ -37,10 +37,10 @@ comment "S3C24XX SoCs" config CPU_S3C2410 bool "SAMSUNG S3C2410" default y - depends on SAMSUNG_CLOCK + select COMMON_CLK select CPU_ARM920T select CPU_LLSERIAL_S3C2410 - select S3C2410_CLOCK + select S3C2410_COMMON_CLK select S3C2410_DMA if S3C24XX_DMA select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ select S3C2410_PM if PM
arch/arm/mach-s3c24xx/common.c +0 -2
@@ -74,7 +74,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32410000, .idmask = 0xffffffff, .map_io = s3c2410_map_io, - .init_clocks = s3c2410_init_clocks, .init_uarts = s3c2410_init_uarts, .init = s3c2410_init, .name = name_s3c2410
@@ -83,7 +82,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = 0x32410002, .idmask = 0xffffffff, .map_io = s3c2410_map_io, - .init_clocks = s3c2410_init_clocks, .init_uarts = s3c2410_init_uarts, .init = s3c2410a_init, .name = name_s3c2410a
arch/arm/mach-s3c24xx/mach-amlm5900.c +7 -2
@@ -161,11 +161,16 @@ static struct platform_device *amlm5900_devices[] __initdata = {static void __init amlm5900_map_io (void ) {s3c24xx_init_io (amlm5900_iodesc,ARRAY_SIZE (amlm5900_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (amlm5900_uartcfgs,ARRAY_SIZE (amlm5900_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init amlm5900_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +#ifdef CONFIG_FB_S3C2410 static struct s3c2410fb_display __initdata amlm5900_lcd_info = { .width = 160,
@@ -241,6 +246,6 @@ MACHINE_START(AML_M5900, "AML_M5900") .map_io = amlm5900_map_io, .init_irq = s3c2410_init_irq, .init_machine = amlm5900_init, - .init_time = samsung_timer_init, + .init_time = amlm5900_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-bast.c +7 -3
@@ -50,7 +50,6 @@#include <mach/regs-lcd.h> #include <mach/gpio-samsung.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/cpu-freq.h> #include <plat/devs.h>
@@ -581,11 +580,16 @@ static void __init bast_map_io(void)s3c_hwmon_set_platdata (&bast_hwmon_info);s3c24xx_init_io (bast_iodesc,ARRAY_SIZE (bast_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (bast_uartcfgs,ARRAY_SIZE (bast_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init bast_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init bast_init (void ) {register_syscore_ops (&bast_pm_syscore_ops);
@@ -613,6 +617,6 @@ MACHINE_START(BAST, "Simtec-BAST") .map_io = bast_map_io, .init_irq = s3c2410_init_irq, .init_machine = bast_init, - .init_time = samsung_timer_init, + .init_time = bast_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-h1940.c +7 -3
@@ -56,7 +56,6 @@#include <mach/regs-lcd.h> #include <mach/gpio-samsung.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/gpio-cfg.h>
@@ -646,7 +645,6 @@ static struct platform_device *h1940_devices[] __initdata = {static void __init h1940_map_io (void ) {s3c24xx_init_io (h1940_iodesc,ARRAY_SIZE (h1940_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (h1940_uartcfgs,ARRAY_SIZE (h1940_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 );
@@ -662,6 +660,12 @@ static void __init h1940_map_io(void)WARN_ON (gpiochip_add (&h1940_latch_gpiochip)); } +static void __init h1940_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +/* H1940 and RX3715 need to reserve this for suspend */ static void __init h1940_reserve (void ) {
@@ -739,6 +743,6 @@ MACHINE_START(H1940, "IPAQ-H1940") .reserve = h1940_reserve, .init_irq = s3c2410_init_irq, .init_machine = h1940_init, - .init_time = samsung_timer_init, + .init_time = h1940_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-n30.c +8 -4
@@ -45,7 +45,6 @@#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <linux/platform_data/mmc-s3cmci.h>
@@ -535,11 +534,16 @@ static void __init n30_map_io(void) {s3c24xx_init_io (n30_iodesc,ARRAY_SIZE (n30_iodesc));n30_hwinit (); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (n30_uartcfgs,ARRAY_SIZE (n30_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init n30_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +/* GPB3 is the line that controls the pull-up for the USB D+ line */ static void __init n30_init (void )
@@ -591,7 +595,7 @@ MACHINE_START(N30, "Acer-N30")Ben Dooks <[email protected]> */ .atag_offset = 0x100, - .init_time = samsung_timer_init, + .init_time = n30_init_time, .init_machine = n30_init, .init_irq = s3c2410_init_irq, .map_io = n30_map_io,
@@ -602,7 +606,7 @@ MACHINE_START(N35, "Acer-N35")/* Maintainer: Christer Weinigel <[email protected]> */ .atag_offset = 0x100, - .init_time = samsung_timer_init, + .init_time = n30_init_time, .init_machine = n30_init, .init_irq = s3c2410_init_irq, .map_io = n30_map_io,
arch/arm/mach-s3c24xx/mach-nexcoder.c +1 -6
@@ -142,12 +142,7 @@ static void __init nexcoder_map_io(void)static void __init nexcoder_init_time (void ) { -/* -* for whatever reason the nexcoder called s3c24xx_init_clocks(0) -* meaning a xti value of 0Hz, so this machine will most likely -* not work out of the box and needs a fixup. -*/ -s3c2440_init_clocks (0 ); +s3c2440_init_clocks (12000000 );samsung_timer_init (); }
arch/arm/mach-s3c24xx/mach-otom.c +7 -3
@@ -29,7 +29,6 @@#include <mach/hardware.h> #include <mach/regs-gpio.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/samsung-time.h>
@@ -100,11 +99,16 @@ static struct platform_device *otom11_devices[] __initdata = {static void __init otom11_map_io (void ) {s3c24xx_init_io (otom11_iodesc,ARRAY_SIZE (otom11_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (otom11_uartcfgs,ARRAY_SIZE (otom11_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init otom11_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init otom11_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -117,6 +121,6 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1") .map_io = otom11_map_io, .init_machine = otom11_init, .init_irq = s3c2410_init_irq, - .init_time = samsung_timer_init, + .init_time = otom11_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-qt2410.c +7 -2
@@ -304,11 +304,16 @@ __setup("tft=", qt2410_tft_setup);static void __init qt2410_map_io (void ) {s3c24xx_init_io (qt2410_iodesc,ARRAY_SIZE (qt2410_iodesc)); -s3c24xx_init_clocks (12 *1000 *1000 );s3c24xx_init_uarts (smdk2410_uartcfgs,ARRAY_SIZE (smdk2410_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init qt2410_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init qt2410_machine_init (void ) {s3c_nand_set_platdata (&qt2410_nand_info);
@@ -346,6 +351,6 @@ MACHINE_START(QT2410, "QT2410") .map_io = qt2410_map_io, .init_irq = s3c2410_init_irq, .init_machine = qt2410_machine_init, - .init_time = samsung_timer_init, + .init_time = qt2410_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-smdk2410.c +7 -2
@@ -99,11 +99,16 @@ static struct platform_device *smdk2410_devices[] __initdata = {static void __init smdk2410_map_io (void ) {s3c24xx_init_io (smdk2410_iodesc,ARRAY_SIZE (smdk2410_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (smdk2410_uartcfgs,ARRAY_SIZE (smdk2410_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init smdk2410_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init smdk2410_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -118,6 +123,6 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc .map_io = smdk2410_map_io, .init_irq = s3c2410_init_irq, .init_machine = smdk2410_init, - .init_time = samsung_timer_init, + .init_time = smdk2410_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-tct_hammer.c +7 -2
@@ -135,11 +135,16 @@ static struct platform_device *tct_hammer_devices[] __initdata = {static void __init tct_hammer_map_io (void ) {s3c24xx_init_io (tct_hammer_iodesc,ARRAY_SIZE (tct_hammer_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (tct_hammer_uartcfgs,ARRAY_SIZE (tct_hammer_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init tct_hammer_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init tct_hammer_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -151,6 +156,6 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER") .map_io = tct_hammer_map_io, .init_irq = s3c2410_init_irq, .init_machine = tct_hammer_init, - .init_time = samsung_timer_init, + .init_time = tct_hammer_init_time, .restart = s3c2410_restart,MACHINE_END
arch/arm/mach-s3c24xx/mach-vr1000.c +7 -3
@@ -42,7 +42,6 @@#include <mach/regs-gpio.h> #include <mach/gpio-samsung.h> -#include <plat/clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/samsung-time.h>
@@ -337,11 +336,16 @@ static void __init vr1000_map_io(void) pm_power_off = vr1000_power_off;s3c24xx_init_io (vr1000_iodesc,ARRAY_SIZE (vr1000_iodesc)); -s3c24xx_init_clocks (0 );s3c24xx_init_uarts (vr1000_uartcfgs,ARRAY_SIZE (vr1000_uartcfgs));samsung_set_timer_source (SAMSUNG_PWM3 ,SAMSUNG_PWM4 ); } +static void __init vr1000_init_time (void ) +{ +s3c2410_init_clocks (12000000 ); +samsung_timer_init (); +} +static void __init vr1000_init (void ) {s3c_i2c0_set_platdata (NULL );
@@ -362,6 +366,6 @@ MACHINE_START(VR1000, "Thorcom-VR1000") .map_io = vr1000_map_io, .init_machine = vr1000_init, .init_irq = s3c2410_init_irq, - .init_time = samsung_timer_init, + .init_time = vr1000_init_time, .restart = s3c2410_restart,MACHINE_END
Signature · 1 line
1.9.0
PATCH v2 9/9 ARM: S3C24XX: remove legacy clock code
In reply to Heiko StübnerWith the move to the common clock framework completed for s3c2410, s3c2440 and s3c2442, the legacy clock code for these machines can go away too.
This also includes the legacy dclk code, as all legacy users are converted.
--- arch/arm/mach-s3c24xx/Kconfig | 11 - arch/arm/mach-s3c24xx/Makefile | 2 - arch/arm/mach-s3c24xx/clock-dclk.c | 195 ---------------- arch/arm/mach-s3c24xx/clock-s3c2410.c | 285 ------------------------ arch/arm/mach-s3c24xx/clock-s3c2440.c | 217 ------------------ arch/arm/mach-s3c24xx/clock-s3c244x.c | 141 ------------ arch/arm/mach-s3c24xx/common.h | 2 - arch/arm/mach-s3c24xx/include/mach/regs-clock.h | 18 -- arch/arm/mach-s3c24xx/include/mach/regs-gpio.h | 3 - arch/arm/mach-s3c24xx/pm.c | 12 - arch/arm/mach-s3c24xx/s3c2410.c | 62 ------ arch/arm/mach-s3c24xx/s3c2442.c | 112 ---------- arch/arm/mach-s3c24xx/s3c244x.c | 63 ------ 13 files changed, 1123 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/clock-dclk.c delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2410.c delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2440.c delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c244x.c
arch/arm/mach-s3c24xx/Kconfig +0 -11
@@ -110,17 +110,6 @@ config CPU_S3C2443 # common code -config S3C2410_CLOCK - bool - help - Clock code for the S3C2410, and similar processors which - is currently includes the S3C2410, S3C2440, S3C2442. - -config S3C24XX_DCLK - bool - help - Clock code for supporting DCLK/CLKOUT on S3C24XX architectures - config S3C24XX_SMDK bool help
arch/arm/mach-s3c24xx/Makefile +0 -2
@@ -44,10 +44,8 @@ obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o # common code -obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o obj-$(CONFIG_S3C24XX_DMA) += dma.o -obj-$(CONFIG_S3C2410_CLOCK) += clock-s3c2410.o obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += cpufreq-utils.o obj-$(CONFIG_S3C2410_IOTIMING) += iotiming-s3c2410.o
arch/arm/mach-s3c24xx/clock-dclk.c deleted +0 -195
195 lines not on this page · raw message
arch/arm/mach-s3c24xx/clock-s3c2410.c deleted +0 -285
285 lines not on this page · raw message
arch/arm/mach-s3c24xx/clock-s3c2440.c deleted +0 -217
217 lines not on this page · raw message
arch/arm/mach-s3c24xx/clock-s3c244x.c deleted +0 -141
141 lines not on this page · raw message
arch/arm/mach-s3c24xx/common.h +0 -2
@@ -67,10 +67,8 @@ extern struct syscore_ops s3c2416_irq_syscore_ops;#if defined(CONFIG_CPU_S3C2440 ) || defined(CONFIG_CPU_S3C2442 )extern void s3c244x_map_io (void );extern void s3c244x_init_uarts (struct s3c2410_uartcfg *cfg,int no); -extern void s3c244x_init_clocks (int xtal);extern void s3c244x_restart (enum reboot_mode mode,const char *cmd);#else -#define s3c244x_init_clocks NULL#define s3c244x_init_uarts NULL#endif
arch/arm/mach-s3c24xx/include/mach/regs-clock.h +0 -18
@@ -42,24 +42,6 @@#define S3C2410_CLKCON_IIS (1<<17)#define S3C2410_CLKCON_SPI (1<<18) -/* DCLKCON register addresses in gpio.h */ - -#define S3C2410_DCLKCON_DCLK0EN (1<<0) -#define S3C2410_DCLKCON_DCLK0_PCLK (0<<1) -#define S3C2410_DCLKCON_DCLK0_UCLK (1<<1) -#define S3C2410_DCLKCON_DCLK0_DIV (x) (((x) - 1 )<<4) -#define S3C2410_DCLKCON_DCLK0_CMP (x) (((x) - 1 )<<8) -#define S3C2410_DCLKCON_DCLK0_DIV_MASK ((0xf)<<4) -#define S3C2410_DCLKCON_DCLK0_CMP_MASK ((0xf)<<8) - -#define S3C2410_DCLKCON_DCLK1EN (1<<16) -#define S3C2410_DCLKCON_DCLK1_PCLK (0<<17) -#define S3C2410_DCLKCON_DCLK1_UCLK (1<<17) -#define S3C2410_DCLKCON_DCLK1_DIV (x) (((x) - 1) <<20) -#define S3C2410_DCLKCON_DCLK1_CMP (x) (((x) - 1) <<24) -#define S3C2410_DCLKCON_DCLK1_DIV_MASK ((0xf) <<20) -#define S3C2410_DCLKCON_DCLK1_CMP_MASK ((0xf) <<24) -#define S3C2410_CLKDIVN_PDIVN (1<<0)#define S3C2410_CLKDIVN_HDIVN (1<<1)
arch/arm/mach-s3c24xx/include/mach/regs-gpio.h +0 -3
@@ -457,9 +457,6 @@/* miscellaneous control */ #define S3C2410_MISCCR S3C2410_GPIOREG(0x80) -#define S3C2410_DCLKCON S3C2410_GPIOREG(0x84) - -#define S3C24XX_DCLKCON S3C24XX_GPIOREG2(0x84)/* see clock.h for dclk definitions */
arch/arm/mach-s3c24xx/pm.c +0 -12
@@ -80,12 +80,6 @@ static struct sleep_save core_save[] = {#endif /* CONFIG_SAMSUNG_CLOCK */ }; -#ifdef CONFIG_SAMSUNG_CLOCK -static struct sleep_save misc_save[] = { -SAVE_ITEM (S3C2410_DCLKCON ), -}; -#endif -/* s3c_pm_check_resume_pin * * check to see if the pin is configured correctly for sleep mode, and
@@ -143,16 +137,10 @@ void s3c_pm_configure_extint(void)void s3c_pm_restore_core (void ) {s3c_pm_do_restore_core (core_save,ARRAY_SIZE (core_save)); -#ifdef CONFIG_SAMSUNG_CLOCK -s3c_pm_do_restore (misc_save,ARRAY_SIZE (misc_save)); -#endif }void s3c_pm_save_core (void ) { -#ifdef CONFIG_SAMSUNG_CLOCK -s3c_pm_do_save (misc_save,ARRAY_SIZE (misc_save)); -#endif s3c_pm_do_save (core_save,ARRAY_SIZE (core_save)); }
arch/arm/mach-s3c24xx/s3c2410.c +0 -62
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arch/arm/mach-s3c24xx/s3c2442.c +0 -112
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arch/arm/mach-s3c24xx/s3c244x.c +0 -63
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Signature · 1 line
1.9.0
PATCH v2 9/9 ARM: S3C24XX: remove legacy clock code
With the move to the common clock framework completed for s3c2410, s3c2440 and s3c2442, the legacy clock code for these machines can go away too.
This also includes the legacy dclk code, as all legacy users are converted.
---
adapted to apply against v3.16-next/clk-s3c24xx
arch/arm/mach-s3c24xx/Kconfig | 11 - arch/arm/mach-s3c24xx/Makefile | 2 - arch/arm/mach-s3c24xx/clock-dclk.c | 195 ---------------- arch/arm/mach-s3c24xx/clock-s3c2410.c | 284 ------------------------ arch/arm/mach-s3c24xx/clock-s3c2440.c | 217 ------------------ arch/arm/mach-s3c24xx/clock-s3c244x.c | 141 ------------ arch/arm/mach-s3c24xx/common.h | 2 - arch/arm/mach-s3c24xx/include/mach/regs-clock.h | 18 -- arch/arm/mach-s3c24xx/include/mach/regs-gpio.h | 3 - arch/arm/mach-s3c24xx/pm.c | 12 - arch/arm/mach-s3c24xx/s3c2410.c | 62 ------ arch/arm/mach-s3c24xx/s3c2442.c | 112 ---------- arch/arm/mach-s3c24xx/s3c244x.c | 63 ------ 13 files changed, 1122 deletions(-) delete mode 100644 arch/arm/mach-s3c24xx/clock-dclk.c delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2410.c delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c2440.c delete mode 100644 arch/arm/mach-s3c24xx/clock-s3c244x.c
arch/arm/mach-s3c24xx/Kconfig +0 -11
@@ -110,17 +110,6 @@ config CPU_S3C2443 # common code -config S3C2410_CLOCK - bool - help - Clock code for the S3C2410, and similar processors which - is currently includes the S3C2410, S3C2440, S3C2442. - -config S3C24XX_DCLK - bool - help - Clock code for supporting DCLK/CLKOUT on S3C24XX architectures - config S3C24XX_SMDK bool help
arch/arm/mach-s3c24xx/Makefile +0 -2
@@ -44,10 +44,8 @@ obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o # common code -obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o obj-$(CONFIG_S3C24XX_DMA) += dma.o -obj-$(CONFIG_S3C2410_CLOCK) += clock-s3c2410.o obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += cpufreq-utils.o obj-$(CONFIG_S3C2410_IOTIMING) += iotiming-s3c2410.o
arch/arm/mach-s3c24xx/clock-dclk.c deleted +0 -195
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arch/arm/mach-s3c24xx/clock-s3c2410.c deleted +0 -284
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arch/arm/mach-s3c24xx/clock-s3c2440.c deleted +0 -217
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arch/arm/mach-s3c24xx/clock-s3c244x.c deleted +0 -141
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arch/arm/mach-s3c24xx/common.h +0 -2
@@ -67,10 +67,8 @@ extern struct syscore_ops s3c2416_irq_syscore_ops;#if defined(CONFIG_CPU_S3C2440 ) || defined(CONFIG_CPU_S3C2442 )extern void s3c244x_map_io (void );extern void s3c244x_init_uarts (struct s3c2410_uartcfg *cfg,int no); -extern void s3c244x_init_clocks (int xtal);extern void s3c244x_restart (enum reboot_mode mode,const char *cmd);#else -#define s3c244x_init_clocks NULL#define s3c244x_init_uarts NULL#endif
arch/arm/mach-s3c24xx/include/mach/regs-clock.h +0 -18
@@ -42,24 +42,6 @@#define S3C2410_CLKCON_IIS (1<<17)#define S3C2410_CLKCON_SPI (1<<18) -/* DCLKCON register addresses in gpio.h */ - -#define S3C2410_DCLKCON_DCLK0EN (1<<0) -#define S3C2410_DCLKCON_DCLK0_PCLK (0<<1) -#define S3C2410_DCLKCON_DCLK0_UCLK (1<<1) -#define S3C2410_DCLKCON_DCLK0_DIV (x) (((x) - 1 )<<4) -#define S3C2410_DCLKCON_DCLK0_CMP (x) (((x) - 1 )<<8) -#define S3C2410_DCLKCON_DCLK0_DIV_MASK ((0xf)<<4) -#define S3C2410_DCLKCON_DCLK0_CMP_MASK ((0xf)<<8) - -#define S3C2410_DCLKCON_DCLK1EN (1<<16) -#define S3C2410_DCLKCON_DCLK1_PCLK (0<<17) -#define S3C2410_DCLKCON_DCLK1_UCLK (1<<17) -#define S3C2410_DCLKCON_DCLK1_DIV (x) (((x) - 1) <<20) -#define S3C2410_DCLKCON_DCLK1_CMP (x) (((x) - 1) <<24) -#define S3C2410_DCLKCON_DCLK1_DIV_MASK ((0xf) <<20) -#define S3C2410_DCLKCON_DCLK1_CMP_MASK ((0xf) <<24) -#define S3C2410_CLKDIVN_PDIVN (1<<0)#define S3C2410_CLKDIVN_HDIVN (1<<1)
arch/arm/mach-s3c24xx/include/mach/regs-gpio.h +0 -3
@@ -457,9 +457,6 @@/* miscellaneous control */ #define S3C2410_MISCCR S3C2410_GPIOREG(0x80) -#define S3C2410_DCLKCON S3C2410_GPIOREG(0x84) - -#define S3C24XX_DCLKCON S3C24XX_GPIOREG2(0x84)/* see clock.h for dclk definitions */
arch/arm/mach-s3c24xx/pm.c +0 -12
@@ -80,12 +80,6 @@ static struct sleep_save core_save[] = {#endif /* CONFIG_SAMSUNG_CLOCK */ }; -#ifdef CONFIG_SAMSUNG_CLOCK -static struct sleep_save misc_save[] = { -SAVE_ITEM (S3C2410_DCLKCON ), -}; -#endif -/* s3c_pm_check_resume_pin * * check to see if the pin is configured correctly for sleep mode, and
@@ -143,16 +137,10 @@ void s3c_pm_configure_extint(void)void s3c_pm_restore_core (void ) {s3c_pm_do_restore_core (core_save,ARRAY_SIZE (core_save)); -#ifdef CONFIG_SAMSUNG_CLOCK -s3c_pm_do_restore (misc_save,ARRAY_SIZE (misc_save)); -#endif }void s3c_pm_save_core (void ) { -#ifdef CONFIG_SAMSUNG_CLOCK -s3c_pm_do_save (misc_save,ARRAY_SIZE (misc_save)); -#endif s3c_pm_do_save (core_save,ARRAY_SIZE (core_save)); }
arch/arm/mach-s3c24xx/s3c2410.c +0 -62
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arch/arm/mach-s3c24xx/s3c2442.c +0 -112
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arch/arm/mach-s3c24xx/s3c244x.c +0 -63
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Signature · 1 line
1.9.0