edac: Add APM X-Gene SoC EDAC driver
Subsystems (5)
v9 cover edac: Add APM X-Gene SoC EDAC driver
This patch adds support for the APM X-Gene SoC EDAC driver for DT.
v9:
* Update maintainer section
* Update binding documentation to reflect update DT binding
* Restructure the EDAC driver such that its includes subnode for MC, PMD's, and future L3's and SoC.
* Update DT node to reflect update DT binding
* NOTE: Temporary removed L3 and SoC. They will be added back later on.
v8:
* Change ASM_EDAC_H to __ASM_EDAC_H in file edac.h
* Add WARN_ONCE in stub function atomic_scrub
* Update DTS binding documentation (with only memory controller node)
* Temporary remove L1/L2, L3, and SoC driver code and update memory driver code accordingly
v7:
* Update binding documentation for memory controller, PMD, L3, and SoC EDAC
* Change resource for PCP, CSW, MCBA, MCBB, and efuse to syscon type nodes and updae driver accordingly
* Fix clearing L2 RTO register properly
* Fix the MODULE_DEVICE_TABLE for OF
* Update DT accordingly to binding documentation
v6:
* Rebase to 4.0.0-rc3
* Add memory scrub stub function and enable ARM64 EDAC support patch
* Add bit definition defines for L2RTOS registers
* Remove un-necessary clearing of all L1/L2 software generated registers
* Remove wrong notification of LSU un-correctable error
* Change L2 reporting of un-correcable error to correctable error
* Change clearing of the L2C L2RTO registers
* Add support for L2 HW version 1 and version 2 or above
* Add support for L3 HW version 1 and version 2 or above
v5:
* Rebase to 3.17.rc1 (next)
* Update binding documentation for additional SoC node binding resource
* Enable MCU correctable and uncorrectable interrupts if not enabled by firmware
* Enable top level interrupt only after all MCU registered. Otherwise, error interrupt will never get cleared by the corresponding MCU.
* Remove clearing of L1 and L2 errors during initialization time. Otherwise, they will not be captured between firmware booting and error configuration.
* Add capture and clearing SoC register bus errors
* Add register bus resource to SoC DT node
v4:
* Fix PMD l1/l2 error reading address due to wrong variable type
* Fix clearing of software generated and HW errors for l1/l2
v3:
* Update binding documentation for PMD DT node and exampples
* Add binding documentation for SoC DT node
* Change MC, PMD, and L3C driver error injection to use debugfs
* Add missing IRQ for MC correctable error (code and DT)
* Use true/false where appropriate instead 1/0
* Add bit definition for L1 MMUESR register and fully decode this error
* Remove the un-necessary dev variable from xgene_edac_pmd_ctx structure
* Add check for disabled PMD (code and DT)
* Switch to edac_printk instead pr_err
* Some minor comments update
v2:
* Add EDAC entry in MAINTAINERS for APM EDAC driver
* Remove the MC scrub patch
* Remove the word 'Caches' from Kconfig
* Change all MASK defines to use BIT(x)
* Update comment or remove them
* Wrap error injection code around CONFIG_EDAC_DEBUG
* Change function name xgene_edac_mc_hw_init to xgene_edac_mc_irq_ctl
* Change all function XXX_hw_init to XXX_hw_ctl
* Fix typo 'activie'
* Move calling function edac_mc_alloc after resource retrieval
* Check for NULL on platform_get_resource return if reference directly
* Add documentation for struct xgene_edac_pmd_ctx
* Move L1 and L2 check out of function xgene_edac_pmd_check to its own functions
* Use for loop for configure each CPU of an PMD
* Replace /2 by >> 1
* Remove unnecessary comment on edac_device_add_device failure
* Make mem_err_ip static const
* Unwind EDAC register correctly if failed
---
Loc Ho (5):
arm64: Enable EDAC on ARM64
MAINTAINERS: Add entry for APM X-Gene SoC EDAC driver
Documentation: Add documentation for the APM X-Gene SoC EDAC DTS
binding
edac: Add APM X-Gene SoC EDAC driver
arm64: Add APM X-Gene SoC EDAC DTS entries
.../devicetree/bindings/edac/apm-xgene-edac.txt | 74 ++ MAINTAINERS | 7 + arch/arm64/Kconfig | 1 + arch/arm64/boot/dts/apm/apm-storm.dtsi | 86 ++ arch/arm64/include/asm/edac.h | 28 + drivers/edac/Kconfig | 7 + drivers/edac/Makefile | 1 + drivers/edac/xgene_edac.c | 1281 ++++++++++++++++++++ 8 files changed, 1485 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/apm-xgene-edac.txt create mode 100644 arch/arm64/include/asm/edac.h create mode 100644 drivers/edac/xgene_edac.c
PATCH v9 1/5 arm64: Enable EDAC on ARM64
Add an stub atomic_scrub function and enable EDAC for arm64.
--- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/edac.h | 28 ++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 0 deletions(-) create mode 100644 arch/arm64/include/asm/edac.h
arch/arm64/Kconfig +1 -0
@@ -22,6 +22,7 @@ config ARM64 select BUILDTIME_EXTABLE_SORT select CLONE_BACKWARDS select COMMON_CLK + select EDAC_SUPPORT select CPU_PM if (SUSPEND || CPU_IDLE) select DCACHE_WORD_ACCESS select GENERIC_ALLOCATOR
arch/arm64/include/asm/edac.h new file +28 -0
@@ -0,0 +1,28 @@ +/* +* ARM64 EDAC Header File +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public License, +* version 2, as published by the Free Software Foundation. +* +* This program is distributed in the hope it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program. If not, see <http://www.gnu.org/licenses/>. +*/ +#ifndef __ASM_EDAC_H +#define __ASM_EDAC_H + +/* +* ECC atomic, DMA, SMP and interrupt safe scrub function. +*/ +static inline void atomic_scrub (void *va,u32 size) +{ +/* Stub function for now until an ARM64 HW has a way to test it. */ +WARN_ONCE (1 ,"not implemented" ); +} + +#endif
Signature · 1 line
1.7.1
PATCH v9 2/5 MAINTAINERS: Add entry for APM X-Gene SoC EDAC driver
This patch adds a MAINTAINERS entry for APM X-Gene SoC EDAC driver.
--- MAINTAINERS | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
MAINTAINERS +7 -0
@@ -3735,6 +3735,13 @@ W: bluesmoke.sourceforge.net S: Maintained F: drivers/edac/sb_edac.c +EDAC-XGENE +APPLIED MICRO (APM) X-GENE SOC EDAC +M: Loc Ho <[email protected]> +S: Supported +F: drivers/edac/xgene_edac.c +F: Documentation/devicetree/bindings/edac/apm-xgene-edac.txt + EDIROL UA-101/UA-1000 DRIVER M: Clemens Ladisch <[email protected]> L: alsa-devel at alsa-project.org (moderated for non-subscribers)
Signature · 1 line
1.7.1
PATCH v9 3/5 Documentation: Add documentation for the APM X-Gene SoC EDAC DTS binding
This patch adds documentation for the APM X-Gene SoC EDAC DTS binding.
--- .../devicetree/bindings/edac/apm-xgene-edac.txt | 74 ++++++++++++++++++++ 1 files changed, 74 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/edac/apm-xgene-edac.txt
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file +74 -0
@@ -0,0 +1,74 @@ +* APM X-Gene SoC EDAC node + +EDAC node is defined to describe on-chip error detection and correction. +The follow error types are supported: + + memory controller - Memory controller + PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache + +The following section describes the EDAC DT node binding. + +Required properties: +- compatible : Shall be "apm,xgene-edac". +- reg : First resource shall be the CPU bus (PCP) resource. +- interrupts : Interrupt-specifier for MCU, PMD, L3, or SoC error + IRQ(s). + +Required properties for memory controller subnode: +- compatible : Shall be "apm,xgene-edac-mc". +- reg : First resource shall be the memory controller unit + (MCU) resource. +- regmap-csw : Regmap of the CPU switch fabric (CSW) resource. +- regmap-mcba : Regmap of the MCB-A (memory bridge) resource. +- regmap-mcbb : Regmap of the MCB-B (memory bridge) resource. + +Required properties for PMD subnode: +- compatible : Shall be "apm,xgene-edac-pmd". +- reg : First resource shall be the PMD resource. +- regmap-efuse : Regmap of the PMD efuse resource. + +Example: + csw: csw at 7e200000 { + compatible = "syscon"; + reg = <0x0 0x7e200000 0x0 0x1000>; + }; + + mcba: mcba at 7e700000 { + compatible = "syscon"; + reg = <0x0 0x7e700000 0x0 0x1000>; + }; + + mcbb: mcbb at 7e720000 { + compatible = "syscon"; + reg = <0x0 0x7e720000 0x0 0x1000>; + }; + + efuse: efuse at 1054a000 { + compatible = "syscon"; + reg = <0x0 0x1054a000 0x0 0x20>; + }; + + edac: edac at 78800000 { + compatible = "apm,xgene-edac"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0 0x78800000 0x0 0x100>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + + edacmc0: edacmc0 at 7e800000 { + compatible = "apm,xgene-edac-mc"; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x7e800000 0x0 0x1000>; + }; + + edacpmd0: edacpmd0 at 7c000000 { + compatible = "apm,xgene-edac-pmd"; + regmap-efuse = <&efuse>; + reg = <0x0 0x7c000000 0x0 0x200000>; + }; + + };
Signature · 1 line
1.7.1
PATCH v9 4/5 edac: Add APM X-Gene SoC EDAC driver
This patch adds support for the APM X-Gene SoC EDAC driver.
--- drivers/edac/Kconfig | 7 + drivers/edac/Makefile | 1 + drivers/edac/xgene_edac.c | 1281 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1289 insertions(+), 0 deletions(-) create mode 100644 drivers/edac/xgene_edac.c
drivers/edac/Kconfig +7 -0
@@ -392,4 +392,11 @@ config EDAC_SYNOPSYS Support for error detection and correction on the Synopsys DDR memory controller. +config EDAC_XGENE + tristate "APM X-Gene SoC" + depends on EDAC_MM_EDAC && ARM64 + help + Support for error detection and correction on the + APM X-Gene family of SOCs. + endif # EDAC
drivers/edac/Makefile +1 -0
@@ -68,3 +68,4 @@ obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o obj-$(CONFIG_EDAC_ALTERA_MC) += altera_edac.o obj-$(CONFIG_EDAC_SYNOPSYS) += synopsys_edac.o +obj-$(CONFIG_EDAC_XGENE) += xgene_edac.o
drivers/edac/xgene_edac.c new file +1281 -0
1,281 lines not on this page · raw message
Signature · 1 line
1.7.1
PATCH v9 5/5 arm64: Add APM X-Gene SoC EDAC DTS entries
This patch adds APM X-Gene SoC EDAC DTS entries.
--- arch/arm64/boot/dts/apm/apm-storm.dtsi | 86 ++++++++++++++++++++++++++++++++ 1 files changed, 86 insertions(+), 0 deletions(-)
arch/arm64/boot/dts/apm/apm-storm.dtsi +86 -0
@@ -374,6 +374,92 @@ }; }; + csw: csw at 7e200000 { + compatible = "syscon"; + reg = <0x0 0x7e200000 0x0 0x1000>; + }; + + mcba: mcba at 7e700000 { + compatible = "syscon"; + reg = <0x0 0x7e700000 0x0 0x1000>; + }; + + mcbb: mcbb at 7e720000 { + compatible = "syscon"; + reg = <0x0 0x7e720000 0x0 0x1000>; + }; + + efuse: efuse at 1054a000 { + compatible = "syscon"; + reg = <0x0 0x1054a000 0x0 0x20>; + }; + + edac: edac at 78800000 { + compatible = "apm,xgene-edac"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0 0x78800000 0x0 0x100>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + + edacmc0: edacmc0 at 7e800000 { + compatible = "apm,xgene-edac-mc"; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x7e800000 0x0 0x1000>; + }; + + edacmc1: edacmc1 at 7e840000 { + compatible = "apm,xgene-edac-mc"; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x7e840000 0x0 0x1000>; + }; + + edacmc2: edacmc2 at 7e880000 { + compatible = "apm,xgene-edac-mc"; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x7e880000 0x0 0x1000>; + }; + + edacmc3: edacmc3 at 7e8c0000 { + compatible = "apm,xgene-edac-mc"; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x7e8c0000 0x0 0x1000>; + }; + + edacpmd0: edacpmd0 at 7c000000 { + compatible = "apm,xgene-edac-pmd"; + regmap-efuse = <&efuse>; + reg = <0x0 0x7c000000 0x0 0x200000>; + }; + + edacpmd1: edacpmd1 at 7c200000 { + compatible = "apm,xgene-edac-pmd"; + regmap-efuse = <&efuse>; + reg = <0x0 0x7c200000 0x0 0x200000>; + }; + + edacpmd2: edacpmd2 at 7c400000 { + compatible = "apm,xgene-edac-pmd"; + regmap-efuse = <&efuse>; + reg = <0x0 0x7c400000 0x0 0x200000>; + }; + + edacpmd3: edacpmd3 at 7c600000 { + compatible = "apm,xgene-edac-pmd"; + regmap-efuse = <&efuse>; + reg = <0x0 0x7c600000 0x0 0x200000>; + }; + }; + pcie0: pcie at 1f2b0000 { status = "disabled"; device_type = "pci";
Signature · 1 line
1.7.1
PATCH v9 4/5 edac: Add APM X-Gene SoC EDAC driver
In reply to Loc HoQuoted 3 lines · On Thursday 14 May 2015 11:05:46 Loc Ho wrote:
This patch adds support for the APM X-Gene SoC EDAC driver.
Signed-off-by Loc Ho <[email protected]>
Looks much better than before.
drivers/edac/Kconfig config EDAC_SYNOPSYS · line 402
Quoted 9 lines
drivers/edac/Kconfig +7
-0+config EDAC_XGENE + tristate "APM X-Gene SoC" + depends on EDAC_MM_EDAC && ARM64 + help + Support for error detection and correction on the + APM X-Gene family of SOCs. + endif # EDAC
Maybe 'ARM64 || COMPILE_TEST', so we get build coverage on x86 with allmodconfig?
drivers/edac/xgene_edac.c line 378
Quoted 13 lines
drivers/edac/xgene_edac.c new file +13
-0+ rc =of_property_read_u32_array (np,"reg" , addr_res,4 ); +if (rc <0 ) { +dev_err (edac->dev,"no MCU resource address\n" ); + goto err_group; + } + tmp_ctx.mcu_csr =devm_ioremap (edac->dev, +MAKEU64 (addr_res[0 ], addr_res[1 ]), +MAKEU64 (addr_res[2 ], addr_res[3 ])); +if (IS_ERR (tmp_ctx.mcu_csr)) { +dev_err (edac->dev,"unable to map MCU resource\n" ); + rc =PTR_ERR (tmp_ctx.mcu_csr); + goto err_group; + }
This is incorrect, you have to use of_get_address() or of_address_to_resource() to compute the CPU-relative address: The address that is used within the node may not be the same, depending on the parent's ranges properties. See also my comment about the missing ranges in the DT example.
Arnd
PATCH v9 3/5 Documentation: Add documentation for the APM X-Gene SoC EDAC DTS binding
In reply to Loc HoDocumentation/devicetree/bindings/edac/apm-xgene-edac.txt line 55
Quoted 5 lines · On Thursday 14 May 2015 11:05:45 Loc Ho wrote:
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file +5
-0+ edac: edac at 78800000 { + compatible = "apm,xgene-edac"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0 0x78800000 0x0 0x100>;
This seens a 'ranges' property to make the address resolution work. An empty property should be fine.
Quoted 7 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file +7
-0+ interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + + edacmc0: edacmc0 at 7e800000 { + compatible = "apm,xgene-edac-mc"; + regmap-csw = <&csw>;
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt line 72
Quoted 10 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file +10
-0+ regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x7e800000 0x0 0x1000>; + }; + + edacpmd0: edacpmd0 at 7c000000 { + compatible = "apm,xgene-edac-pmd"; + regmap-efuse = <&efuse>; + reg = <0x0 0x7c000000 0x0 0x200000>; + };
Why do you have labels for each one? If nothing references these nodes, just remove the labels.
Regarding the names, remove the numbers for the nodes that are uniquely identified by the register location, e.g. replace edacmc0 at 7e800000 with edacmc at 7e800000.
If you have multiple edac-mc devices, would they point to the same syscon nodes, or different ones for each? If they are the same, just move the references to the main node.
Arnd
PATCH v9 3/5 Documentation: Add documentation for the APM X-Gene SoC EDAC DTS binding
Hi,
Quoted 30 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt line 55
Quoted 5 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file +5
-0+ edac: edac at 78800000 { + compatible = "apm,xgene-edac"; + #address-cells = <2>; + #size-cells = <2>; + reg = <0x0 0x78800000 0x0 0x100>;This seens a 'ranges' property to make the address resolution work. An empty property should be fine.
Quoted 7 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file +7
-0+ interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + + edacmc0: edacmc0 at 7e800000 { + compatible = "apm,xgene-edac-mc"; + regmap-csw = <&csw>;Documentation/devicetree/bindings/edac/apm-xgene-edac.txt line 72
Quoted 10 lines
Documentation/devicetree/bindings/edac/apm-xgene-edac.txt new file +10
-0+ regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x7e800000 0x0 0x1000>; + }; + + edacpmd0: edacpmd0 at 7c000000 { + compatible = "apm,xgene-edac-pmd"; + regmap-efuse = <&efuse>; + reg = <0x0 0x7c000000 0x0 0x200000>; + };Why do you have labels for each one? If nothing references these nodes, just remove the labels.
Quoted 3 lines
Regarding the names, remove the numbers for the nodes that are uniquely identified by the register location, e.g. replace edacmc0 at
7e800000with edacmc at7e800000.
I will remove all label and get rip of the number before @.
Quoted 4 lines
If you have multiple edac-mc devices, would they point to the same syscon nodes, or different ones for each? If they are the same, just move the references to the main node.
They all reference the same one. I will move it up one level.
-Loc