RK3568 GPU
Subsystems (4)
v2 cover RK3568 GPU
I've decided to split the GPU off previous series:
https://lore.kernel.org/linux-rockchip/2147216.TLkxdtWsSY@diego/
This series now contains only the GPU support, as the VPU needs a tiny rework.
This is compiled tested only, in this case. Similar patches have been tested on a v5.10-based kernel, so I'd say it's good to go.
The mesa side is merged https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10771
and can be tested without a display, using something like weston --backend=headless-backend.so, which provides an environment for GL to work.
Ezequiel Garcia (4):
dt-bindings: gpu: mali-bifrost: Allow up to two clocks
dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
arm64: dts: rockchip: Add GPU node for rk3568
arm64: dts: rockchip: Enable the GPU on Quartz64 Model A
.../bindings/gpu/arm,mali-bifrost.yaml | 8 +++- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 5 ++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 +++++++++++++++++++ 3 files changed, 59 insertions(+), 1 deletion(-)
Signature · 1 line
2.32.0
PATCH v2 1/4 dt-bindings: gpu: mali-bifrost: Allow up to two clocks
Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock") added an optional bus_clock to support Allwinner H6 T-720 GPU. Increase the max clock items in the dt-binding to reflect this.
--- .../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +6 -1
@@ -38,7 +38,12 @@ properties: - const: gpu clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 mali-supply: true
Signature · 1 line
2.32.0
PATCH v2 2/4 dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
In reply to Ezequiel GarciaThe Rockchip RK3568 SoC has a Bifrost Mali-G52 GPU, add a compatible string for it.
--- Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +1 -0
@@ -20,6 +20,7 @@ properties: - mediatek,mt8183-mali - realtek,rtd1619-mali - rockchip,px30-mali + - rockchip,rk3568-mali - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable reg:
Signature · 1 line
2.32.0
PATCH v2 3/4 arm64: dts: rockchip: Add GPU node for rk3568
In reply to Ezequiel GarciaRockchip SoCs RK3566 and RK3568 have a Mali Gondul core which is based on the Bifrost architecture. It has one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency
--- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++++++++++++++++++++++++ 1 file changed, 47 insertions(+)
arch/arm64/boot/dts/rockchip/rk356x.dtsi +47 -0
@@ -121,6 +121,35 @@ opp-1800000000 { }; }; + gpu_opp_table: opp-table2 { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <825000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <825000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <825000>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <900000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1000000>; + }; + }; + firmware { scmi: scmi { compatible = "arm,scmi-smc";
@@ -332,6 +361,24 @@ power-domain@RK3568_PD_RKVENC { }; }; + gpu: gpu@fde60000 { + compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; + reg = <0x0 0xfde60000 0x0 0x4000>; + + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + + clocks = <&scmi_clk 1>, <&cru CLK_GPU>; + clock-names = "core", "bus"; + operating-points-v2 = <&gpu_opp_table>; + + #cooling-cells = <2>; + power-domains = <&power RK3568_PD_GPU>; + status = "disabled"; + }; + sdmmc2: mmc@fe000000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe000000 0x0 0x4000>;
Signature · 1 line
2.32.0
Re: [PATCH 3/4] arm64: dts: rockchip: Add GPU node for rk3568
Hi Ezequiel,
Some comments. Have a look if it's useful.
Quoted 20 lines · Ezequiel Garcia
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core which is based on the Bifrost architecture. It has one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequencySigned-off-by Ezequiel Garcia <[email protected]>--- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++++++++++++++++++++++++ 1 file changed, 47 insertions(+)arch/arm64/boot/dts/rockchip/rk356x.dtsi +0
-0
arch/arm64/boot/dts/rockchip/rk356x.dtsi opp-1800000000 { · line 125
Quoted 5 lines
arch/arm64/boot/dts/rockchip/rk356x.dtsi +1
-0@@ -121,6 +121,35 @@ opp-1800000000 { }; }; + gpu_opp_table: opp-table2 {
gpu_opp_table: gpu-opp-table {arch/arm64/boot/dts/rockchip/rk356x.dtsi opp-1800000000 { · line 130
Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk356x.dtsi +6
-0+ compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + };
Similar to cpu0_opp_table keep the same style and add an empty line between nodes.
Quoted 26 lines
arch/arm64/boot/dts/rockchip/rk356x.dtsi +22
-0+ opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <825000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <825000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <825000>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <900000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1000000>; + }; + }; + firmware { scmi: scmi {arch/arm64/boot/dts/rockchip/rk356x.dtsi +0
-0compatible = "arm,scmi-smc";
arch/arm64/boot/dts/rockchip/rk356x.dtsi power-domain@RK3568_PD_RKVENC { · line 368
Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk356x.dtsi +4
-0@@ -332,6 +361,24 @@ power-domain@RK3568_PD_RKVENC { }; }; + gpu: gpu@fde60000 { + compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; + reg = <0x0 0xfde60000 0x0 0x4000>; +
remove empty lines
arch/arm64/boot/dts/rockchip/rk356x.dtsi power-domain@RK3568_PD_RKVENC { · line 372
Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk356x.dtsi +5
-0+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; +
dito
arch/arm64/boot/dts/rockchip/rk356x.dtsi power-domain@RK3568_PD_RKVENC { · line 374
Quoted 2 lines
arch/arm64/boot/dts/rockchip/rk356x.dtsi +2
-0+ clocks = <&scmi_clk 1>, <&cru CLK_GPU>; + clock-names = "core", "bus";
Not sure if it's possible, but could you keep them all a little bit in the same order/style as arm,mali-400?
From arm,mali-utgard.yaml:
clock-names:
items:
- const: bus
- const: core
arch/arm64/boot/dts/rockchip/rk356x.dtsi power-domain@RK3568_PD_RKVENC { · line 376
Quoted 3 lines
arch/arm64/boot/dts/rockchip/rk356x.dtsi +2
-0+ operating-points-v2 = <&gpu_opp_table>; +
dito
Quoted 9 lines
arch/arm64/boot/dts/rockchip/rk356x.dtsi +5
-0+ #cooling-cells = <2>; + power-domains = <&power RK3568_PD_GPU>; + status = "disabled"; + }; +arch/arm64/boot/dts/rockchip/rk356x.dtsi +0
-0sdmmc2: mmc@fe000000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe000000 0x0 0x4000>;
Re: [PATCH 3/4] arm64: dts: rockchip: Add GPU node for rk3568
Hi Johan,
Thanks for the review.
Quoted 29 lines · Johan Jonker
Hi Ezequiel,
Some comments. Have a look if it's useful.
Quoted 23 lines · Ezequiel Garcia
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core which is based on the Bifrost architecture. It has one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequencySigned-off-by Ezequiel Garcia <[email protected]>---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++++++++++++++++++++++++1 file changed, 47 insertions(+)arch/arm64/boot/dts/rockchip/rk356x.dtsi +0
-0@@ -121,6 +121,35 @@ opp-1800000000 { }; };
Quoted 4 lines
Quoted 1 line
+ gpu_opp_table: opp-table2 {
gpu_opp_table: gpu-opp-table {
Makes sense.
Quoted 10 lines
Quoted 6 lines
+ compatible = "operating-points-v2"; +
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + };Similar to
cpu0_opp_tablekeep the same style and add an empty line between nodes.
Makes sense.
Quoted 33 lines
Quoted 32 lines
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <825000>; + };
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <825000>; + };
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <825000>; + };
+ opp-700000000 {
+ opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <900000>; + };
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1000000>; + };
+ };
+
firmware {
scmi: scmi {
compatible = "arm,scmi-smc";arch/arm64/boot/dts/rockchip/rk356x.dtsi +0
-0@@ -332,6 +361,24 @@ power-domain@RK3568_PD_RKVENC { }; };
+ gpu: gpu@fde60000 {
+ compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; + reg = <0x00xfde600000x00x4000>;
Quoted 4 lines
Quoted 1 line
+
remove empty lines
Makes sense.
Quoted 15 lines
Quoted 6 lines
+ interrupts = <
GIC_SPI40IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI41IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI39IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu";+
dito
Quoted 2 lines
+ clocks = <
&scmi_clk1>, <&cruCLK_GPU>; + clock-names = "core", "bus";Not sure if it's possible, but could you keep them all a little bit in the same order/style as arm,mali-400?
Quoted 7 lines
From arm,mali-utgard.yaml:
clock-names:
items:
- const: bus
- const: core
Don't think we can do that in this case, as the first clock is already expected as the "core" one.
These clocks might need some cleaner specification in the driver or the dt-binding (or both), but I'd like to defer that to the driver maintainers.
Signature · 2 lines
Kindly, Ezequiel
PATCH v2 4/4 arm64: dts: rockchip: Enable the GPU on Quartz64 Model A
In reply to Ezequiel GarciaEnable the GPU core on the Pine64 Quartz64 Model A.
--- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +5 -0
@@ -462,3 +462,8 @@ bluetooth { &uart2 { status = "okay"; }; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +};
Signature · 1 line
2.32.0
Re: [PATCH 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A
Hi Ezequiel,
Quoted 12 lines · Ezequiel Garcia
Enable the GPU core on the Pine64 Quartz64 Model A.
Signed-off-by Ezequiel Garcia <[email protected]>--- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++ 1 file changed, 5 insertions(+)arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +0
-0
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts bluetooth { · line 466
Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +2
-0@@ -462,3 +462,8 @@ bluetooth { &uart2 { status = "okay"; }; + +&gpu {
Nodes without "reg" are sort in alphabetical order.
Quoted 4 lines
arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +3
-0+ mali-supply = <&vdd_gpu>; + status = "okay"; +};