ARM: Tegra: FDT: Add USB EHCI function for T30/T114

Add DT node for USB EHCI function.
Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.

---
Changes in v2:
- Remove PLL parameters from dt file
Changes in v3:
- Change VBus GPIO from H.05 to DD.04 for Beaver board.
Changes in v4:
- Change Beaver VBus GPIO to H.05 and value to 0 for polarity to be High. I don't have Beaver board. So this needs somebody to help test. Thanks.
- Change Cardhu VBus GPIO value from 3 to 1 because only bit 0 is meaningful.
Changes in v5:
- Move changes on fdtdec.h and fdtdec.c to patch 2/3
- Modify PHY type to hsic for USB2 port

 arch/arm/dts/tegra114.dtsi            |   27 +++++++++++++++++++++++++++
 arch/arm/dts/tegra30.dtsi             |   27 +++++++++++++++++++++++++++
 board/nvidia/dts/tegra114-dalmore.dts |    7 +++++++
 board/nvidia/dts/tegra30-beaver.dts   |    6 ++++++
 board/nvidia/dts/tegra30-cardhu.dts   |    6 ++++++
 5 files changed, 73 insertions(+), 0 deletions(-)

index f86d18d..626cc3c 100644
@@ -216,4 +216,31 @@
 		clocks = <&tegra_car 15>;
 		status = "disable";
 	};
+
+	usb at 7d000000 {
+		compatible = "nvidia,tegra114-ehci";
+		reg = <0x7d000000 0x4000>;
+		interrupts = <52>;
+		phy_type = "utmi";
+		clocks = <&tegra_car 22>;	/* PERIPH_ID_USBD */
+		status = "disabled";
+	};
+
+	usb at 7d004000 {
+		compatible = "nvidia,tegra114-ehci";
+		reg = <0x7d004000 0x4000>;
+		interrupts = <53>;
+		phy_type = "hsic";
+		clocks = <&tegra_car 58>;	/* PERIPH_ID_USB2 */
+		status = "disabled";
+	};
+
+	usb at 7d008000 {
+		compatible = "nvidia,tegra114-ehci";
+		reg = <0x7d008000 0x4000>;
+		interrupts = <129>;
+		phy_type = "utmi";
+		clocks = <&tegra_car 59>;	/* PERIPH_ID_USB3 */
+		status = "disabled";
+	};
 };

index ccf154f..fee1c36 100644
@@ -216,4 +216,31 @@
 		clocks = <&tegra_car 15>;
 		status = "disabled";
 	};
+
+	usb at 7d000000 {
+		compatible = "nvidia,tegra30-ehci";
+		reg = <0x7d000000 0x4000>;
+		interrupts = <52>;
+		phy_type = "utmi";
+		clocks = <&tegra_car 22>;	/* PERIPH_ID_USBD */
+		status = "disabled";
+	};
+
+	usb at 7d004000 {
+		compatible = "nvidia,tegra30-ehci";
+		reg = <0x7d004000 0x4000>;
+		interrupts = <53>;
+		phy_type = "hsic";
+		clocks = <&tegra_car 58>;	/* PERIPH_ID_USB2 */
+		status = "disabled";
+	};
+
+	usb at 7d008000 {
+		compatible = "nvidia,tegra30-ehci";
+		reg = <0x7d008000 0x4000>;
+		interrupts = <129>;
+		phy_type = "utmi";
+		clocks = <&tegra_car 59>;	/* PERIPH_ID_USB3 */
+		status = "disabled";
+	};
 };

index 86e9459..435c01e 100644
@@ -14,6 +14,7 @@
 		i2c4 = "/i2c at 7000c700";
 		sdhci0 = "/sdhci at 78000600";
 		sdhci1 = "/sdhci at 78000400";
+		usb0 = "/usb at 7d008000";
 	};
 
 	memory {

@@ -61,4 +62,10 @@
 		bus-width = <8>;
 		status = "okay";
 	};
+
+	usb at 7d008000 {
+		/* SPDIF_IN: USB_VBUS_EN1 */
+		nvidia,vbus-gpio = <&gpio 86 0>;
+		status = "okay";
+	};
 };

index 836169f..a7cc93e 100644
@@ -14,6 +14,7 @@
 		i2c4 = "/i2c at 7000c700";
 		sdhci0 = "/sdhci at 78000600";
 		sdhci1 = "/sdhci at 78000000";
+		usb0 = "/usb at 7d008000";
 	};
 
 	memory {

@@ -68,4 +69,9 @@
 		status = "okay";
 		bus-width = <8>;
 	};
+
+	usb at 7d008000 {
+		nvidia,vbus-gpio = <&gpio 236 0>; /* PDD4 */
+		status = "okay";
+	};
 };

index 4d22b48..ea2cf76 100644
@@ -14,6 +14,7 @@
 		i2c4 = "/i2c at 7000c700";
 		sdhci0 = "/sdhci at 78000600";
 		sdhci1 = "/sdhci at 78000000";
+		usb0 = "/usb at 7d008000";
 	};
 
 	memory {

@@ -63,4 +64,9 @@
 		status = "okay";
 		bus-width = <8>;
 	};
+
+	usb at 7d008000 {
+		nvidia,vbus-gpio = <&gpio 236 0>;	/* PDD4 */
+		status = "okay";
+	};
 };

1.7.7

Tegra30 and Tegra114 are compatible except PLL parameters.

Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.

---
Changes in v2:
- Move common definitions into arch-tegra/usb.h and
chip specific definitions into arch-tegraXX(X)/usb.h
- In ehci-tegra.c, add PLL parameters for Tegra30 and Tegra114.
- In ehci-tegra.c, use the port pointed by "nvidia,has-legacy-mode" to know whether we do special handling on Port Reset.
- Remove some irrelevant whitespace changes.
- Use if-else, instead of goto in ehci-tegra.c init_utmi_usb_controller().
- Use original coding for PTS_MASK in ehci-tegra.c init_utmi_usb_controller().
Reason is that these bits are read-only on Tegra20.
Don't need special handling between USB1 and USB3 ports.
- Use if-else, instead of goto in ehci-tegra.c board_usb_init().
Changes in v3:
- None
Changes in v4:
- In board.c, add inclusion of asm/arch-tegra/usb.h for build warning.
- In ehci-tegra.c, modify board_usb_init to find usb nodes with compatible ID in table fdt_usb_controllers and use matched feature flags later.
- In ehci-tegra.c, removing is_T30_compatible and is_T114_compatible variables due to above change.
- In ehci-tegra.c, change variable port_clear_csc to port_addr_clear_csc.
- In pinmux-config-cardhu.h, chnage GMI_AD13 pinmux state to be OUTPUT in order to be driven HIGH for Beaver board.
Changes in v5:
- Modify fdtdec.h and fdtdec.c.
- In ehci-tegra.c, use "u32 has_hostpc:1;" for alignment concern.
- Remove previous change of "pinmux-config-cardhu.h".

 arch/arm/include/asm/arch-tegra/clk_rst.h |   10 +
 arch/arm/include/asm/arch-tegra/usb.h     |  182 ++++-------------
 arch/arm/include/asm/arch-tegra114/usb.h  |  156 +++++++++++++++
 arch/arm/include/asm/arch-tegra20/usb.h   |  155 +++++++++++++++
 arch/arm/include/asm/arch-tegra30/usb.h   |  168 ++++++++++++++++
 board/nvidia/common/board.c               |    1 +
 drivers/usb/host/ehci-tegra.c             |  300 +++++++++++++++++++++++++----
 include/fdtdec.h                          |    2 +
 lib/fdtdec.c                              |    2 +
 9 files changed, 803 insertions(+), 173 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-tegra114/usb.h
 create mode 100644 arch/arm/include/asm/arch-tegra20/usb.h
 create mode 100644 arch/arm/include/asm/arch-tegra30/usb.h

index c754ec7..9b8de9c 100644
@@ -225,6 +225,16 @@ enum {
 	IN_408_OUT_9_6_DIVISOR = 83,
 };
 
+/* CLK_RST_CONTROLLER_UTMIP_PLL_CFG1_0 */
+#define PLLU_POWERDOWN		(1 << 16)
+#define PLL_ENABLE_POWERDOWN	(1 << 14)
+#define PLL_ACTIVE_POWERDOWN	(1 << 12)
+
+/* CLK_RST_CONTROLLER_UTMIP_PLL_CFG2_0 */
+#define UTMIP_FORCE_PD_SAMP_C_POWERDOWN		(1 << 4)
+#define UTMIP_FORCE_PD_SAMP_B_POWERDOWN		(1 << 2)
+#define UTMIP_FORCE_PD_SAMP_A_POWERDOWN		(1 << 0)
+
 /* CLK_RST_CONTROLLER_OSC_CTRL_0 */
 #define OSC_XOBP_SHIFT		1
 #define OSC_XOBP_MASK		(1U << OSC_XOBP_SHIFT)

index 8d7a227..f60f21f 100644
@@ -47,6 +47,7 @@
 #endif
 #ifdef CONFIG_USB_EHCI_TEGRA
 #include <asm/arch-tegra/usb.h>
+#include <asm/arch/usb.h>
 #endif
 #ifdef CONFIG_TEGRA_MMC
 #include <asm/arch-tegra/tegra_mmc.h>

index 4e8032b..d19b9f3 100644
@@ -64,6 +64,8 @@ struct fdt_memory {
 enum fdt_compat_id {
 	COMPAT_UNKNOWN,
 	COMPAT_NVIDIA_TEGRA20_USB,	/* Tegra20 USB port */
+	COMPAT_NVIDIA_TEGRA30_USB,	/* Tegra30 USB port */
+	COMPAT_NVIDIA_TEGRA114_USB,	/* Tegra114 USB port */
 	COMPAT_NVIDIA_TEGRA114_I2C,	/* Tegra114 I2C w/single clock source */
 	COMPAT_NVIDIA_TEGRA20_I2C,	/* Tegra20 i2c */
 	COMPAT_NVIDIA_TEGRA20_DVC,	/* Tegra20 dvc (really just i2c) */

index ac1fe0b..ffc4369 100644
@@ -37,6 +37,8 @@ DECLARE_GLOBAL_DATA_PTR;
 static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(UNKNOWN, "<none>"),
 	COMPAT(NVIDIA_TEGRA20_USB, "nvidia,tegra20-ehci"),
+	COMPAT(NVIDIA_TEGRA30_USB, "nvidia,tegra30-ehci"),
+	COMPAT(NVIDIA_TEGRA114_USB, "nvidia,tegra114-ehci"),
 	COMPAT(NVIDIA_TEGRA114_I2C, "nvidia,tegra114-i2c"),
 	COMPAT(NVIDIA_TEGRA20_I2C, "nvidia,tegra20-i2c"),
 	COMPAT(NVIDIA_TEGRA20_DVC, "nvidia,tegra20-i2c-dvc"),

1.7.7

Add USB EHCI, storage and network support.

Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.

---
Changes in v2:
- Add support for Beaver board.
Changes in v3:
- None
Changes in v4:
- None
Changes in v5:
- None

 include/configs/beaver.h          |   14 ++++++++++++++
 include/configs/cardhu.h          |   14 ++++++++++++++
 include/configs/dalmore.h         |   14 ++++++++++++++
 include/configs/tegra114-common.h |    3 +++
 include/configs/tegra30-common.h  |    3 +++
 5 files changed, 48 insertions(+), 0 deletions(-)

index 058da4f..165de13 100644
@@ -71,6 +71,20 @@
 #define CONFIG_CMD_SF
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
+/* USB Host support */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_USB
+
+/* USB networking support */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+
+/* General networking support */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+
 #include "tegra-common-post.h"
 
 #endif /* __CONFIG_H */

index 6a99175..fd46083 100644
@@ -70,6 +70,20 @@
 #define CONFIG_CMD_SF
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
+/* USB Host support */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_USB
+
+/* USB networking support */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+
+/* General networking support */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+
 #include "tegra-common-post.h"
 
 #endif /* __CONFIG_H */

index 7b68f7c..2723843 100644
@@ -75,6 +75,20 @@
 #define CONFIG_CMD_SF
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
+/* USB Host support */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_USB
+
+/* USB networking support */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+
+/* General networking support */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+
 #include "tegra-common-post.h"
 
 #endif /* __CONFIG_H */

index 721b29c..44e98e5 100644
@@ -77,4 +77,7 @@
 /* Total I2C ports on Tegra114 */
 #define TEGRA_I2C_NUM_CONTROLLERS	5
 
+/* For USB EHCI controller */
+#define CONFIG_EHCI_IS_TDI
+
 #endif /* _TEGRA114_COMMON_H_ */

index ed36e11..7ea36be 100644
@@ -90,4 +90,7 @@
 /* Total I2C ports on Tegra30 */
 #define TEGRA_I2C_NUM_CONTROLLERS	5
 
+/* For USB EHCI controller */
+#define CONFIG_EHCI_IS_TDI
+
 #endif /* _TEGRA30_COMMON_H_ */

1.7.7

HSIC is an odd choice; ULPI is much more common. Still, this isn't a big deal; this is simply a default value, so any board that enables USB2 can simply set the property to "ulpi" if needed.

Missing from the changelog is the fact you fixed the VBUS GPIO values for Cardhu and Beaver to be correct.

I'll try to test and do a final review of this soon.

Long time ago but now I am working on a board support for tegra30 which has ASIX-eth on USB2-HSIC and don't get it to work. Checking the code leads me to the question:

Is it possible that phy_type = "hsic" is not handled at all?

Andreas

Almost certainly. I don't believe any of the boards we currently support in upstream U-Boot or the Linux kernel actually use/support HSIC, so it's quite unlikely that the driver support for HSIC is present.

The series,

Also, on Beaver, Cardhu-A04, and Dalmore, I tested downloading/booting a kernel over a USB Ethernet dongle, so,

Dear Stephen Warren,

I will apply this v5, OK?

Best regards,
Marek Vasut

This is a Tegra change, Marek. I believe it's assigned to me in Patchwork.

I'll apply it to u-boot-tegra/next today or tomorrow.

Tom

--
nvpublic

Dear Tom Warren,

This is also a USB change, but it doesn't touch anything vital, so be my guest. Thanks

Best regards,
Marek Vasut