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ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees

PATCH Superseded Kumar Gala 2 participants 2 messages Apr 8, 2014

Subsystems (6)
Device tree bindings Arm (32-bit) Arm sub-architectures Arm Qualcomm mailing list +2 more subsystems

v2 of 3 Superseded Latest is v3 →

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Kumar Gala

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PATCH v2 1/1 ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees

Add basic IPQ8064 SoC include device tree and support for basic booting on the AP148 Reference board. Also, keep dtb build list and qcom_dt_match in sorted order.

Signed-off-by Kumar Gala <[email protected]>

---
v2:
* created a v1.0 ipq8064.dtsi to handle differences in Si rev in future
* changed /include/ to #include
* fixed timer freq to be 25Mhz instead of 27Mhz (copied from msm8960)
* added PMU node
* dropped interrupts from cpus node, not currently part of binding

 arch/arm/boot/dts/Makefile               |   8 +-
 arch/arm/boot/dts/qcom-ipq8064-ap148.dts |  12 +++
 arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi |   1 +
 arch/arm/boot/dts/qcom-ipq8064.dtsi      | 125 +++++++++++++++++++++++++++++++
 arch/arm/mach-qcom/board.c               |   4 +-
 5 files changed, 146 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/boot/dts/qcom-ipq8064-ap148.dts
 create mode 100644 arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
 create mode 100644 arch/arm/boot/dts/qcom-ipq8064.dtsi
arch/arm/boot/dts/Makefile +5 -3
index 4a89023..0591ed0 100644
@@ -231,9 +231,11 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
 	dra7-evm.dtb
 dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
 dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
-dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
-	qcom-msm8960-cdp.dtb \
-	qcom-apq8074-dragonboard.dtb
+dtb-$(CONFIG_ARCH_QCOM) += \
+	qcom-apq8074-dragonboard.dtb \
+	qcom-ipq8064-ap148.dtb \
+	qcom-msm8660-surf.dtb \
+	qcom-msm8960-cdp.dtb
 dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
 	ste-hrefprev60-stuib.dtb \
 	ste-hrefprev60-tvk.dtb \
arch/arm/boot/dts/qcom-ipq8064-ap148.dts new file +12 -0
new file mode 100644
index 0000000..5e6f456
@@ -0,0 +1,12 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+	model = "Qualcomm IPQ8064/DB149";
+	compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
+
+	soc {
+		serial at 16340000 {
+			status = "ok";
+		};
+	};
+};
arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi new file +1 -0
new file mode 100644
index 0000000..7093b07
@@ -0,0 +1 @@
+#include "qcom-ipq8064.dtsi"
arch/arm/boot/dts/qcom-ipq8064.dtsi new file +125 -0

125 lines not on this page · raw message

arch/arm/mach-qcom/board.c +3 -1
index bae617e..cb3c07c 100644
@@ -15,9 +15,11 @@
 #include <asm/mach/arch.h>
 
 static const char * const qcom_dt_match[] __initconst = {
+	"qcom,apq8074-dragonboard",
+	"qcom,ipq8062",
+	"qcom,ipq8064",
 	"qcom,msm8660-surf",
 	"qcom,msm8960-cdp",
-	"qcom,apq8074-dragonboard",
 	NULL
 };
Signature · 2 lines
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#1 lore raw

Hi Kumar,

<snip>

arch/arm/boot/dts/qcom-ipq8064-ap148.dts line 5

Quoted 11 lines
arch/arm/boot/dts/qcom-ipq8064-ap148.dts new file +5 -0
new file mode 100644
index 0000000..5e6f456
@@ -0,0 +1,12 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+/ {
+	model = "Qualcomm IPQ8064/DB149";
+	compatible = "qcom,ipq8064-db149", "qcom,ipq8064";

The patch subject saying AP148, and here AP149. Which is the wrong one?

Quoted 19 lines
arch/arm/boot/dts/qcom-ipq8064-ap148.dts new file +7 -0
+
+	soc {
+		serial at 16340000 {
+			status = "ok";
+		};
+	};
+};
arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi new file +1 -0
new file mode 100644
index 0000000..7093b07
@@ -0,0 +1 @@
+#include "qcom-ipq8064.dtsi"
arch/arm/boot/dts/qcom-ipq8064.dtsi new file +0 -0
new file mode 100644
index 0000000..8ca3b51

<snip>

arch/arm/boot/dts/qcom-ipq8064.dtsi line 56

Quoted 7 lines
arch/arm/boot/dts/qcom-ipq8064.dtsi new file +7 -0
+
+		intc: interrupt-controller at 2000000 {
+			compatible = "qcom,msm-qgic2";
+			interrupt-controller;
+			#interrupt-cells = <3>;
+			reg = < 0x02000000 0x1000 >,
+			      < 0x02002000 0x1000 >;

extra spaces around these numbers

regards,
Stan