arm: mvebu: add Synology DS213j and DS414 .dts files

---
 arch/arm/boot/dts/kirkwood-synology.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/kirkwood-synology.dtsi +1 -1

index 811e0971fc58..8be5b2e4626e 100644
@@ -266,7 +266,7 @@
 
 			s35390a: s35390a at 30 {
 				status = "disabled";
-				compatible = "ssi,s35390a";
+				compatible = "sii,s35390a";
 				reg = <0x30>;
 			};
 		};

Signature · 1 line

2.1.1

Arnaud Ebalard

author

2014-11-21 23:45 UTC #2 lore raw

PATCH v6 2/10 arm: mvebu: add uartX labels for Armada SoC serial nodes

This patch adds uartX labels for Armada SoC serial nodes. This is a preliminary work to be able to easily reference the serial lines in Device Tree files. One expected use is when providing stdout-path property for barebox.

Reviewed-by Thomas Petazzoni <[email protected]>

---
 arch/arm/boot/dts/armada-370-xp.dtsi | 5 +++--
 arch/arm/boot/dts/armada-xp.dtsi     | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

arch/arm/boot/dts/armada-370-xp.dtsi +3 -2

index 83286ec9702c..2be9723bcdf3 100644
@@ -151,7 +151,7 @@
 				status = "disabled";
 			};
 
-			serial at 12000 {
+			uart0: serial at 12000 {
 				compatible = "snps,dw-apb-uart";
 				reg = <0x12000 0x100>;
 				reg-shift = <2>;

@@ -160,7 +160,8 @@
 				clocks = <&coreclk 0>;
 				status = "disabled";
 			};
-			serial at 12100 {
+
+			uart1: serial at 12100 {
 				compatible = "snps,dw-apb-uart";
 				reg = <0x12100 0x100>;
 				reg-shift = <2>;

arch/arm/boot/dts/armada-xp.dtsi +3 -2

index a3919b644737..e4ba27ef109b 100644
@@ -53,7 +53,7 @@
 				reg = <0x11100 0x100>;
 			};
 
-			serial at 12200 {
+			uart2: serial at 12200 {
 				compatible = "snps,dw-apb-uart";
 				reg = <0x12200 0x100>;
 				reg-shift = <2>;

@@ -62,7 +62,8 @@
 				clocks = <&coreclk 0>;
 				status = "disabled";
 			};
-			serial at 12300 {
+
+			uart3: serial at 12300 {
 				compatible = "snps,dw-apb-uart";
 				reg = <0x12300 0x100>;
 				reg-shift = <2>;

Signature · 1 line

2.1.1

Arnaud Ebalard

author

2014-11-21 23:45 UTC #3 lore raw

PATCH v6 3/10 arm: mvebu: use recently introduced uart label for stdout-path

Now that labels for uartX are available in Marvell Armada .dtsi files, this patch replaces the "/soc/internal-regs/serial at 12000" found in armada-xp-lenovo-ix4-300d.dts file for stdout-path property by the more concise &uart0.

Reviewed-by Thomas Petazzoni <[email protected]>

---
 arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts +1 -1

index aa5463c91924..088d8d2fe9eb 100644
@@ -22,7 +22,7 @@
 
 	chosen {
 		bootargs = "console=ttyS0,115200 earlyprintk";
-		stdout-path = "/soc/internal-regs/serial at 12000";
+		stdout-path = &uart0;
 	};
 
 	memory {

Signature · 1 line

2.1.1

Arnaud Ebalard

author

2014-11-21 23:45 UTC #4 lore raw

PATCH v6 4/10 arm: mvebu: move Armada 370/XP pinctrl node definition armada-370-xp.dtsi

What was done by Sebastian in 264a05e19bf5 ("ARM: mvebu: armada-xp:
Add node alias to pinctrl and add base address") and 01c434225ee6 ("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for Armada 370, i.e.

- Rename Armada 370 pinctrl node to pin-ctrl with its address encoded
- Add a node alias to access the pinctrl node easily.
- use the newly available alias in existing Armada 370 .dts files

We can even go a bit further by putting the pinctrl node definition in armada-370-xp.dtsi, with only its reg property defined. This allows us to then also use the newly defined node alias in armada-xp.dtsi, armada-370.dtsi.

---
 arch/arm/boot/dts/armada-370-db.dts            |  48 +++++-----
 arch/arm/boot/dts/armada-370-mirabox.dts       |  25 ++---
 arch/arm/boot/dts/armada-370-netgear-rn102.dts |  84 ++++++++---------
 arch/arm/boot/dts/armada-370-netgear-rn104.dts |  64 ++++++-------
 arch/arm/boot/dts/armada-370-rd.dts            |  24 ++---
 arch/arm/boot/dts/armada-370-xp.dtsi           |   4 +
 arch/arm/boot/dts/armada-370.dtsi              | 121 ++++++++++++-------------
 arch/arm/boot/dts/armada-xp.dtsi               |  72 +++++++--------
 8 files changed, 222 insertions(+), 220 deletions(-)

arch/arm/boot/dts/armada-370-db.dts +24 ~~-24~~

index a495e5821ab8..29f1c8c0369f 100644
@@ -102,30 +102,6 @@
 				broken-cd;
 			};
 
-			pinctrl {
-				/*
-				 * These pins might be muxed as I2S by
-				 * the bootloader, but it conflicts
-				 * with the real I2S pins that are
-				 * muxed using i2s_pins. We must mux
-				 * those pins to a function other than
-				 * I2S.
-				 */
-				pinctrl-0 = <&hog_pins1 &hog_pins2>;
-				pinctrl-names = "default";
-
-				hog_pins1: hog-pins1 {
-					marvell,pins = "mpp6",  "mpp8", "mpp10",
-						       "mpp12", "mpp13";
-					marvell,function = "gpio";
-				};
-
-				hog_pins2: hog-pins2 {
-					marvell,pins = "mpp5", "mpp7", "mpp9";
-					marvell,function = "gpo";
-				};
-			};
-
 			usb at 50000 {
 				status = "okay";
 			};

@@ -181,3 +157,27 @@
 	      compatible = "linux,spdif-dir";
 	};
 };
+
+&pinctrl {
+	/*
+	 * These pins might be muxed as I2S by
+	 * the bootloader, but it conflicts
+	 * with the real I2S pins that are
+	 * muxed using i2s_pins. We must mux
+	 * those pins to a function other than
+	 * I2S.
+	 */
+	pinctrl-0 = <&hog_pins1 &hog_pins2>;
+	pinctrl-names = "default";
+
+	hog_pins1: hog-pins1 {
+		marvell,pins = "mpp6",  "mpp8", "mpp10",
+			       "mpp12", "mpp13";
+		marvell,function = "gpio";
+	};
+
+	hog_pins2: hog-pins2 {
+		marvell,pins = "mpp5", "mpp7", "mpp9";
+		marvell,function = "gpo";
+	};
+};

arch/arm/boot/dts/armada-370-mirabox.dts +13 ~~-12~~

index 2b6d24e0d1e8..e1b0eb6b091f 100644
@@ -54,18 +54,6 @@
 				status = "okay";
 			};
 
-			pinctrl {
-				pwr_led_pin: pwr-led-pin {
-					marvell,pins = "mpp63";
-					marvell,function = "gpo";
-				};
-
-				stat_led_pins: stat-led-pins {
-					marvell,pins = "mpp64", "mpp65";
-					marvell,function = "gpio";
-				};
-			};
-
 			gpio_leds {
 				compatible = "gpio-leds";
 				pinctrl-names = "default";

@@ -169,3 +157,16 @@
 		};
 	};
 };
+
+&pinctrl {
+	pwr_led_pin: pwr-led-pin {
+		marvell,pins = "mpp63";
+		marvell,function = "gpo";
+	};
+
+	stat_led_pins: stat-led-pins {
+		marvell,pins = "mpp64", "mpp65";
+		marvell,function = "gpio";
+	};
+};
+

arch/arm/boot/dts/armada-370-netgear-rn102.dts +42 ~~-42~~

93 lines not on this page · raw message

arch/arm/boot/dts/armada-370-netgear-rn104.dts +32 ~~-32~~

73 lines not on this page · raw message

arch/arm/boot/dts/armada-370-rd.dts +12 ~~-12~~

index f57a8f841498..f427c8109813 100644
@@ -59,18 +59,6 @@
 		};
 
 		internal-regs {
-			pinctrl {
-				fan_pins: fan-pins {
-					marvell,pins = "mpp8";
-					marvell,function = "gpio";
-				};
-
-				led_pins: led-pins {
-					marvell,pins = "mpp32";
-					marvell,function = "gpio";
-				};
-			};
-
 			serial at 12000 {
 				status = "okay";
 			};

@@ -174,3 +162,15 @@
 		};
 	};
  };
+
+&pinctrl {
+	fan_pins: fan-pins {
+		marvell,pins = "mpp8";
+		marvell,function = "gpio";
+	};
+
+	led_pins: led-pins {
+		marvell,pins = "mpp32";
+		marvell,function = "gpio";
+	};
+};

arch/arm/boot/dts/armada-370-xp.dtsi +4 -0

index 2be9723bcdf3..b48fa8ae4196 100644
@@ -171,6 +171,10 @@
 				status = "disabled";
 			};
 
+			pinctrl: pin-ctrl at 18000 {
+				reg = <0x18000 0x38>;
+			};
+
 			coredivclk: corediv-clock at 18740 {
 				compatible = "marvell,armada-370-corediv-clock";
 				reg = <0x18740 0xc>;

arch/arm/boot/dts/armada-370.dtsi +60 ~~-61~~

130 lines not on this page · raw message

arch/arm/boot/dts/armada-xp.dtsi +35 ~~-37~~

81 lines not on this page · raw message

Signature · 1 line

2.1.1

Arnaud Ebalard

author

2014-11-21 23:46 UTC #5 lore raw

PATCH v6 5/10 arm: mvebu: define and use common Armada 370 SPI pinctrl settings

This patch defines common Armada 370 pinctrl settings for spi0 and spi1 interfaces:

spi0: MPP33-36 as default, MPP32,63-65 as available alternate config
spi1: MPP49-52 as default

Currently, the Armada 370 DB .dts file has no explicit pinctrl info for the spi0 interface used to access the flash on the board. The patch fixes that by also adding explicit pinctrl info (MPP32,63-65) for this SPI interface.

Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their spi interfaces if the default above does not match their config.

---
 arch/arm/boot/dts/armada-370-db.dts |  2 ++
 arch/arm/boot/dts/armada-370.dtsi   | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 34 insertions(+)

arch/arm/boot/dts/armada-370-db.dts +2 -0

index 29f1c8c0369f..f688ab4202e3 100644
@@ -111,6 +111,8 @@
 			};
 
 			spi0: spi at 10600 {
+				pinctrl-0 = <&spi0_pins2>;
+				pinctrl-names = "default";
 				status = "okay";
 
 				spi-flash at 0 {

arch/arm/boot/dts/armada-370.dtsi +32 -0

index 90e1286d414f..f1227c53e92d 100644
@@ -99,6 +99,20 @@
 				wt-override;
 			};
 
+			/*
+			 * Default SPI pinctrl setting, can be overwritten on
+			 * board level if a different configuration is used.
+			 */
+			spi0: spi at 10600 {
+				pinctrl-0 = <&spi0_pins1>;
+				pinctrl-names = "default";
+			};
+
+			spi1: spi at 10680 {
+				pinctrl-0 = <&spi1_pins>;
+				pinctrl-names = "default";
+			};
+
 			i2c0: i2c at 11000 {
 				reg = <0x11000 0x20>;
 			};

@@ -249,6 +263,24 @@
 &pinctrl {
 	compatible = "marvell,mv88f6710-pinctrl";
 
+	spi0_pins1: spi0-pins1 {
+		marvell,pins = "mpp33", "mpp34",
+			       "mpp35", "mpp36";
+		marvell,function = "spi0";
+	};
+
+	spi0_pins2: spi0_pins2 {
+		marvell,pins = "mpp32", "mpp63",
+			       "mpp64", "mpp65";
+		marvell,function = "spi0";
+	};
+
+	spi1_pins: spi1-pins {
+		marvell,pins = "mpp49", "mpp50",
+			       "mpp51", "mpp52";
+		marvell,function = "spi1";
+	};
+
 	sdio_pins1: sdio-pins1 {
 		marvell,pins = "mpp9",  "mpp11", "mpp12",
 				"mpp13", "mpp14", "mpp15";

Signature · 1 line

2.1.1

Arnaud Ebalard

author

2014-11-21 23:46 UTC #6 lore raw

PATCH v6 6/10 arm: mvebu: define and use common Armada 370 UART pinctrl settings

This patch defines common Armada 370 pinctrl settings for uart0 and uart1 interfaces:

uart0: MPP0-1 as default
uart1: MPP41-42 as default

Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their uart interfaces if the default above does not match their config.

---
 arch/arm/boot/dts/armada-370.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

arch/arm/boot/dts/armada-370.dtsi +25 -0

index f1227c53e92d..fbd835a3c62c 100644
@@ -121,6 +121,21 @@
 				reg = <0x11100 0x20>;
 			};
 
+			/*
+			 * Default UART pinctrl setting without RTS/CTS, can
+			 * be overwritten on board level if a different
+			 * configuration is used.
+			 */
+			uart0: serial at 12000 {
+				pinctrl-0 = <&uart0_pins>;
+				pinctrl-names = "default";
+			};
+
+			uart1: serial at 12100 {
+				pinctrl-0 = <&uart1_pins>;
+				pinctrl-names = "default";
+			};
+
 			system-controller at 18200 {
 				compatible = "marvell,armada-370-xp-system-controller";
 				reg = <0x18200 0x100>;

@@ -281,6 +296,16 @@
 		marvell,function = "spi1";
 	};
 
+	uart0_pins: uart0-pins {
+		marvell,pins = "mpp0", "mpp1";
+		marvell,function = "uart0";
+	};
+
+	uart1_pins: uart1-pins {
+		marvell,pins = "mpp41", "mpp42";
+		marvell,function = "uart1";
+	};
+
 	sdio_pins1: sdio-pins1 {
 		marvell,pins = "mpp9",  "mpp11", "mpp12",
 				"mpp13", "mpp14", "mpp15";

Signature · 1 line

2.1.1

Arnaud Ebalard

author

2014-11-21 23:46 UTC #7 lore raw

PATCH v6 7/10 arm: mvebu: define and use common Armada XP UART2/3 pinctrl settings

This patch defines common Armada XP pinctrl settings for uart2 and uart3 interfaces (uart0 and uart1 rx/tx do not rely on MPP):

uart2: MPP42-43 as default
uart3: MPP44-45 as default

---
 arch/arm/boot/dts/armada-xp.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

arch/arm/boot/dts/armada-xp.dtsi +14 -0

index b59a83cf2f26..7cefb9b6d27c 100644
@@ -55,6 +55,8 @@
 
 			uart2: serial at 12200 {
 				compatible = "snps,dw-apb-uart";
+				pinctrl-0 = <&uart2_pins>;
+				pinctrl-names = "default";
 				reg = <0x12200 0x100>;
 				reg-shift = <2>;
 				interrupts = <43>;

@@ -65,6 +67,8 @@
 
 			uart3: serial at 12300 {
 				compatible = "snps,dw-apb-uart";
+				pinctrl-0 = <&uart3_pins>;
+				pinctrl-names = "default";
 				reg = <0x12300 0x100>;
 				reg-shift = <2>;
 				interrupts = <44>;

@@ -235,4 +239,14 @@
 			       "mpp33", "mpp34", "mpp35";
 		marvell,function = "sd0";
 	};
+
+	uart2_pins: uart2-pins {
+		marvell,pins = "mpp42", "mpp43";
+		marvell,function = "uart2";
+	};
+
+	uart3_pins: uart3-pins {
+		marvell,pins = "mpp44", "mpp45";
+		marvell,function = "uart3";
+	};
 };

Signature · 1 line

2.1.1

Arnaud Ebalard

author

2014-11-21 23:46 UTC #8 lore raw

PATCH v6 8/10 arm: mvebu: define and use common Armada XP SPI pinctrl setting

This patch defines common Armada XP pinctrl settings in armada-xp.dtsi for the supported SPI interface (MPP36-39) and use it as default for Armada XP spi interface. That being done, it removes the now redundant definitions in armada-xp-axpwifiap.dts.

Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their spi interfaces if the default above does not match their config (i.e. if they do not use CS0).

---
 arch/arm/boot/dts/armada-xp-axpwifiap.dts |  7 -------
 arch/arm/boot/dts/armada-xp.dtsi          | 11 +++++++++++
 2 files changed, 11 insertions(+), 7 deletions(-)

arch/arm/boot/dts/armada-xp-axpwifiap.dts +0 -7

index 0e53fad111de..c9d25bdbe795 100644
@@ -100,8 +100,6 @@
 
 			spi0: spi at 10600 {
 				status = "okay";
-				pinctrl-0 = <&pmx_spi>;
-				pinctrl-names = "default";
 
 				spi-flash at 0 {
 					#address-cells = <1>;

@@ -138,11 +136,6 @@
 		marvell,function = "gpio";
 	};
 
-	pmx_spi: pmx-spi {
-		marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
-		marvell,function = "spi";
-	};
-
 	pmx_phy_int: pmx-phy-int {
 		marvell,pins = "mpp32";
 		marvell,function = "gpio";

arch/arm/boot/dts/armada-xp.dtsi +11 -0

index 7cefb9b6d27c..bdb36a05c039 100644
@@ -43,6 +43,11 @@
 				wt-override;
 			};
 
+			spi0: spi at 10600 {
+				pinctrl-0 = <&spi0_pins>;
+				pinctrl-names = "default";
+			};
+
 			i2c0: i2c at 11000 {
 				compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
 				reg = <0x11000 0x100>;

@@ -240,6 +245,12 @@
 		marvell,function = "sd0";
 	};
 
+	spi0_pins: spi0-pins {
+		marvell,pins = "mpp36", "mpp37",
+			       "mpp38", "mpp39";
+		marvell,function = "spi";
+	};
+
 	uart2_pins: uart2-pins {
 		marvell,pins = "mpp42", "mpp43";
 		marvell,function = "uart2";

Signature · 1 line

2.1.1

Arnaud Ebalard

author

2014-11-21 23:46 UTC #9 lore raw

PATCH v6 9/10 arm: mvebu: add .dts file for Synology DS213j

Synology DS213j is a 2-bay NAS powered by a Marvell Armada 370 (88F6710 @1.2Ghz). It is very similar on many aspects to previous 2-bay synology models based on Marvell kirkwood SoC. Here is a short summary of the device:

- 512MB RAM
- boot on SPI flash (64Mbit Micron N25Q064)
- 1 GbE interface (Armada MAC connected to a Marvell 88E1512 PHY via SGMII)
- 2 rear USB 2.0 ports (directly handled by the Armada 370)
- 2 internal SATA ports handled by the Armada 370: 2 GPIO for presence, 2 for powering them
- two front amber LED (disk1, disk2) controlled by the SoC
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a TI MSP430F2111)
- Fan handled via 4 GPIO (3 for speed, 1 for alarm)

---
 arch/arm/boot/dts/Makefile                       |   3 +-
 arch/arm/boot/dts/armada-370-synology-ds213j.dts | 316 +++++++++++++++++++++++
 2 files changed, 318 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/armada-370-synology-ds213j.dts

arch/arm/boot/dts/Makefile +2 -1

index 31529ccc67a0..cfcf400a3a6c 100644
@@ -496,7 +496,8 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
 	armada-370-mirabox.dtb \
 	armada-370-netgear-rn102.dtb \
 	armada-370-netgear-rn104.dtb \
-	armada-370-rd.dtb
+	armada-370-rd.dtb \
+	armada-370-synology-ds213j.dtb
 dtb-$(CONFIG_MACH_ARMADA_375) += \
 	armada-375-db.dtb
 dtb-$(CONFIG_MACH_ARMADA_38X) += \

arch/arm/boot/dts/armada-370-synology-ds213j.dts new file +316 -0

316 lines not on this page · raw message

Signature · 1 line

2.1.1

Arnaud Ebalard

author

2014-11-21 23:46 UTC #10 lore raw

PATCH v6 10/10 arm: mvebu: add .dts file for Synology DS414

Synology DS414 is a 4-bay NAS powered by a Marvell Armada XP (mv78230 dual-core @1.33Ghz). It is very similar on many aspects to previous 4-bay synology models based on Marvell kirkwood SoC. Here is a short summary of the device:

- 1GB RAM
- Boot on SPI flash (64Mbit Micron N25Q064)
- 2 GbE interfaces (Armada MAC connected to two Marvell 88E1512 PHY via RGMII)
- 1 front USB 2.0 ports (directly handled by the Armada 370)
- 2 rear USB 3.0 ports (handled by an EtronTech EJ168A XHCI controller on the PCIe bus)
- 4 internal SATA ports handled by a Marvell 88SX7042 SATA-II controller on the PCIe bus)
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a Microchip PIC16F883)

Additional note: the front LEDs the and the two fans are not directly connected to the SoC and under its control. The former are presumably driven by the SATA controller, the latter by the PIC.

---
 arch/arm/boot/dts/Makefile                     |   3 +-
 arch/arm/boot/dts/armada-xp-synology-ds414.dts | 330 +++++++++++++++++++++++++
 2 files changed, 332 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/armada-xp-synology-ds414.dts

arch/arm/boot/dts/Makefile +2 -1

index cfcf400a3a6c..88346b317d76 100644
@@ -510,7 +510,8 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
 	armada-xp-lenovo-ix4-300d.dtb \
 	armada-xp-matrix.dtb \
 	armada-xp-netgear-rn2120.dtb \
-	armada-xp-openblocks-ax3-4.dtb
+	armada-xp-openblocks-ax3-4.dtb \
+	armada-xp-synology-ds414.dtb
 dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
 	dove-cubox.dtb \
 	dove-cubox-es.dtb \

arch/arm/boot/dts/armada-xp-synology-ds414.dts new file +330 -0

330 lines not on this page · raw message

Signature · 1 line

2.1.1

Ben Peddell

2014-11-22 03:10 UTC #11 lore raw

PATCH v6 10/10 arm: mvebu: add .dts file for Synology DS414

Quoted 10 lines · Arnaud Ebalard

arch/arm/boot/dts/armada-xp-synology-ds414.dts new file +10 -0

+
+	syno_id_bit0_pin: syno-id-bit0-pin {
+		marvell,pins = "mpp26";
+		marvell,function = "gpio";
+	};
+
+	pmx_syno_id_bit1: syno-id-bit1-pin {
+		marvell,pins = "mpp28";
+		marvell,function = "gpio";
+	};

arch/arm/boot/dts/armada-xp-synology-ds414.dts line 324

Quoted 10 lines

arch/arm/boot/dts/armada-xp-synology-ds414.dts new file +10 -0

+
+	pmx_syno_id_bit2: syno-id-bit2-pin {
+		marvell,pins = "mpp29";
+		marvell,function = "gpio";
+	};
+
+	pmx_fan1_alarm: fan1-alarm-pin {
+		marvell,pins = "mpp33";
+		marvell,function = "gpio";
+	};

It looks like you forgot to replace pmx_* with *_pin here.

Quoted 7 lines

arch/arm/boot/dts/armada-xp-synology-ds414.dts new file +6 -0
+
+	fan2_alarm_pin: fan2-alarm-pin {
+		marvell,pins = "mpp32";
+		marvell,function = "gpio";
+	};
+};

Arnaud Ebalard

author

2014-11-22 07:41 UTC #12 lore raw

PATCH v6 10/10 arm: mvebu: add .dts file for Synology DS414

Hi Ben,

Quoted 15 lines · Ben Peddell

Quoted 14 lines · Arnaud Ebalard

arch/arm/boot/dts/armada-xp-synology-ds414.dts new file +14 -0

+
+	syno_id_bit0_pin: syno-id-bit0-pin {
+		marvell,pins = "mpp26";
+		marvell,function = "gpio";
+	};
+
+	pmx_syno_id_bit1: syno-id-bit1-pin {
+		marvell,pins = "mpp28";
+		marvell,function = "gpio";
+	};
+
+	pmx_syno_id_bit2: syno-id-bit2-pin {
+		marvell,pins = "mpp29";
+		marvell,function = "gpio";

Quoted 8 lines

arch/arm/boot/dts/armada-xp-synology-ds414.dts line 324
Quoted 6 lines
arch/arm/boot/dts/armada-xp-synology-ds414.dts new file +6 -0
+	};
+
+	pmx_fan1_alarm: fan1-alarm-pin {
+		marvell,pins = "mpp33";
+		marvell,function = "gpio";
+	};
It looks like you forgot to replace pmx_* with *_pin here.

Indeed. Weird it went unnoticed during compilation. Thanks for pointing it, Ben.

Cheers,

Jason Cooper

2014-11-22 04:54 UTC #13 lore raw

v6 cover arm: mvebu: add Synology DS213j and DS414 .dts files