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Andes(nds32) Linux Kernel Port

PATCH Superseded Greentime Hu 14 participants 112 messages Nov 8, 2017 – Nov 22, 2017 4 messages not in the archive

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v1 of 7 Superseded Latest is v7 →

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cover Andes(nds32) Linux Kernel Port

This patchset adds core architecture support to Linux for Andestech's N13, N15, D15, N10, D10 processor cores.

Based on the 16/32-bit AndeStar RISC-like architecture, we designed the configurable AndesCore series of embedded processor families. AndesCores range from highly performance-efficient small-footprint cores for microcontrollers and deeply-embedded applications to 1GHz+ cores running Linux, covering general-purpose N-series cores for a wide range of computing need, DSP-capable D-series cores for digital signal control, instruction-extensible E-series cores for application-specific acceleration, and secure S-series cores for best protection of the most valuable.

The patches are based on v4.14-rc8, and can also be found in the following git tree:
https://github.com/andestech/linux.git nds32-4.14-rc8

The build script and toolchain repositories are able to be found here:
https://github.com/andestech/build_script.git

Freely available instruction set and architecture overview documents can be found on the following page:
http://www.andestech.com/product.php?cls=9

Vincent Ren-Wei Chen and I will maintain this port. Thanks to everyone who helped us and contributed to it. :) Any feedback is welcome.

Greentime Hu (31):
nds32: Assembly macros and definitions
nds32: Kernel booting and initialization
nds32: Support early_printk
nds32: Exception handling
nds32: MMU definitions
nds32: MMU initialization
nds32: MMU fault handling and page table management
nds32: Cache and TLB routines
nds32: Process management
nds32: IRQ handling
nds32: Atomic operations
nds32: Device specific operations
nds32: DMA mapping API
nds32: ELF definitions
nds32: System calls handling
nds32: VDSO support
nds32: Signal handling support
nds32: Library functions
nds32: Debugging support
nds32: L2 cache support
nds32: Loadable modules
nds32: Generic timers support
nds32: Device tree support
nds32: Miscellaneous header files
nds32: defconfig
nds32: Build infrastructure
dt-bindings: interrupt-controller: Andestech Internal Vector
Interrupt Controller
irqchip: Andestech Internal Vector Interrupt Controller driver
MAINTAINERS: Add nds32
dt-bindings: nds32 CPU Bindings
net: faraday add nds32 support.

 .../interrupt-controller/andestech,ativic32.txt    |   27 +
 Documentation/devicetree/bindings/nds32/cpus.txt   |   33 +
 MAINTAINERS                                        |    9 +
 arch/nds32/Kconfig                                 |  107 +++
 arch/nds32/Kconfig.cpu                             |  100 ++
 arch/nds32/Kconfig.debug                           |   14 +
 arch/nds32/Makefile                                |   60 ++
 arch/nds32/boot/Makefile                           |   15 +
 arch/nds32/boot/dts/Makefile                       |    8 +
 arch/nds32/boot/dts/ae3xx.dts                      |   55 ++
 arch/nds32/boot/dts/ag101p.dts                     |   60 ++
 arch/nds32/configs/ae3xx_defconfig                 |  110 +++
 arch/nds32/configs/ag101p_defconfig                |  109 +++
 arch/nds32/include/asm/Kbuild                      |   54 ++
 arch/nds32/include/asm/assembler.h                 |   52 ++
 arch/nds32/include/asm/bitfield.h                  |  982 ++++++++++++++++++++
 arch/nds32/include/asm/cache.h                     |   25 +
 arch/nds32/include/asm/cache_info.h                |   26 +
 arch/nds32/include/asm/cacheflush.h                |   57 ++
 arch/nds32/include/asm/current.h                   |   25 +
 arch/nds32/include/asm/delay.h                     |   51 +
 arch/nds32/include/asm/dma-mapping.h               |   27 +
 arch/nds32/include/asm/elf.h                       |  192 ++++
 arch/nds32/include/asm/fixmap.h                    |   41 +
 arch/nds32/include/asm/futex.h                     |  116 +++
 arch/nds32/include/asm/highmem.h                   |   78 ++
 arch/nds32/include/asm/io.h                        |   33 +
 arch/nds32/include/asm/irqflags.h                  |   49 +
 arch/nds32/include/asm/l2_cache.h                  |  158 ++++
 arch/nds32/include/asm/linkage.h                   |   24 +
 arch/nds32/include/asm/memory.h                    |  147 +++
 arch/nds32/include/asm/mmu.h                       |   25 +
 arch/nds32/include/asm/mmu_context.h               |   81 ++
 arch/nds32/include/asm/module.h                    |   24 +
 arch/nds32/include/asm/nds32.h                     |   92 ++
 arch/nds32/include/asm/page.h                      |   78 ++
 arch/nds32/include/asm/pgalloc.h                   |  109 +++
 arch/nds32/include/asm/pgtable.h                   |  426 +++++++++
 arch/nds32/include/asm/proc-fns.h                  |   94 ++
 arch/nds32/include/asm/processor.h                 |  116 +++
 arch/nds32/include/asm/ptrace.h                    |   79 ++
 arch/nds32/include/asm/shmparam.h                  |   33 +
 arch/nds32/include/asm/spinlock.h                  |  178 ++++
 arch/nds32/include/asm/string.h                    |   30 +
 arch/nds32/include/asm/swab.h                      |   48 +
 arch/nds32/include/asm/syscall.h                   |  203 ++++
 arch/nds32/include/asm/syscalls.h                  |   27 +
 arch/nds32/include/asm/thread_info.h               |   91 ++
 arch/nds32/include/asm/tlb.h                       |   41 +
 arch/nds32/include/asm/tlbflush.h                  |   60 ++
 arch/nds32/include/asm/uaccess.h                   |  385 ++++++++
 arch/nds32/include/asm/unistd.h                    |   21 +
 arch/nds32/include/asm/vdso.h                      |   35 +
 arch/nds32/include/asm/vdso_datapage.h             |   51 +
 arch/nds32/include/uapi/asm/Kbuild                 |   26 +
 arch/nds32/include/uapi/asm/auxvec.h               |   25 +
 arch/nds32/include/uapi/asm/byteorder.h            |   26 +
 arch/nds32/include/uapi/asm/cachectl.h             |   19 +
 arch/nds32/include/uapi/asm/param.h                |   24 +
 arch/nds32/include/uapi/asm/posix_types.h          |   41 +
 arch/nds32/include/uapi/asm/ptrace.h               |   42 +
 arch/nds32/include/uapi/asm/sigcontext.h           |   73 ++
 arch/nds32/include/uapi/asm/signal.h               |   23 +
 arch/nds32/include/uapi/asm/unistd.h               |   36 +
 arch/nds32/kernel/Makefile                         |   24 +
 arch/nds32/kernel/asm-offsets.c                    |   40 +
 arch/nds32/kernel/atl2c.c                          |   77 ++
 arch/nds32/kernel/cacheinfo.c                      |   62 ++
 arch/nds32/kernel/devtree.c                        |   45 +
 arch/nds32/kernel/dma.c                            |  478 ++++++++++
 arch/nds32/kernel/early_printk.c                   |  124 +++
 arch/nds32/kernel/ex-entry.S                       |  169 ++++
 arch/nds32/kernel/ex-exit.S                        |  207 +++++
 arch/nds32/kernel/ex-scall.S                       |  146 +++
 arch/nds32/kernel/head.S                           |  211 +++++
 arch/nds32/kernel/irq.c                            |   34 +
 arch/nds32/kernel/module.c                         |  299 ++++++
 arch/nds32/kernel/nds32_ksyms.c                    |   54 ++
 arch/nds32/kernel/process.c                        |  219 +++++
 arch/nds32/kernel/ptrace.c                         |  325 +++++++
 arch/nds32/kernel/setup.c                          |  406 ++++++++
 arch/nds32/kernel/signal.c                         |  370 ++++++++
 arch/nds32/kernel/stacktrace.c                     |   60 ++
 arch/nds32/kernel/sys_nds32.c                      |   63 ++
 arch/nds32/kernel/syscall_table.c                  |   28 +
 arch/nds32/kernel/time.c                           |   22 +
 arch/nds32/kernel/traps.c                          |  442 +++++++++
 arch/nds32/kernel/vdso.c                           |  243 +++++
 arch/nds32/kernel/vdso/Makefile                    |   82 ++
 arch/nds32/kernel/vdso/datapage.S                  |   34 +
 arch/nds32/kernel/vdso/gen_vdso_offsets.sh         |   15 +
 arch/nds32/kernel/vdso/gettimeofday.c              |  260 ++++++
 arch/nds32/kernel/vdso/note.S                      |   29 +
 arch/nds32/kernel/vdso/sigreturn.S                 |   32 +
 arch/nds32/kernel/vdso/vdso.S                      |   33 +
 arch/nds32/kernel/vdso/vdso.lds.S                  |   87 ++
 arch/nds32/kernel/vmlinux.lds.S                    |   70 ++
 arch/nds32/lib/Makefile                            |    4 +
 arch/nds32/lib/copy_page.S                         |   50 +
 arch/nds32/lib/getuser.S                           |   57 ++
 arch/nds32/lib/memcpy.S                            |   93 ++
 arch/nds32/lib/memmove.S                           |   83 ++
 arch/nds32/lib/memset.S                            |   46 +
 arch/nds32/lib/memzero.S                           |   31 +
 arch/nds32/lib/putuser.S                           |   53 ++
 arch/nds32/lib/uaccess.S                           |  160 ++++
 arch/nds32/mm/Makefile                             |    7 +
 arch/nds32/mm/alignment.c                          |  564 +++++++++++
 arch/nds32/mm/cacheflush.c                         |  331 +++++++
 arch/nds32/mm/extable.c                            |   29 +
 arch/nds32/mm/fault.c                              |  420 +++++++++
 arch/nds32/mm/highmem.c                            |   92 ++
 arch/nds32/mm/init.c                               |  328 +++++++
 arch/nds32/mm/ioremap.c                            |   67 ++
 arch/nds32/mm/mm-nds32.c                           |  103 ++
 arch/nds32/mm/mmap.c                               |   88 ++
 arch/nds32/mm/proc-n13.c                           |  608 ++++++++++++
 arch/nds32/mm/tlb.c                                |   63 ++
 drivers/irqchip/Makefile                           |    1 +
 drivers/irqchip/irq-ativic32.c                     |  149 +++
 drivers/net/ethernet/faraday/Kconfig               |    6 +-
 121 files changed, 13726 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
 create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt
 create mode 100644 arch/nds32/Kconfig
 create mode 100644 arch/nds32/Kconfig.cpu
 create mode 100644 arch/nds32/Kconfig.debug
 create mode 100644 arch/nds32/Makefile
 create mode 100644 arch/nds32/boot/Makefile
 create mode 100644 arch/nds32/boot/dts/Makefile
 create mode 100644 arch/nds32/boot/dts/ae3xx.dts
 create mode 100644 arch/nds32/boot/dts/ag101p.dts
 create mode 100644 arch/nds32/configs/ae3xx_defconfig
 create mode 100644 arch/nds32/configs/ag101p_defconfig
 create mode 100644 arch/nds32/include/asm/Kbuild
 create mode 100644 arch/nds32/include/asm/assembler.h
 create mode 100644 arch/nds32/include/asm/bitfield.h
 create mode 100644 arch/nds32/include/asm/cache.h
 create mode 100644 arch/nds32/include/asm/cache_info.h
 create mode 100644 arch/nds32/include/asm/cacheflush.h
 create mode 100644 arch/nds32/include/asm/current.h
 create mode 100644 arch/nds32/include/asm/delay.h
 create mode 100644 arch/nds32/include/asm/dma-mapping.h
 create mode 100644 arch/nds32/include/asm/elf.h
 create mode 100644 arch/nds32/include/asm/fixmap.h
 create mode 100644 arch/nds32/include/asm/futex.h
 create mode 100644 arch/nds32/include/asm/highmem.h
 create mode 100644 arch/nds32/include/asm/io.h
 create mode 100644 arch/nds32/include/asm/irqflags.h
 create mode 100644 arch/nds32/include/asm/l2_cache.h
 create mode 100644 arch/nds32/include/asm/linkage.h
 create mode 100644 arch/nds32/include/asm/memory.h
 create mode 100644 arch/nds32/include/asm/mmu.h
 create mode 100644 arch/nds32/include/asm/mmu_context.h
 create mode 100644 arch/nds32/include/asm/module.h
 create mode 100644 arch/nds32/include/asm/nds32.h
 create mode 100644 arch/nds32/include/asm/page.h
 create mode 100644 arch/nds32/include/asm/pgalloc.h
 create mode 100644 arch/nds32/include/asm/pgtable.h
 create mode 100644 arch/nds32/include/asm/proc-fns.h
 create mode 100644 arch/nds32/include/asm/processor.h
 create mode 100644 arch/nds32/include/asm/ptrace.h
 create mode 100644 arch/nds32/include/asm/shmparam.h
 create mode 100644 arch/nds32/include/asm/spinlock.h
 create mode 100644 arch/nds32/include/asm/string.h
 create mode 100644 arch/nds32/include/asm/swab.h
 create mode 100644 arch/nds32/include/asm/syscall.h
 create mode 100644 arch/nds32/include/asm/syscalls.h
 create mode 100644 arch/nds32/include/asm/thread_info.h
 create mode 100644 arch/nds32/include/asm/tlb.h
 create mode 100644 arch/nds32/include/asm/tlbflush.h
 create mode 100644 arch/nds32/include/asm/uaccess.h
 create mode 100644 arch/nds32/include/asm/unistd.h
 create mode 100644 arch/nds32/include/asm/vdso.h
 create mode 100644 arch/nds32/include/asm/vdso_datapage.h
 create mode 100644 arch/nds32/include/uapi/asm/Kbuild
 create mode 100644 arch/nds32/include/uapi/asm/auxvec.h
 create mode 100644 arch/nds32/include/uapi/asm/byteorder.h
 create mode 100644 arch/nds32/include/uapi/asm/cachectl.h
 create mode 100644 arch/nds32/include/uapi/asm/param.h
 create mode 100644 arch/nds32/include/uapi/asm/posix_types.h
 create mode 100644 arch/nds32/include/uapi/asm/ptrace.h
 create mode 100644 arch/nds32/include/uapi/asm/sigcontext.h
 create mode 100644 arch/nds32/include/uapi/asm/signal.h
 create mode 100644 arch/nds32/include/uapi/asm/unistd.h
 create mode 100644 arch/nds32/kernel/Makefile
 create mode 100644 arch/nds32/kernel/asm-offsets.c
 create mode 100644 arch/nds32/kernel/atl2c.c
 create mode 100644 arch/nds32/kernel/cacheinfo.c
 create mode 100644 arch/nds32/kernel/devtree.c
 create mode 100644 arch/nds32/kernel/dma.c
 create mode 100644 arch/nds32/kernel/early_printk.c
 create mode 100644 arch/nds32/kernel/ex-entry.S
 create mode 100644 arch/nds32/kernel/ex-exit.S
 create mode 100644 arch/nds32/kernel/ex-scall.S
 create mode 100644 arch/nds32/kernel/head.S
 create mode 100644 arch/nds32/kernel/irq.c
 create mode 100644 arch/nds32/kernel/module.c
 create mode 100644 arch/nds32/kernel/nds32_ksyms.c
 create mode 100644 arch/nds32/kernel/process.c
 create mode 100644 arch/nds32/kernel/ptrace.c
 create mode 100644 arch/nds32/kernel/setup.c
 create mode 100644 arch/nds32/kernel/signal.c
 create mode 100644 arch/nds32/kernel/stacktrace.c
 create mode 100644 arch/nds32/kernel/sys_nds32.c
 create mode 100644 arch/nds32/kernel/syscall_table.c
 create mode 100644 arch/nds32/kernel/time.c
 create mode 100644 arch/nds32/kernel/traps.c
 create mode 100644 arch/nds32/kernel/vdso.c
 create mode 100644 arch/nds32/kernel/vdso/Makefile
 create mode 100644 arch/nds32/kernel/vdso/datapage.S
 create mode 100755 arch/nds32/kernel/vdso/gen_vdso_offsets.sh
 create mode 100644 arch/nds32/kernel/vdso/gettimeofday.c
 create mode 100644 arch/nds32/kernel/vdso/note.S
 create mode 100644 arch/nds32/kernel/vdso/sigreturn.S
 create mode 100644 arch/nds32/kernel/vdso/vdso.S
 create mode 100644 arch/nds32/kernel/vdso/vdso.lds.S
 create mode 100644 arch/nds32/kernel/vmlinux.lds.S
 create mode 100644 arch/nds32/lib/Makefile
 create mode 100644 arch/nds32/lib/copy_page.S
 create mode 100644 arch/nds32/lib/getuser.S
 create mode 100644 arch/nds32/lib/memcpy.S
 create mode 100644 arch/nds32/lib/memmove.S
 create mode 100644 arch/nds32/lib/memset.S
 create mode 100644 arch/nds32/lib/memzero.S
 create mode 100644 arch/nds32/lib/putuser.S
 create mode 100644 arch/nds32/lib/uaccess.S
 create mode 100644 arch/nds32/mm/Makefile
 create mode 100644 arch/nds32/mm/alignment.c
 create mode 100644 arch/nds32/mm/cacheflush.c
 create mode 100644 arch/nds32/mm/extable.c
 create mode 100644 arch/nds32/mm/fault.c
 create mode 100644 arch/nds32/mm/highmem.c
 create mode 100644 arch/nds32/mm/init.c
 create mode 100644 arch/nds32/mm/ioremap.c
 create mode 100644 arch/nds32/mm/mm-nds32.c
 create mode 100644 arch/nds32/mm/mmap.c
 create mode 100644 arch/nds32/mm/proc-n13.c
 create mode 100644 arch/nds32/mm/tlb.c
 create mode 100644 drivers/irqchip/irq-ativic32.c
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH 1/31 nds32: Assembly macros and definitions

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/assembler.h |   52 ++
 arch/nds32/include/asm/bitfield.h  |  982 ++++++++++++++++++++++++++++++++++++
 arch/nds32/include/asm/nds32.h     |   92 ++++
 arch/nds32/kernel/asm-offsets.c    |   40 ++
 4 files changed, 1166 insertions(+)
 create mode 100644 arch/nds32/include/asm/assembler.h
 create mode 100644 arch/nds32/include/asm/bitfield.h
 create mode 100644 arch/nds32/include/asm/nds32.h
 create mode 100644 arch/nds32/kernel/asm-offsets.c
arch/nds32/include/asm/assembler.h new file +52 -0
new file mode 100644
index 0000000..d469af0
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_ASSEMBLER_H__
+#define __NDS32_ASSEMBLER_H__
+
+.macro gie_disable
+	setgie.d
+	dsb
+.endm
+
+.macro gie_enable
+	setgie.e
+	dsb
+.endm
+
+.macro gie_save oldpsw
+	mfsr \oldpsw, $ir0
+	setgie.d
+        dsb
+.endm
+
+.macro gie_restore oldpsw
+	andi \oldpsw, \oldpsw, #0x1
+	beqz \oldpsw, 7001f
+	setgie.e
+	dsb
+7001:
+.endm
+
+
+#define USER(insn,  reg, addr, opr)	\
+9999:	insn  reg, addr, opr;		\
+	.section __ex_table,"a";	\
+	.align 3;			\
+	.long	9999b, 9001f;		\
+	.previous
+
+#endif /* __NDS32_ASSEMBLER_H__ */
arch/nds32/include/asm/bitfield.h new file +982 -0

982 lines not on this page · raw message

arch/nds32/include/asm/nds32.h new file +92 -0

92 lines not on this page · raw message

arch/nds32/kernel/asm-offsets.c new file +40 -0
new file mode 100644
index 0000000..2d9468b
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/sched.h>
+#include <linux/sched/task_stack.h>
+#include <linux/kbuild.h>
+#include <asm/thread_info.h>
+#include <asm/ptrace.h>
+
+int main(void)
+{
+	DEFINE(TSK_TI_FLAGS, offsetof(struct task_struct, thread_info.flags));
+	DEFINE(TSK_TI_PREEMPT,
+	       offsetof(struct task_struct, thread_info.preempt_count));
+	DEFINE(THREAD_CPU_CONTEXT,
+	       offsetof(struct task_struct, thread.cpu_context));
+	DEFINE(OSP_OFFSET, offsetof(struct pt_regs, osp));
+	DEFINE(SP_OFFSET, offsetof(struct pt_regs, sp));
+	DEFINE(FUCOP_CTL_OFFSET, offsetof(struct pt_regs, fucop_ctl));
+	DEFINE(IPSW_OFFSET, offsetof(struct pt_regs, ipsw));
+	DEFINE(SYSCALLNO_OFFSET, offsetof(struct pt_regs, syscallno));
+	DEFINE(IPC_OFFSET, offsetof(struct pt_regs, ipc));
+	DEFINE(R0_OFFSET, offsetof(struct pt_regs, uregs[0]));
+	DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
+	DEFINE(CLOCK_COARSE_RES, LOW_RES_NSEC);
+	return 0;
+}
Signature · 1 line
1.7.9.5
#2 lore raw

PATCH 2/31 nds32: Kernel booting and initialization

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/kernel/head.S  |  211 +++++++++++++++++++++++
 arch/nds32/kernel/setup.c |  406 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 617 insertions(+)
 create mode 100644 arch/nds32/kernel/head.S
 create mode 100644 arch/nds32/kernel/setup.c
arch/nds32/kernel/head.S new file +211 -0
new file mode 100644
index 0000000..c2e1a5e
@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/ptrace.h>
+#include <asm/asm-offsets.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/l2_cache.h>
+#include <asm/sizes.h>
+#include <asm/thread_info.h>
+
+#ifdef CONFIG_CPU_BIG_ENDIAN
+#define OF_DT_MAGIC 0xd00dfeed
+#else
+#define OF_DT_MAGIC 0xedfe0dd0
+#endif
+
+	.globl  swapper_pg_dir
+	.equ    swapper_pg_dir, TEXTADDR - 0x4000
+
+/*
+ * Kernel startup entry point.
+ */
+	.section ".head.text", "ax"
+	.type   _stext, %function
+ENTRY(_stext)
+	setgie.d                            ! Disable interrupt
+	isb
+/*
+ * Disable I/D-cache and enable it at a proper time
+ */
+	mfsr    $r0, $mr8
+	li      $r1, #~(CACHE_CTL_mskIC_EN|CACHE_CTL_mskDC_EN)
+	and     $r0, $r0, $r1
+	mtsr    $r0, $mr8
+
+/*
+ * Process device tree blob
+ */
+	andi 	$r0,$r2,#0x3
+	li	$r10, 0
+	bne     $r0, $r10, _nodtb
+	lwi	$r0, [$r2]
+	li	$r1, OF_DT_MAGIC
+	bne     $r0, $r1, _nodtb
+	move	$r10, $r2
+_nodtb:
+
+/*
+ * Create a temporary mapping area for booting, before start_kernel
+ */
+	sethi   $r4, hi20(swapper_pg_dir)
+	li      $p0, (PAGE_OFFSET - PHYS_OFFSET)
+	sub     $r4, $r4, $p0
+	tlbop   FlushAll            ! invalidate TLB\n"
+	isb
+	mtsr    $r4, $L1_PPTB       ! load page table pointer\n"
+
+/* set NTC0 cacheable/writeback, mutliple page size in use */
+	mfsr    $r3, $MMU_CTL
+	li      $r0, #~MMU_CTL_mskNTC0
+	and     $r3, $r3, $r0
+#ifdef CONFIG_ANDES_PAGE_SIZE_4KB
+	ori     $r3, $r3, #(MMU_CTL_mskMPZIU|(MMU_CTL_CACHEABLE_WB << MMU_CTL_offNTC0))
+#else
+	ori     $r3, $r3, #(MMU_CTL_mskMPZIU|(MMU_CTL_CACHEABLE_WB << MMU_CTL_offNTC0)|MMU_CTL_mskD)
+#endif
+	mtsr    $r3, $MMU_CTL
+	isb
+
+/* set page size and size of kernel image */
+        mfsr    $r0, $MMU_CFG
+        srli    $r3, $r0, MMU_CFG_offfEPSZ
+        zeb     $r3, $r3
+        bnez    $r3, _extra_page_size_support
+#ifdef CONFIG_ANDES_PAGE_SIZE_4KB
+        li      $r5, #SZ_4K                 ! Use 4KB page size
+#else
+        li      $r5, #SZ_8K                 ! Use 8KB page size
+        li      $r3, #1
+#endif
+        mtsr    $r3, $TLB_MISC
+        b       _image_size_check
+
+_extra_page_size_support:                    ! Use epzs pages size
+        clz     $r6, $r3
+        subri   $r2, $r6, #31
+        li      $r3, #1
+        sll     $r3, $r3, $r2
+        /* MMU_CFG.EPSZ value -> meaning */
+        mul     $r5, $r3, $r3
+        slli    $r5, $r5, #14
+        /* MMU_CFG.EPSZ  -> TLB_MISC.ACC_PSZ */
+        addi    $r3, $r2, #0x2
+        mtsr    $r3, $TLB_MISC
+
+_image_size_check:
+        /* calculate the image maximum size accepted by TLB config */
+        andi    $r6, $r0, MMU_CFG_mskTBW
+        andi    $r0, $r0, MMU_CFG_mskTBS
+        srli    $r6, $r6, MMU_CFG_offTBW
+        srli    $r0, $r0, MMU_CFG_offTBS
+        /*
+         * we just map the kernel to the maximum way - 1 of tlb
+         * reserver one way for UART VA mapping
+         * it will cause page fault if UART mapping cover the kernel mapping
+         *
+         * direct mapping is not supported now.
+         */
+        li      $r2, 't'
+        beqz    $r6, __error                 ! MMU_CFG.TBW = 0 is direct mappin
+        addi    $r0, $r0, #0x2               ! MMU_CFG.TBS value -> meaning
+        sll     $r0, $r6, $r0                ! entries = k-way * n-set
+        mul     $r6, $r0, $r5                ! max size = entries * page size
+        /* check kernel image size */
+        la      $r3, (_end - PAGE_OFFSET)
+        li      $r2, 's'
+        bgt     $r3, $r6, __error
+
+	li      $r2, #(PHYS_OFFSET + TLB_DATA_kernel_text_attr)
+        li      $r3, PAGE_OFFSET
+        add     $r6, $r6, $r3
+
+_tlb:
+	mtsr    $r3, $TLB_VPN
+	dsb
+	tlbop   $r2, RWR
+	isb
+	add     $r3, $r3, $r5
+	add     $r2, $r2, $r5
+	bgt     $r6, $r3, _tlb
+	mfsr    $r3, $TLB_MISC      ! setup access page size
+	li      $r2, #~0xf
+	and     $r3, $r3, $r2
+#ifdef CONFIG_ANDES_PAGE_SIZE_8KB
+	ori    $r3, $r3, #0x1
+#endif
+	mtsr    $r3, $TLB_MISC
+
+	mfsr    $r0, $MISC_CTL      ! Enable BTB and RTP and shadow sp
+	ori     $r0, $r0, #MISC_init
+	mtsr    $r0, $MISC_CTL
+
+/*
+ * Disable L2CC and wait until L2CC registers are mapped into memory to use L2$.
+ */
+#ifdef CONFIG_CACHE_L2
+	mfsr	$p0, $MSC_CFG
+	andi	$p0, $p0, #MSC_CFG_mskL2C
+	beqz	$p0, 1f
+	li  	$p0, L2CC_PA_BASE
+	li  	$p1, 0
+	swi 	$p1, [$p0 + L2CC_CTRL_OFF]
+1:
+#endif
+
+	mfsr    $p1, $PSW
+	li      $r15, #~PSW_clr             ! clear WBNA|DME|IME|DT|IT|POM|INTL|GIE
+	and     $p1, $p1, $r15
+	ori     $p1, $p1, #PSW_init
+	mtsr    $p1, $IPSW                  ! when iret, it will automatically enable MMU
+	la      $lp, __mmap_switched
+	mtsr    $lp, $IPC
+	iret
+	nop
+
+	.type   __switch_data, %object
+__switch_data:
+	.long   __bss_start                 ! $r6
+	.long   _end                        ! $r7
+	.long	__atags_pointer 	    ! $atag_pointer
+	.long   init_task                   ! $r9, move to $r25
+	.long   init_thread_union + THREAD_SIZE    ! $sp
+
+
+/*
+ * The following fragment of code is executed with the MMU on in MMU mode,
+ * and uses absolute addresses; this is not position independent.
+ */
+	.align
+	.type   __mmap_switched, %function
+__mmap_switched:
+	la  $r3, __switch_data
+	lmw.bim $r6, [$r3], $r9, #0b0001
+	move	$r25, $r9
+	move    $fp, #0             ! Clear  BSS (and zero $fp)
+	beq $r7, $r6, _RRT
+1:	swi.bi  $fp, [$r6], #4
+	bne $r7, $r6, 1b
+	swi	$r10, [$r8]
+
+_RRT:
+	b   start_kernel
+
+__error:
+	b   __error
arch/nds32/kernel/setup.c new file +406 -0

406 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#3 lore raw

Re: [PATCH 02/31] nds32: Kernel booting and initialization

Quoted 2 lines · Greentime Hu

From: Greentime Hu <[email protected]>

Commit message needed.

arch/nds32/kernel/setup.c line 278

Quoted 10 lines

---

arch/nds32/kernel/setup.c new file +6 -0
+       /* it could update max_pfn */
+       if (max_pfn - ram_start_pfn <= MAXMEM_PFN)
+               max_low_pfn = max_pfn;
+       else {
+               max_low_pfn = MAXMEM_PFN + ram_start_pfn;
+#ifndef CONFIG_HIGHMEM

Use IS_ENABLED here and other ifdef's if possible.

arch/nds32/kernel/setup.c line 351

Quoted 11 lines
arch/nds32/kernel/setup.c new file +9 -0
+               max_pfn = MAXMEM_PFN + ram_start_pfn;
+#endif
+       }
 
 
+static int __init nds32_device_probe(void)
+{
+       return of_platform_populate(NULL, NULL, NULL, NULL);
+}
+
+device_initcall(nds32_device_probe);

You can drop this. The core code will call of_platform_populate for you.

#4 lore raw

Re: [PATCH 02/31] nds32: Kernel booting and initialization

2017-11-08 21:38 GMT+08:00 Rob Herring <[email protected]>:

Quoted 5 lines · Greentime Hu
Quoted 2 lines

From: Greentime Hu <[email protected]>

Commit message needed.

Thanks.
I will add more commit messages in the next version patch.

Quoted 5 lines
Quoted 4 lines

---

Quoted 9 lines

arch/nds32/kernel/setup.c line 278

Quoted 6 lines
arch/nds32/kernel/setup.c new file +6 -0
+       /* it could update max_pfn */
+       if (max_pfn - ram_start_pfn <= MAXMEM_PFN)
+               max_low_pfn = max_pfn;
+       else {
+               max_low_pfn = MAXMEM_PFN + ram_start_pfn;
+#ifndef CONFIG_HIGHMEM

Use IS_ENABLED here and other ifdef's if possible.

Thanks
I will try to use IS_ENABLED here in the next version patch.

Quoted 5 lines
Quoted 3 lines
arch/nds32/kernel/setup.c new file +3 -0
+               max_pfn = MAXMEM_PFN + ram_start_pfn;
+#endif
+       }
Quoted 8 lines

arch/nds32/kernel/setup.c line 351

Quoted 6 lines
arch/nds32/kernel/setup.c new file +6 -0
+static int __init nds32_device_probe(void)
+{
+       return of_platform_populate(NULL, NULL, NULL, NULL);
+}
+
+device_initcall(nds32_device_probe);

You can drop this. The core code will call of_platform_populate for you.

Thanks.
I will drop this in the next version patch.

#5 lore raw

PATCH 3/31 nds32: Support early_printk

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/kernel/early_printk.c |  124 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 124 insertions(+)
 create mode 100644 arch/nds32/kernel/early_printk.c
arch/nds32/kernel/early_printk.c new file +124 -0
new file mode 100644
index 0000000..269c3cd
@@ -0,0 +1,124 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <linux/serial_reg.h>
+
+extern void __iomem *early_io_map(phys_addr_t phys);
+static void __iomem *early_base;
+static void (*printch) (char ch);
+
+/*
+ * 8250/16550 (8-bit aligned registers) single character TX.
+ */
+static void uart8250_8bit_printch(char ch)
+{
+	while (!(readb(early_base + UART_LSR) & UART_LSR_THRE)) ;
+	writeb(ch, early_base + UART_TX);
+}
+
+/*
+ * 8250/16550 (32-bit aligned registers) single character TX.
+ */
+static void uart8250_32bit_printch(char ch)
+{
+	while (!(readl(early_base + (UART_LSR << 2)) & UART_LSR_THRE)) ;
+	writel(ch, early_base + (UART_TX << 2));
+}
+
+struct earlycon_match {
+	const char *name;
+	void (*printch) (char ch);
+};
+
+static const struct earlycon_match earlycon_match[] __initconst = {
+	{.name = "uart8250-8bit",.printch = uart8250_8bit_printch,},
+	{.name = "uart8250-32bit",.printch = uart8250_32bit_printch,},
+	{}
+};
+
+static void early_write(struct console *con, const char *s, unsigned n)
+{
+	while (n-- > 0) {
+		if (*s == '\n')
+			printch('\r');
+		printch(*s);
+		s++;
+	}
+}
+
+static struct console early_console_dev = {
+	.name = "earlycon",
+	.write = early_write,
+	.flags = CON_PRINTBUFFER | CON_BOOT,
+	.index = -1,
+};
+
+/*
+ * Parse earlyprintk=... parameter in the format:
+ *
+ *   <name>[,<addr>][,<options>]
+ *
+ * and register the early console. It is assumed that the UART has been
+ * initialised by the bootloader already.
+ */
+static int __init setup_early_printk(char *buf)
+{
+	const struct earlycon_match *match = earlycon_match;
+	phys_addr_t paddr = 0;
+
+	if (!buf) {
+		pr_warning("No earlyprintk arguments passed.\n");
+		return 0;
+	}
+
+	while (match->name) {
+		size_t len = strlen(match->name);
+		if (!strncmp(buf, match->name, len)) {
+			buf += len;
+			break;
+		}
+		match++;
+	}
+	if (!match->name) {
+		pr_warning("Unknown earlyprintk arguments: %s\n", buf);
+		return 0;
+	}
+
+	/* I/O address */
+	if (!strncmp(buf, ",0x", 3)) {
+		char *e;
+		paddr = simple_strtoul(buf + 1, &e, 16);
+		buf = e;
+	}
+
+	if (paddr)
+		early_base = early_io_map(paddr);
+
+	if (!strcmp(CONFIG_NDS32_BUILTIN_DTB, "ae3xx"))
+		early_base += 32;
+
+	printch = match->printch;
+	register_console(&early_console_dev);
+
+	return 0;
+}
+
+early_param("earlyprintk", setup_early_printk);
Signature · 1 line
1.7.9.5
#6 lore raw

Re: [PATCH 03/31] nds32: Support early_printk

arch/nds32/kernel/early_printk.c

Quoted 14 lines · Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/kernel/early_printk.c |  124 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 124 insertions(+)
 create mode 100644 arch/nds32/kernel/early_printk.c
arch/nds32/kernel/early_printk.c new file +0 -0
new file mode 100644
index 0000000..269c3cd

Could be implemented using earlycon (the 8250 drivers already supports it) instead of duplicating functionality in arch/nds32? See e.g. the nios2 port for how this could be done, specifically commit e118c3fec9c0 ("nios2: remove custom early console implementation").

#7 lore raw

Re: [PATCH 03/31] nds32: Support early_printk

2017-11-08 17:47 GMT+08:00 Tobias Klauser <[email protected]>:

Quoted 10 lines · Greentime Hu
Quoted 9 lines

From: Greentime Hu <[email protected]>

---
 arch/nds32/kernel/early_printk.c |  124 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 124 insertions(+)
 create mode 100644 arch/nds32/kernel/early_printk.c
Quoted 10 lines

arch/nds32/kernel/early_printk.c

Quoted 5 lines
arch/nds32/kernel/early_printk.c new file +0 -0
new file mode 100644
index 0000000..269c3cd

Could be implemented using earlycon (the 8250 drivers already supports it) instead of duplicating functionality in arch/nds32? See e.g. the nios2 port for how this could be done, specifically commit e118c3fec9c0 ("nios2: remove custom early console implementation").

Thanks.
I will try to use earlycon in the next version patch.
I will remove this patch if earlycon is able to be used in nds32.

#8 lore raw

PATCH 4/31 nds32: Exception handling

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/ptrace.h |   79 ++++++
 arch/nds32/kernel/ex-entry.S    |  169 ++++++++++++
 arch/nds32/kernel/ex-exit.S     |  207 ++++++++++++++
 arch/nds32/kernel/stacktrace.c  |   60 +++++
 arch/nds32/kernel/traps.c       |  442 ++++++++++++++++++++++++++++++
 arch/nds32/mm/alignment.c       |  564 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 1521 insertions(+)
 create mode 100644 arch/nds32/include/asm/ptrace.h
 create mode 100644 arch/nds32/kernel/ex-entry.S
 create mode 100644 arch/nds32/kernel/ex-exit.S
 create mode 100644 arch/nds32/kernel/stacktrace.c
 create mode 100644 arch/nds32/kernel/traps.c
 create mode 100644 arch/nds32/mm/alignment.c
arch/nds32/include/asm/ptrace.h new file +79 -0
new file mode 100644
index 0000000..2c9c03d
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_PTRACE_H
+#define __ASM_NDS32_PTRACE_H
+
+#define PTRACE_GETREGS		12
+#define PTRACE_SETREGS		13
+#define PTRACE_GETFPREGS	14
+#define PTRACE_SETFPREGS	15
+
+#include <uapi/asm/ptrace.h>
+
+#ifndef __ASSEMBLY__
+
+struct pt_regs {
+	union {
+		struct user_pt_regs user_regs;
+		struct {
+			long uregs[26];
+			long fp;
+			long gp;
+			long lp;
+			long sp;
+			long ipc;
+#if defined(CONFIG_HWZOL)
+			long lb;
+			long le;
+			long lc;
+#else
+			long dummy[3];
+#endif
+			long syscallno;
+		};
+	};
+	long orig_r0;
+	long ir0;
+	long ipsw;
+	long pipsw;
+	long pipc;
+	long pp0;
+	long pp1;
+	long fucop_ctl;
+	long osp;
+};
+
+#include <asm/bitfield.h>
+extern void show_regs(struct pt_regs *);
+/* Avoid circular header include via sched.h */
+struct task_struct;
+extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
+			 int error_code, int si_code);
+
+#define arch_has_single_step()		(1)
+#define user_mode(regs)			(((regs)->ipsw & PSW_mskPOM) == 0)
+#define interrupts_enabled(regs)	(!!((regs)->ipsw & PSW_mskGIE))
+#define valid_user_regs(regs)		(user_mode(regs) && interrupts_enabled(regs))
+#define regs_return_value(regs)		((regs)->uregs[0])
+#define instruction_pointer(regs)	((regs)->ipc)
+#define user_stack_pointer(regs)        ((regs)->sp)
+#define profile_pc(regs) 		instruction_pointer(regs)
+
+#define ARCH_HAS_USER_SINGLE_STEP_INFO
+
+#endif /* __ASSEMBLY__ */
+#endif
arch/nds32/kernel/ex-entry.S new file +169 -0

169 lines not on this page · raw message

arch/nds32/kernel/ex-exit.S new file +207 -0

207 lines not on this page · raw message

arch/nds32/kernel/stacktrace.c new file +60 -0

60 lines not on this page · raw message

arch/nds32/kernel/traps.c new file +442 -0

442 lines not on this page · raw message

arch/nds32/mm/alignment.c new file +564 -0

564 lines not on this page · raw message

Signature · 1 line
1.7.9.5
maintainer
#9 lore raw

Re: [PATCH 04/31] nds32: Exception handling

Quoted 11 lines · Greentime Hu

From: Greentime Hu <[email protected]>

 arch/nds32/mm/alignment.c       |  564 +++++++++++++++++++++++++++++++++++++++
arch/nds32/mm/alignment.c new file +0 -0
new file mode 100644
index 0000000..05589e7

arch/nds32/mm/alignment.c line 58

Quoted 3 lines
arch/nds32/mm/alignment.c new file +2 -0
 
+static int mode = 0x3;
+module_param(mode, int, S_IWUSR | S_IRUGO);

It's an interesting question how to best handle alignment faults, both in kernel and user mode. While it can help for debugging to have the handler, I'd argue that you are better off in the long run not fixing up the faults automatically but to modify the code that triggers them instead.

How about making the faults disabled by default?

Quoted 5 lines
arch/nds32/mm/alignment.c new file +5 -0
+static int _do_unaligned_access(unsigned long entry, unsigned long addr,
+                               unsigned long type, struct pt_regs *regs)
+{
+       unsigned long inst;
+       int ret = -EFAULT;

arch/nds32/mm/alignment.c line 455

Quoted 10 lines
arch/nds32/mm/alignment.c new file +10 -0
+
+       if (user_mode(regs)) {
+               /* user mode */
+               if (!va_present(current->mm, addr))
+                       return ret;
+       } else {
+               /* kernel mode */
+               if (!va_kernel_present(addr))
+                       return ret;
+       }

This looks racy, the address might be present when you get here, but not later when you actually access it. I think what you need here is something like ARM does with get32_unaligned_check() etc and their fixup tables.

Quoted 13 lines
arch/nds32/mm/alignment.c new file +13 -0
+       inst = get_inst(regs->ipc);
+
+       DEBUG(mode & 0x04, 1,
+             "Faulting Addr: 0x%08lx, PC: 0x%08lx [ 0x%08lx ]\n", addr,
+             regs->ipc, inst);
+
+       if ((user_mode(regs) && (mode & 0x01))
+           || (!user_mode(regs) && (mode & 0x02))) {
+
+               mm_segment_t seg = get_fs();
+
+               set_fs(KERNEL_DS);
+

arch/nds32/mm/alignment.c line 479

Quoted 10 lines
arch/nds32/mm/alignment.c new file +10 -0
+               if (inst & 0x80000000)
+                       ret = do_16((inst >> 16) & 0xffff, regs);
+               else
+                       ret = do_32(inst, regs);
+
+               set_fs(seg);
+       }
+
+       return ret;
+}

Doesn't this allow user space to read all of kernel memory simply by passing unaligned addresses?

arch/nds32/mm/alignment.c line 529

Quoted 5 lines
arch/nds32/mm/alignment.c new file +5 -0
+static const struct file_operations fops = {
+       .open = simple_open,
+       .read = proc_alignment_read,
+       .write = proc_alignment_write,
+};

This should really be a sysctl rather than an open-coded procfs file, for consistency with other architectures.

Please have a look at that interface on other architectures and pick whatever the majority do.

Arnd

A message that is not in the archive (sent off-list or not yet received): [email protected]

#11 lore raw

PATCH 4/31 nds32: Exception handling

Quoted 19 lines

arch/nds32/mm/alignment.c line 58

Quoted 13 lines

From: Greentime Hu <[email protected]>

 arch/nds32/mm/alignment.c       |  564 +++++++++++++++++++++++++++++++++++++++
arch/nds32/mm/alignment.c new renamed from arch/nds32/mm/alignment.c +0 -0

file mode 100644 index 0000000..05589e7

arch/nds32/mm/alignment.c new file +2 -0
 
+static int mode = 0x3;
+module_param(mode, int, S_IWUSR | S_IRUGO);

It's an interesting question how to best handle alignment faults, both in kernel and user mode. While it can help for debugging to have the handler, I'd argue that you are better off in the long run not fixing up the faults automatically but to modify the code that triggers them instead.

Quoted 1 line

How about making the faults disabled by default?

Thanks
OK, I will disable alignment fault handling by default in next version patch

Quoted 11 lines
Quoted 11 lines
arch/nds32/mm/alignment.c new file +11 -0
+static int _do_unaligned_access(unsigned long entry, unsigned long addr,
+                               unsigned long type, struct pt_regs *regs)
+{
+       unsigned long inst;
+       int ret = -EFAULT;
+
+       if (user_mode(regs)) {
+               /* user mode */
+               if (!va_present(current->mm, addr))
+                       return ret;
+       } else {
Quoted 8 lines

arch/nds32/mm/alignment.c line 455

Quoted 4 lines
arch/nds32/mm/alignment.c new file +4 -0
+               /* kernel mode */
+               if (!va_kernel_present(addr))
+                       return ret;
+       }

This looks racy, the address might be present when you get here, but not later when you actually access it. I think what you need here is something like ARM does with get32_unaligned_check() etc and their fixup tables.

Thanks.
I will follow your suggestion to modify it

Quoted 18 lines
Quoted 18 lines
arch/nds32/mm/alignment.c new file +18 -0
+       inst = get_inst(regs->ipc);
+
+       DEBUG(mode & 0x04, 1,
+             "Faulting Addr: 0x%08lx, PC: 0x%08lx [ 0x%08lx ]\n", addr,
+             regs->ipc, inst);
+
+       if ((user_mode(regs) && (mode & 0x01))
+           || (!user_mode(regs) && (mode & 0x02))) {
+
+               mm_segment_t seg = get_fs();
+
+               set_fs(KERNEL_DS);
+
+               if (inst & 0x80000000)
+                       ret = do_16((inst >> 16) & 0xffff, regs);
+               else
+                       ret = do_32(inst, regs);
+
Quoted 8 lines

arch/nds32/mm/alignment.c line 479

Quoted 5 lines
arch/nds32/mm/alignment.c new file +5 -0
+               set_fs(seg);
+       }
+
+       return ret;
+}

Doesn't this allow user space to read all of kernel memory simply by passing unaligned addresses?

Thanks
I will fix it in next version patch.

Quoted 11 lines

arch/nds32/mm/alignment.c line 529

Quoted 5 lines
arch/nds32/mm/alignment.c new file +5 -0
+static const struct file_operations fops = {
+       .open = simple_open,
+       .read = proc_alignment_read,
+       .write = proc_alignment_write,
+};

This should really be a sysctl rather than an open-coded procfs file, for consistency with other architectures.

Please have a look at that interface on other architectures and pick whatever the majority do.

OK. I will use sysctl instaed of procfs to control this alignment correction feature.
Thanks

Quoted 2 lines

Arnd

Best regards
Vincent

#12 lore raw

PATCH 5/31 nds32: MMU definitions

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/fixmap.h   |   41 ++++
 arch/nds32/include/asm/highmem.h  |   78 +++++++
 arch/nds32/include/asm/memory.h   |  147 +++++++++++++
 arch/nds32/include/asm/mmu.h      |   25 +++
 arch/nds32/include/asm/page.h     |   78 +++++++
 arch/nds32/include/asm/pgalloc.h  |  109 ++++++++++
 arch/nds32/include/asm/pgtable.h  |  426 +++++++++++++++++++++++++++++++++++++
 arch/nds32/include/asm/shmparam.h |   33 +++
 8 files changed, 937 insertions(+)
 create mode 100644 arch/nds32/include/asm/fixmap.h
 create mode 100644 arch/nds32/include/asm/highmem.h
 create mode 100644 arch/nds32/include/asm/memory.h
 create mode 100644 arch/nds32/include/asm/mmu.h
 create mode 100644 arch/nds32/include/asm/page.h
 create mode 100644 arch/nds32/include/asm/pgalloc.h
 create mode 100644 arch/nds32/include/asm/pgtable.h
 create mode 100644 arch/nds32/include/asm/shmparam.h
arch/nds32/include/asm/fixmap.h new file +41 -0
new file mode 100644
index 0000000..38e8ee1
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_FIXMAP_H
+#define __ASM_NDS32_FIXMAP_H
+
+#ifdef CONFIG_HIGHMEM
+#include <linux/threads.h>
+#include <asm/kmap_types.h>
+#endif
+
+enum fixed_addresses {
+	FIX_KMAP_RESERVED,
+	FIX_KMAP_BEGIN,
+#ifdef CONFIG_HIGHMEM
+	FIX_KMAP_END = FIX_KMAP_BEGIN + (KM_TYPE_NR * NR_CPUS),
+#endif
+#ifdef CONFIG_EARLY_PRINTK
+	FIX_EARLY_DEBUG,
+#endif
+	__end_of_fixed_addresses
+};
+#define FIXADDR_TOP             ((unsigned long) (-(16 * PAGE_SIZE)))
+#define FIXADDR_SIZE		((__end_of_fixed_addresses) << PAGE_SHIFT)
+#define FIXADDR_START		(FIXADDR_TOP - FIXADDR_SIZE)
+
+#include <asm-generic/fixmap.h>
+#endif /* __ASM_NDS32_FIXMAP_H */
arch/nds32/include/asm/highmem.h new file +78 -0

78 lines not on this page · raw message

arch/nds32/include/asm/memory.h new file +147 -0

147 lines not on this page · raw message

arch/nds32/include/asm/mmu.h new file +25 -0
new file mode 100644
index 0000000..147fd06
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_MMU_H
+#define __NDS32_MMU_H
+
+typedef struct {
+	unsigned int id;
+	void *vdso;
+} mm_context_t;
+
+#endif
arch/nds32/include/asm/page.h new file +78 -0

78 lines not on this page · raw message

arch/nds32/include/asm/pgalloc.h new file +109 -0

109 lines not on this page · raw message

arch/nds32/include/asm/pgtable.h new file +426 -0

426 lines not on this page · raw message

arch/nds32/include/asm/shmparam.h new file +33 -0
new file mode 100644
index 0000000..5679648
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ASMNDS32_SHMPARAM_H
+#define _ASMNDS32_SHMPARAM_H
+
+/*
+ * This should be the size of the virtually indexed cache/ways,
+ * whichever is greater since the cache aliases every size/ways
+ * bytes.
+ */
+#define	SHMLBA	(4 * PAGE_SIZE)	/* attach addr a multiple of this */
+#define	REALSHMLBA	SHMLBA
+
+/*
+ * Enforce SHMLBA in shmat
+ */
+#define __ARCH_FORCE_SHMLBA
+
+#endif /* _ASMNDS32_SHMPARAM_H */
Signature · 1 line
1.7.9.5
maintainer
#13 lore raw

Re: [PATCH 05/31] nds32: MMU definitions

arch/nds32/include/asm/memory.h line 89

Quoted 9 lines · Greentime Hu
arch/nds32/include/asm/memory.h new file +9 -0
+/*
+ * The DMA mask corresponding to the maximum bus address allocatable
+ * using GFP_DMA.  The default here places no restriction on DMA
+ * allocations.  This must be the smallest DMA mask in the system,
+ * so a successful GFP_DMA allocation will always satisfy this.
+ */
+#ifndef ISA_DMA_THRESHOLD
+#define ISA_DMA_THRESHOLD      (0xffffffffULL)
+#endif

I see this one only in powerpc, I think it can be removed.

arch/nds32/include/asm/memory.h line 141

Quoted 8 lines
arch/nds32/include/asm/memory.h new file +8 -0
+
+/*
+ * Optional device DMA address remapping. Do _not_ use directly!
+ * We should really eliminate virt_to_bus() here - it's deprecated.
+ */
+#define page_to_dma(dev, page)         ((dma_addr_t)__virt_to_phys((unsigned long)page_address(page)))
+#define dma_to_virt(dev, addr)         ((void *)__phys_to_virt(addr))
+#define virt_to_dma(dev, addr)         ((dma_addr_t)__virt_to_phys((unsigned long)(addr)))

This looks like an older comment, I think we have eliminated them from the mainline kernel in all drivers, so you should remove them here too.

Quoted 5 lines
arch/nds32/include/asm/shmparam.h new file +0 -0
new file mode 100644
index 0000000..5679648

arch/nds32/include/asm/shmparam.h line 26

Quoted 9 lines
arch/nds32/include/asm/shmparam.h new file +8 -0
 
+
+/*
+ * This should be the size of the virtually indexed cache/ways,
+ * whichever is greater since the cache aliases every size/ways
+ * bytes.
+ */
+#define        SHMLBA  (4 * PAGE_SIZE) /* attach addr a multiple of this */
+#define        REALSHMLBA      SHMLBA

I don't see REALSHMLBA anywhere in the kernel, do you need it?

For SHMLBA, I think it should be defined as an absolute number, using the maximum
that you might need for any possible value of PAGE_SIZE. Otherwise user space has a much harder time figuring out what it should use.

Arnd

#14 lore raw

Re: [PATCH 05/31] nds32: MMU definitions

2017-11-08 16:36 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 13 lines · Greentime Hu

arch/nds32/include/asm/memory.h line 89

Quoted 10 lines
arch/nds32/include/asm/memory.h new file +9 -0
+/*
+ * The DMA mask corresponding to the maximum bus address allocatable
+ * using GFP_DMA.  The default here places no restriction on DMA
+ * allocations.  This must be the smallest DMA mask in the system,
+ * so a successful GFP_DMA allocation will always satisfy this.
+ */
+#ifndef ISA_DMA_THRESHOLD
+#define ISA_DMA_THRESHOLD      (0xffffffffULL)
+#endif

I see this one only in powerpc, I think it can be removed.

Thanks. I will remove it in next version patch.

Quoted 12 lines

arch/nds32/include/asm/memory.h line 141

Quoted 9 lines
arch/nds32/include/asm/memory.h new file +8 -0
+
+/*
+ * Optional device DMA address remapping. Do _not_ use directly!
+ * We should really eliminate virt_to_bus() here - it's deprecated.
+ */
+#define page_to_dma(dev, page)         ((dma_addr_t)__virt_to_phys((unsigned long)page_address(page)))
+#define dma_to_virt(dev, addr)         ((void *)__phys_to_virt(addr))
+#define virt_to_dma(dev, addr)         ((dma_addr_t)__virt_to_phys((unsigned long)(addr)))

This looks like an older comment, I think we have eliminated them from the mainline kernel in all drivers, so you should remove them here too.

Thanks. I will remove it in next version patch.

Quoted 17 lines
Quoted 5 lines
arch/nds32/include/asm/shmparam.h new file +0 -0
new file mode 100644
index 0000000..5679648

arch/nds32/include/asm/shmparam.h line 26

Quoted 9 lines
arch/nds32/include/asm/shmparam.h new file +8 -0
 
+
+/*
+ * This should be the size of the virtually indexed cache/ways,
+ * whichever is greater since the cache aliases every size/ways
+ * bytes.
+ */
+#define        SHMLBA  (4 * PAGE_SIZE) /* attach addr a multiple of this */
+#define        REALSHMLBA      SHMLBA

I don't see REALSHMLBA anywhere in the kernel, do you need it?

Quoted 4 lines

For SHMLBA, I think it should be defined as an absolute number, using the maximum
that you might need for any possible value of PAGE_SIZE. Otherwise user space has a much harder time figuring out what it should use.

Thanks. I will remove REALSHMLBA. I will consider to use 8KB or larger page size in the next version patch.

#15 lore raw

PATCH 6/31 nds32: MMU initialization

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/mm/highmem.c  |   92 +++++++++++++
 arch/nds32/mm/init.c     |  328 ++++++++++++++++++++++++++++++++++++++++++++++
 arch/nds32/mm/mm-nds32.c |  103 +++++++++++++++
 3 files changed, 523 insertions(+)
 create mode 100644 arch/nds32/mm/highmem.c
 create mode 100644 arch/nds32/mm/init.c
 create mode 100644 arch/nds32/mm/mm-nds32.c
arch/nds32/mm/highmem.c new file +92 -0
new file mode 100644
index 0000000..d5101bd
@@ -0,0 +1,92 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/export.h>
+#include <linux/highmem.h>
+#include <linux/sched.h>
+#include <linux/smp.h>
+#include <linux/interrupt.h>
+#include <linux/bootmem.h>
+#include <asm/fixmap.h>
+#include <asm/tlbflush.h>
+
+void *kmap(struct page *page)
+{
+	unsigned long vaddr;
+	might_sleep();
+	if (!PageHighMem(page))
+		return page_address(page);
+	vaddr = (unsigned long)kmap_high(page);
+	return (void *)vaddr;
+}
+
+EXPORT_SYMBOL(kmap);
+
+void kunmap(struct page *page)
+{
+	BUG_ON(in_interrupt());
+	if (!PageHighMem(page))
+		return;
+	kunmap_high(page);
+}
+
+EXPORT_SYMBOL(kunmap);
+
+void *kmap_atomic(struct page *page)
+{
+	unsigned int idx;
+	unsigned long vaddr, pte;
+	int type;
+	pte_t *ptep;
+
+	preempt_disable();
+	pagefault_disable();
+	if (!PageHighMem(page))
+		return page_address(page);
+
+	type = kmap_atomic_idx_push();
+
+	idx = type + KM_TYPE_NR * smp_processor_id();
+	vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+	pte = (page_to_pfn(page) << PAGE_SHIFT) | (PAGE_KERNEL);
+	ptep = pte_offset_kernel(pmd_off_k(vaddr), vaddr);
+	set_pte(ptep, pte);
+
+	__nds32__tlbop_inv(vaddr);
+	__nds32__mtsr_dsb(vaddr, NDS32_SR_TLB_VPN);
+	__nds32__tlbop_rwr(pte);
+	__nds32__isb();
+	return (void *)vaddr;
+}
+
+EXPORT_SYMBOL(kmap_atomic);
+
+void __kunmap_atomic(void *kvaddr)
+{
+	if (kvaddr >= (void *)FIXADDR_START) {
+		unsigned long vaddr = (unsigned long)kvaddr;
+		pte_t *ptep;
+		kmap_atomic_idx_pop();
+		__nds32__tlbop_inv(vaddr);
+		__nds32__isb();
+		ptep = pte_offset_kernel(pmd_off_k(vaddr), vaddr);
+		set_pte(ptep, 0);
+	}
+	pagefault_enable();
+	preempt_enable();
+}
+
+EXPORT_SYMBOL(__kunmap_atomic);
arch/nds32/mm/init.c new file +328 -0

328 lines not on this page · raw message

arch/nds32/mm/mm-nds32.c new file +103 -0

103 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#16 lore raw

PATCH 7/31 nds32: MMU fault handling and page table management

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/lib/copy_page.S |   50 ++++++
 arch/nds32/mm/extable.c    |   29 +++
 arch/nds32/mm/fault.c      |  420 ++++++++++++++++++++++++++++++++++++++++++++
 arch/nds32/mm/mmap.c       |   88 ++++++++++
 4 files changed, 587 insertions(+)
 create mode 100644 arch/nds32/lib/copy_page.S
 create mode 100644 arch/nds32/mm/extable.c
 create mode 100644 arch/nds32/mm/fault.c
 create mode 100644 arch/nds32/mm/mmap.c
arch/nds32/lib/copy_page.S new file +50 -0
new file mode 100644
index 0000000..a55a5cc
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+#include <asm/page.h>
+
+	.text
+ENTRY(copy_page)
+	pushm	$r2, $r10
+	movi	$r2, PAGE_SIZE >> 5
+.Lcopy_loop:
+	lmw.bim	$r3, [$r1], $r10
+	smw.bim	$r3, [$r0], $r10
+	subi45	$r2, #1
+	bnez38	$r2, .Lcopy_loop
+	popm	$r2, $r10
+	ret
+ENDPROC(copy_page)
+
+ENTRY(clear_page)
+	pushm	$r1, $r9
+	movi	$r1, PAGE_SIZE >> 5
+	movi55	$r2, #0
+	movi55	$r3, #0
+	movi55	$r4, #0
+	movi55	$r5, #0
+	movi55	$r6, #0
+	movi55	$r7, #0
+	movi55	$r8, #0
+	movi55	$r9, #0
+.Lclear_loop:
+	smw.bim	$r2, [$r0], $r9
+	subi45	$r1, #1
+	bnez38	$r1, .Lclear_loop
+	popm	$r1, $r9
+        ret
+ENDPROC(clear_page)
arch/nds32/mm/extable.c new file +29 -0
new file mode 100644
index 0000000..bce62d7
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/extable.h>
+#include <asm/uaccess.h>
+
+int fixup_exception(struct pt_regs *regs)
+{
+	const struct exception_table_entry *fixup;
+
+	fixup = search_exception_tables(instruction_pointer(regs));
+	if (fixup)
+		regs->ipc = fixup->fixup;
+
+	return fixup != NULL;
+}
arch/nds32/mm/fault.c new file +420 -0

420 lines not on this page · raw message

arch/nds32/mm/mmap.c new file +88 -0

88 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#17 lore raw

PATCH 8/31 nds32: Cache and TLB routines

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/cache.h         |   25 ++
 arch/nds32/include/asm/cache_info.h    |   26 ++
 arch/nds32/include/asm/cacheflush.h    |   57 +++
 arch/nds32/include/asm/mmu_context.h   |   81 +++++
 arch/nds32/include/asm/proc-fns.h      |   94 +++++
 arch/nds32/include/asm/tlb.h           |   41 +++
 arch/nds32/include/asm/tlbflush.h      |   60 ++++
 arch/nds32/include/uapi/asm/cachectl.h |   19 +
 arch/nds32/kernel/cacheinfo.c          |   62 ++++
 arch/nds32/mm/cacheflush.c             |  331 +++++++++++++++++
 arch/nds32/mm/proc-n13.c               |  608 ++++++++++++++++++++++++++++++++
 arch/nds32/mm/tlb.c                    |   63 ++++
 12 files changed, 1467 insertions(+)
 create mode 100644 arch/nds32/include/asm/cache.h
 create mode 100644 arch/nds32/include/asm/cache_info.h
 create mode 100644 arch/nds32/include/asm/cacheflush.h
 create mode 100644 arch/nds32/include/asm/mmu_context.h
 create mode 100644 arch/nds32/include/asm/proc-fns.h
 create mode 100644 arch/nds32/include/asm/tlb.h
 create mode 100644 arch/nds32/include/asm/tlbflush.h
 create mode 100644 arch/nds32/include/uapi/asm/cachectl.h
 create mode 100644 arch/nds32/kernel/cacheinfo.c
 create mode 100644 arch/nds32/mm/cacheflush.c
 create mode 100644 arch/nds32/mm/proc-n13.c
 create mode 100644 arch/nds32/mm/tlb.c
arch/nds32/include/asm/cache.h new file +25 -0
new file mode 100644
index 0000000..36ec549
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_CACHE_H__
+#define __NDS32_CACHE_H__
+
+#define L1_CACHE_BYTES	32
+#define L1_CACHE_SHIFT	5
+
+#define ARCH_DMA_MINALIGN   L1_CACHE_BYTES
+
+#endif /* __NDS32_CACHE_H__ */
arch/nds32/include/asm/cache_info.h new file +26 -0
new file mode 100644
index 0000000..a59d73d
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+struct cache_info {
+	unsigned char ways;
+	unsigned char line_size;
+	unsigned short sets;
+	unsigned short size;
+#if !defined(CONFIG_CPU_CACHE_NONALIASING)
+	unsigned short aliasing_num;
+	unsigned int aliasing_mask;
+#endif
+};
arch/nds32/include/asm/cacheflush.h new file +57 -0

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arch/nds32/include/asm/mmu_context.h new file +81 -0

81 lines not on this page · raw message

arch/nds32/include/asm/proc-fns.h new file +94 -0

94 lines not on this page · raw message

arch/nds32/include/asm/tlb.h new file +41 -0

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arch/nds32/include/asm/tlbflush.h new file +60 -0

60 lines not on this page · raw message

arch/nds32/include/uapi/asm/cachectl.h new file +19 -0
new file mode 100644
index 0000000..a56a37d
@@ -0,0 +1,19 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 1995, 1996 by Ralf Baechle
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ */
+#ifndef	_ASM_CACHECTL
+#define	_ASM_CACHECTL
+
+/*
+ * Options for cacheflush system call
+ */
+#define	ICACHE	0		/* flush instruction cache        */
+#define	DCACHE	1		/* writeback and flush data cache */
+#define	BCACHE	2		/* flush instruction cache + writeback and flush data cache */
+
+#endif /* _ASM_CACHECTL */
arch/nds32/kernel/cacheinfo.c new file +62 -0

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arch/nds32/mm/cacheflush.c new file +331 -0

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arch/nds32/mm/proc-n13.c new file +608 -0

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arch/nds32/mm/tlb.c new file +63 -0

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Signature · 1 line
1.7.9.5
maintainer
#18 lore raw

Re: [PATCH 08/31] nds32: Cache and TLB routines

Quoted 9 lines · Greentime Hu
arch/nds32/include/asm/proc-fns.h new file +9 -0
+#ifndef __NDS32_PROCFNS_H__
+#define __NDS32_PROCFNS_H__
+
+#define CPU_NAME n13
+
+#ifdef __KERNEL__
+
+#ifdef __STDC__
+#define ____cpu_fn(name,fn)       name##fn

arch/nds32/include/asm/proc-fns.h line 35

Quoted 10 lines
arch/nds32/include/asm/proc-fns.h new file +10 -0
+#else
+#define ____cpu_fn(name,fn)       name/**/fn
+#endif
+#define __cpu_fn(name,fn)         ____cpu_fn(name,fn)
+
+#define cpu_proc_init                  __cpu_fn( CPU_NAME, _proc_init)
+#define cpu_proc_fin                   __cpu_fn( CPU_NAME, _proc_fin)
+#define cpu_do_idle                    __cpu_fn( CPU_NAME, _do_idle)
+#define cpu_reset                      __cpu_fn( CPU_NAME, _reset)
+#define cpu_switch_mm                  __cpu_fn( CPU_NAME, _switch_mm)

I see you have copied this from ARM. Do you actually need the same complexity, with the ability to build either optimal code for a particular CPU or a multi-CPU
version?

Most other architectures seem to have settled for doing just one of the two models. How many CPU implementations to you expect to support that differ in all of those functions?

Arnd

#19 lore raw

Re: [PATCH 08/31] nds32: Cache and TLB routines

2017-11-08 16:45 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 27 lines · Greentime Hu
Quoted 10 lines
arch/nds32/include/asm/proc-fns.h new file +9 -0
+#ifndef __NDS32_PROCFNS_H__
+#define __NDS32_PROCFNS_H__
+
+#define CPU_NAME n13
+
+#ifdef __KERNEL__
+
+#ifdef __STDC__
+#define ____cpu_fn(name,fn)       name##fn

arch/nds32/include/asm/proc-fns.h line 35

Quoted 10 lines
arch/nds32/include/asm/proc-fns.h new file +10 -0
+#else
+#define ____cpu_fn(name,fn)       name/**/fn
+#endif
+#define __cpu_fn(name,fn)         ____cpu_fn(name,fn)
+
+#define cpu_proc_init                  __cpu_fn( CPU_NAME, _proc_init)
+#define cpu_proc_fin                   __cpu_fn( CPU_NAME, _proc_fin)
+#define cpu_do_idle                    __cpu_fn( CPU_NAME, _do_idle)
+#define cpu_reset                      __cpu_fn( CPU_NAME, _reset)
+#define cpu_switch_mm                  __cpu_fn( CPU_NAME, _switch_mm)

I see you have copied this from ARM. Do you actually need the same complexity, with the ability to build either optimal code for a particular CPU or a multi-CPU
version?

Quoted 4 lines

Most other architectures seem to have settled for doing just one of the two models. How many CPU implementations to you expect to support that differ in all of those functions?

I think we can simplify the implementations because we may not have that many implementations. I will refine it in the next version patch.

#20 lore raw

PATCH 9/31 nds32: Process management

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/current.h     |   25 ++++
 arch/nds32/include/asm/processor.h   |  116 ++++++++++++++++++
 arch/nds32/include/asm/thread_info.h |   91 ++++++++++++++
 arch/nds32/kernel/process.c          |  219 ++++++++++++++++++++++++++++++++++
 4 files changed, 451 insertions(+)
 create mode 100644 arch/nds32/include/asm/current.h
 create mode 100644 arch/nds32/include/asm/processor.h
 create mode 100644 arch/nds32/include/asm/thread_info.h
 create mode 100644 arch/nds32/kernel/process.c
arch/nds32/include/asm/current.h new file +25 -0
new file mode 100644
index 0000000..027f7df
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ASM_NDS32_CURRENT_H
+#define _ASM_NDS32_CURRENT_H
+
+#ifndef __ASSEMBLY__
+register struct task_struct *current asm("$r25");
+#endif /* __ASSEMBLY__ */
+#define tsk $r25
+
+#endif /* _ASM_NDS32_CURRENT_H */
arch/nds32/include/asm/processor.h new file +116 -0

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arch/nds32/include/asm/thread_info.h new file +91 -0

91 lines not on this page · raw message

arch/nds32/kernel/process.c new file +219 -0

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Signature · 1 line
1.7.9.5
#21 lore raw

PATCH 10/31 nds32: IRQ handling

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/irqflags.h |   49 +++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/irq.c           |   34 +++++++++++++++++++++++++
 2 files changed, 83 insertions(+)
 create mode 100644 arch/nds32/include/asm/irqflags.h
 create mode 100644 arch/nds32/kernel/irq.c
arch/nds32/include/asm/irqflags.h new file +49 -0
new file mode 100644
index 0000000..7c1940f
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <asm/nds32.h>
+#include <nds32_intrinsic.h>
+
+#define arch_local_irq_disable()	\
+	GIE_DISABLE();
+
+#define arch_local_irq_enable()	\
+	GIE_ENABLE();
+static inline unsigned long arch_local_irq_save(void)
+{
+	unsigned long flags;
+	flags = __nds32__mfsr(NDS32_SR_PSW) & PSW_mskGIE;
+	GIE_DISABLE();
+	return flags;
+}
+
+static inline unsigned long arch_local_save_flags(void)
+{
+	unsigned long flags;
+	flags = __nds32__mfsr(NDS32_SR_PSW) & PSW_mskGIE;
+	return flags;
+}
+
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+	if(flags)
+		GIE_ENABLE();
+}
+
+static inline int arch_irqs_disabled_flags(unsigned long flags)
+{
+	return !flags;
+}
arch/nds32/kernel/irq.c new file +34 -0
new file mode 100644
index 0000000..1b935f7
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irqchip.h>
+
+void __init init_IRQ(void)
+{
+	irqchip_init();
+}
+
+#ifdef CONFIG_TRACE_IRQFLAGS
+void notrace arch_trace_hardirqs_on(void)
+{
+	trace_hardirqs_on();
+}
+
+void notrace arch_trace_hardirqs_off(void)
+{
+	trace_hardirqs_off();
+}
+#endif
Signature · 1 line
1.7.9.5
maintainer
#22 lore raw

Re: [PATCH 10/31] nds32: IRQ handling

arch/nds32/kernel/irq.c line 34

Quoted 12 lines · Greentime Hu
arch/nds32/kernel/irq.c new file +12 -0
+
+#ifdef CONFIG_TRACE_IRQFLAGS
+void notrace arch_trace_hardirqs_on(void)
+{
+       trace_hardirqs_on();
+}
+
+void notrace arch_trace_hardirqs_off(void)
+{
+       trace_hardirqs_off();
+}
+#endif

I don't see those wrappers on other architectures, what do you need them for?

Arnd

#23 lore raw

Re: [PATCH 10/31] nds32: IRQ handling

2017-11-08 16:49 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 16 lines · Greentime Hu

arch/nds32/kernel/irq.c line 34

Quoted 13 lines
arch/nds32/kernel/irq.c new file +12 -0
+
+#ifdef CONFIG_TRACE_IRQFLAGS
+void notrace arch_trace_hardirqs_on(void)
+{
+       trace_hardirqs_on();
+}
+
+void notrace arch_trace_hardirqs_off(void)
+{
+       trace_hardirqs_off();
+}
+#endif

I don't see those wrappers on other architectures, what do you need them for?

Thanks.

I will remove them in the next version patch.

#24 lore raw

PATCH 11/31 nds32: Atomic operations

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/futex.h    |  116 ++++++++++++++++++++++++
 arch/nds32/include/asm/spinlock.h |  178 +++++++++++++++++++++++++++++++++++++
 2 files changed, 294 insertions(+)
 create mode 100644 arch/nds32/include/asm/futex.h
 create mode 100644 arch/nds32/include/asm/spinlock.h
arch/nds32/include/asm/futex.h new file +116 -0
new file mode 100644
index 0000000..5aa107c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_FUTEX_H__
+#define __NDS32_FUTEX_H__
+
+#include <linux/futex.h>
+#include <linux/uaccess.h>
+#include <asm/errno.h>
+
+#define __futex_atomic_ex_table(err_reg)			\
+	"	.pushsection __ex_table,\"a\"\n"		\
+	"	.align	3\n"					\
+	"	.long	1b, 4f\n"				\
+	"	.long	2b, 4f\n"				\
+	"	.popsection\n"					\
+	"	.pushsection .fixup,\"ax\"\n"			\
+	"4:	move	%0, " err_reg "\n"			\
+	"	j	3b\n"					\
+	"	.popsection"
+
+#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg)	\
+	smp_mb();						\
+	asm volatile(					\
+	"	movi	$ta, #0\n"				\
+	"1:	llw	%1, [%2+$ta]\n"				\
+	"	" insn "\n"					\
+	"2:	scw	%0, [%2+$ta]\n"				\
+	"	beqz	%0, 1b\n"				\
+	"	movi	%0, #0\n"				\
+	"3:\n"							\
+	__futex_atomic_ex_table("%4")				\
+	: "=&r" (ret), "=&r" (oldval)				\
+	: "r" (uaddr), "r" (oparg), "i" (-EFAULT)		\
+	: "cc", "memory")
+static inline int
+futex_atomic_cmpxchg_inatomic(u32 * uval, u32 __user * uaddr,
+			      u32 oldval, u32 newval)
+{
+	int ret = 0;
+	u32 val, tmp, flags;
+
+	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
+		return -EFAULT;
+
+	smp_mb();
+	asm volatile ("       movi    $ta, #0\n"
+		      "1:     llw     %1, [%6 + $ta]\n"
+		      "       sub     %3, %1, %4\n"
+		      "       cmovz   %2, %5, %3\n"
+		      "       cmovn   %2, %1, %3\n"
+		      "2:     scw     %2, [%6 + $ta]\n"
+		      "       beqz    %2, 1b\n"
+		      "3:\n                   " __futex_atomic_ex_table("%7")
+		      :"+&r"(ret), "=&r"(val), "=&r"(tmp), "=&r"(flags)
+		      :"r"(oldval), "r"(newval), "r"(uaddr), "i"(-EFAULT)
+		      :"$ta", "memory");
+	smp_mb();
+
+	*uval = val;
+	return ret;
+}
+
+static inline int
+arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
+{
+	int oldval = 0, ret;
+
+
+	pagefault_disable();
+	switch (op) {
+	case FUTEX_OP_SET:
+		__futex_atomic_op("move	%0, %3", ret, oldval, tmp, uaddr,
+				  oparg);
+		break;
+	case FUTEX_OP_ADD:
+		__futex_atomic_op("add	%0, %1, %3", ret, oldval, tmp, uaddr,
+				  oparg);
+		break;
+	case FUTEX_OP_OR:
+		__futex_atomic_op("or	%0, %1, %3", ret, oldval, tmp, uaddr,
+				  oparg);
+		break;
+	case FUTEX_OP_ANDN:
+		__futex_atomic_op("and	%0, %1, %3", ret, oldval, tmp, uaddr,
+				  ~oparg);
+		break;
+	case FUTEX_OP_XOR:
+		__futex_atomic_op("xor	%0, %1, %3", ret, oldval, tmp, uaddr,
+				  oparg);
+		break;
+	default:
+		ret = -ENOSYS;
+	}
+
+	pagefault_enable();
+
+	if (!ret)
+		*oval = oldval;
+
+	return ret;
+}
+#endif /* __NDS32_FUTEX_H__ */
arch/nds32/include/asm/spinlock.h new file +178 -0

178 lines not on this page · raw message

Signature · 1 line
1.7.9.5
maintainer
#25 lore raw

Re: [PATCH 11/31] nds32: Atomic operations

Quoted 18 lines · Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/futex.h    |  116 ++++++++++++++++++++++++
 arch/nds32/include/asm/spinlock.h |  178 +++++++++++++++++++++++++++++++++++++
 2 files changed, 294 insertions(+)
 create mode 100644 arch/nds32/include/asm/futex.h
 create mode 100644 arch/nds32/include/asm/spinlock.h
arch/nds32/include/asm/spinlock.h new file +0 -0
new file mode 100644
index 0000000..dd5fc71

arch/nds32/include/asm/spinlock.h line 3

Quoted 3 lines
arch/nds32/include/asm/spinlock.h new file +3 -0
@@ -0,0 +1,178 @@
+
+#define arch_spin_unlock_wait(lock) \
+       do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0)

This was removed from the other architectures in commit 952111d7db02 ("arch: Remove spin_unlock_wait() arch-specific definitions")

Please remove this as well.

Palmer, I see riscv has the same thing, please also add a patch to your tree to remove it.

Quoted 5 lines
arch/nds32/include/asm/spinlock.h new file +5 -0
+#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
+
+static inline void arch_spin_lock(arch_spinlock_t * lock)
+{
+       unsigned long tmp;

arch/nds32/include/asm/spinlock.h line 41

Quoted 10 lines
arch/nds32/include/asm/spinlock.h new file +10 -0
+
+       __asm__ __volatile__("1:\n"
+                            "\tllw\t%0, [%1]\n"
+                            "\tbnez\t%0, 1b\n"
+                            "\tmovi\t%0, #0x1\n"
+                            "\tscw\t%0, [%1]\n"
+                            "\tbeqz\t%0, 1b\n"
+                            :"=&r"(tmp)
+                            :"r"(&lock->lock)
+                            :"memory");

The coding style seems inconsistent here, the other inline asm uses real tabs instead of \t, and 'asm volatile' is generally preferred over '__asm__ __volatile__'.

Arnd

#26 lore raw

RE: [PATCH 11/31] nds32: Atomic operations

Quoted 41 lines

-----Original Message-----
From: [email protected] [mailto:[email protected]] On Behalf Of Arnd Bergmann
Sent: Wednesday, November 08, 2017 4:54 PM
To: Greentime Hu
Cc: Greentime Ying-Han Hu(胡英漢); Linux Kernel Mailing List; linux-arch; Thomas Gleixner; Jason Cooper; Marc Zyngier; Rob Herring; Networking; Vincent Ren-Wei Chen(陳人維); Palmer Dabbelt
Subject: Re: [PATCH 11/31] nds32: Atomic operations

Quoted 10 lines · Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/futex.h    |  116 ++++++++++++++++++++++++
 arch/nds32/include/asm/spinlock.h |  178
+++++++++++++++++++++++++++++++++++++
 2 files changed, 294 insertions(+)
 create mode 100644 arch/nds32/include/asm/futex.h  create mode

100644

Quoted 10 lines

arch/nds32/include/asm/spinlock.h

arch/nds32/include/asm/spinlock.h new file +0 -0
new file mode 100644
index 0000000..dd5fc71

arch/nds32/include/asm/spinlock.h line 4

Quoted 4 lines
arch/nds32/include/asm/spinlock.h new file +4 -0
@@ -0,0 +1,178 @@
+
+#define arch_spin_unlock_wait(lock) \
+       do { while (arch_spin_is_locked(lock)) cpu_relax(); } while
+(0)

This was removed from the other architectures in commit 952111d7db02 ("arch: Remove spin_unlock_wait() arch-specific definitions")

Quoted 2 lines

Please remove this as well.

Dear Arnd:

I will remove them in the next version patch.

Quoted 22 lines

Palmer, I see riscv has the same thing, please also add a patch to your tree to remove it.

Quoted 4 lines
arch/nds32/include/asm/spinlock.h new file +4 -0
+#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
+
+static inline void arch_spin_lock(arch_spinlock_t * lock) {
+       unsigned long tmp;

arch/nds32/include/asm/spinlock.h line 41

Quoted 10 lines
arch/nds32/include/asm/spinlock.h new file +10 -0
+
+       __asm__ __volatile__("1:\n"
+                            "\tllw\t%0, [%1]\n"
+                            "\tbnez\t%0, 1b\n"
+                            "\tmovi\t%0, #0x1\n"
+                            "\tscw\t%0, [%1]\n"
+                            "\tbeqz\t%0, 1b\n"
+                            :"=&r"(tmp)
+                            :"r"(&lock->lock)
+                            :"memory");

The coding style seems inconsistent here, the other inline asm uses real tabs instead of \t, and 'asm volatile' is generally preferred over '__asm__ __volatile__'.

Quoted 1 line

Arnd

OK, I will modify it in the next version patch.

Thanks

Best regards
Vincent
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#27 lore raw

Re: [PATCH 11/31] nds32: Atomic operations

In reply to Greentime Hu

Hi Greentime,

Quoted 10 lines · Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/futex.h    |  116 ++++++++++++++++++++++++
 arch/nds32/include/asm/spinlock.h |  178 +++++++++++++++++++++++++++++++++++++
 2 files changed, 294 insertions(+)
 create mode 100644 arch/nds32/include/asm/futex.h
 create mode 100644 arch/nds32/include/asm/spinlock.h

[...]

Quoted 17 lines
arch/nds32/include/asm/futex.h new file +17 -0
+static inline int
+futex_atomic_cmpxchg_inatomic(u32 * uval, u32 __user * uaddr,
+			      u32 oldval, u32 newval)
+{
+	int ret = 0;
+	u32 val, tmp, flags;
+
+	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
+		return -EFAULT;
+
+	smp_mb();
+	asm volatile ("       movi    $ta, #0\n"
+		      "1:     llw     %1, [%6 + $ta]\n"
+		      "       sub     %3, %1, %4\n"
+		      "       cmovz   %2, %5, %3\n"
+		      "       cmovn   %2, %1, %3\n"
+		      "2:     scw     %2, [%6 + $ta]\n"

arch/nds32/include/asm/futex.h line 75

Quoted 10 lines
arch/nds32/include/asm/futex.h new file +10 -0
+		      "       beqz    %2, 1b\n"
+		      "3:\n                   " __futex_atomic_ex_table("%7")
+		      :"+&r"(ret), "=&r"(val), "=&r"(tmp), "=&r"(flags)
+		      :"r"(oldval), "r"(newval), "r"(uaddr), "i"(-EFAULT)
+		      :"$ta", "memory");
+	smp_mb();
+
+	*uval = val;
+	return ret;
+}

I see you rely on asm-generic/barrier.h for your barrier definitions, which suggests that you only need to prevent reordering by the compiler because you're not SMP. Is that right? If so, using smp_mb() is a little weird.

What about DMA transactions? I imagine you might need some extra instructions for the mandatory barriers there.

Also:

Quoted 4 lines
arch/nds32/include/asm/spinlock.h new file +4 -0
+static inline void arch_spin_lock(arch_spinlock_t * lock)
+{
+	unsigned long tmp;
+

arch/nds32/include/asm/spinlock.h line 42

Quoted 10 lines
arch/nds32/include/asm/spinlock.h new file +10 -0
+	__asm__ __volatile__("1:\n"
+			     "\tllw\t%0, [%1]\n"
+			     "\tbnez\t%0, 1b\n"
+			     "\tmovi\t%0, #0x1\n"
+			     "\tscw\t%0, [%1]\n"
+			     "\tbeqz\t%0, 1b\n"
+			     :"=&r"(tmp)
+			     :"r"(&lock->lock)
+			     :"memory");
+}

Here it looks like you're eliding an explicit barrier here because you already have a "memory" clobber. Can't you do the same for the futex code above?

Will

#28 lore raw

Re: [PATCH 11/31] nds32: Atomic operations

2017-11-20 22:29 GMT+08:00 Will Deacon <[email protected]>:

Quoted 39 lines

Hi Greentime,

Quoted 10 lines · Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/futex.h    |  116 ++++++++++++++++++++++++
 arch/nds32/include/asm/spinlock.h |  178 +++++++++++++++++++++++++++++++++++++
 2 files changed, 294 insertions(+)
 create mode 100644 arch/nds32/include/asm/futex.h
 create mode 100644 arch/nds32/include/asm/spinlock.h

[...]

Quoted 23 lines
arch/nds32/include/asm/futex.h new file +23 -0
+static inline int
+futex_atomic_cmpxchg_inatomic(u32 * uval, u32 __user * uaddr,
+                           u32 oldval, u32 newval)
+{
+     int ret = 0;
+     u32 val, tmp, flags;
+
+     if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
+             return -EFAULT;
+
+     smp_mb();
+     asm volatile ("       movi    $ta, #0\n"
+                   "1:     llw     %1, [%6 + $ta]\n"
+                   "       sub     %3, %1, %4\n"
+                   "       cmovz   %2, %5, %3\n"
+                   "       cmovn   %2, %1, %3\n"
+                   "2:     scw     %2, [%6 + $ta]\n"
+                   "       beqz    %2, 1b\n"
+                   "3:\n                   " __futex_atomic_ex_table("%7")
+                   :"+&r"(ret), "=&r"(val), "=&r"(tmp), "=&r"(flags)
+                   :"r"(oldval), "r"(newval), "r"(uaddr), "i"(-EFAULT)
+                   :"$ta", "memory");
+     smp_mb();
Quoted 9 lines

arch/nds32/include/asm/futex.h line 75

Quoted 4 lines
arch/nds32/include/asm/futex.h new file +4 -0
+
+     *uval = val;
+     return ret;
+}

I see you rely on asm-generic/barrier.h for your barrier definitions, which suggests that you only need to prevent reordering by the compiler because you're not SMP. Is that right? If so, using smp_mb() is a little weird.

Thanks.
So, Is it better to replace smp_mb() with mb() for us?

Quoted 3 lines

What about DMA transactions? I imagine you might need some extra instructions for the mandatory barriers there.

I don't get it. Do you mean before DMA transations?

Data are moved from memory to device, we will writeback data cache before DMA transactions.

Data are moved from device to memory, we will invalidate data cache after DMA transactions.

Quoted 12 lines

Also:

Quoted 10 lines
arch/nds32/include/asm/spinlock.h new file +10 -0
+static inline void arch_spin_lock(arch_spinlock_t * lock)
+{
+     unsigned long tmp;
+
+     __asm__ __volatile__("1:\n"
+                          "\tllw\t%0, [%1]\n"
+                          "\tbnez\t%0, 1b\n"
+                          "\tmovi\t%0, #0x1\n"
+                          "\tscw\t%0, [%1]\n"
+                          "\tbeqz\t%0, 1b\n"
Quoted 9 lines

arch/nds32/include/asm/spinlock.h line 42

Quoted 4 lines
arch/nds32/include/asm/spinlock.h new file +4 -0
+                          :"=&r"(tmp)
+                          :"r"(&lock->lock)
+                          :"memory");
+}

Here it looks like you're eliding an explicit barrier here because you already have a "memory" clobber. Can't you do the same for the futex code above?

Thanks.
OK. I will modify it in the next version patch.

Quoted 1 line

Will

Best regards
Vincent

#29 lore raw

PATCH 12/31 nds32: Device specific operations

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/io.h |   33 +++++++++++++++++++++
 arch/nds32/mm/ioremap.c     |   67 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 100 insertions(+)
 create mode 100644 arch/nds32/include/asm/io.h
 create mode 100644 arch/nds32/mm/ioremap.c
arch/nds32/include/asm/io.h new file +33 -0
new file mode 100644
index 0000000..98b3ae9
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_IO_H
+#define __ASM_NDS32_IO_H
+
+#ifdef __KERNEL__
+
+#include <asm-generic/iomap.h>
+extern void __iomem *__ioremap(unsigned long, size_t, unsigned long,
+			       unsigned long);
+extern void __iounmap(void __iomem * addr);
+
+#define ioremap(cookie,size)		__ioremap(cookie,size,0,1)
+#define ioremap_nocache(cookie,size)	__ioremap(cookie,size,0,1)
+#define iounmap(cookie)			__iounmap(cookie)
+#include <asm-generic/io.h>
+
+#endif /* __KERNEL__ */
+#endif /* __ASM_NDS32_IO_H */
arch/nds32/mm/ioremap.c new file +67 -0

67 lines not on this page · raw message

Signature · 1 line
1.7.9.5
maintainer
#30 lore raw

Re: [PATCH 12/31] nds32: Device specific operations

arch/nds32/include/asm/io.h line 30

Quoted 6 lines · Greentime Hu
arch/nds32/include/asm/io.h new file +5 -0
+
+#define ioremap(cookie,size)           __ioremap(cookie,size,0,1)
+#define ioremap_nocache(cookie,size)   __ioremap(cookie,size,0,1)
+#define iounmap(cookie)                        __iounmap(cookie)
 
+#include <asm-generic/io.h>

asm-generic/io.h now provides an ioremap_nocache() helper along with ioremap_uc/ioremap_wc/ioremap_wt, so I think you can remove the ioremap_nocache definition here. You might also be able to remove __ioremap and __iounmap, and only provide ioremap/iounmap, plus the identity macro 'define ioremap ioremap'

arch/nds32/mm/ioremap.c line 23

Quoted 2 lines
arch/nds32/mm/ioremap.c new file +2 -0
+void __iomem *__ioremap(unsigned long phys_addr, size_t size,
+                       unsigned long flags, unsigned long align)

The 'align' argument is unused here, and not used on other architectures either.

Quoted 11 lines
arch/nds32/mm/ioremap.c new file +11 -0
+{
+       struct vm_struct *area;
+       unsigned long addr, offset, last_addr;
+       pgprot_t prot;
+
+       /* Don't allow wraparound or zero size */
+       last_addr = phys_addr + size - 1;
+       if (!size || last_addr < phys_addr)
+               return NULL;
+
+       /*

arch/nds32/mm/ioremap.c line 44

Quoted 10 lines
arch/nds32/mm/ioremap.c new file +10 -0
+        * Mappings have to be page-aligned
+        */
+       offset = phys_addr & ~PAGE_MASK;
+       phys_addr &= PAGE_MASK;
+       size = PAGE_ALIGN(last_addr + 1) - phys_addr;
+
+       /*
+        * Ok, go for it..
+        */
+       area = get_vm_area(size, VM_IOREMAP);

Better use get_vm_area_caller here to have the ioremap areas show up in a more useful form in /proc/vmallocinfo

Please also have a look at what you can do for memremap().

Since you have no cacheable version of ioremap_wb/wt, it will return an uncached mapping all the time, which is not ideal.

Arnd

#31 lore raw

Re: [PATCH 12/31] nds32: Device specific operations

2017-11-08 17:04 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 7 lines · Greentime Hu
Quoted 5 lines
arch/nds32/include/asm/io.h new file +4 -0
+
+#define ioremap(cookie,size)           __ioremap(cookie,size,0,1)
+#define ioremap_nocache(cookie,size)   __ioremap(cookie,size,0,1)
+#define iounmap(cookie)                        __iounmap(cookie)
Quoted 7 lines
Quoted 1 line

+#include <asm-generic/io.h>

asm-generic/io.h now provides an ioremap_nocache() helper along with ioremap_uc/ioremap_wc/ioremap_wt, so I think you can remove the ioremap_nocache definition here. You might also be able to remove __ioremap and __iounmap, and only provide ioremap/iounmap, plus the identity macro 'define ioremap ioremap'

Thanks. I will try to use generic ioremap_nocache() helper in the next version patch.

Quoted 6 lines

arch/nds32/mm/ioremap.c line 23

Quoted 2 lines
arch/nds32/mm/ioremap.c new file +2 -0
+void __iomem *__ioremap(unsigned long phys_addr, size_t size,
+                       unsigned long flags, unsigned long align)

The 'align' argument is unused here, and not used on other architectures either.

Thanks. I will remove this argument in the next version patch.

Quoted 16 lines
Quoted 16 lines
arch/nds32/mm/ioremap.c new file +16 -0
+{
+       struct vm_struct *area;
+       unsigned long addr, offset, last_addr;
+       pgprot_t prot;
+
+       /* Don't allow wraparound or zero size */
+       last_addr = phys_addr + size - 1;
+       if (!size || last_addr < phys_addr)
+               return NULL;
+
+       /*
+        * Mappings have to be page-aligned
+        */
+       offset = phys_addr & ~PAGE_MASK;
+       phys_addr &= PAGE_MASK;
+       size = PAGE_ALIGN(last_addr + 1) - phys_addr;
Quoted 8 lines

arch/nds32/mm/ioremap.c line 44

Quoted 5 lines
arch/nds32/mm/ioremap.c new file +5 -0
+
+       /*
+        * Ok, go for it..
+        */
+       area = get_vm_area(size, VM_IOREMAP);

Better use get_vm_area_caller here to have the ioremap areas show up in a more useful form in /proc/vmallocinfo

Thanks.
I will use get_vm_area_caller() in the next version patch.

Quoted 4 lines

Please also have a look at what you can do for memremap().

Since you have no cacheable version of ioremap_wb/wt, it will return an uncached mapping all the time, which is not ideal.

Thanks.
I will study kernel/memremap.c

#32 lore raw

Re: [PATCH 12/31] nds32: Device specific operations

2017-11-09 15:04 GMT+08:00 Greentime Hu <[email protected]>:

Quoted 10 lines

2017-11-08 17:04 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 9 lines · Greentime Hu
Quoted 7 lines
arch/nds32/include/asm/io.h new file +5 -0
+
+#define ioremap(cookie,size)           __ioremap(cookie,size,0,1)
+#define ioremap_nocache(cookie,size)   __ioremap(cookie,size,0,1)
+#define iounmap(cookie)                        __iounmap(cookie)
 
+#include <asm-generic/io.h>
Quoted 8 lines
Quoted 5 lines

asm-generic/io.h now provides an ioremap_nocache() helper along with ioremap_uc/ioremap_wc/ioremap_wt, so I think you can remove the ioremap_nocache definition here. You might also be able to remove __ioremap and __iounmap, and only provide ioremap/iounmap, plus the identity macro 'define ioremap ioremap'

Thanks. I will try to use generic ioremap_nocache() helper in the next version patch.

I think I can't remove ioremap_nocache definition because it is defined in asm-generic/io.h with !CONFIG_MMU.

maintainer
#33 lore raw

Re: [PATCH 12/31] nds32: Device specific operations

Quoted 17 lines · Greentime Hu

2017-11-09 15:04 GMT+08:00 Greentime Hu <[email protected]>:

Quoted 16 lines

2017-11-08 17:04 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 14 lines · Greentime Hu

arch/nds32/include/asm/io.h line 30

Quoted 7 lines
arch/nds32/include/asm/io.h new file +5 -0
+
+#define ioremap(cookie,size)           __ioremap(cookie,size,0,1)
+#define ioremap_nocache(cookie,size)   __ioremap(cookie,size,0,1)
+#define iounmap(cookie)                        __iounmap(cookie)
 
+#include <asm-generic/io.h>

asm-generic/io.h now provides an ioremap_nocache() helper along with ioremap_uc/ioremap_wc/ioremap_wt, so I think you can remove the ioremap_nocache definition here. You might also be able to remove __ioremap and __iounmap, and only provide ioremap/iounmap, plus the identity macro 'define ioremap ioremap'

Quoted 5 lines
Quoted 2 lines

Thanks. I will try to use generic ioremap_nocache() helper in the next version patch.

I think I can't remove ioremap_nocache definition because it is defined in asm-generic/io.h with !CONFIG_MMU.

Ah, I see.

Could you move ioremap_nocache/ioremap_uc/ioremap_wc/ioremap_wt out of that #ifdef, or would that break other architectures?

Arnd

#34 lore raw

Re: [PATCH 12/31] nds32: Device specific operations

2017-11-11 0:14 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 3 lines

Could you move ioremap_nocache/ioremap_uc/ioremap_wc/ioremap_wt out of that #ifdef, or would that break other architectures?

It seems ok. I just tried arm64, x86 and nds32.

#endif /* CONFIG_MMU */
#ifndef ioremap_nocache
void __iomem *ioremap(phys_addr_t phys_addr, size_t size); #define ioremap_nocache ioremap_nocache
static inline void __iomem *ioremap_nocache(phys_addr_t offset, size_t size)

{
        return ioremap(offset, size);
}

#endif

#ifndef ioremap_uc
#define ioremap_uc ioremap_uc
static inline void __iomem *ioremap_uc(phys_addr_t offset, size_t size)

{
        return ioremap_nocache(offset, size);
}

#endif

#ifndef ioremap_wc
#define ioremap_wc ioremap_wc
static inline void __iomem *ioremap_wc(phys_addr_t offset, size_t size)

{
        return ioremap_nocache(offset, size);
}

#endif

#ifndef ioremap_wt
#define ioremap_wt ioremap_wt
static inline void __iomem *ioremap_wt(phys_addr_t offset, size_t size)

{
        return ioremap_nocache(offset, size);
}

#endif

#35 lore raw

PATCH 13/31 nds32: DMA mapping API

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/dma-mapping.h |   27 ++
 arch/nds32/kernel/dma.c              |  478 ++++++++++++++++++++++++++++++++++
 2 files changed, 505 insertions(+)
 create mode 100644 arch/nds32/include/asm/dma-mapping.h
 create mode 100644 arch/nds32/kernel/dma.c
arch/nds32/include/asm/dma-mapping.h new file +27 -0
new file mode 100644
index 0000000..63dbeb7
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef ASMNDS32_DMA_MAPPING_H
+#define ASMNDS32_DMA_MAPPING_H
+
+extern struct dma_map_ops nds32_dma_ops;
+
+static inline struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
+{
+	return &nds32_dma_ops;
+}
+
+#endif
arch/nds32/kernel/dma.c new file +478 -0

478 lines not on this page · raw message

Signature · 1 line
1.7.9.5
maintainer
#36 lore raw

Re: [PATCH 13/31] nds32: DMA mapping API

Quoted 24 lines · Greentime Hu
arch/nds32/kernel/dma.c new file +23 -0
+static void consistent_sync(void *vaddr, size_t size, int direction)
+{
+       unsigned long start = (unsigned long)vaddr;
+       unsigned long end = start + size;
+
+       switch (direction) {
+       case DMA_FROM_DEVICE:   /* invalidate only */
+               cpu_dma_inval_range(start, end);
+               break;
+       case DMA_TO_DEVICE:     /* writeback only */
+               cpu_dma_wb_range(start, end);
+               break;
+       case DMA_BIDIRECTIONAL: /* writeback and invalidate */
+               cpu_dma_wbinval_range(start, end);
+               break;
+       default:
+               BUG();
+       }
+}
 
+
+static void
+nds32_dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
+                             size_t size, enum dma_data_direction dir)

arch/nds32/kernel/dma.c line 437

Quoted 10 lines
arch/nds32/kernel/dma.c new file +10 -0
+{
+       consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
+}
+
+static void
+nds32_dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
+                                size_t size, enum dma_data_direction dir)
+{
+       consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
+}

You do the same cache operations for _to_cpu and _to_device, which usually works,
but is more expensive than you need. It's better to take the ownership into account and only do what you need.

Arnd

#37 lore raw

Re: [PATCH 13/31] nds32: DMA mapping API

2017-11-08 17:09 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 33 lines · Greentime Hu
Quoted 32 lines
arch/nds32/kernel/dma.c new file +30 -0
+static void consistent_sync(void *vaddr, size_t size, int direction)
+{
+       unsigned long start = (unsigned long)vaddr;
+       unsigned long end = start + size;
+
+       switch (direction) {
+       case DMA_FROM_DEVICE:   /* invalidate only */
+               cpu_dma_inval_range(start, end);
+               break;
+       case DMA_TO_DEVICE:     /* writeback only */
+               cpu_dma_wb_range(start, end);
+               break;
+       case DMA_BIDIRECTIONAL: /* writeback and invalidate */
+               cpu_dma_wbinval_range(start, end);
+               break;
+       default:
+               BUG();
+       }
+}
 
+
+static void
+nds32_dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
+                             size_t size, enum dma_data_direction dir)
+{
+       consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
+}
+
+static void
+nds32_dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
+                                size_t size, enum dma_data_direction dir)
Quoted 9 lines

arch/nds32/kernel/dma.c line 430

Quoted 3 lines
arch/nds32/kernel/dma.c new file +3 -0
+{
+       consistent_sync((void *)dma_to_virt(dev, handle), size, dir);
+}

You do the same cache operations for _to_cpu and _to_device, which usually works,
but is more expensive than you need. It's better to take the ownership into account and only do what you need.

Thanks.

Like this?

static void
nds32_dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
consistent_sync((void *)dma_to_virt(dev, handle), size,
DMA_FROM_DEVICE);
}

static void
nds32_dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
consistent_sync((void *)dma_to_virt(dev, handle), size,
DMA_TO_DEVICE);
}

maintainer
#38 lore raw

Re: [PATCH 13/31] nds32: DMA mapping API

Quoted 19 lines · Greentime Hu

2017-11-08 17:09 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 8 lines · Greentime Hu

You do the same cache operations for _to_cpu and _to_device, which usually works,
but is more expensive than you need. It's better to take the ownership into account and only do what you need.

Like this?

static void
nds32_dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
consistent_sync((void *)dma_to_virt(dev, handle), size,
DMA_FROM_DEVICE);
}

Quoted 7 lines

static void
nds32_dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
consistent_sync((void *)dma_to_virt(dev, handle), size,
DMA_TO_DEVICE);
}

No, it's more complicated than that. You need to pass both the direction of the DMA transaction and the ownership to consistent_sync(), and then do the correct cache maintenance operation for each of the six combinations.

Which operation that is depends on the microarchitecture to some degree, e.g. on machines that can load arbitrary cache lines during speculative execution, you have to invalidate the caches during both _for_device/FROM_DEVICE _for_cpu/FROM_DEVICE, while machines without speculative execution can skip the second invalidation, they only need to get rid of dirty cache lines before the DMA from device.

Usually you don't have to do a writeback during _for_cpu, since there are no dirty cache lines after the _for_device operation.

It's not entirely clear what the correct behavior is for buffers that are not cache line aligned, some architectures use wbinval instead of inval for the _for_device/_FROM_DEVICE operation, on any partial cache line, but you wouldn't want to do that on the _for_cpu/_FROM_DEVICE operation.

Arnd

#39 lore raw

Re: [PATCH 13/31] nds32: DMA mapping API

2017-11-09 18:14 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 39 lines · Greentime Hu
Quoted 19 lines

2017-11-08 17:09 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 8 lines · Greentime Hu

You do the same cache operations for _to_cpu and _to_device, which usually works,
but is more expensive than you need. It's better to take the ownership into account and only do what you need.

Like this?

static void
nds32_dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
consistent_sync((void *)dma_to_virt(dev, handle), size,
DMA_FROM_DEVICE);
}

Quoted 7 lines

static void
nds32_dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
size_t size, enum dma_data_direction dir)
{
consistent_sync((void *)dma_to_virt(dev, handle), size,
DMA_TO_DEVICE);
}

No, it's more complicated than that. You need to pass both the direction of the DMA transaction and the ownership to consistent_sync(), and then do the correct cache maintenance operation for each of the six combinations.

Which operation that is depends on the microarchitecture to some degree, e.g. on machines that can load arbitrary cache lines during speculative execution, you have to invalidate the caches during both _for_device/FROM_DEVICE _for_cpu/FROM_DEVICE, while machines without speculative execution can skip the second invalidation, they only need to get rid of dirty cache lines before the DMA from device.

Quoted 8 lines

Usually you don't have to do a writeback during _for_cpu, since there are no dirty cache lines after the _for_device operation.

It's not entirely clear what the correct behavior is for buffers that are not cache line aligned, some architectures use wbinval instead of inval for the _for_device/_FROM_DEVICE operation, on any partial cache line, but you wouldn't want to do that on the _for_cpu/_FROM_DEVICE operation.

I get your point. I prefer to keep it that way because it will be a little bit complex.
I will still study the code to see what I can improve in the next version patch.

#40 lore raw

PATCH 14/31 nds32: ELF definitions

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/elf.h         |  192 ++++++++++++++++++++++++++++++++++
 arch/nds32/include/uapi/asm/auxvec.h |   25 +++++
 arch/nds32/include/uapi/asm/param.h  |   24 +++++
 3 files changed, 241 insertions(+)
 create mode 100644 arch/nds32/include/asm/elf.h
 create mode 100644 arch/nds32/include/uapi/asm/auxvec.h
 create mode 100644 arch/nds32/include/uapi/asm/param.h
arch/nds32/include/asm/elf.h new file +192 -0
new file mode 100644
index 0000000..a6e4c56
@@ -0,0 +1,192 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASMNDS32_ELF_H
+#define __ASMNDS32_ELF_H
+
+/*
+ * ELF register definitions..
+ */
+
+#include <asm/ptrace.h>
+
+typedef unsigned long elf_greg_t;
+typedef unsigned long elf_freg_t[3];
+
+extern unsigned int elf_hwcap;
+
+#define EM_NDS32			167
+
+#define R_NDS32_NONE			0
+#define R_NDS32_16_RELA			19
+#define R_NDS32_32_RELA			20
+#define R_NDS32_9_PCREL_RELA		22
+#define R_NDS32_15_PCREL_RELA		23
+#define R_NDS32_17_PCREL_RELA		24
+#define R_NDS32_25_PCREL_RELA		25
+#define R_NDS32_HI20_RELA		26
+#define R_NDS32_LO12S3_RELA		27
+#define R_NDS32_LO12S2_RELA		28
+#define R_NDS32_LO12S1_RELA		29
+#define R_NDS32_LO12S0_RELA		30
+#define R_NDS32_SDA15S3_RELA    	31
+#define R_NDS32_SDA15S2_RELA    	32
+#define R_NDS32_SDA15S1_RELA    	33
+#define R_NDS32_SDA15S0_RELA    	34
+#define R_NDS32_GOT20			37
+#define R_NDS32_25_PLTREL		38
+#define R_NDS32_COPY			39
+#define R_NDS32_GLOB_DAT		40
+#define R_NDS32_JMP_SLOT		41
+#define R_NDS32_RELATIVE		42
+#define R_NDS32_GOTOFF			43
+#define R_NDS32_GOTPC20			44
+#define R_NDS32_GOT_HI20		45
+#define R_NDS32_GOT_LO12		46
+#define R_NDS32_GOTPC_HI20		47
+#define R_NDS32_GOTPC_LO12		48
+#define R_NDS32_GOTOFF_HI20		49
+#define R_NDS32_GOTOFF_LO12		50
+#define R_NDS32_INSN16			51
+#define R_NDS32_LABEL			52
+#define R_NDS32_LONGCALL1		53
+#define R_NDS32_LONGCALL2		54
+#define R_NDS32_LONGCALL3		55
+#define R_NDS32_LONGJUMP1		56
+#define R_NDS32_LONGJUMP2		57
+#define R_NDS32_LONGJUMP3		58
+#define R_NDS32_LOADSTORE		59
+#define R_NDS32_9_FIXED_RELA		60
+#define R_NDS32_15_FIXED_RELA		61
+#define R_NDS32_17_FIXED_RELA		62
+#define R_NDS32_25_FIXED_RELA		63
+#define R_NDS32_PLTREL_HI20		64
+#define R_NDS32_PLTREL_LO12		65
+#define R_NDS32_PLT_GOTREL_HI20		66
+#define R_NDS32_PLT_GOTREL_LO12		67
+#define R_NDS32_LO12S0_ORI_RELA		72
+#define R_NDS32_DWARF2_OP1_RELA     	77
+#define R_NDS32_DWARF2_OP2_RELA     	78
+#define R_NDS32_DWARF2_LEB_RELA     	79
+#define R_NDS32_WORD_9_PCREL_RELA	94
+#define R_NDS32_LONGCALL4 		107
+#define R_NDS32_RELA_NOP_MIX		192
+#define R_NDS32_RELA_NOP_MAX		255
+
+#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+/* Core file format: The core file is written in such a way that gdb
+   can understand it and provide useful information to the user (under
+   linux we use the 'trad-core' bfd).  There are quite a number of
+   obstacles to being able to view the contents of the floating point
+   registers, and until these are solved you will not be able to view the
+   contents of them.  Actually, you can read in the core file and look at
+   the contents of the user struct to find out what the floating point
+   registers contain.
+   The actual file contents are as follows:
+   UPAGE: 1 page consisting of a user struct that tells gdb what is present
+   in the file.  Directly after this is a copy of the task_struct, which
+   is currently not used by gdb, but it may come in useful at some point.
+   All of the registers are stored as part of the upage.  The upage should
+   always be only one page.
+   DATA: The data area is stored.  We use current->end_text to
+   current->brk to pick up all of the user variables, plus any memory
+   that may have been malloced.  No attempt is made to determine if a page
+   is demand-zero or if a page is totally unused, we just cover the entire
+   range.  All of the addresses are rounded in such a way that an integral
+   number of pages is written.
+   STACK: We need the stack information in order to get a meaningful
+   backtrace.  We need to write the data from (esp) to
+   current->start_stack, so we round each of these off in order to be able
+   to write an integer number of pages.
+   The minimum core file size is 3 pages, or 12288 bytes.
+*/
+
+struct user_fp {
+	struct fp_reg {
+		unsigned int sign1:1;
+		unsigned int unused:15;
+		unsigned int sign2:1;
+		unsigned int exponent:14;
+		unsigned int j:1;
+		unsigned int mantissa1:31;
+		unsigned int mantissa0:32;
+	} fpregs[8];
+	unsigned int fpsr:32;
+	unsigned int fpcr:32;
+	unsigned char ftype[8];
+	unsigned int init_flag;
+};
+
+typedef struct user_fp elf_fpregset_t;
+
+struct elf32_hdr;
+#define elf_check_arch(x)		((x)->e_machine == EM_NDS32)
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS	ELFCLASS32
+#ifdef __NDS32_EB__
+#define ELF_DATA	ELFDATA2MSB;
+#else
+#define ELF_DATA	ELFDATA2LSB;
+#endif
+#define ELF_ARCH	EM_NDS32
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE	PAGE_SIZE
+
+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+   use of this is to invoke "./ld.so someprog" to test out a new version of
+   the loader.  We need to make sure that it is out of the way of the program
+   that it will "exec", and that there is sufficient room for the brk.  */
+
+#define ELF_ET_DYN_BASE	(2 * TASK_SIZE / 3)
+
+/* When the program starts, a1 contains a pointer to a function to be
+   registered with atexit, as per the SVR4 ABI.  A value of 0 means we
+   have no such handler.  */
+#define ELF_PLAT_INIT(_r, load_addr)	(_r)->uregs[0] = 0
+
+/* This yields a mask that user programs can use to figure out what
+   instruction set this cpu supports. */
+
+#define ELF_HWCAP	(elf_hwcap)
+
+#ifdef __KERNEL__
+
+#define ELF_PLATFORM    (NULL)
+
+/* Old NetWinder binaries were compiled in such a way that the iBCS
+   heuristic always trips on them.  Until these binaries become uncommon
+   enough not to care, don't trust the `ibcs' flag here.  In any case
+   there is no other ELF system currently supported by iBCS.
+   @@ Could print a warning message to encourage users to upgrade.  */
+#define SET_PERSONALITY(ex)	set_personality(PER_LINUX)
+
+#endif
+
+#define ARCH_DLINFO						\
+do {								\
+	NEW_AUX_ENT(AT_SYSINFO_EHDR,				\
+		    (elf_addr_t)current->mm->context.vdso);	\
+} while (0)
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
+struct linux_binprm;
+int arch_setup_additional_pages(struct linux_binprm *, int);
+
+#endif
arch/nds32/include/uapi/asm/auxvec.h new file +25 -0
new file mode 100644
index 0000000..02e9757
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_AUXVEC_H
+#define __ASM_AUXVEC_H
+
+/* VDSO location */
+#define AT_SYSINFO_EHDR	33
+
+#define AT_VECTOR_SIZE_ARCH 1
+
+#endif
arch/nds32/include/uapi/asm/param.h new file +24 -0
new file mode 100644
index 0000000..2e4527f3
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_PARAM_H
+#define __ASM_NDS32_PARAM_H
+
+#define EXEC_PAGESIZE	8192
+
+#include <asm-generic/param.h>
+
+#endif /* __ASM_NDS32_PARAM_H */
Signature · 1 line
1.7.9.5
#41 lore raw

PATCH 15/31 nds32: System calls handling

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/syscall.h     |  203 ++++++++++++++++++++++++++++++++++
 arch/nds32/include/asm/syscalls.h    |   27 +++++
 arch/nds32/include/asm/unistd.h      |   21 ++++
 arch/nds32/include/uapi/asm/unistd.h |   36 ++++++
 arch/nds32/kernel/ex-scall.S         |  146 ++++++++++++++++++++++++
 arch/nds32/kernel/sys_nds32.c        |   63 +++++++++++
 arch/nds32/kernel/syscall_table.c    |   28 +++++
 7 files changed, 524 insertions(+)
 create mode 100644 arch/nds32/include/asm/syscall.h
 create mode 100644 arch/nds32/include/asm/syscalls.h
 create mode 100644 arch/nds32/include/asm/unistd.h
 create mode 100644 arch/nds32/include/uapi/asm/unistd.h
 create mode 100644 arch/nds32/kernel/ex-scall.S
 create mode 100644 arch/nds32/kernel/sys_nds32.c
 create mode 100644 arch/nds32/kernel/syscall_table.c
arch/nds32/include/asm/syscall.h new file +203 -0
new file mode 100644
index 0000000..3066bae
@@ -0,0 +1,203 @@
+/*
+ * Access to user system call parameters and results
+ *
+ * Copyright (C) 2008-2009 Red Hat, Inc.  All rights reserved.
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This copyrighted material is made available to anyone wishing to use,
+ * modify, copy, or redistribute it subject to the terms and conditions
+ * of the GNU General Public License v.2.
+ *
+ * This file is a stub providing documentation for what functions
+ * asm-ARCH/syscall.h files need to define.  Most arch definitions
+ * will be simple inlines.
+ *
+ * All of these functions expect to be called with no locks,
+ * and only when the caller is sure that the task of interest
+ * cannot return to user mode while we are looking at it.
+ */
+
+#ifndef _ASM_NDS32_SYSCALL_H
+#define _ASM_NDS32_SYSCALL_H	1
+
+#include <linux/err.h>
+struct task_struct;
+struct pt_regs;
+
+/**
+ * syscall_get_nr - find what system call a task is executing
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ *
+ * If @task is executing a system call or is at system call
+ * tracing about to attempt one, returns the system call number.
+ * If @task is not executing a system call, i.e. it's blocked
+ * inside the kernel for a fault or signal, returns -1.
+ *
+ * Note this returns int even on 64-bit machines.  Only 32 bits of
+ * system call number can be meaningful.  If the actual arch value
+ * is 64 bits, this truncates to 32 bits so 0xffffffff means -1.
+ *
+ * It's only valid to call this when @task is known to be blocked.
+ */
+int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
+{
+	return regs->syscallno;
+}
+
+/**
+ * syscall_rollback - roll back registers after an aborted system call
+ * @task:	task of interest, must be in system call exit tracing
+ * @regs:	task_pt_regs() of @task
+ *
+ * It's only valid to call this when @task is stopped for system
+ * call exit tracing (due to TIF_SYSCALL_TRACE or TIF_SYSCALL_AUDIT),
+ * after tracehook_report_syscall_entry() returned nonzero to prevent
+ * the system call from taking place.
+ *
+ * This rolls back the register state in @regs so it's as if the
+ * system call instruction was a no-op.  The registers containing
+ * the system call number and arguments are as they were before the
+ * system call instruction.  This may not be the same as what the
+ * register state looked like at system call entry tracing.
+ */
+void syscall_rollback(struct task_struct *task, struct pt_regs *regs)
+{
+	regs->uregs[0] = regs->orig_r0;
+}
+
+/**
+ * syscall_get_error - check result of traced system call
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ *
+ * Returns 0 if the system call succeeded, or -ERRORCODE if it failed.
+ *
+ * It's only valid to call this when @task is stopped for tracing on exit
+ * from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ */
+long syscall_get_error(struct task_struct *task, struct pt_regs *regs)
+{
+	unsigned long error = regs->uregs[0];
+	return IS_ERR_VALUE(error) ? error : 0;
+}
+
+/**
+ * syscall_get_return_value - get the return value of a traced system call
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ *
+ * Returns the return value of the successful system call.
+ * This value is meaningless if syscall_get_error() returned nonzero.
+ *
+ * It's only valid to call this when @task is stopped for tracing on exit
+ * from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ */
+long syscall_get_return_value(struct task_struct *task, struct pt_regs *regs)
+{
+	return regs->uregs[0];
+}
+
+/**
+ * syscall_set_return_value - change the return value of a traced system call
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ * @error:	negative error code, or zero to indicate success
+ * @val:	user return value if @error is zero
+ *
+ * This changes the results of the system call that user mode will see.
+ * If @error is zero, the user sees a successful system call with a
+ * return value of @val.  If @error is nonzero, it's a negated errno
+ * code; the user sees a failed system call with this errno code.
+ *
+ * It's only valid to call this when @task is stopped for tracing on exit
+ * from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ */
+void syscall_set_return_value(struct task_struct *task, struct pt_regs *regs,
+			      int error, long val)
+{
+	regs->uregs[0] = (long)error ? error : val;
+}
+
+/**
+ * syscall_get_arguments - extract system call parameter values
+ * @task:	task of interest, must be blocked
+ * @regs:	task_pt_regs() of @task
+ * @i:		argument index [0,5]
+ * @n:		number of arguments; n+i must be [1,6].
+ * @args:	array filled with argument values
+ *
+ * Fetches @n arguments to the system call starting with the @i'th argument
+ * (from 0 through 5).  Argument @i is stored in @args[0], and so on.
+ * An arch inline version is probably optimal when @i and @n are constants.
+ *
+ * It's only valid to call this when @task is stopped for tracing on
+ * entry to a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ * It's invalid to call this with @i + @n > 6; we only support system calls
+ * taking up to 6 arguments.
+ */
+#define SYSCALL_MAX_ARGS 6
+void syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,
+			   unsigned int i, unsigned int n, unsigned long *args)
+{
+	if (n == 0)
+		return;
+	if (i + n > SYSCALL_MAX_ARGS) {
+		unsigned long *args_bad = args + SYSCALL_MAX_ARGS - i;
+		unsigned int n_bad = n + i - SYSCALL_MAX_ARGS;
+		pr_warning("%s called with max args %d, handling only %d\n",
+			   __func__, i + n, SYSCALL_MAX_ARGS);
+		memset(args_bad, 0, n_bad * sizeof(args[0]));
+		memset(args_bad, 0, n_bad * sizeof(args[0]));
+	}
+
+	if (i == 0) {
+		args[0] = regs->orig_r0;
+		args++;
+		i++;
+		n--;
+	}
+
+	memcpy(args, &regs->uregs[0] + i, n * sizeof(args[0]));
+}
+
+/**
+ * syscall_set_arguments - change system call parameter value
+ * @task:	task of interest, must be in system call entry tracing
+ * @regs:	task_pt_regs() of @task
+ * @i:		argument index [0,5]
+ * @n:		number of arguments; n+i must be [1,6].
+ * @args:	array of argument values to store
+ *
+ * Changes @n arguments to the system call starting with the @i'th argument.
+ * Argument @i gets value @args[0], and so on.
+ * An arch inline version is probably optimal when @i and @n are constants.
+ *
+ * It's only valid to call this when @task is stopped for tracing on
+ * entry to a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
+ * It's invalid to call this with @i + @n > 6; we only support system calls
+ * taking up to 6 arguments.
+ */
+void syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,
+			   unsigned int i, unsigned int n,
+			   const unsigned long *args)
+{
+	if (n == 0)
+		return;
+
+	if (i + n > SYSCALL_MAX_ARGS) {
+		pr_warn("%s called with max args %d, handling only %d\n",
+			__func__, i + n, SYSCALL_MAX_ARGS);
+		n = SYSCALL_MAX_ARGS - i;
+	}
+
+	if (i == 0) {
+		regs->orig_r0 = args[0];
+		args++;
+		i++;
+		n--;
+	}
+
+	memcpy(&regs->uregs[0] + i, args, n * sizeof(args[0]));
+}
+#endif /* _ASM_NDS32_SYSCALL_H */
arch/nds32/include/asm/syscalls.h new file +27 -0
new file mode 100644
index 0000000..741ccdc
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_SYSCALLS_H
+#define __ASM_NDS32_SYSCALLS_H
+
+int sys_cacheflush(unsigned long addr, unsigned long len, unsigned int op);
+long sys_fadvise64_64_wrapper(int fd, int advice, loff_t offset, loff_t len);
+asmlinkage int sys_syscall(void);
+asmlinkage int sys_rt_sigreturn_wrapper(void);
+
+#include <asm-generic/syscalls.h>
+
+#endif /* __ASM_NDS32_SYSCALLS_H */
arch/nds32/include/asm/unistd.h new file +21 -0
new file mode 100644
index 0000000..b30adca
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_CLONE
+#define __ARCH_WANT_SYS_OLD_MMAP
+
+#include <uapi/asm/unistd.h>
arch/nds32/include/uapi/asm/unistd.h new file +36 -0
new file mode 100644
index 0000000..01b466d
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define __ARCH_WANT_RENAMEAT
+#define __ARCH_WANT_SYSCALL_OFF_T
+
+/* Use the standard ABI for syscalls */
+#include <asm-generic/unistd.h>
+
+/* Additional NDS32 specific syscalls. */
+#define __NR_cacheflush		(__NR_arch_specific_syscall)
+#define __NR_syscall		(__NR_arch_specific_syscall + 1)
+#define __NR_ipc		(__NR_arch_specific_syscall + 2)
+#define __NR_sysfs		(__NR_arch_specific_syscall + 3)
+#define __NR__llseek             __NR_llseek
+__SYSCALL(__NR_cacheflush, sys_cacheflush)
+__SYSCALL(__NR_syscall, sys_syscall)
+__SYSCALL(__NR_ipc, sys_ipc)
+__SYSCALL(__NR_sysfs, sys_sysfs)
+
+__SYSCALL(__NR_fadvise64_64, sys_fadvise64_64_wrapper)
+__SYSCALL(__NR_rt_sigreturn, sys_rt_sigreturn_wrapper)
+__SYSCALL(__NR_mmap, sys_old_mmap)
arch/nds32/kernel/ex-scall.S new file +146 -0

146 lines not on this page · raw message

arch/nds32/kernel/sys_nds32.c new file +63 -0

63 lines not on this page · raw message

arch/nds32/kernel/syscall_table.c new file +28 -0
new file mode 100644
index 0000000..bafd896
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/syscalls.h>
+#include <linux/signal.h>
+#include <linux/unistd.h>
+#include <asm/syscalls.h>
+
+#undef __SYSCALL
+#define __SYSCALL(nr, call) [nr] = (call),
+
+void *sys_call_table[__NR_syscalls] __aligned(8192) = {
+	[0 ... __NR_syscalls - 1] = sys_ni_syscall,
+#include <asm/unistd.h>
+};
Signature · 1 line
1.7.9.5
maintainer
#42 lore raw

Re: [PATCH 15/31] nds32: System calls handling

arch/nds32/include/asm/unistd.h

Quoted 11 lines · Greentime Hu

From: Greentime Hu <[email protected]>

arch/nds32/include/asm/syscalls.h new file +1 -0
+#endif /* __ASM_NDS32_SYSCALLS_H */
arch/nds32/include/asm/unistd.h new file +1 -0
new file mode 100644
index 0000000..b30adca
@@ -0,0 +1,21 @@
 
+#define __ARCH_WANT_SYS_LLSEEK

This gets set from include/asm-generic/unistd.h if you include that file.

Quoted 1 line

+#define __ARCH_WANT_SYS_CLONE

This seems ok, though it would be nice to have the reverse logic and have architectures opt-out of the generic version when they need to provide their own, rather than having most architectures set it.

Quoted 1 line

+#define __ARCH_WANT_SYS_OLD_MMAP

I don't see why you need this, can it be dropped?

Quoted 10 lines
arch/nds32/include/uapi/asm/unistd.h new file +3 -0
new file mode 100644
index 0000000..01b466d
 
+#define __NR_ipc               (__NR_arch_specific_syscall + 2)
+#define __NR_sysfs             (__NR_arch_specific_syscall + 3)
+#define __NR__llseek             __NR_llseek
 

arch/nds32/include/uapi/asm/unistd.h line 36

Quoted 10 lines
arch/nds32/include/uapi/asm/unistd.h new file +8 -0
 
 
+__SYSCALL(__NR_cacheflush, sys_cacheflush)
+__SYSCALL(__NR_syscall, sys_syscall)
+__SYSCALL(__NR_ipc, sys_ipc)
+__SYSCALL(__NR_sysfs, sys_sysfs)
+
+__SYSCALL(__NR_fadvise64_64, sys_fadvise64_64_wrapper)
+__SYSCALL(__NR_rt_sigreturn, sys_rt_sigreturn_wrapper)
+__SYSCALL(__NR_mmap, sys_old_mmap)

Usually we handle those overrides by defining the macros in asm/unistd.h before including the asm-generic version. Can you do that as well for consistency?

I don't see a reason for sys_ipc, sys_sysfs or sys_old_mmap() here in a new architecture. Can you drop those or explain why you need them?

Quoted 15 lines
arch/nds32/include/uapi/asm/unistd.h new file +15 -0
+/*
+ * Special system call wrappers
+ *
+ * $r0 = syscall number
+ * $r8 = syscall table
+ */
+       .type   sys_syscall, #function
+ENTRY(sys_syscall)
+       addi    $p1, $r0, #-__NR_syscalls
+       bgtz    $p1, 3f
+       move    $p1, $r0
+       move    $r0, $r1
+       move    $r1, $r2
+       move    $r2, $r3
+       move    $r3, $r4

arch/nds32/include/uapi/asm/unistd.h

Quoted 10 lines
arch/nds32/include/uapi/asm/unistd.h new file +10 -0
+       move    $r4, $r5
+! add for syscall 6 args
+       lwi     $r5, [$sp + #SP_OFFSET ]
+       lwi     $r5, [$r5]
+! ~add for syscall 6 args
+
+       lw      $p1, [tbl+$p1<<2]
+       jr      $p1
+3:     b       sys_ni_syscall
+ENDPROC(sys_syscall)

Can you explain what this is used for?

Quoted 9 lines
arch/nds32/kernel/sys_nds32.c new file +7 -0
+
+long sys_mmap2(unsigned long addr, unsigned long len,
+              unsigned long prot, unsigned long flags,
+              unsigned long fd, unsigned long pgoff)
+{
+       if (pgoff & (~PAGE_MASK >> 12))
+               return -EINVAL;

arch/nds32/kernel/sys_nds32.c line 38

Quoted 10 lines
arch/nds32/kernel/sys_nds32.c new file +10 -0
+
+       return sys_mmap_pgoff(addr, len, prot, flags, fd,
+                             pgoff >> (PAGE_SHIFT - 12));
+}
+
+asmlinkage long sys_fadvise64_64_wrapper(int fd, int advice, loff_t offset,
+                                        loff_t len)
+{
+       return sys_fadvise64_64(fd, offset, len, advice);
+}

You should always use SYSCALL_DEFINE*() macros to define entry points for your own syscalls in C code for consistency. I also wonder if we should just move those two into common code, a lot of architectures need the first one in particular.

Arnd

A message that is not in the archive (sent off-list or not yet received): [email protected]

#44 lore raw

PATCH 15/31 nds32: System calls handling

Quoted 11 lines
Quoted 10 lines · Greentime Hu

From: Greentime Hu <[email protected]>

arch/nds32/include/asm/syscalls.h new file +1 -0
+#endif /* __ASM_NDS32_SYSCALLS_H */
(quoted diff) +0 -0

b/arch/nds32/include/asm/unistd.h new file mode 100644 index 0000000..b30adca

arch/nds32/include/asm/unistd.h new file +0 -0
@@ -0,0 +1,21 @@
Quoted 4 lines

arch/nds32/include/asm/unistd.h line 17

Quoted 1 line
arch/nds32/include/asm/unistd.h new file +1 -0
+#define __ARCH_WANT_SYS_LLSEEK

This gets set from include/asm-generic/unistd.h if you include that file.

Dear Arnd:

Thanks
I will remove it in the next version patch.

Quoted 4 lines

arch/nds32/include/asm/unistd.h line 18

Quoted 1 line
arch/nds32/include/asm/unistd.h new file +1 -0
+#define __ARCH_WANT_SYS_CLONE

This seems ok, though it would be nice to have the reverse logic and have architectures opt-out of the generic version when they need to provide their own, rather than having most architectures set it.

Thanks
I will provide nds32 SYSCALL_DEFINE_5(clone) in the next version patch.

Quoted 3 lines

arch/nds32/include/asm/unistd.h line 19

Quoted 1 line
arch/nds32/include/asm/unistd.h new file +1 -0
+#define __ARCH_WANT_SYS_OLD_MMAP

I don't see why you need this, can it be dropped?

Thanks
I will remove it in the next version patch.

Quoted 14 lines
Quoted 11 lines
arch/nds32/include/uapi/asm/unistd.h new file +3 -0
new file mode 100644
index 0000000..01b466d
 
+#define __NR_ipc               (__NR_arch_specific_syscall + 2)
+#define __NR_sysfs             (__NR_arch_specific_syscall + 3)
+#define __NR__llseek             __NR_llseek
Quoted 10 lines

arch/nds32/include/uapi/asm/unistd.h line 36

Quoted 7 lines
arch/nds32/include/uapi/asm/unistd.h new file +7 -0
+__SYSCALL(__NR_cacheflush, sys_cacheflush) __SYSCALL(__NR_syscall,
+sys_syscall) __SYSCALL(__NR_ipc, sys_ipc) __SYSCALL(__NR_sysfs,
+sys_sysfs)
+
+__SYSCALL(__NR_fadvise64_64, sys_fadvise64_64_wrapper)
+__SYSCALL(__NR_rt_sigreturn, sys_rt_sigreturn_wrapper)
+__SYSCALL(__NR_mmap, sys_old_mmap)

Usually we handle those overrides by defining the macros in asm/unistd.h before including the asm-generic version. Can you do that as well for consistency?

Thanks
Ok, I will modify it in the next version patch

Quoted 2 lines

I don't see a reason for sys_ipc, sys_sysfs or sys_old_mmap() here in a new architecture. Can you drop those or explain why you need them?

Thanks
I will remove them in the next version patch

Quoted 19 lines
Quoted 19 lines
arch/nds32/include/uapi/asm/unistd.h new file +19 -0
+/*
+ * Special system call wrappers
+ *
+ * $r0 = syscall number
+ * $r8 = syscall table
+ */
+       .type   sys_syscall, #function
+ENTRY(sys_syscall)
+       addi    $p1, $r0, #-__NR_syscalls
+       bgtz    $p1, 3f
+       move    $p1, $r0
+       move    $r0, $r1
+       move    $r1, $r2
+       move    $r2, $r3
+       move    $r3, $r4
+       move    $r4, $r5
+! add for syscall 6 args
+       lwi     $r5, [$sp + #SP_OFFSET ]
+       lwi     $r5, [$r5]
Quoted 9 lines
Quoted 6 lines

+! ~add for syscall 6 args

arch/nds32/include/uapi/asm/unistd.h new file +2 -0
+
+       lw      $p1, [tbl+$p1<<2]

.+ jr $p1
+3: b sys_ni_syscall
+ENDPROC(sys_syscall)

Can you explain what this is used for?

This is used to handle syscall(int number, ....).
Unlike other architectures, the system number shall be determined in compile time when issuing system call in nds32.
Therefore, we only can parse the content of syscall(int number, ....) and distribute it to destination handler in kernel space
(Other architecture can handle it in user space by glibc's syscall wrapper)

Quoted 9 lines
Quoted 9 lines
arch/nds32/kernel/sys_nds32.c new file +7 -0
+
+long sys_mmap2(unsigned long addr, unsigned long len,
+              unsigned long prot, unsigned long flags,
+              unsigned long fd, unsigned long pgoff) {
+       if (pgoff & (~PAGE_MASK >> 12))
+               return -EINVAL;
+
Quoted 9 lines

arch/nds32/kernel/sys_nds32.c

Quoted 6 lines
arch/nds32/kernel/sys_nds32.c new file +6 -0
+       return sys_mmap_pgoff(addr, len, prot, flags, fd,
+                             pgoff >> (PAGE_SHIFT - 12)); }
+
+asmlinkage long sys_fadvise64_64_wrapper(int fd, int advice, loff_t offset,
+                                        loff_t len) {
+       return sys_fadvise64_64(fd, offset, len, advice); }

You should always use SYSCALL_DEFINE*() macros to define entry points for your own syscalls in C code for consistency. I also wonder if we should just move those two into common code, a lot of architectures need the first one in particular.

The sys_fadvise64_64_wrapper is used to reorder the input parameter.

In order to solve register alignment problem, we adjust the input parameter order of fadvise64_64 while issuing this syscall. Therefore, we need this wrapper to reorder the input parameter to fit sys_fadvise64_64's API in kernel.

Quoted 1 line

Arnd

Best regard
Vincent

maintainer
#45 lore raw

Re: FW: [PATCH 15/31] nds32: System calls handling

Quoted 11 lines · Vincent Chen
Quoted 8 lines
Quoted 5 lines · Greentime Hu

From: Greentime Hu <[email protected]>

+#define __ARCH_WANT_SYS_CLONE

This seems ok, though it would be nice to have the reverse logic and have architectures opt-out of the generic version when they need to provide their own, rather than having most architectures set it.

Thanks
I will provide nds32 SYSCALL_DEFINE_5(clone) in the next version patch.

That's not what I meant, my suggestion is to create a new patch to remove the __ARCH_WANT_SYS_CLONE symbol from all architectures, and instead use something like __ARCH_HAVE_SYS_CLONE on architectures that do *not* want the generic implementation.

nds32 clearly wants the generic implementation here, it just shouldn't have to select that symbol to get it.

Quoted 29 lines
Quoted 19 lines
Quoted 19 lines
arch/nds32/kernel/ex-scall.S new file +19 -0
+/*
+ * Special system call wrappers
+ *
+ * $r0 = syscall number
+ * $r8 = syscall table
+ */
+       .type   sys_syscall, #function
+ENTRY(sys_syscall)
+       addi    $p1, $r0, #-__NR_syscalls
+       bgtz    $p1, 3f
+       move    $p1, $r0
+       move    $r0, $r1
+       move    $r1, $r2
+       move    $r2, $r3
+       move    $r3, $r4
+       move    $r4, $r5
+! add for syscall 6 args
+       lwi     $r5, [$sp + #SP_OFFSET ]
+       lwi     $r5, [$r5]
Quoted 9 lines
Quoted 6 lines

+! ~add for syscall 6 args

arch/nds32/kernel/ex-scall.S new file +2 -0
+
+       lw      $p1, [tbl+$p1<<2]

.+ jr $p1
+3: b sys_ni_syscall
+ENDPROC(sys_syscall)

Can you explain what this is used for?

Quoted 6 lines

This is used to handle syscall(int number, ....).
Unlike other architectures, the system number shall be determined in compile time when issuing system call in nds32.
Therefore, we only can parse the content of syscall(int number, ....) and distribute it to destination handler in kernel space
(Other architecture can handle it in user space by glibc's syscall wrapper)

Hmm, I think other architectures that run into this problem use self-modifying code for syscall(), but that is also ugly as it requires having a page that is both writable and executable.

I think your approach can be tricky for things like seccomp(). It's possible that you get all of it right, but if you can come up with a different solution, that might be better.

How much would it cost to simply always pass the syscall number in a register, and not use the immediate argument at all?

Quoted 19 lines
Quoted 9 lines
Quoted 9 lines
arch/nds32/kernel/sys_nds32.c new file +7 -0
+
+long sys_mmap2(unsigned long addr, unsigned long len,
+              unsigned long prot, unsigned long flags,
+              unsigned long fd, unsigned long pgoff) {
+       if (pgoff & (~PAGE_MASK >> 12))
+               return -EINVAL;
+
Quoted 9 lines

arch/nds32/kernel/sys_nds32.c

Quoted 6 lines
arch/nds32/kernel/sys_nds32.c new file +6 -0
+       return sys_mmap_pgoff(addr, len, prot, flags, fd,
+                             pgoff >> (PAGE_SHIFT - 12)); }
+
+asmlinkage long sys_fadvise64_64_wrapper(int fd, int advice, loff_t offset,
+                                        loff_t len) {
+       return sys_fadvise64_64(fd, offset, len, advice); }

You should always use SYSCALL_DEFINE*() macros to define entry points for your own syscalls in C code for consistency. I also wonder if we should just move those two into common code, a lot of architectures need the first one in particular.

Quoted 6 lines

The sys_fadvise64_64_wrapper is used to reorder the input parameter.

In order to solve register alignment problem, we adjust the input parameter order of fadvise64_64 while issuing this syscall. Therefore, we need this wrapper to reorder the input parameter to fit sys_fadvise64_64's API in kernel.

I understand what it's used for, it's just that I would recommend writing it differently, as

SYSCALL_DEFINE4(fadvise64_64_wrapper, int, fd, int, advice, loff_t, offset, loff_t, len)

{
       return sys_fadvise64_64(fd, offset, len, advice);
}

Arnd

#46 lore raw

Re: FW: [PATCH 15/31] nds32: System calls handling

2017-11-13 19:42 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 61 lines · Vincent Chen
Quoted 11 lines
Quoted 8 lines
Quoted 5 lines · Greentime Hu

From: Greentime Hu <[email protected]>

+#define __ARCH_WANT_SYS_CLONE

This seems ok, though it would be nice to have the reverse logic and have architectures opt-out of the generic version when they need to provide their own, rather than having most architectures set it.

Thanks
I will provide nds32 SYSCALL_DEFINE_5(clone) in the next version patch.

That's not what I meant, my suggestion is to create a new patch to remove the __ARCH_WANT_SYS_CLONE symbol from all architectures, and instead use something like __ARCH_HAVE_SYS_CLONE on architectures that do *not* want the generic implementation.

nds32 clearly wants the generic implementation here, it just shouldn't have to select that symbol to get it.

Quoted 29 lines
Quoted 19 lines
Quoted 19 lines
arch/nds32/kernel/ex-scall.S new file +19 -0
+/*
+ * Special system call wrappers
+ *
+ * $r0 = syscall number
+ * $r8 = syscall table
+ */
+       .type   sys_syscall, #function
+ENTRY(sys_syscall)
+       addi    $p1, $r0, #-__NR_syscalls
+       bgtz    $p1, 3f
+       move    $p1, $r0
+       move    $r0, $r1
+       move    $r1, $r2
+       move    $r2, $r3
+       move    $r3, $r4
+       move    $r4, $r5
+! add for syscall 6 args
+       lwi     $r5, [$sp + #SP_OFFSET ]
+       lwi     $r5, [$r5]
Quoted 9 lines
Quoted 6 lines

+! ~add for syscall 6 args

arch/nds32/kernel/ex-scall.S new file +2 -0
+
+       lw      $p1, [tbl+$p1<<2]

.+ jr $p1
+3: b sys_ni_syscall
+ENDPROC(sys_syscall)

Can you explain what this is used for?

Quoted 6 lines

This is used to handle syscall(int number, ....).
Unlike other architectures, the system number shall be determined in compile time when issuing system call in nds32.
Therefore, we only can parse the content of syscall(int number, ....) and distribute it to destination handler in kernel space
(Other architecture can handle it in user space by glibc's syscall wrapper)

Hmm, I think other architectures that run into this problem use self-modifying code for syscall(), but that is also ugly as it requires having a page that is both writable and executable.

Quoted 7 lines

I think your approach can be tricky for things like seccomp(). It's possible that you get all of it right, but if you can come up with a different solution, that might be better.

How much would it cost to simply always pass the syscall number in a register, and not use the immediate argument at all?

After re-evaluating the performance, we decide to use a particular register to transfer syscall number
instead of immediate argument. So, above sys_syscall will be removed in the next version patch

Thanks

Quoted 36 lines
Quoted 19 lines
Quoted 9 lines
Quoted 9 lines
arch/nds32/kernel/sys_nds32.c new file +7 -0
+
+long sys_mmap2(unsigned long addr, unsigned long len,
+              unsigned long prot, unsigned long flags,
+              unsigned long fd, unsigned long pgoff) {
+       if (pgoff & (~PAGE_MASK >> 12))
+               return -EINVAL;
+
Quoted 9 lines

arch/nds32/kernel/sys_nds32.c

Quoted 6 lines
arch/nds32/kernel/sys_nds32.c new file +6 -0
+       return sys_mmap_pgoff(addr, len, prot, flags, fd,
+                             pgoff >> (PAGE_SHIFT - 12)); }
+
+asmlinkage long sys_fadvise64_64_wrapper(int fd, int advice, loff_t offset,
+                                        loff_t len) {
+       return sys_fadvise64_64(fd, offset, len, advice); }

You should always use SYSCALL_DEFINE*() macros to define entry points for your own syscalls in C code for consistency. I also wonder if we should just move those two into common code, a lot of architectures need the first one in particular.

Quoted 6 lines

The sys_fadvise64_64_wrapper is used to reorder the input parameter.

In order to solve register alignment problem, we adjust the input parameter order of fadvise64_64 while issuing this syscall. Therefore, we need this wrapper to reorder the input parameter to fit sys_fadvise64_64's API in kernel.

I understand what it's used for, it's just that I would recommend writing it differently, as

SYSCALL_DEFINE4(fadvise64_64_wrapper, int, fd, int, advice, loff_t, offset, loff_t, len)

{
       return sys_fadvise64_64(fd, offset, len, advice);
}

Arnd

#47 lore raw

PATCH 16/31 nds32: VDSO support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/vdso.h              |   35 ++++
 arch/nds32/include/asm/vdso_datapage.h     |   51 ++++++
 arch/nds32/kernel/vdso.c                   |  243 ++++++++++++++++++++++++++
 arch/nds32/kernel/vdso/Makefile            |   82 +++++++++
 arch/nds32/kernel/vdso/datapage.S          |   34 ++++
 arch/nds32/kernel/vdso/gen_vdso_offsets.sh |   15 ++
 arch/nds32/kernel/vdso/gettimeofday.c      |  260 ++++++++++++++++++++++++++++
 arch/nds32/kernel/vdso/note.S              |   29 ++++
 arch/nds32/kernel/vdso/sigreturn.S         |   32 ++++
 arch/nds32/kernel/vdso/vdso.S              |   33 ++++
 arch/nds32/kernel/vdso/vdso.lds.S          |   87 ++++++++++
 11 files changed, 901 insertions(+)
 create mode 100644 arch/nds32/include/asm/vdso.h
 create mode 100644 arch/nds32/include/asm/vdso_datapage.h
 create mode 100644 arch/nds32/kernel/vdso.c
 create mode 100644 arch/nds32/kernel/vdso/Makefile
 create mode 100644 arch/nds32/kernel/vdso/datapage.S
 create mode 100755 arch/nds32/kernel/vdso/gen_vdso_offsets.sh
 create mode 100644 arch/nds32/kernel/vdso/gettimeofday.c
 create mode 100644 arch/nds32/kernel/vdso/note.S
 create mode 100644 arch/nds32/kernel/vdso/sigreturn.S
 create mode 100644 arch/nds32/kernel/vdso/vdso.S
 create mode 100644 arch/nds32/kernel/vdso/vdso.lds.S
arch/nds32/include/asm/vdso.h new file +35 -0
new file mode 100644
index 0000000..7298c49
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_VDSO_H
+#define __ASM_VDSO_H
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+
+#include <generated/vdso-offsets.h>
+
+#define VDSO_SYMBOL(base, name)						   \
+({									   \
+	(unsigned long)(vdso_offset_##name + (unsigned long)(base)); \
+})
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif /* __ASM_VDSO_H */
arch/nds32/include/asm/vdso_datapage.h new file +51 -0

51 lines not on this page · raw message

arch/nds32/kernel/vdso.c new file +243 -0

243 lines not on this page · raw message

arch/nds32/kernel/vdso/Makefile new file +82 -0

82 lines not on this page · raw message

arch/nds32/kernel/vdso/datapage.S new file +34 -0
new file mode 100644
index 0000000..d86af66
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+#include <asm/page.h>
+
+ENTRY(__get_timerpage)
+	sethi	$r0, hi20(. + PAGE_SIZE + 8)
+	ori	$r0, $r0, lo12(. + PAGE_SIZE + 4)
+	mfusr	$r1, $pc
+	sub	$r0, $r1, $r0
+	ret
+ENDPROC(__get_timerpage)
+
+ENTRY(__get_datapage)
+	sethi	$r0, hi20(. + 2*PAGE_SIZE + 8)
+	ori	$r0, $r0, lo12(. + 2*PAGE_SIZE + 4)
+	mfusr	$r1, $pc
+	sub	$r0, $r1, $r0
+	ret
+ENDPROC(__get_datapage)
arch/nds32/kernel/vdso/gen_vdso_offsets.sh new file +15 -0
new file mode 100755
index 0000000..01924ff
@@ -0,0 +1,15 @@
+#!/bin/sh
+
+#
+# Match symbols in the DSO that look like VDSO_*; produce a header file
+# of constant offsets into the shared object.
+#
+# Doing this inside the Makefile will break the $(filter-out) function,
+# causing Kbuild to rebuild the vdso-offsets header file every time.
+#
+# Author: Will Deacon <[email protected]
+#
+
+LC_ALL=C
+sed -n -e 's/^00*/0/' -e \
+'s/^\([0-9a-fA-F]*\) . VDSO_\([a-zA-Z0-9_]*\)$/\#define vdso_offset_\2\t0x\1/p'
arch/nds32/kernel/vdso/gettimeofday.c new file +260 -0

260 lines not on this page · raw message

arch/nds32/kernel/vdso/note.S new file +29 -0
new file mode 100644
index 0000000..59c6397
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2012 ARM Limited
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <[email protected]>
+ *
+ * This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
+ * Here we can supply some information useful to userland.
+ */
+
+#include <linux/uts.h>
+#include <linux/version.h>
+#include <linux/elfnote.h>
+
+ELFNOTE_START(Linux, 0, "a")
+	.long LINUX_VERSION_CODE
+ELFNOTE_END
arch/nds32/kernel/vdso/sigreturn.S new file +32 -0
new file mode 100644
index 0000000..e3cd9d7
@@ -0,0 +1,32 @@
+/*
+ * Sigreturn trampoline for returning from a signal when the SA_RESTORER
+ * flag is not set.
+ *
+ * Copyright (C) 2012 ARM Limited
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <[email protected]>
+ */
+
+#include <linux/linkage.h>
+#include <asm/unistd.h>
+
+	.text
+
+ENTRY(__kernel_rt_sigreturn)
+	.cfi_startproc
+	syscall	#__NR_rt_sigreturn
+	.cfi_endproc
+ENDPROC(__kernel_rt_sigreturn)
arch/nds32/kernel/vdso/vdso.S new file +33 -0
new file mode 100644
index 0000000..4444082
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 ARM Limited
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <[email protected]>
+ */
+
+#include <linux/init.h>
+#include <linux/linkage.h>
+#include <linux/const.h>
+#include <asm/page.h>
+
+	.globl vdso_start, vdso_end
+	.section .rodata
+	.balign PAGE_SIZE
+vdso_start:
+	.incbin "arch/nds32/kernel/vdso/vdso.so"
+	.balign PAGE_SIZE
+vdso_end:
+
+	.previous
arch/nds32/kernel/vdso/vdso.lds.S new file +87 -0

87 lines not on this page · raw message

Signature · 1 line
1.7.9.5
maintainer
#48 lore raw

Re: [PATCH 16/31] nds32: VDSO support

Quoted 21 lines · Greentime Hu
arch/nds32/include/asm/vdso_datapage.h new file +17 -0
@@ -0,0 +1,51 @@
 
+#ifndef __ASM_VDSO_DATAPAGE_H
+#define __ASM_VDSO_DATAPAGE_H
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+
+struct vdso_data {
+       bool cycle_count_down;  /* timer cyclye counter is decrease with time */
+       u32 cycle_count_offset; /* offset of timer cycle counter register */
+       u32 seq_count;          /* sequence count - odd during updates */
+       u32 xtime_coarse_sec;   /* coarse time */
+       u32 xtime_coarse_nsec;
+
+       u32 wtm_clock_sec;      /* wall to monotonic offset */
+       u32 wtm_clock_nsec;
+       u32 xtime_clock_sec;    /* CLOCK_REALTIME - seconds */

arch/nds32/include/asm/vdso_datapage.h line 45

Quoted 10 lines
arch/nds32/include/asm/vdso_datapage.h new file +10 -0
+       u32 cs_mult;            /* clocksource multiplier */
+       u32 cs_shift;           /* Cycle to nanosecond divisor (power of two) */
+
+       u64 cs_cycle_last;      /* last cycle value */
+       u64 cs_mask;            /* clocksource mask */
+
+       u64 xtime_clock_nsec;   /* CLOCK_REALTIME sub-ns base */
+       u32 tz_minuteswest;     /* timezone info for gettimeofday(2) */
+       u32 tz_dsttime;
+};

I need some insight from Deepa and Palmer here: to prepare for 64-bit time_t in the
future, would it make sense to define the vdso to use 64-bit seconds numbers consistently, and provide vdso symbols that return 64-bit times, having the glibc convert that to normal timespec values, or should we leave it for now?

For the normal syscalls I think we are better off keeping things consistent between architectures, but the vdso is architecture specific by definition, so we may as well use 64-bit times there now (same for risc-v, which still has time to modify this before the 4.15 release and glibc merge).

Quoted 4 lines
arch/nds32/include/asm/vdso_datapage.h new file +4 -0
+/*
+ * This controls what symbols we export from the DSO.
+ */
+VERSION

arch/nds32/include/asm/vdso_datapage.h

Quoted 10 lines
arch/nds32/include/asm/vdso_datapage.h new file +10 -0
+{
+       LINUX_2.6 {
+       global:
+               __kernel_rt_sigreturn;
+               __vdso_gettimeofday;
+               __vdso_clock_getres;
+               __vdso_clock_gettime;
+       local: *;
+       };
+}

I still struggle to understand how symbol versioning is supposed to work in a vdso (as opposed to a library you compile against), but I think this should use the version from the kernel that you plan to merge into, i.e. LINUX_4 or LINUX_4_16.

Arnd

#49 lore raw

Re: [PATCH 16/31] nds32: VDSO support

Quoted 31 lines · Arnd Bergmann
Quoted 29 lines · Greentime Hu
arch/nds32/include/asm/vdso_datapage.h new file +25 -0
@@ -0,0 +1,51 @@
 
+#ifndef __ASM_VDSO_DATAPAGE_H
+#define __ASM_VDSO_DATAPAGE_H
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+
+struct vdso_data {
+       bool cycle_count_down;  /* timer cyclye counter is decrease with time */
+       u32 cycle_count_offset; /* offset of timer cycle counter register */
+       u32 seq_count;          /* sequence count - odd during updates */
+       u32 xtime_coarse_sec;   /* coarse time */
+       u32 xtime_coarse_nsec;
+
+       u32 wtm_clock_sec;      /* wall to monotonic offset */
+       u32 wtm_clock_nsec;
+       u32 xtime_clock_sec;    /* CLOCK_REALTIME - seconds */
+       u32 cs_mult;            /* clocksource multiplier */
+       u32 cs_shift;           /* Cycle to nanosecond divisor (power of two) */
+
+       u64 cs_cycle_last;      /* last cycle value */
+       u64 cs_mask;            /* clocksource mask */
+
+       u64 xtime_clock_nsec;   /* CLOCK_REALTIME sub-ns base */
+       u32 tz_minuteswest;     /* timezone info for gettimeofday(2) */
Quoted 8 lines

arch/nds32/include/asm/vdso_datapage.h line 45

Quoted 2 lines
arch/nds32/include/asm/vdso_datapage.h new file +2 -0
+       u32 tz_dsttime;
+};

I need some insight from Deepa and Palmer here: to prepare for 64-bit time_t in the
future, would it make sense to define the vdso to use 64-bit seconds numbers consistently, and provide vdso symbols that return 64-bit times, having the glibc convert that to normal timespec values, or should we leave it for now?

Other architectures also have a similar way of defining these as u32 (eg: x86) I think for performance reasons on 32 bit systems.
u32 still works until 2106 as the timekeeping structures are s64. I was planning to leave it that way for x86.
If this architecture can live with u64, then it will be better to use it here.

Quoted 4 lines

For the normal syscalls I think we are better off keeping things consistent between architectures, but the vdso is architecture specific by definition, so we may as well use 64-bit times there now (same for risc-v, which still has time to modify this before the 4.15 release and glibc merge).

But, I don't think this vdso can return 64 bit times without syscalls for the architecture also supporting that. The problem is that all fallback paths depend on syscalls directly.
Also I couldn't find any arch specific handling of vdso interfaces in glibc. I think they expect the vdso wrappers in the kernel to handle this part.

-Deepa

maintainer
#50 lore raw

Re: [PATCH 16/31] nds32: VDSO support

Quoted 11 lines · Deepa Dinamani
Quoted 9 lines · Arnd Bergmann

On Wed, Nov 8, 2017 at 6:55 AM, Greentime Hu <[email protected]> wrote:

I need some insight from Deepa and Palmer here: to prepare for 64-bit time_t in the
future, would it make sense to define the vdso to use 64-bit seconds numbers consistently, and provide vdso symbols that return 64-bit times, having the glibc convert that to normal timespec values, or should we leave it for now?

Quoted 4 lines

Other architectures also have a similar way of defining these as u32 (eg: x86) I think for performance reasons on 32 bit systems. u32 still works until 2106 as the timekeeping structures are s64. I was planning to leave it that way for x86.

Right, good point.

Quoted 1 line

If this architecture can live with u64, then it will be better to use it here.

As long as we don't need a division, using u64 is probably cheap enough, we already need the retry loop.

Quoted 11 lines
Quoted 4 lines

For the normal syscalls I think we are better off keeping things consistent between architectures, but the vdso is architecture specific by definition, so we may as well use 64-bit times there now (same for risc-v, which still has time to modify this before the 4.15 release and glibc merge).

But, I don't think this vdso can return 64 bit times without syscalls for the architecture also supporting that. The problem is that all fallback paths depend on syscalls directly.
Also I couldn't find any arch specific handling of vdso interfaces in glibc. I think they expect the vdso wrappers in the kernel to handle this part.

Do applications call into the vdso directly and expect to get a timespec out? If they always go through the C library as an intermediate, then the glibc clock_gettime() could do the conversion.

Arnd

#51 lore raw

Re: [PATCH 16/31] nds32: VDSO support

Quoted 3 lines

Do applications call into the vdso directly and expect to get a timespec out? If they always go through the C library as an intermediate, then the glibc clock_gettime() could do the conversion.

It is recommended that applications do not call vdso symbols directly. According to manpage:

"If you're trying to call the vDSO in your own application rather than using the C library, you're most likely doing it wrong."

-Deepa

#52 lore raw

PATCH 17/31 nds32: Signal handling support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/uapi/asm/sigcontext.h |   73 ++++++
 arch/nds32/include/uapi/asm/signal.h     |   23 ++
 arch/nds32/kernel/signal.c               |  370 ++++++++++++++++++++++++++++++
 3 files changed, 466 insertions(+)
 create mode 100644 arch/nds32/include/uapi/asm/sigcontext.h
 create mode 100644 arch/nds32/include/uapi/asm/signal.h
 create mode 100644 arch/nds32/kernel/signal.c
arch/nds32/include/uapi/asm/sigcontext.h new file +73 -0
new file mode 100644
index 0000000..1c0dfcb
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ASMNDS32_SIGCONTEXT_H
+#define _ASMNDS32_SIGCONTEXT_H
+
+/*
+ * Signal context structure - contains all info to do with the state
+ * before the signal handler was invoked.  Note: only add new entries
+ * to the end of the structure.
+ */
+
+struct zol_struct {
+	unsigned long nds32_lc;	/* $LC */
+	unsigned long nds32_le;	/* $LE */
+	unsigned long nds32_lb;	/* $LB */
+};
+
+struct sigcontext {
+	unsigned long trap_no;
+	unsigned long error_code;
+	unsigned long oldmask;
+	unsigned long nds32_r0;
+	unsigned long nds32_r1;
+	unsigned long nds32_r2;
+	unsigned long nds32_r3;
+	unsigned long nds32_r4;
+	unsigned long nds32_r5;
+	unsigned long nds32_r6;
+	unsigned long nds32_r7;
+	unsigned long nds32_r8;
+	unsigned long nds32_r9;
+	unsigned long nds32_r10;
+	unsigned long nds32_r11;
+	unsigned long nds32_r12;
+	unsigned long nds32_r13;
+	unsigned long nds32_r14;
+	unsigned long nds32_r15;
+	unsigned long nds32_r16;
+	unsigned long nds32_r17;
+	unsigned long nds32_r18;
+	unsigned long nds32_r19;
+	unsigned long nds32_r20;
+	unsigned long nds32_r21;
+	unsigned long nds32_r22;
+	unsigned long nds32_r23;
+	unsigned long nds32_r24;
+	unsigned long nds32_r25;
+	unsigned long nds32_fp;	/* $r28 */
+	unsigned long nds32_gp;	/* $r29 */
+	unsigned long nds32_lp;	/* $r30 */
+	unsigned long nds32_sp;	/* $r31 */
+	unsigned long nds32_ipc;
+	unsigned long fault_address;
+	unsigned long used_math_flag;
+	/* FPU Registers */
+	struct zol_struct zol;
+};
+
+#endif
arch/nds32/include/uapi/asm/signal.h new file +23 -0
new file mode 100644
index 0000000..5ef6915
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ASMNDS32_SIGNAL_H
+#define _ASMNDS32_SIGNAL_H
+
+#define SA_RESTORER	0x04000000
+
+#include <asm-generic/signal.h>
+#endif
arch/nds32/kernel/signal.c new file +370 -0

370 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#53 lore raw

Re: [PATCH 17/31] nds32: Signal handling support

Quoted 3 lines · Greentime Hu
arch/nds32/kernel/signal.c new file +3 -0
+static int restore_sigframe(struct pt_regs *regs,
+			    struct rt_sigframe __user * sf)
+{

[snip]

arch/nds32/kernel/signal.c line 86

Quoted 1 line
arch/nds32/kernel/signal.c new file +1 -0
+	err |= !valid_user_regs(regs);

IDGI... Where do you modify ->ipsw at all and how can valid_user_regs() come to be false here?

Quoted 22 lines
arch/nds32/kernel/signal.c new file +22 -0
+asmlinkage int sys_rt_sigreturn(struct pt_regs *regs)
+{
+	struct rt_sigframe __user *frame;
+
+	/* Always make any pending restarted system calls return -EINTR */
+	current->restart_block.fn = do_no_restart_syscall;
+
+	/*
+	 * Since we stacked the signal on a 64-bit boundary,
+	 * then 'sp' should be two-word aligned here.  If it's
+	 * not, then the user is trying to mess with us.
+	 */
+	if (regs->sp & 7)
+		goto badframe;
+
+	frame = (struct rt_sigframe __user *)regs->sp;
+
+	if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+		goto badframe;
+
+	if (restore_sigframe(regs, frame))
+		goto badframe;

arch/nds32/kernel/signal.c line 122

Quoted 10 lines
arch/nds32/kernel/signal.c new file +10 -0
+
+	if (restore_altstack(&frame->uc.uc_stack))
+		goto badframe;
+
+	return regs->uregs[0];
+
+badframe:
+	force_sig(SIGSEGV, current);
+	return 0;
+}

AFAICS, you are copying arm; take a good look at sys_rt_sigreturn_wrapper there - specifically, the 'mov why, #0' part. Consider what happens if you get an interrupt at the moment when $r0 contains -ERESTARTSYS (for example) and signal arrives while we are processing the interrupt. It will be handled on the way out, without any syscall restart crap ('why' is 0 on that codepath). So far, so good, but think what'll happen when you are done with the signal handler. sigreturn() is called, the values we had stashed in sigcontext go back into registers (OK, pt_regs on kernel stack that will be used to reload the registers on return to userland)... and the signals that had been blocked for the duration of handlers (see sa_mask in sigaction(2)) get unblocked. And it turns out that you have one of those pending - it had arrived while we'd been in the handler.

Now we are fucked. You have TIF_SIGPENDING set, so do_notify_resume() is called. And everything looks exactly as if you had a syscall restart situation - regs->uregs[0] being one of -ERESTART... and 'syscall' flag being true. So we go into the second signal handler (as we ought to) with saved ->ipc set 4 bytes back from where we were going to return. It would've been the right thing to do if it *was* a syscall restart, but we were returning to the location where the original interrupt had caught us.

Result: with the right timing, an interrupt arriving when userland process has $r0 equal -512 may lead to instruction pointer jumping 4 bytes back. Pity the poor sod trying to debug that kind of breakage...

Restart should *NOT* be triggered upon sigreturn(2).

arch/nds32/kernel/signal.c line 209

Quoted 8 lines
arch/nds32/kernel/signal.c new file +8 -0
+static int
+setup_return(struct pt_regs *regs, struct ksignal *ksig, void __user * frame)
+{
+	unsigned long handler = (unsigned long)ksig->ka.sa.sa_handler;
+	unsigned long retcode;
+
+	/*
+	 * Maybe we need to deliver a 32-bit signal to a 26-bit task.

Deliver to what, again? That comment made sense (if rather sad one) on arm, but what is it doing here?

Quoted 4 lines
arch/nds32/kernel/signal.c new file +4 -0
+static int do_signal(struct pt_regs *regs, int syscall)
+{
+	unsigned int retval = 0, continue_addr = 0, restart_addr = 0;
+	struct ksignal ksig;

arch/nds32/kernel/signal.c line 302

Quoted 10 lines
arch/nds32/kernel/signal.c new file +10 -0
+	int restart = 0;
+
+	/*
+	 * We want the common case to go fast, which
+	 * is why we may in certain cases get here from
+	 * kernel mode. Just return without doing anything
+	 * if so.
+	 */
+	if (!user_mode(regs))
+		return 0;

Which cases would those be?

A message that is not in the archive (sent off-list or not yet received): [email protected]

#55 lore raw

PATCH 17/31 nds32: Signal handling support

Quoted 9 lines
Quoted 2 lines
(quoted diff) +2 -0
+static int restore_sigframe(struct pt_regs *regs,
+                         struct rt_sigframe __user * sf) {

[snip]

Quoted 1 line

+ err |= !valid_user_regs(regs);

IDGI... Where do you modify ->ipsw at all and how can valid_user_regs() come to be false here?

Thanks.
This code is trivial and I will remove it in the next version patch

Quoted 25 lines
Quoted 25 lines
arch/nds32/kernel/signal.c new file +25 -0
+asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) {
+     struct rt_sigframe __user *frame;
+
+     /* Always make any pending restarted system calls return -EINTR */
+     current->restart_block.fn = do_no_restart_syscall;
+
+     /*
+      * Since we stacked the signal on a 64-bit boundary,
+      * then 'sp' should be two-word aligned here.  If it's
+      * not, then the user is trying to mess with us.
+      */
+     if (regs->sp & 7)
+             goto badframe;
+
+     frame = (struct rt_sigframe __user *)regs->sp;
+
+     if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+             goto badframe;
+
+     if (restore_sigframe(regs, frame))
+             goto badframe;
+
+     if (restore_altstack(&frame->uc.uc_stack))
+             goto badframe;
+
Quoted 8 lines

arch/nds32/kernel/signal.c

Quoted 6 lines
arch/nds32/kernel/signal.c new file +6 -0
+     return regs->uregs[0];
+
+badframe:
+     force_sig(SIGSEGV, current);
+     return 0;
+}\

AFAICS, you are copying arm; take a good look at sys_rt_sigreturn_wrapper there - specifically, the 'mov why, #0' part. Consider what happens if you get an interrupt at the moment when $r0 contains -ERESTARTSYS (for

example) and signal arrives while we are processing the interrupt. It will be handled on the way out, without any syscall restart crap ('why'
is 0 on that codepath). So far, so good, but think what'll happen when you are done with the signal handler. sigreturn() is called, the values we had stashed in sigcontext go back into registers (OK, pt_regs on kernel stack that will be used to reload the registers on return to userland)... and the signals that had been blocked for the duration of handlers (see sa_mask in sigaction(2)) get unblocked. And it turns out that you have one of those pending - it had arrived while we'd been in the handler.

Quoted 7 lines

Now we are fucked. You have TIF_SIGPENDING set, so do_notify_resume() is called. And everything looks exactly as if you had a syscall restart situation - regs->uregs[0] being one of -ERESTART... and 'syscall' flag being true. So we go into the second signal handler (as we ought to) with saved ->ipc set 4 bytes back from where we were going to return. It would've been the right thing to do if it *was* a syscall restart, but we were returning to the location where the original interrupt had caught us.

Result: with the right timing, an interrupt arriving when userland process has $r0 equal -512 may lead to instruction pointer jumping 4 bytes back. Pity the poor sod trying to debug that kind of breakage...

Restart should *NOT* be triggered upon sigreturn(2).

Thanks for your detailed description.
I got it and I will fix this bug in the next version patch

Quoted 12 lines

arch/nds32/kernel/signal.c line 209

Quoted 10 lines
arch/nds32/kernel/signal.c new file +8 -0
+static int
+setup_return(struct pt_regs *regs, struct ksignal *ksig, void __user
+* frame) {
+     unsigned long handler = (unsigned long)ksig->ka.sa.sa_handler;
+     unsigned long retcode;
+
+     /*
+      * Maybe we need to deliver a 32-bit signal to a 26-bit task.

Deliver to what, again? That comment made sense (if rather sad one) on arm, but what is it doing here?

Thanks.
I will remove it in the next version patch

Quoted 7 lines
Quoted 7 lines
arch/nds32/kernel/signal.c new file +7 -0
+static int do_signal(struct pt_regs *regs, int syscall) {
+     unsigned int retval = 0, continue_addr = 0, restart_addr = 0;
+     struct ksignal ksig;
+     int restart = 0;
+
+     /*
+      * We want the common case to go fast, which
Quoted 8 lines

arch/nds32/kernel/signal.c line 302

Quoted 6 lines
arch/nds32/kernel/signal.c new file +6 -0
+      * is why we may in certain cases get here from
+      * kernel mode. Just return without doing anything
+      * if so.
+      */
+     if (!user_mode(regs))
+             return 0;

Which cases would those be?

Thanks.
This code is trivial too. I will remove it in the next version patch

#56 lore raw

PATCH 18/31 nds32: Library functions

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/string.h  |   30 +++
 arch/nds32/include/asm/swab.h    |   48 +++++
 arch/nds32/include/asm/uaccess.h |  385 ++++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/nds32_ksyms.c  |   54 ++++++
 arch/nds32/lib/Makefile          |    4 +
 arch/nds32/lib/getuser.S         |   57 ++++++
 arch/nds32/lib/memcpy.S          |   93 +++++++++
 arch/nds32/lib/memmove.S         |   83 ++++++++
 arch/nds32/lib/memset.S          |   46 +++++
 arch/nds32/lib/memzero.S         |   31 +++
 arch/nds32/lib/putuser.S         |   53 ++++++
 arch/nds32/lib/uaccess.S         |  160 ++++++++++++++++
 12 files changed, 1044 insertions(+)
 create mode 100644 arch/nds32/include/asm/string.h
 create mode 100644 arch/nds32/include/asm/swab.h
 create mode 100644 arch/nds32/include/asm/uaccess.h
 create mode 100644 arch/nds32/kernel/nds32_ksyms.c
 create mode 100644 arch/nds32/lib/Makefile
 create mode 100644 arch/nds32/lib/getuser.S
 create mode 100644 arch/nds32/lib/memcpy.S
 create mode 100644 arch/nds32/lib/memmove.S
 create mode 100644 arch/nds32/lib/memset.S
 create mode 100644 arch/nds32/lib/memzero.S
 create mode 100644 arch/nds32/lib/putuser.S
 create mode 100644 arch/nds32/lib/uaccess.S
arch/nds32/include/asm/string.h new file +30 -0
new file mode 100644
index 0000000..cf4d4b8
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_NDS32_STRING_H
+#define __ASM_NDS32_STRING_H
+
+#define __HAVE_ARCH_MEMCPY
+extern void *memcpy(void *, const void *, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMMOVE
+extern void *memmove(void *, const void *, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMSET
+extern void *memset(void *, int, __kernel_size_t);
+
+extern void *memzero(void *ptr, __kernel_size_t n);
+#endif
arch/nds32/include/asm/swab.h new file +48 -0

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arch/nds32/include/asm/uaccess.h new file +385 -0

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arch/nds32/kernel/nds32_ksyms.c new file +54 -0

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arch/nds32/lib/Makefile new file +4 -0
new file mode 100644
index 0000000..4c53eb8
@@ -0,0 +1,4 @@
+lib-y		:= copy_page.o memcpy.o memmove.o   \
+		   memset.o memzero.o \
+		   uaccess.o getuser.o \
+		   putuser.o
arch/nds32/lib/getuser.S new file +57 -0

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arch/nds32/lib/memcpy.S new file +93 -0

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arch/nds32/lib/memmove.S new file +83 -0

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arch/nds32/lib/memset.S new file +46 -0

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arch/nds32/lib/memzero.S new file +31 -0
new file mode 100644
index 0000000..00c9996
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+
+	.text
+ENTRY(memzero)
+	beqz	$r1, 1f
+	push	$lp
+        move    $r2, $r1
+        move    $r1, #0
+	push	$r0
+        bal     memset
+	pop	$r0
+	pop	$lp
+1:
+        ret
+ENDPROC(memzero)
arch/nds32/lib/putuser.S new file +53 -0

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arch/nds32/lib/uaccess.S new file +160 -0

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Signature · 1 line
1.7.9.5
maintainer
#57 lore raw

Re: [PATCH 18/31] nds32: Library functions

Quoted 13 lines · Greentime Hu
arch/nds32/include/asm/uaccess.h new file +13 -0
+#define get_user(x,p)                                                  \
+       ({                                                              \
+               const register typeof(*(p)) __user *__p asm("$r0") = (p);\
+               register unsigned long __r2 asm("$r2");                 \
+               register int __e asm("$r0");                            \
+               switch (sizeof(*(__p))) {                               \
+               case 1:                                                 \
+                       __get_user_x(__r2, __p, __e, 1, "$lp");         \
+                       break;                                          \
+               case 2:                                                 \
+                       __get_user_x(__r2, __p, __e, 2, "$lp");         \
+                       break;                                          \
+               case 4:                                                 \

arch/nds32/include/asm/uaccess.h line 127

Quoted 10 lines
arch/nds32/include/asm/uaccess.h new file +10 -0
+                       __get_user_x(__r2, __p, __e, 4, "$lp");         \
+                       break;                                          \
+               case 8:                                                 \
+                       __get_user_x(__r2, __p, __e, 8, "$r3", "$lp");  \
+                       break;                                          \
+               default: __e = __get_user_bad(); break;                 \
+               }                                                       \
+               x = (typeof(*(p))) __r2;        \
+               __e;                                                    \
+       })

Something looks odd here: __get_user_bad above looks like it is meant to provide a link-time error

arch/nds32/lib/getuser.S line 50

Quoted 7 lines
arch/nds32/lib/getuser.S new file +7 -0
+__get_user_bad_8:
+       move    $r3, #0
+__get_user_bad:
+       move    $r2, #0
+       move    $r0, #-EFAULT
+       ret
+

but here you actually have a symbol with that name, it gets turned into a runtime error. I think the first one needs to get renamed to actually work as expected and force the link error in built-in code (it works in modules ins __get_user_bad is not exported).

arch/nds32/lib/putuser.S line 46

Quoted 5 lines
arch/nds32/lib/putuser.S new file +5 -0
+
+__put_user_bad:
+       move    $r0, #-EFAULT
+       ret
+

same here.

Arnd

#58 lore raw

Re: [PATCH 18/31] nds32: Library functions

In reply to Greentime Hu

arch/nds32/include/asm/uaccess.h line 100

Quoted 9 lines · Greentime Hu
arch/nds32/include/asm/uaccess.h new file +8 -0
+#define __range_ok(addr, size) (size <= get_fs() && addr <= (get_fs() -size))
+
+#define access_ok(type, addr, size)                 \
+	__range_ok((unsigned long)addr, (unsigned long)size)
 
+#define __get_user_x(__r2,__p,__e,__s,__i...)				\
+	   __asm__ __volatile__ (					\
+		__asmeq("%0", "$r0") __asmeq("%1", "$r2")		\
+		"bal	__get_user_" #__s				\

... which does not check access_ok() or do any visible equivalents; OK...

arch/nds32/include/asm/uaccess.h line 112

Quoted 8 lines
arch/nds32/include/asm/uaccess.h new file +8 -0
+#define get_user(x,p)							\
+	({								\
+		const register typeof(*(p)) __user *__p asm("$r0") = (p);\
+		register unsigned long __r2 asm("$r2");			\
+		register int __e asm("$r0");				\
+		switch (sizeof(*(__p))) {				\
+		case 1:							\
+			__get_user_x(__r2, __p, __e, 1, "$lp");		\

... and neither does this, which is almost certainly *not* OK.

Quoted 1 line

+#define put_user(x,p) \

Same here, AFAICS.

arch/nds32/include/asm/uaccess.h line 363

Quoted 9 lines
arch/nds32/include/asm/uaccess.h new file +8 -0
+extern unsigned long __arch_copy_from_user(void *to, const void __user * from,
+					   unsigned long n);
 
+static inline unsigned long raw_copy_from_user(void *to,
+					       const void __user * from,
+					       unsigned long n)
+{
+	return __arch_copy_from_user(to, from, n);
+}

Er... Why not call your __arch_... raw_... and be done with that?

arch/nds32/include/asm/uaccess.h line 372

Quoted 2 lines
arch/nds32/include/asm/uaccess.h new file +2 -0
+#define INLINE_COPY_FROM_USER
+#define INLINE_COPY_TO_USER

Are those actually worth bothering? IOW, have you compared behaviour with and without them?

arch/nds32/lib/uaccess.S line 40

Quoted 10 lines
arch/nds32/lib/uaccess.S new file +10 -0
+ENTRY(__arch_copy_to_user)
+	push	$r0
+	push	$r2
+	beqz	$r2, ctu_exit
+	srli	$p0, $r2, #2		! $p0 = number of word to clear
+	andi	$r2, $r2, #3		! Bytes less than a word to copy
+	beqz	$p0, byte_ctu		! Only less than a word to copy
+word_ctu:
+	lmw.bim	$p1, [$r1], $p1		! Load the next word
+USER(	smw.bim,$p1, [$r0], $p1)	! Store the next word

Umm... It's that happy with unaligned loads and stores? Your memcpy seems to be trying to avoid those...

arch/nds32/lib/uaccess.S line 64

Quoted 8 lines

+9001:

arch/nds32/lib/uaccess.S new file +7 -0
+	pop	$p1			! Original $r2, n
+	pop	$p0			! Original $r0, void *to
+	sub	$r1, $r0, $p0		! Bytes copied
+	sub	$r2, $p1, $r1		! Bytes left to copy
+	push	$lp
+	move	$r0, $p0
+	bal	memzero			! Clean up the memory

Just what memory are you zeroing here? The one you had been unable to store into in the first place?

arch/nds32/lib/uaccess.S line 116

Quoted 9 lines
arch/nds32/lib/uaccess.S new file +8 -0
+ENTRY(__arch_copy_from_user)
 
+9001:
+	pop	$p1			! Original $r2, n
+	pop	$p0			! Original $r0, void *to
+	sub	$r1, $r1, $p0		! Bytes copied
+	sub	$r2, $p1, $r1		! Bytes left to copy
+	push	$lp
+	bal	memzero			! Clean up the memory

Ditto, only this one is even worse - instead of just oopsing on you, it will quietly destroy data past the area you've copied into. raw_copy_..._user() MUST NOT ZERO ANYTHING. Ever.

A message that is not in the archive (sent off-list or not yet received): [email protected]

#60 lore raw

PATCH 18/31 nds32: Library functions

Quoted 24 lines

arch/nds32/include/asm/uaccess.h line 100

Quoted 12 lines · Greentime Hu
arch/nds32/include/asm/uaccess.h new file +9 -0
+#define __range_ok(addr, size) (size <= get_fs() && addr <= (get_fs()
+-size))
+
+#define access_ok(type, addr, size)                 \
+     __range_ok((unsigned long)addr, (unsigned long)size)
 
+#define __get_user_x(__r2,__p,__e,__s,__i...)                                \
+        __asm__ __volatile__ (                                       \
+             __asmeq("%0", "$r0") __asmeq("%1", "$r2")               \
+             "bal    __get_user_" #__s                               \

... which does not check access_ok() or do any visible equivalents; OK...

arch/nds32/include/asm/uaccess.h line 112

Quoted 8 lines
arch/nds32/include/asm/uaccess.h new file +8 -0
+#define get_user(x,p)                                                        \
+     ({                                                              \
+             const register typeof(*(p)) __user *__p asm("$r0") = (p);\
+             register unsigned long __r2 asm("$r2");                 \
+             register int __e asm("$r0");                            \
+             switch (sizeof(*(__p))) {                               \
+             case 1:                                                 \
+                     __get_user_x(__r2, __p, __e, 1, "$lp");         \
Quoted 5 lines

... and neither does this, which is almost certainly *not* OK.

Quoted 1 line

+#define put_user(x,p) \

Same here, AFAICS.

Thanks.
I will add access_ok() in get_user/put_user

Quoted 10 lines

arch/nds32/include/asm/uaccess.h

Quoted 8 lines
arch/nds32/include/asm/uaccess.h new file +7 -0
+extern unsigned long __arch_copy_from_user(void *to, const void __user * from,
+                                        unsigned long n);
 
+static inline unsigned long raw_copy_from_user(void *to,
+                                            const void __user * from,
+                                            unsigned long n)
+{
+     return __arch_copy_from_user(to, from, n); }

Er... Why not call your __arch_... raw_... and be done with that?

Thanks.
I will modify it in next patch version

Quoted 4 lines

arch/nds32/include/asm/uaccess.h line 372

Quoted 2 lines
arch/nds32/include/asm/uaccess.h new file +2 -0
+#define INLINE_COPY_FROM_USER
+#define INLINE_COPY_TO_USER

Are those actually worth bothering? IOW, have you compared behaviour with and without them?

We compared the assembly code of copy_from/to_user's caller function, and we think the performance is better by making copy_from/to_user as inline

Quoted 4 lines
Quoted 4 lines
arch/nds32/lib/uaccess.S new file +4 -0
+ENTRY(__arch_copy_to_user)
+     push    $r0
+     push    $r2
+     beqz    $r2, ctu_exit
Quoted 8 lines

arch/nds32/lib/uaccess.S line 40

Quoted 6 lines
arch/nds32/lib/uaccess.S new file +6 -0
+     srli    $p0, $r2, #2            ! $p0 = number of word to clear
+     andi    $r2, $r2, #3            ! Bytes less than a word to copy
+     beqz    $p0, byte_ctu           ! Only less than a word to copy
+word_ctu:
+     lmw.bim $p1, [$r1], $p1         ! Load the next word
+USER(        smw.bim,$p1, [$r0], $p1)        ! Store the next word

Umm... It's that happy with unaligned loads and stores? Your memcpy seems to be trying to avoid those...

Thanks.
This should be aligned loads and stores, too.
I will modify it in next version patch.

Quoted 21 lines

arch/nds32/lib/uaccess.S line 64

Quoted 8 lines

+9001:

arch/nds32/lib/uaccess.S new file +7 -0
+     pop     $p1                     ! Original $r2, n
+     pop     $p0                     ! Original $r0, void *to
+     sub     $r1, $r0, $p0           ! Bytes copied
+     sub     $r2, $p1, $r1           ! Bytes left to copy
+     push    $lp
+     move    $r0, $p0
+     bal     memzero                 ! Clean up the memory

Just what memory are you zeroing here? The one you had been unable to store into in the first place?

arch/nds32/lib/uaccess.S line 116

Quoted 9 lines
arch/nds32/lib/uaccess.S new file +8 -0
+ENTRY(__arch_copy_from_user)
 
+9001:
+     pop     $p1                     ! Original $r2, n
+     pop     $p0                     ! Original $r0, void *to
+     sub     $r1, $r1, $p0           ! Bytes copied
+     sub     $r2, $p1, $r1           ! Bytes left to copy
+     push    $lp
+     bal     memzero                 ! Clean up the memory
Quoted 1 line

Ditto, only this one is even worse - instead of just oopsing on you, it will quietly destroy data past the area you've copied into. raw_copy_..._user() MUST NOT ZERO ANYTHING. Ever.

Thanks
So, I should keep the area that we've copied into instead of zeroing the area even if unpredicted exception is happened. Right?

Best regards
Vincent

#61 lore raw

Re: Fwd: FW: [PATCH 18/31] nds32: Library functions

Quoted 3 lines · Vincent Chen

Thanks
So, I should keep the area that we've copied into instead of zeroing the area even if unpredicted exception is happened. Right?

Yes. Here's what's required: if raw_copy_{from,to}_user(from, to, size) returns n, we want
* 0 <= n <= size
* no bytes outside of to[0 .. size - n - 1] modified
* all bytes in that range replaced with corresponding bytes of range
from[0 .. size - n - 1]
* non-zero return values should happen only when some loads (in case
of raw_copy_from_user()) or stores (in case of raw_copy_to_user()) had failed. If everything could have been read and written, we must copy everything.
* return value should be equal to size only if no load or no store
had been possible. In all other cases you need to copy at least something. You don't have to squeeze all bytes that can be copied (you can, of course, but it's not required).
* you should not assume that failing load guarantees that subsequent
loads further into the same page will keep failing; normally they will, but relying upon that is asking for trouble. Several architectures had bugs of that sort, with varying amounts of nastiness happening when e.g. write(2) raced with mprotect(2) from another thread...

For almost any architecture these should be more or less parallel to memcpy(); the only exception I know of is the situation when cross-address-space copy has timing very different from that for normal load+store. s390 is that way - there's considerable overhead of setting such copying, and you really want it done in bigger chunks than would be optimal for memcpy(). uml is similar. However, generally it's memcpy tweaked to deal with exceptions.

#62 lore raw

PATCH 19/31 nds32: Debugging support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/uapi/asm/ptrace.h |   42 +++++
 arch/nds32/kernel/ptrace.c           |  325 ++++++++++++++++++++++++++++++++++
 2 files changed, 367 insertions(+)
 create mode 100644 arch/nds32/include/uapi/asm/ptrace.h
 create mode 100644 arch/nds32/kernel/ptrace.c
arch/nds32/include/uapi/asm/ptrace.h new file +42 -0
new file mode 100644
index 0000000..20f9718
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __UAPI_ASM_NDS32_PTRACE_H
+#define __UAPI_ASM_NDS32_PTRACE_H
+
+#ifndef __ASSEMBLY__
+
+/*
+ * User structures for general purpose register.
+ */
+struct user_pt_regs {
+	long uregs[26];
+	long fp;
+	long gp;
+	long lp;
+	long sp;
+	long ipc;
+#if defined(CONFIG_HWZOL)
+	long lb;
+	long le;
+	long lc;
+#else
+	long dummy[3];
+#endif
+	long syscallno;
+};
+#endif
+#endif
arch/nds32/kernel/ptrace.c new file +325 -0

325 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#63 lore raw

PATCH 20/31 nds32: L2 cache support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/l2_cache.h |  158 +++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/atl2c.c         |   77 ++++++++++++++++++
 2 files changed, 235 insertions(+)
 create mode 100644 arch/nds32/include/asm/l2_cache.h
 create mode 100644 arch/nds32/kernel/atl2c.c
arch/nds32/include/asm/l2_cache.h new file +158 -0
new file mode 100644
index 0000000..b8530bd
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef L2_CACHE_H
+#define L2_CACHE_H
+
+/* This is defined for head.S to use due to device tree is not yet built. */
+#define L2CC_PA_BASE		0x90F00000
+
+/* CCTL_CMD_OP */
+#define L2_CA_CONF_OFF		0x0
+#define	L2_IF_CONF_OFF		0x4
+#define L2CC_SETUP_OFF		0x8
+#define L2CC_PROT_OFF		0xC
+#define L2CC_CTRL_OFF		0x10
+#define L2_INT_EN_OFF           0x20
+#define L2_STA_OFF              0x24
+#define RDERR_ADDR_OFF		0x28
+#define WRERR_ADDR_OFF		0x2c
+#define EVDPTERR_ADDR_OFF	0x30
+#define IMPL3ERR_ADDR_OFF	0x34
+#define L2_CNT0_CTRL_OFF        0x40
+#define L2_EVNT_CNT0_OFF        0x44
+#define L2_CNT1_CTRL_OFF        0x48
+#define L2_EVNT_CNT1_OFF        0x4c
+#define L2_CCTL_CMD_OFF		0x60
+#define L2_CCTL_STATUS_OFF	0x64
+#define L2_LINE_TAG_OFF		0x68
+#define L2_LINE_DPT_OFF		0x70
+
+#define CCTL_CMD_L2_IX_INVAL    0x0
+#define CCTL_CMD_L2_PA_INVAL    0x1
+#define CCTL_CMD_L2_IX_WB       0x2
+#define CCTL_CMD_L2_PA_WB       0x3
+#define CCTL_CMD_L2_PA_WBINVAL  0x5
+#define CCTL_CMD_L2_SYNC        0xa
+
+/* CCTL_CMD_TYPE */
+#define CCTL_SINGLE_CMD         0
+#define CCTL_BLOCK_CMD          0x10
+#define CCTL_ALL_CMD		0x10
+
+/******************************************************************************
+ * L2_CA_CONF (Cache architecture configuration)
+ *****************************************************************************/
+#define L2_CA_CONF_offL2SET		0
+#define L2_CA_CONF_offL2WAY		4
+#define L2_CA_CONF_offL2CLSZ            8
+#define L2_CA_CONF_offL2DW		11
+#define L2_CA_CONF_offL2PT		14
+#define L2_CA_CONF_offL2VER		16
+
+#define L2_CA_CONF_mskL2SET	(0xFUL << L2_CA_CONF_offL2SET)
+#define L2_CA_CONF_mskL2WAY	(0xFUL << L2_CA_CONF_offL2WAY)
+#define L2_CA_CONF_mskL2CLSZ    (0x7UL << L2_CA_CONF_offL2CLSZ)
+#define L2_CA_CONF_mskL2DW	(0x7UL << L2_CA_CONF_offL2DW)
+#define L2_CA_CONF_mskL2PT	(0x3UL << L2_CA_CONF_offL2PT)
+#define L2_CA_CONF_mskL2VER	(0xFFFFUL << L2_CA_CONF_offL2VER)
+
+/******************************************************************************
+ * L2CC_SETUP (L2CC Setup register)
+ *****************************************************************************/
+#define L2CC_SETUP_offPART              0
+#define L2CC_SETUP_mskPART              (0x3UL << L2CC_SETUP_offPART)
+#define L2CC_SETUP_offDDLATC            4
+#define L2CC_SETUP_mskDDLATC            (0x3UL << L2CC_SETUP_offDDLATC)
+#define L2CC_SETUP_offTDLATC            8
+#define L2CC_SETUP_mskTDLATC            (0x3UL << L2CC_SETUP_offTDLATC)
+
+/******************************************************************************
+ * L2CC_PROT (L2CC Protect register)
+ *****************************************************************************/
+#define L2CC_PROT_offMRWEN              31
+#define L2CC_PROT_mskMRWEN      (0x1UL << L2CC_PROT_offMRWEN)
+
+/******************************************************************************
+ * L2_CCTL_STATUS_Mn (The L2CCTL command working status for Master n)
+ *****************************************************************************/
+#define L2CC_CTRL_offEN                 31
+#define L2CC_CTRL_mskEN                 (0x1UL << L2CC_CTRL_offEN)
+
+/******************************************************************************
+ * L2_CCTL_STATUS_Mn (The L2CCTL command working status for Master n)
+ *****************************************************************************/
+#define L2_CCTL_STATUS_offCMD_COMP      31
+#define L2_CCTL_STATUS_mskCMD_COMP      (0x1 << L2_CCTL_STATUS_offCMD_COMP)
+
+#ifndef __ASSEMBLY__
+extern void __iomem *atl2c_base;
+
+#include <linux/smp.h>
+#include <asm/io.h>
+#include <asm/bitfield.h>
+
+#define L2C_R_REG(offset)               __raw_readl(atl2c_base + offset)
+#define L2C_W_REG(offset, value)        __raw_writel(value, atl2c_base + offset)
+
+#define L2_CMD_RDY()    \
+        do{;}while((L2C_R_REG(L2_CCTL_STATUS_OFF) & L2_CCTL_STATUS_mskCMD_COMP) == 0)
+
+static inline unsigned long L2_CACHE_SET(void)
+{
+	return 64 << ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2SET) >>
+		      L2_CA_CONF_offL2SET);
+}
+
+static inline unsigned long L2_CACHE_WAY(void)
+{
+	return 1 +
+	    ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2WAY) >>
+	     L2_CA_CONF_offL2WAY);
+}
+
+static inline unsigned long L2_CACHE_LINE_SIZE(void)
+{
+
+	return 4 << ((L2C_R_REG(L2_CA_CONF_OFF) & L2_CA_CONF_mskL2CLSZ) >>
+		     L2_CA_CONF_offL2CLSZ);
+}
+
+static inline unsigned long GET_L2CC_CTRL_CPU(unsigned long cpu)
+{
+	if (cpu == smp_processor_id())
+		return L2C_R_REG(L2CC_CTRL_OFF);
+	return L2C_R_REG(L2CC_CTRL_OFF + (cpu << 8));
+}
+
+static inline void SET_L2CC_CTRL_CPU(unsigned long cpu, unsigned long val)
+{
+	if (cpu == smp_processor_id())
+		L2C_W_REG(L2CC_CTRL_OFF, val);
+	else
+		L2C_W_REG(L2CC_CTRL_OFF + (cpu << 8), val);
+}
+
+static inline unsigned long GET_L2CC_STATUS_CPU(unsigned long cpu)
+{
+	if (cpu == smp_processor_id())
+		return L2C_R_REG(L2_CCTL_STATUS_OFF);
+	return L2C_R_REG(L2_CCTL_STATUS_OFF + (cpu << 8));
+}
+
+#endif
+
+#endif
arch/nds32/kernel/atl2c.c new file +77 -0

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Signature · 1 line
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maintainer
#64 lore raw

Re: [PATCH 20/31] nds32: L2 cache support

arch/nds32/include/asm/l2_cache.h line 21

Quoted 8 lines · Greentime Hu

From: Greentime Hu <[email protected]>

arch/nds32/include/asm/l2_cache.h new file +3 -0
+
+/* This is defined for head.S to use due to device tree is not yet built. */
+#define L2CC_PA_BASE           0x90F00000

This looks problematic, since it prevents you from using the same head.S for multiple SoCs that have different L2 controllers or that have them at different addresses.

What does head.S actually do to the L2CC? Could the boot protocol require that to be done by the boot loader before entering the kernel instead?

Arnd

#65 lore raw

Re: [PATCH 20/31] nds32: L2 cache support

2017-11-08 17:48 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 14 lines · Greentime Hu

arch/nds32/include/asm/l2_cache.h line 21

Quoted 8 lines

From: Greentime Hu <[email protected]>

arch/nds32/include/asm/l2_cache.h new file +3 -0
+
+/* This is defined for head.S to use due to device tree is not yet built. */
+#define L2CC_PA_BASE           0x90F00000

This looks problematic, since it prevents you from using the same head.S for multiple SoCs that have different L2 controllers or that have them at different addresses.

Quoted 3 lines

What does head.S actually do to the L2CC? Could the boot protocol require that to be done by the boot loader before entering the kernel instead?

Thanks.
It will disable and invalidate L2 cache. I think we can do these things in bootloader.
I will refine it in the next version patch.

#66 lore raw

PATCH 21/31 nds32: Loadable modules

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/module.h |   24 ++++
 arch/nds32/kernel/module.c      |  299 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 323 insertions(+)
 create mode 100644 arch/nds32/include/asm/module.h
 create mode 100644 arch/nds32/kernel/module.c
arch/nds32/include/asm/module.h new file +24 -0
new file mode 100644
index 0000000..5ed2b75
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _ASM_NDS32_MODULE_H
+#define _ASM_NDS32_MODULE_H
+
+#include <asm-generic/module.h>
+
+#define MODULE_ARCH_VERMAGIC	"NDS32v3"
+
+#endif /* _ASM_NDS32_MODULE_H */
arch/nds32/kernel/module.c new file +299 -0

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#67 lore raw

PATCH 22/31 nds32: Generic timers support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/kernel/time.c |   22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 arch/nds32/kernel/time.c
arch/nds32/kernel/time.c new file +22 -0
new file mode 100644
index 0000000..96e2f87
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/clocksource.h>
+
+void __init time_init(void)
+{
+	timer_probe();
+}
Signature · 1 line
1.7.9.5
#68 lore raw

PATCH 23/31 nds32: Device tree support

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/boot/dts/Makefile   |    8 ++++++
 arch/nds32/boot/dts/ae3xx.dts  |   55 ++++++++++++++++++++++++++++++++++++
 arch/nds32/boot/dts/ag101p.dts |   60 ++++++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/devtree.c    |   45 ++++++++++++++++++++++++++++++
 4 files changed, 168 insertions(+)
 create mode 100644 arch/nds32/boot/dts/Makefile
 create mode 100644 arch/nds32/boot/dts/ae3xx.dts
 create mode 100644 arch/nds32/boot/dts/ag101p.dts
 create mode 100644 arch/nds32/kernel/devtree.c
arch/nds32/boot/dts/Makefile new file +8 -0
new file mode 100644
index 0000000..d31faa8
@@ -0,0 +1,8 @@
+ifneq '$(CONFIG_NDS32_BUILTIN_DTB)' '""'
+BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_NDS32_BUILTIN_DTB)).dtb.o
+else
+BUILTIN_DTB :=
+endif
+obj-$(CONFIG_OF) += $(BUILTIN_DTB)
+
+clean-files := *.dtb *.dtb.S
arch/nds32/boot/dts/ae3xx.dts new file +55 -0

55 lines not on this page · raw message

arch/nds32/boot/dts/ag101p.dts new file +60 -0

60 lines not on this page · raw message

arch/nds32/kernel/devtree.c new file +45 -0

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maintainer
#69 lore raw

Re: [PATCH 23/31] nds32: Device tree support

Quoted 21 lines · Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/boot/dts/Makefile   |    8 ++++++
 arch/nds32/boot/dts/ae3xx.dts  |   55 ++++++++++++++++++++++++++++++++++++
 arch/nds32/boot/dts/ag101p.dts |   60 ++++++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/devtree.c    |   45 ++++++++++++++++++++++++++++++
 4 files changed, 168 insertions(+)
 create mode 100644 arch/nds32/boot/dts/Makefile
 create mode 100644 arch/nds32/boot/dts/ae3xx.dts
 create mode 100644 arch/nds32/boot/dts/ag101p.dts
 create mode 100644 arch/nds32/kernel/devtree.c
arch/nds32/boot/dts/Makefile new file +0 -0
new file mode 100644
index 0000000..d31faa8

arch/nds32/boot/dts/Makefile line 6

Quoted 6 lines
arch/nds32/boot/dts/Makefile new file +6 -0
@@ -0,0 +1,8 @@
+ifneq '$(CONFIG_NDS32_BUILTIN_DTB)' '""'
+BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_NDS32_BUILTIN_DTB)).dtb.o
+else
+BUILTIN_DTB :=
+endif
+obj-$(CONFIG_OF) += $(BUILTIN_DTB)

For new architectures, I think it's better to not support built-in dtb but instead require the
boot loader to be aware of device trees.

arch/nds32/boot/dts/ae3xx.dts line 3

Quoted 10 lines
arch/nds32/boot/dts/Makefile new file +1 -0
+clean-files := *.dtb *.dtb.S
arch/nds32/boot/dts/ae3xx.dts new file +3 -0
new file mode 100644
index 0000000..b6c85dc
@@ -0,0 +1,55 @@
+/dts-v1/;
+/ {
+       compatible = "nds32 ae3xx";

ae3xx looks like a wildcard name for multiple boards. Please always have compatible
names without wildcards. You usually also want to list both the SoC and the board
here.

arch/nds32/boot/dts/ae3xx.dts line 10

Quoted 7 lines
arch/nds32/boot/dts/ae3xx.dts new file +7 -0
+       #address-cells = <1>;
+       #size-cells = <1>;
+       interrupt-parent = <&intc>;
+
+       chosen {
+               bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7";
+       };

Remove the earlyprintk option from the bootargs here, regular boards should never rely
on earlyprintk. The "earlycon" support in the uart drivers works almost as well (it starts
slightly later in the boot process), and it will pick up the uart from the chosen/stdout-path
property.

arch/nds32/boot/dts/ae3xx.dts line 15

Quoted 5 lines
arch/nds32/boot/dts/ae3xx.dts new file +5 -0
+       if (!params || !early_init_dt_scan(params)) {
+               pr_crit("\n"
+                       "Error: invalid device tree blob at (virtual address 0x%p)\n"
+                       "The dtb must be 8-byte aligned and must not exceed 8 KB in size\n"
+                       "\nPlease check your bootloader.", params);

What is the 8KB limit for the dtb for? This sounds really limiting once you get to
more complex SoCs.

Arnd

#70 lore raw

Re: [PATCH 23/31] nds32: Device tree support

2017-11-08 17:53 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 16 lines · Greentime Hu
Quoted 15 lines

From: Greentime Hu <[email protected]>

---
 arch/nds32/boot/dts/Makefile   |    8 ++++++
 arch/nds32/boot/dts/ae3xx.dts  |   55 ++++++++++++++++++++++++++++++++++++
 arch/nds32/boot/dts/ag101p.dts |   60 ++++++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/devtree.c    |   45 ++++++++++++++++++++++++++++++
 4 files changed, 168 insertions(+)
 create mode 100644 arch/nds32/boot/dts/Makefile
 create mode 100644 arch/nds32/boot/dts/ae3xx.dts
 create mode 100644 arch/nds32/boot/dts/ag101p.dts
 create mode 100644 arch/nds32/kernel/devtree.c
Quoted 16 lines

arch/nds32/boot/dts/Makefile line 6

Quoted 12 lines
arch/nds32/boot/dts/Makefile new file +6 -0
new file mode 100644
index 0000000..d31faa8
@@ -0,0 +1,8 @@
+ifneq '$(CONFIG_NDS32_BUILTIN_DTB)' '""'
+BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_NDS32_BUILTIN_DTB)).dtb.o
+else
+BUILTIN_DTB :=
+endif
+obj-$(CONFIG_OF) += $(BUILTIN_DTB)

For new architectures, I think it's better to not support built-in dtb but instead require the
boot loader to be aware of device trees.

Thanks.
I got your point and we have uboot supporting DTB too.
But we use gdb to load vmlinux without uboot sometimes, it can help us to verify kernel more easily.
If dtb pointer is set by uboot, we will use it instead of using built-in dtb.

Quoted 8 lines
Quoted 8 lines
arch/nds32/boot/dts/Makefile new file +1 -0
+clean-files := *.dtb *.dtb.S
arch/nds32/boot/dts/ae3xx.dts new file +1 -0
new file mode 100644
index 0000000..b6c85dc
@@ -0,0 +1,55 @@
+/dts-v1/;
Quoted 8 lines

arch/nds32/boot/dts/ae3xx.dts line 3

Quoted 2 lines
arch/nds32/boot/dts/ae3xx.dts new file +2 -0
+/ {
+       compatible = "nds32 ae3xx";

ae3xx looks like a wildcard name for multiple boards. Please always have compatible
names without wildcards. You usually also want to list both the SoC and the board
here.

Thanks.
It looks a little bit weird but its not a wildcards. :p
I will list all the names instead of wildcards if I need to add more platforms.

Quoted 8 lines

arch/nds32/boot/dts/ae3xx.dts line 10

Quoted 7 lines
arch/nds32/boot/dts/ae3xx.dts new file +7 -0
+       #address-cells = <1>;
+       #size-cells = <1>;
+       interrupt-parent = <&intc>;
+
+       chosen {
+               bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7";
+       };
Quoted 7 lines

Remove the earlyprintk option from the bootargs here, regular boards should never rely
on earlyprintk. The "earlycon" support in the uart drivers works almost as well (it starts
slightly later in the boot process), and it will pick up the uart from the chosen/stdout-path
property.

Thanks.
I will remove it.

Quoted 9 lines

arch/nds32/boot/dts/ae3xx.dts line 15

Quoted 5 lines
arch/nds32/boot/dts/ae3xx.dts new file +5 -0
+       if (!params || !early_init_dt_scan(params)) {
+               pr_crit("\n"
+                       "Error: invalid device tree blob at (virtual address 0x%p)\n"
+                       "The dtb must be 8-byte aligned and must not exceed 8 KB in size\n"
+                       "\nPlease check your bootloader.", params);

What is the 8KB limit for the dtb for? This sounds really limiting once you get to
more complex SoCs.

Thanks.
We allow uboot to set its start address and we think it might not be too big thus we limit it to 8KB.
Maybe I should use a big size for complex SoCs.
I will update it in the next version patch.

#71 lore raw

PATCH 24/31 nds32: Miscellaneous header files

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/include/asm/delay.h            |   51 +++++++++++++++++++++++++++++
 arch/nds32/include/asm/linkage.h          |   24 ++++++++++++++
 arch/nds32/include/uapi/asm/byteorder.h   |   26 +++++++++++++++
 arch/nds32/include/uapi/asm/posix_types.h |   41 +++++++++++++++++++++++
 4 files changed, 142 insertions(+)
 create mode 100644 arch/nds32/include/asm/delay.h
 create mode 100644 arch/nds32/include/asm/linkage.h
 create mode 100644 arch/nds32/include/uapi/asm/byteorder.h
 create mode 100644 arch/nds32/include/uapi/asm/posix_types.h
arch/nds32/include/asm/delay.h new file +51 -0
new file mode 100644
index 0000000..bdeeb76
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_DELAY_H__
+#define __NDS32_DELAY_H__
+
+#include <asm/param.h>
+
+static inline void __delay(unsigned long loops)
+{
+	__asm__ __volatile__(".align 2\n"
+			     "1:\n"
+			     "\taddi\t%0, %0, -1\n"
+			     "\tbgtz\t%0, 1b\n"
+			     :"=r"(loops)
+			     :"0"(loops));
+}
+
+static inline void __udelay(unsigned long usecs, unsigned long lpj)
+{
+	usecs *= (unsigned long)(((0x8000000000000000ULL / (500000 / HZ)) +
+				  0x80000000ULL) >> 32);
+	usecs = (unsigned long)(((unsigned long long)usecs * lpj) >> 32);
+	__delay(usecs);
+}
+
+#define udelay(usecs) __udelay((usecs), loops_per_jiffy)
+
+/* make sure "usecs *= ..." in udelay do not overflow. */
+#if HZ >= 1000
+#define MAX_UDELAY_MS	1
+#elif HZ <= 200
+#define MAX_UDELAY_MS	5
+#else
+#define MAX_UDELAY_MS	(1000 / HZ)
+#endif
+
+#endif
arch/nds32/include/asm/linkage.h new file +24 -0
new file mode 100644
index 0000000..d17abd8
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+
+/* This file is required by include/linux/linkage.h */
+#define __ALIGN .align 2
+#define __ALIGN_STR ".align 2"
+
+#endif
arch/nds32/include/uapi/asm/byteorder.h new file +26 -0
new file mode 100644
index 0000000..198e8dd
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __NDS32_BYTEORDER_H__
+#define __NDS32_BYTEORDER_H__
+
+#ifdef __NDS32_EB__
+#include <linux/byteorder/big_endian.h>
+#else
+#include <linux/byteorder/little_endian.h>
+#endif
+
+#endif /* __NDS32_BYTEORDER_H__ */
arch/nds32/include/uapi/asm/posix_types.h new file +41 -0

41 lines not on this page · raw message

Signature · 1 line
1.7.9.5
maintainer
#72 lore raw

Re: [PATCH 24/31] nds32: Miscellaneous header files

arch/nds32/include/asm/delay.h line 30

Quoted 10 lines · Greentime Hu
arch/nds32/include/asm/delay.h new file +10 -0
+
+static inline void __delay(unsigned long loops)
+{
+       __asm__ __volatile__(".align 2\n"
+                            "1:\n"
+                            "\taddi\t%0, %0, -1\n"
+                            "\tbgtz\t%0, 1b\n"
+                            :"=r"(loops)
+                            :"0"(loops));
+}

Does the architecture define a high-resolution clock source? If yes, then it's better
to use that to get exact timing than to rely on the loop calibration.

Quoted 10 lines
arch/nds32/include/uapi/asm/posix_types.h new file +10 -0
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc.  Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned short __kernel_mode_t;
+#define __kernel_mode_t __kernel_mode_t
+
+typedef unsigned short __kernel_ipc_pid_t;

arch/nds32/include/uapi/asm/posix_types.h line 39

Quoted 10 lines
arch/nds32/include/uapi/asm/posix_types.h new file +10 -0
+#define __kernel_ipc_pid_t __kernel_ipc_pid_t
+
+typedef unsigned short __kernel_uid_t;
+typedef unsigned short __kernel_gid_t;
+#define __kernel_uid_t __kernel_uid_t
+
+typedef unsigned short __kernel_old_dev_t;
+#define __kernel_old_dev_t __kernel_old_dev_t
+
+#include <asm-generic/posix_types.h>

I don't understand why you would want to override any of those. Changing them unfortunately means rebuilding all of your user space, but I think it would be better to do that now than to suffer from this later on.

Arnd

#73 lore raw

PATCH 25/31 nds32: defconfig

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/configs/ae3xx_defconfig  |  110 +++++++++++++++++++++++++++++++++++
 arch/nds32/configs/ag101p_defconfig |  109 ++++++++++++++++++++++++++++++++++
 2 files changed, 219 insertions(+)
 create mode 100644 arch/nds32/configs/ae3xx_defconfig
 create mode 100644 arch/nds32/configs/ag101p_defconfig
arch/nds32/configs/ae3xx_defconfig new file +110 -0
new file mode 100644
index 0000000..14d49a3
@@ -0,0 +1,110 @@
+CONFIG_CROSS_COMPILE="nds32le-linux-"
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+CONFIG_PROFILING=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_HWZOL is not set
+CONFIG_ANDES_PAGE_SIZE_8KB=y
+CONFIG_NDS32_BUILTIN_DTB="ae3xx"
+CONFIG_PREEMPT=y
+# CONFIG_COMPACTION is not set
+CONFIG_HZ_100=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+CONFIG_BRIDGE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+CONFIG_FTMAC100=y
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_FB=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_HCTOSYS is not set
+CONFIG_CLKSRC_ATCPIT100=y
+CONFIG_EXT2_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_USE_LEGACY_DNS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_INFO_DWARF4=y
+CONFIG_GDB_SCRIPTS=y
+CONFIG_READABLE_ASM=y
+CONFIG_HEADERS_CHECK=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_PANIC_ON_OOPS=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_STACKTRACE=y
+CONFIG_RCU_CPU_STALL_TIMEOUT=300
+# CONFIG_CRYPTO_HW is not set
arch/nds32/configs/ag101p_defconfig new file +109 -0

109 lines not on this page · raw message

Signature · 1 line
1.7.9.5
maintainer
#74 lore raw

Re: [PATCH 25/31] nds32: defconfig

Quoted 7 lines · Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/configs/ae3xx_defconfig  |  110 +++++++++++++++++++++++++++++++++++
 arch/nds32/configs/ag101p_defconfig |  109 ++++++++++++++++++++++++++++++++++

Are those two incompatible? I would recommend starting without board specific defconfig
files, it just gets messy once you get more than a few machines you want to support.

Quoted 12 lines
arch/nds32/configs/ae3xx_defconfig new file +6 -0
new file mode 100644
index 0000000..14d49a3
@@ -0,0 +1,110 @@
+CONFIG_CROSS_COMPILE="nds32le-linux-"
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y

arch/nds32/configs/ae3xx_defconfig line 16

Quoted 10 lines
arch/nds32/configs/ae3xx_defconfig new file +10 -0
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y

You usually don't want to select 'CONFIG_EMBEDDED' for regular builds, it's should only be needed to disable options that are usually considered essential.

arch/nds32/configs/ae3xx_defconfig line 73

Quoted 3 lines
arch/nds32/configs/ae3xx_defconfig new file +3 -0
+CONFIG_FB=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y

You have a framebuffer console here, but no framebuffer driver?

arch/nds32/configs/ae3xx_defconfig line 84

Quoted 5 lines
arch/nds32/configs/ae3xx_defconfig new file +5 -0
+CONFIG_MMC=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_HCTOSYS is not set
+CONFIG_CLKSRC_ATCPIT100=y
+CONFIG_EXT2_FS=y

Maybe use EXT4, not EXT2, in the defconfig?

Arnd

#75 lore raw

Re: [PATCH 25/31] nds32: defconfig

2017-11-08 18:03 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 9 lines · Greentime Hu
Quoted 7 lines

From: Greentime Hu <[email protected]>

---
 arch/nds32/configs/ae3xx_defconfig  |  110 +++++++++++++++++++++++++++++++++++
 arch/nds32/configs/ag101p_defconfig |  109 ++++++++++++++++++++++++++++++++++
Quoted 4 lines

Are those two incompatible? I would recommend starting without board specific defconfig
files, it just gets messy once you get more than a few machines you want to support.

Thanks.
These 2 are incompatible.
They use different drivers. I may still keep these 2 defconfigs.

Quoted 18 lines
Quoted 18 lines
arch/nds32/configs/ae3xx_defconfig new file +12 -0
new file mode 100644
index 0000000..14d49a3
@@ -0,0 +1,110 @@
+CONFIG_CROSS_COMPILE="nds32le-linux-"
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_NAMESPACES=y
+CONFIG_USER_NS=y
+CONFIG_RELAY=y
Quoted 8 lines

arch/nds32/configs/ae3xx_defconfig line 16

Quoted 4 lines
arch/nds32/configs/ae3xx_defconfig new file +4 -0
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y

You usually don't want to select 'CONFIG_EMBEDDED' for regular builds, it's should only be needed to disable options that are usually considered essential.

Thanks.
I will remove this config in the next version patch.

Quoted 5 lines

arch/nds32/configs/ae3xx_defconfig line 73

Quoted 3 lines
arch/nds32/configs/ae3xx_defconfig new file +3 -0
+CONFIG_FB=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y

You have a framebuffer console here, but no framebuffer driver?

Thanks.
I shall enable it when I push our framebuffer in the next time. I will disable it in the next version patch.

Quoted 8 lines

arch/nds32/configs/ae3xx_defconfig line 84

Quoted 5 lines
arch/nds32/configs/ae3xx_defconfig new file +5 -0
+CONFIG_MMC=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_HCTOSYS is not set
+CONFIG_CLKSRC_ATCPIT100=y
+CONFIG_EXT2_FS=y

Maybe use EXT4, not EXT2, in the defconfig?

Thanks.
I will enable EXT4 instead of EXT2 in the defconfig.

maintainer
#76 lore raw

Re: [PATCH 25/31] nds32: defconfig

Quoted 10 lines · Greentime Hu

2017-11-08 18:03 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 9 lines · Greentime Hu
Quoted 7 lines

From: Greentime Hu <[email protected]>

---
 arch/nds32/configs/ae3xx_defconfig  |  110 +++++++++++++++++++++++++++++++++++
 arch/nds32/configs/ag101p_defconfig |  109 ++++++++++++++++++++++++++++++++++
Quoted 8 lines
Quoted 4 lines

Are those two incompatible? I would recommend starting without board specific defconfig
files, it just gets messy once you get more than a few machines you want to support.

Thanks.
These 2 are incompatible.
They use different drivers. I may still keep these 2 defconfigs.

Using different drivers doesn't make machines incompatible. For instance, the x86 desktop machine has drivers for all kinds of devices, but it uses one configuration
that works on basically any x86 machine.

Similarly, we only have one defconfig file on arm64, and it works across very diverse machines (phone, home routers, large servers, etc.).

All drivers should be written in a way to allow being built into the kernel without
doing any harm when you don't have the respective hardware.

Quoted 9 lines
Quoted 5 lines

arch/nds32/configs/ae3xx_defconfig line 73

Quoted 3 lines
arch/nds32/configs/ae3xx_defconfig new file +3 -0
+CONFIG_FB=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y

You have a framebuffer console here, but no framebuffer driver?

Thanks.
I shall enable it when I push our framebuffer in the next time. I will disable it in the next version patch.

The fbdev subsystem is no longer recommended for new drivers, they should be written on top of the DRM framework. You can use CONFIG_DRM_FBDEV_EMULATION to get the framebuffer
console on top of that, but then you don't need to enable CONFIG_FB.

Please have a look at drivers/gpu/drm/tinydrm/ to see if you can either use that directly, or take it as a skeleton for your own driver.

Arnd

#77 lore raw

Re: [PATCH 25/31] nds32: defconfig

2017-11-09 18:20 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 25 lines · Greentime Hu
Quoted 10 lines

2017-11-08 18:03 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 9 lines · Greentime Hu
Quoted 7 lines

From: Greentime Hu <[email protected]>

---
 arch/nds32/configs/ae3xx_defconfig  |  110 +++++++++++++++++++++++++++++++++++
 arch/nds32/configs/ag101p_defconfig |  109 ++++++++++++++++++++++++++++++++++
Quoted 8 lines
Quoted 4 lines

Are those two incompatible? I would recommend starting without board specific defconfig
files, it just gets messy once you get more than a few machines you want to support.

Thanks.
These 2 are incompatible.
They use different drivers. I may still keep these 2 defconfigs.

Using different drivers doesn't make machines incompatible. For instance, the x86 desktop machine has drivers for all kinds of devices, but it uses one configuration
that works on basically any x86 machine.

Quoted 6 lines

Similarly, we only have one defconfig file on arm64, and it works across very diverse machines (phone, home routers, large servers, etc.).

All drivers should be written in a way to allow being built into the kernel without
doing any harm when you don't have the respective hardware.

Thanks.
Make sense.
I will keep only one defconfig in the next version patch.

Quoted 10 lines
Quoted 9 lines
Quoted 5 lines

arch/nds32/configs/ae3xx_defconfig line 73

Quoted 3 lines
arch/nds32/configs/ae3xx_defconfig new file +3 -0
+CONFIG_FB=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y

You have a framebuffer console here, but no framebuffer driver?

Thanks.
I shall enable it when I push our framebuffer in the next time. I will disable it in the next version patch.

Quoted 8 lines

The fbdev subsystem is no longer recommended for new drivers, they should be written on top of the DRM framework. You can use CONFIG_DRM_FBDEV_EMULATION to get the framebuffer
console on top of that, but then you don't need to enable CONFIG_FB.

Please have a look at drivers/gpu/drm/tinydrm/ to see if you can either use that directly, or take it as a skeleton for your own driver.

Thanks.
We will check how to use CONFIG_DRM_FBDEV_EMULATION to get framebuffer.

#78 lore raw

PATCH 26/31 nds32: Build infrastructure

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 arch/nds32/Kconfig                 |  107 ++++++++++++++++++++++++++++++++++++
 arch/nds32/Kconfig.cpu             |  100 +++++++++++++++++++++++++++++++++
 arch/nds32/Kconfig.debug           |   14 +++++
 arch/nds32/Makefile                |   60 ++++++++++++++++++++
 arch/nds32/boot/Makefile           |   15 +++++
 arch/nds32/include/asm/Kbuild      |   54 ++++++++++++++++++
 arch/nds32/include/uapi/asm/Kbuild |   26 +++++++++
 arch/nds32/kernel/Makefile         |   24 ++++++++
 arch/nds32/kernel/vmlinux.lds.S    |   70 +++++++++++++++++++++++
 arch/nds32/mm/Makefile             |    7 +++
 10 files changed, 477 insertions(+)
 create mode 100644 arch/nds32/Kconfig
 create mode 100644 arch/nds32/Kconfig.cpu
 create mode 100644 arch/nds32/Kconfig.debug
 create mode 100644 arch/nds32/Makefile
 create mode 100644 arch/nds32/boot/Makefile
 create mode 100644 arch/nds32/include/asm/Kbuild
 create mode 100644 arch/nds32/include/uapi/asm/Kbuild
 create mode 100644 arch/nds32/kernel/Makefile
 create mode 100644 arch/nds32/kernel/vmlinux.lds.S
 create mode 100644 arch/nds32/mm/Makefile
arch/nds32/Kconfig new file +107 -0
new file mode 100644
index 0000000..112f470
@@ -0,0 +1,107 @@
+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+
+config NDS32
+        def_bool y
+	select ARCH_HAS_RAW_COPY_USER
+	select ARCH_WANT_FRAME_POINTERS if FTRACE
+	select ARCH_WANT_IPC_PARSE_VERSION
+	select CLKSRC_MMIO
+	select CLONE_BACKWARDS
+	select TIMER_OF
+	select FRAME_POINTER
+	select GENERIC_ATOMIC64
+	select GENERIC_CPU_DEVICES
+	select GENERIC_CLOCKEVENTS
+	select GENERIC_IOMAP
+	select GENERIC_IRQ_CHIP
+	select GENERIC_IRQ_PROBE
+	select GENERIC_IRQ_SHOW
+	select GENERIC_STRNCPY_FROM_USER
+	select GENERIC_STRNLEN_USER
+	select GENERIC_TIME_VSYSCALL
+	select HAVE_ARCH_TRACEHOOK
+	select HAVE_GENERIC_IOMAP
+	select HAVE_DEBUG_KMEMLEAK
+	select HAVE_IDE
+	select HAVE_MEMBLOCK
+	select HAVE_MEMBLOCK_NODE_MAP
+	select HAVE_UID16
+	select HAVE_REGS_AND_STACK_ACCESS_API
+	select IRQ_DOMAIN
+	select LOCKDEP_SUPPORT
+	select MODULES_USE_ELF_REL
+	select MODULES_USE_ELF_RELA
+	select OF
+	select OF_EARLY_FLATTREE
+	select OLD_SIGACTION
+	select OLD_SIGSUSPEND3
+	select NO_IOPORT_MAP
+	select RTC_LIB
+	select THREAD_INFO_IN_TASK
+	select SYS_SUPPORTS_APM_EMULATION
+	help
+	  Andes(nds32) Linux support.
+
+config GENERIC_CALIBRATE_DELAY
+	def_bool y
+
+config GENERIC_CSUM
+        def_bool y
+
+config GENERIC_HWEIGHT
+        def_bool y
+
+config GENERIC_LOCKBREAK
+        def_bool y
+	depends on PREEMPT
+
+config RWSEM_GENERIC_SPINLOCK
+	def_bool y
+
+config TRACE_IRQFLAGS_SUPPORT
+	def_bool y
+
+config STACKTRACE_SUPPORT
+        def_bool y
+
+config PGTABLE_LEVELS
+	default 2
+
+source "init/Kconfig"
+
+menu "System Type"
+source "arch/nds32/Kconfig.cpu"
+config NR_CPUS
+	int
+	default 1
+
+config MMU
+        def_bool y
+
+config NDS32_BUILTIN_DTB
+        string "Builtin DTB"
+        default ""
+	help
+	  User can use it to specify the dts of the SoC
+endmenu
+
+menu "Kernel Features"
+source "kernel/Kconfig.preempt"
+source "mm/Kconfig"
+source "kernel/Kconfig.hz"
+endmenu
+
+menu "Executable file formats"
+source "fs/Kconfig.binfmt"
+endmenu
+
+source "net/Kconfig"
+source "drivers/Kconfig"
+source "fs/Kconfig"
+source "arch/nds32/Kconfig.debug"
+source "security/Kconfig"
+source "crypto/Kconfig"
+source "lib/Kconfig"
arch/nds32/Kconfig.cpu new file +100 -0

100 lines not on this page · raw message

arch/nds32/Kconfig.debug new file +14 -0
new file mode 100644
index 0000000..665da0a
@@ -0,0 +1,14 @@
+menu "Kernel hacking"
+
+source "lib/Kconfig.debug"
+
+config EARLY_PRINTK
+        bool "Early printk support"
+        default y
+        help
+          Say Y here if you want to have an early console using the
+          earlyprintk=<name>[,<addr>][,<options>] kernel parameter. It
+          is assumed that the early console device has been initialised
+          by the boot loader prior to starting the Linux kernel.
+
+endmenu
arch/nds32/Makefile new file +60 -0

60 lines not on this page · raw message

arch/nds32/boot/Makefile new file +15 -0
new file mode 100644
index 0000000..3f9b86f
@@ -0,0 +1,15 @@
+targets := Image Image.gz
+
+$(obj)/Image: vmlinux FORCE
+	$(call if_changed,objcopy)
+
+$(obj)/Image.gz: $(obj)/Image FORCE
+	$(call if_changed,gzip)
+
+install: $(obj)/Image
+	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
+	$(obj)/Image System.map "$(INSTALL_PATH)"
+
+zinstall: $(obj)/Image.gz
+	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
+	$(obj)/Image.gz System.map "$(INSTALL_PATH)"
arch/nds32/include/asm/Kbuild new file +54 -0

54 lines not on this page · raw message

arch/nds32/include/uapi/asm/Kbuild new file +26 -0
new file mode 100644
index 0000000..c3911f5
@@ -0,0 +1,26 @@
+# UAPI Header export list
+include include/uapi/asm-generic/Kbuild.asm
+
+generic-y += errno.h
+generic-y += ioctl.h
+generic-y += ioctls.h
+generic-y += ipcbuf.h
+generic-y += shmbuf.h
+generic-y += bitsperlong.h
+generic-y += fcntl.h
+generic-y += stat.h
+generic-y += mman.h
+generic-y += msgbuf.h
+generic-y += poll.h
+generic-y += resource.h
+generic-y += sembuf.h
+generic-y += setup.h
+generic-y += siginfo.h
+generic-y += socket.h
+generic-y += sockios.h
+generic-y += swab.h
+generic-y += statfs.h
+generic-y += termbits.h
+generic-y += termios.h
+generic-y += types.h
+generic-y += ucontext.h
arch/nds32/kernel/Makefile new file +24 -0
new file mode 100644
index 0000000..5abcb0d
@@ -0,0 +1,24 @@
+#
+# Makefile for the linux kernel.
+#
+
+CPPFLAGS_vmlinux.lds	:= -DTEXTADDR=$(TEXTADDR)
+AFLAGS_head.o		:= -DTEXTADDR=$(TEXTADDR)
+
+# Object file lists.
+
+obj-y			:= ex-entry.o ex-exit.o ex-scall.o irq.o \
+			process.o ptrace.o setup.o signal.o \
+			sys_nds32.o time.o traps.o cacheinfo.o \
+			dma.o syscall_table.o vdso.o
+
+obj-$(CONFIG_MODULES)		+= nds32_ksyms.o module.o
+obj-$(CONFIG_STACKTRACE)	+= stacktrace.o
+obj-$(CONFIG_OF)		+= devtree.o
+obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+obj-$(CONFIG_CACHE_L2)		+= atl2c.o
+
+extra-y := head.o vmlinux.lds
+
+
+obj-y				+= vdso/
arch/nds32/kernel/vmlinux.lds.S new file +70 -0

70 lines not on this page · raw message

arch/nds32/mm/Makefile new file +7 -0
new file mode 100644
index 0000000..278d28f
@@ -0,0 +1,7 @@
+obj-y				:= extable.o tlb.o \
+				   fault.o init.o ioremap.o mmap.o \
+                                   mm-nds32.o cacheflush.o proc-n13.o
+
+obj-$(CONFIG_ALIGNMENT_TRAP)	+= alignment.o
+obj-$(CONFIG_HIGHMEM)           += highmem.o
+CFLAGS_proc-n13.o		+= -fomit-frame-pointer
Signature · 1 line
1.7.9.5
maintainer
#79 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

Quoted 22 lines · Greentime Hu
arch/nds32/Kconfig new file +16 -0
new file mode 100644
index 0000000..112f470
@@ -0,0 +1,107 @@
+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+
+config NDS32
+        def_bool y
+       select ARCH_HAS_RAW_COPY_USER
+       select ARCH_WANT_FRAME_POINTERS if FTRACE
+       select ARCH_WANT_IPC_PARSE_VERSION
+       select CLKSRC_MMIO
+       select CLONE_BACKWARDS
+       select TIMER_OF
+       select FRAME_POINTER
+       select GENERIC_ATOMIC64
+       select GENERIC_CPU_DEVICES

arch/nds32/Kconfig line 26

Quoted 10 lines
arch/nds32/Kconfig new file +10 -0
+       select GENERIC_CLOCKEVENTS
+       select GENERIC_IOMAP
+       select GENERIC_IRQ_CHIP
+       select GENERIC_IRQ_PROBE
+       select GENERIC_IRQ_SHOW
+       select GENERIC_STRNCPY_FROM_USER
+       select GENERIC_STRNLEN_USER
+       select GENERIC_TIME_VSYSCALL
+       select HAVE_ARCH_TRACEHOOK
+       select HAVE_GENERIC_IOMAP

You normally don't want HAVE_GENERIC_IOMAP, at least unless the CPU has special instructions to trigger PCI I/O port access.

arch/nds32/Kconfig line 28

Quoted 2 lines
arch/nds32/Kconfig new file +2 -0
+       select HAVE_DEBUG_KMEMLEAK
+       select HAVE_IDE

You certainly don't want HAVE_IDE

arch/nds32/Kconfig line 31

Quoted 3 lines
arch/nds32/Kconfig new file +3 -0
+       select HAVE_MEMBLOCK
+       select HAVE_MEMBLOCK_NODE_MAP
+       select HAVE_UID16

HAVE_UID16 shouldn't be used on new architectures, as mentioned in the comment about asm/posix_types.h

arch/nds32/Kconfig line 36

Quoted 5 lines
arch/nds32/Kconfig new file +5 -0
+       select HAVE_REGS_AND_STACK_ACCESS_API
+       select IRQ_DOMAIN
+       select LOCKDEP_SUPPORT
+       select MODULES_USE_ELF_REL
+       select MODULES_USE_ELF_RELA

I would think that you use either MODULES_USE_ELF_REL or MODULES_USE_ELF_RELA, but not both.

arch/nds32/Kconfig line 40

Quoted 4 lines
arch/nds32/Kconfig new file +4 -0
+       select OF
+       select OF_EARLY_FLATTREE
+       select OLD_SIGACTION
+       select OLD_SIGSUSPEND3

What are the OLD_SIG* ones for? It sounds like something you shouldn't need, although I'm not familiar wiht them.

arch/nds32/Kconfig line 44

Quoted 4 lines
arch/nds32/Kconfig new file +4 -0
+       select NO_IOPORT_MAP
+       select RTC_LIB
+       select THREAD_INFO_IN_TASK
+       select SYS_SUPPORTS_APM_EMULATION

I don't see what SYS_SUPPORTS_APM_EMULATION gains you.

arch/nds32/Kconfig line 46

Quoted 2 lines
arch/nds32/Kconfig new file +2 -0
+config GENERIC_CALIBRATE_DELAY
+       def_bool y

It's better to avoid the delay loop completely and skip the calibration, if your hardware allows.

arch/nds32/Kconfig line 88

Quoted 6 lines
arch/nds32/Kconfig new file +6 -0
+
+config NDS32_BUILTIN_DTB
+        string "Builtin DTB"
+        default ""
+       help
+         User can use it to specify the dts of the SoC

Better leave this up to the boot loader.

arch/nds32/Kconfig line 63

Quoted 11 lines
arch/nds32/Kconfig new file +11 -0
+config ALIGNMENT_TRAP
+       tristate "Kernel support unaligned access handling"
+       default y
+       help
+         Andes processors cannot fetch/store information which is not
+         naturally aligned on the bus, i.e., a 4 byte fetch must start at an
+         address divisible by 4. On 32-bit Andes processors, these non-aligned
+         fetch/store instructions will be emulated in software if you say
+         here, which has a severe performance impact. This is necessary for
+         correct operation of some network protocols. With an IP-only
+         configuration it is safe to say N, otherwise say Y.

Which network protocols are you referring to?

Quoted 6 lines
arch/nds32/Kconfig new file +6 -0
+config HIGHMEM
+       bool "High Memory Support"
+       depends on MMU && CPU_CACHE_NONALIASING
+       help
+         The address space of Andes processors is only 4 Gigabytes large
+         and it has to accommodate user address space, kernel address

arch/nds32/Kconfig line 79

Quoted 10 lines
arch/nds32/Kconfig new file +10 -0
+         space as well as some memory mapped IO. That means that, if you
+         have a large amount of physical memory and/or IO, not all of the
+         memory can be "permanently mapped" by the kernel. The physical
+         memory that is not permanently mapped is called "high memory".
+
+         Depending on the selected kernel/user memory split, minimum
+         vmalloc space and actual amount of RAM, you may not need this
+         option which should result in a slightly faster kernel.
+
+         If unsure, say N.

Generally speaking, highmem support is a mess, and it's better to avoid it.

I see that the two device tree files you have list 1GB of memory. Do you think that is a common configuration for actual products? Do you expect any to have more than 1GB (or more than 4GB) in the future, or is that the upper end of the scale?

If 1GB is a reasonable upper bound, then you could change the vmsplit to give slightly less address space to user space and have 1GB of direct-mapped kernel memory plus 256MB of vmalloc space reserved for the kernel, and completely avoid highmem.

arch/nds32/Kconfig line 86

Quoted 7 lines
arch/nds32/Kconfig new file +7 -0
+config MEMORY_START
+       hex "Physical memory start address"
+       default "0x00000000"
+       help
+         Physical memory start address, you may modify it if it is porting to
+         a new SoC with different start address.
+endmenu

On ARM, we found options like this to be rather problematic since it prevents you from running the same kernel on boards that are otherwise compatible.

If the architecture easily allows the memory to start at address 0, could you require this address for all SoCs that want to run Linux, and get rid of the compile-time option?

Arnd

#80 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

2017-11-08 18:16 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 29 lines · Greentime Hu
Quoted 28 lines
arch/nds32/Kconfig new file +21 -0
new file mode 100644
index 0000000..112f470
@@ -0,0 +1,107 @@
+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+
+config NDS32
+        def_bool y
+       select ARCH_HAS_RAW_COPY_USER
+       select ARCH_WANT_FRAME_POINTERS if FTRACE
+       select ARCH_WANT_IPC_PARSE_VERSION
+       select CLKSRC_MMIO
+       select CLONE_BACKWARDS
+       select TIMER_OF
+       select FRAME_POINTER
+       select GENERIC_ATOMIC64
+       select GENERIC_CPU_DEVICES
+       select GENERIC_CLOCKEVENTS
+       select GENERIC_IOMAP
+       select GENERIC_IRQ_CHIP
+       select GENERIC_IRQ_PROBE
+       select GENERIC_IRQ_SHOW
Quoted 8 lines

arch/nds32/Kconfig line 26

Quoted 5 lines
arch/nds32/Kconfig new file +5 -0
+       select GENERIC_STRNCPY_FROM_USER
+       select GENERIC_STRNLEN_USER
+       select GENERIC_TIME_VSYSCALL
+       select HAVE_ARCH_TRACEHOOK
+       select HAVE_GENERIC_IOMAP

You normally don't want HAVE_GENERIC_IOMAP, at least unless the CPU has special instructions to trigger PCI I/O port access.

Thanks.
I will remove it in the next version patch.

Quoted 4 lines

arch/nds32/Kconfig line 28

Quoted 2 lines
arch/nds32/Kconfig new file +2 -0
+       select HAVE_DEBUG_KMEMLEAK
+       select HAVE_IDE

You certainly don't want HAVE_IDE

Thanks.
I will remove it in the next version patch.

Quoted 6 lines

arch/nds32/Kconfig line 31

Quoted 3 lines
arch/nds32/Kconfig new file +3 -0
+       select HAVE_MEMBLOCK
+       select HAVE_MEMBLOCK_NODE_MAP
+       select HAVE_UID16

HAVE_UID16 shouldn't be used on new architectures, as mentioned in the comment about asm/posix_types.h

Thanks.
I will remove it in the next version patch.

Quoted 8 lines

arch/nds32/Kconfig line 36

Quoted 5 lines
arch/nds32/Kconfig new file +5 -0
+       select HAVE_REGS_AND_STACK_ACCESS_API
+       select IRQ_DOMAIN
+       select LOCKDEP_SUPPORT
+       select MODULES_USE_ELF_REL
+       select MODULES_USE_ELF_RELA

I would think that you use either MODULES_USE_ELF_REL or MODULES_USE_ELF_RELA, but not both.

Thanks.
I will check which one we used and remove the other one if posible.

Quoted 7 lines

arch/nds32/Kconfig line 40

Quoted 4 lines
arch/nds32/Kconfig new file +4 -0
+       select OF
+       select OF_EARLY_FLATTREE
+       select OLD_SIGACTION
+       select OLD_SIGSUSPEND3

What are the OLD_SIG* ones for? It sounds like something you shouldn't need, although I'm not familiar wiht them.

Thanks I will check if we need it or not.

Quoted 6 lines

arch/nds32/Kconfig line 44

Quoted 4 lines
arch/nds32/Kconfig new file +4 -0
+       select NO_IOPORT_MAP
+       select RTC_LIB
+       select THREAD_INFO_IN_TASK
+       select SYS_SUPPORTS_APM_EMULATION

I don't see what SYS_SUPPORTS_APM_EMULATION gains you.

Thanks.
I will remove it in the next version patch.

Quoted 5 lines

arch/nds32/Kconfig line 46

Quoted 2 lines
arch/nds32/Kconfig new file +2 -0
+config GENERIC_CALIBRATE_DELAY
+       def_bool y

It's better to avoid the delay loop completely and skip the calibration, if your hardware allows.

Thanks.
Do you mean that this config should be def_bool n? why? Almost all arch enable it.

Quoted 8 lines

arch/nds32/Kconfig line 88

Quoted 6 lines
arch/nds32/Kconfig new file +6 -0
+
+config NDS32_BUILTIN_DTB
+        string "Builtin DTB"
+        default ""
+       help
+         User can use it to specify the dts of the SoC

Better leave this up to the boot loader.

Thanks.
uboot will pass it too.

Quoted 12 lines

arch/nds32/Kconfig line 63

Quoted 11 lines
arch/nds32/Kconfig new file +11 -0
+config ALIGNMENT_TRAP
+       tristate "Kernel support unaligned access handling"
+       default y
+       help
+         Andes processors cannot fetch/store information which is not
+         naturally aligned on the bus, i.e., a 4 byte fetch must start at an
+         address divisible by 4. On 32-bit Andes processors, these non-aligned
+         fetch/store instructions will be emulated in software if you say
+         here, which has a severe performance impact. This is necessary for
+         correct operation of some network protocols. With an IP-only
+         configuration it is safe to say N, otherwise say Y.
Quoted 1 line

Which network protocols are you referring to?

I will modify these descriptions. It was written by someone I don't know. :p This case only happened when I found is compiler code gen issue or wrong pointer usage.

Quoted 24 lines
Quoted 6 lines
arch/nds32/Kconfig new file +6 -0
+config HIGHMEM
+       bool "High Memory Support"
+       depends on MMU && CPU_CACHE_NONALIASING
+       help
+         The address space of Andes processors is only 4 Gigabytes large
+         and it has to accommodate user address space, kernel address

arch/nds32/Kconfig line 79

Quoted 10 lines
arch/nds32/Kconfig new file +10 -0
+         space as well as some memory mapped IO. That means that, if you
+         have a large amount of physical memory and/or IO, not all of the
+         memory can be "permanently mapped" by the kernel. The physical
+         memory that is not permanently mapped is called "high memory".
+
+         Depending on the selected kernel/user memory split, minimum
+         vmalloc space and actual amount of RAM, you may not need this
+         option which should result in a slightly faster kernel.
+
+         If unsure, say N.

Generally speaking, highmem support is a mess, and it's better to avoid it.

I see that the two device tree files you have list 1GB of memory. Do you think that is a common configuration for actual products? Do you expect any to have more than 1GB (or more than 4GB) in the future, or is that the upper end of the scale?

Quoted 4 lines

If 1GB is a reasonable upper bound, then you could change the vmsplit to give slightly less address space to user space and have 1GB of direct-mapped kernel memory plus 256MB of vmalloc space reserved for the kernel, and completely avoid highmem.

Thanks.
We do realy use 1GB ram in some products.
We also verify CONFIG_HIGHMEM with LTP too.
It seems fine but I will study vmsplit to see if we should use it.

Quoted 11 lines

arch/nds32/Kconfig line 86

Quoted 7 lines
arch/nds32/Kconfig new file +7 -0
+config MEMORY_START
+       hex "Physical memory start address"
+       default "0x00000000"
+       help
+         Physical memory start address, you may modify it if it is porting to
+         a new SoC with different start address.
+endmenu

On ARM, we found options like this to be rather problematic since it prevents you from running the same kernel on boards that are otherwise compatible.

Quoted 3 lines

If the architecture easily allows the memory to start at address 0, could you require this address for all SoCs that want to run Linux, and get rid of the compile-time option?

Thanks.
The reason we need this config is because we need to define PHYS_OFFSET.
#define PHYS_OFFSET (CONFIG_MEMORY_START)

It needs to be set in compile-time. I don't know how to get rid of it.

maintainer
#81 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

Quoted 6 lines · Greentime Hu

2017-11-08 18:16 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 5 lines · Greentime Hu
Quoted 3 lines
(quoted diff) +2 -0
+config GENERIC_CALIBRATE_DELAY
+       def_bool y
Quoted 6 lines
Quoted 2 lines

It's better to avoid the delay loop completely and skip the calibration, if your hardware allows.

Thanks.
Do you mean that this config should be def_bool n? why? Almost all arch enable it.

It depends on what your hardware can do. If you have a way to see how much time has passed that is guaranteed to be reliable on all machines, then use that instead.

On a lot of architectures, it's not possible, so they have to fall back to using the delay loop.

Quoted 12 lines
Quoted 12 lines
Quoted 11 lines
arch/nds32/Kconfig.cpu new file +11 -0
+config ALIGNMENT_TRAP
+       tristate "Kernel support unaligned access handling"
+       default y
+       help
+         Andes processors cannot fetch/store information which is not
+         naturally aligned on the bus, i.e., a 4 byte fetch must start at an
+         address divisible by 4. On 32-bit Andes processors, these non-aligned
+         fetch/store instructions will be emulated in software if you say
+         here, which has a severe performance impact. This is necessary for
+         correct operation of some network protocols. With an IP-only
+         configuration it is safe to say N, otherwise say Y.
Quoted 5 lines
Quoted 1 line

Which network protocols are you referring to?

I will modify these descriptions. It was written by someone I don't know. :p This case only happened when I found is compiler code gen issue or wrong pointer usage.

Ok, should it also be 'default n' then?

Quoted 29 lines
Quoted 24 lines
Quoted 6 lines
arch/nds32/Kconfig.cpu new file +6 -0
+config HIGHMEM
+       bool "High Memory Support"
+       depends on MMU && CPU_CACHE_NONALIASING
+       help
+         The address space of Andes processors is only 4 Gigabytes large
+         and it has to accommodate user address space, kernel address

arch/nds32/Kconfig.cpu line 83

Quoted 10 lines
arch/nds32/Kconfig.cpu new file +10 -0
+         space as well as some memory mapped IO. That means that, if you
+         have a large amount of physical memory and/or IO, not all of the
+         memory can be "permanently mapped" by the kernel. The physical
+         memory that is not permanently mapped is called "high memory".
+
+         Depending on the selected kernel/user memory split, minimum
+         vmalloc space and actual amount of RAM, you may not need this
+         option which should result in a slightly faster kernel.
+
+         If unsure, say N.

Generally speaking, highmem support is a mess, and it's better to avoid it.

I see that the two device tree files you have list 1GB of memory. Do you think that is a common configuration for actual products? Do you expect any to have more than 1GB (or more than 4GB) in the future, or is that the upper end of the scale?

Quoted 4 lines

If 1GB is a reasonable upper bound, then you could change the vmsplit to give slightly less address space to user space and have 1GB of direct-mapped kernel memory plus 256MB of vmalloc space reserved for the kernel, and completely avoid highmem.

Quoted 4 lines

Thanks.
We do realy use 1GB ram in some products.
We also verify CONFIG_HIGHMEM with LTP too.
It seems fine but I will study vmsplit to see if we should use it.

For the 1GB configuration, something like ARM's CONFIG_VMSPLIT_3G_OPT should be optimal, it will result in better performance because it allows you to completely turn off CONFIG_HIGHMEM. The reason we don't always use it on ARM is that traditionally we had the 3GB vmsplit, and some applications
might rely on having the exact amount of available address space that they expect. For a new architecture that should be less of a problem.

The interesting case is what happens if you have machines with 1.5GB or or more physical RAM. You can obviously have another vmsplit configuration for those, but at some point going to highmem is better than limiting the user address space.

Ideally 1.5GB is the point where you start using a 64-bit CPU, but of course that is not something you have available at the moment.

Quoted 15 lines
Quoted 11 lines

arch/nds32/Kconfig.cpu line 100

Quoted 7 lines
arch/nds32/Kconfig.cpu new file +7 -0
+config MEMORY_START
+       hex "Physical memory start address"
+       default "0x00000000"
+       help
+         Physical memory start address, you may modify it if it is porting to
+         a new SoC with different start address.
+endmenu

On ARM, we found options like this to be rather problematic since it prevents you from running the same kernel on boards that are otherwise compatible.

Quoted 3 lines

If the architecture easily allows the memory to start at address 0, could you require this address for all SoCs that want to run Linux, and get rid of the compile-time option?

Quoted 5 lines

Thanks.
The reason we need this config is because we need to define PHYS_OFFSET.
#define PHYS_OFFSET (CONFIG_MEMORY_START)

It needs to be set in compile-time. I don't know how to get rid of it.

PHYS_OFFSET doesn't have to be a constant, a lot of architectures make the __va()/__pa() and related functions use a variable for the offset. This is also useful to implement KASLR, and booting the kernel from a random physical address.

My actual suggestion however was to just mandate that PHYS_OFFSET is always zero for your architecture, and not support any other value. This is easy as long as you don't have existing hardware that would break.

Arnd

#82 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

2017-11-09 18:33 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 14 lines · Greentime Hu
Quoted 6 lines

2017-11-08 18:16 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 5 lines · Greentime Hu
Quoted 3 lines
(quoted diff) +2 -0
+config GENERIC_CALIBRATE_DELAY
+       def_bool y
Quoted 6 lines
Quoted 2 lines

It's better to avoid the delay loop completely and skip the calibration, if your hardware allows.

Thanks.
Do you mean that this config should be def_bool n? why? Almost all arch enable it.

Quoted 6 lines

It depends on what your hardware can do. If you have a way to see how much time has passed that is guaranteed to be reliable on all machines, then use that instead.

On a lot of architectures, it's not possible, so they have to fall back to using the delay loop.

I get it. I will discuss it with our HW colleagues. We may get these informations in some registers.

Quoted 12 lines
Quoted 12 lines
Quoted 12 lines
Quoted 11 lines
arch/nds32/Kconfig.cpu new file +11 -0
+config ALIGNMENT_TRAP
+       tristate "Kernel support unaligned access handling"
+       default y
+       help
+         Andes processors cannot fetch/store information which is not
+         naturally aligned on the bus, i.e., a 4 byte fetch must start at an
+         address divisible by 4. On 32-bit Andes processors, these non-aligned
+         fetch/store instructions will be emulated in software if you say
+         here, which has a severe performance impact. This is necessary for
+         correct operation of some network protocols. With an IP-only
+         configuration it is safe to say N, otherwise say Y.
Quoted 7 lines
Quoted 5 lines
Quoted 1 line

Which network protocols are you referring to?

I will modify these descriptions. It was written by someone I don't know. :p This case only happened when I found is compiler code gen issue or wrong pointer usage.

Ok, should it also be 'default n' then?

Yup. I will use 'default n' in the next version patch.

Quoted 78 lines
Quoted 29 lines
Quoted 24 lines
Quoted 6 lines
arch/nds32/Kconfig.cpu new file +6 -0
+config HIGHMEM
+       bool "High Memory Support"
+       depends on MMU && CPU_CACHE_NONALIASING
+       help
+         The address space of Andes processors is only 4 Gigabytes large
+         and it has to accommodate user address space, kernel address

arch/nds32/Kconfig.cpu line 83

Quoted 10 lines
arch/nds32/Kconfig.cpu new file +10 -0
+         space as well as some memory mapped IO. That means that, if you
+         have a large amount of physical memory and/or IO, not all of the
+         memory can be "permanently mapped" by the kernel. The physical
+         memory that is not permanently mapped is called "high memory".
+
+         Depending on the selected kernel/user memory split, minimum
+         vmalloc space and actual amount of RAM, you may not need this
+         option which should result in a slightly faster kernel.
+
+         If unsure, say N.

Generally speaking, highmem support is a mess, and it's better to avoid it.

I see that the two device tree files you have list 1GB of memory. Do you think that is a common configuration for actual products? Do you expect any to have more than 1GB (or more than 4GB) in the future, or is that the upper end of the scale?

Quoted 4 lines

If 1GB is a reasonable upper bound, then you could change the vmsplit to give slightly less address space to user space and have 1GB of direct-mapped kernel memory plus 256MB of vmalloc space reserved for the kernel, and completely avoid highmem.

Quoted 4 lines

Thanks.
We do realy use 1GB ram in some products.
We also verify CONFIG_HIGHMEM with LTP too.
It seems fine but I will study vmsplit to see if we should use it.

For the 1GB configuration, something like ARM's CONFIG_VMSPLIT_3G_OPT should be optimal, it will result in better performance because it allows you to completely turn off CONFIG_HIGHMEM. The reason we don't always use it on ARM is that traditionally we had the 3GB vmsplit, and some applications
might rely on having the exact amount of available address space that they expect. For a new architecture that should be less of a problem.

The interesting case is what happens if you have machines with 1.5GB or or more physical RAM. You can obviously have another vmsplit configuration for those, but at some point going to highmem is better than limiting the user address space.

Ideally 1.5GB is the point where you start using a 64-bit CPU, but of course that is not something you have available at the moment.

Quoted 15 lines
Quoted 11 lines

arch/nds32/Kconfig.cpu line 100

Quoted 7 lines
arch/nds32/Kconfig.cpu new file +7 -0
+config MEMORY_START
+       hex "Physical memory start address"
+       default "0x00000000"
+       help
+         Physical memory start address, you may modify it if it is porting to
+         a new SoC with different start address.
+endmenu

On ARM, we found options like this to be rather problematic since it prevents you from running the same kernel on boards that are otherwise compatible.

Quoted 3 lines

If the architecture easily allows the memory to start at address 0, could you require this address for all SoCs that want to run Linux, and get rid of the compile-time option?

Quoted 5 lines

Thanks.
The reason we need this config is because we need to define PHYS_OFFSET.
#define PHYS_OFFSET (CONFIG_MEMORY_START)

It needs to be set in compile-time. I don't know how to get rid of it.

PHYS_OFFSET doesn't have to be a constant, a lot of architectures make the __va()/__pa() and related functions use a variable for the offset. This is also useful to implement KASLR, and booting the kernel from a random physical address.

Quoted 4 lines

My actual suggestion however was to just mandate that PHYS_OFFSET is always zero for your architecture, and not support any other value. This is easy as long as you don't have existing hardware that would break.

Thanks.
I will check how other architectures do.
I can mandate that PHYS_OFFSET is zero but our customers(SoC company) may not use 0x0 as default DRAM starting address.
This assumption is a little bit too strong.

#83 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

2017-11-10 16:26 GMT+08:00 Greentime Hu <[email protected]>:

Quoted 19 lines

2017-11-09 18:33 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 18 lines · Greentime Hu
Quoted 6 lines

2017-11-08 18:16 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 5 lines · Greentime Hu
Quoted 3 lines
(quoted diff) +2 -0
+config GENERIC_CALIBRATE_DELAY
+       def_bool y
Quoted 6 lines
Quoted 2 lines

It's better to avoid the delay loop completely and skip the calibration, if your hardware allows.

Thanks.
Do you mean that this config should be def_bool n? why? Almost all arch enable it.

It depends on what your hardware can do. If you have a way to see how much time has passed that is guaranteed to be reliable on all machines, then use that instead.

Quoted 5 lines
Quoted 2 lines

On a lot of architectures, it's not possible, so they have to fall back to using the delay loop.

I get it. I will discuss it with our HW colleagues. We may get these informations in some registers.

Hi, Arnd:

I think I can't set it to default n because it will be called in start_kernel.

start_kernel() -> calibrate_delay()

If I don't enable this config, it will link error because it didn't build init/calibrate.c

maintainer
#84 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

Quoted 26 lines · Greentime Hu

2017-11-10 16:26 GMT+08:00 Greentime Hu <[email protected]>:

Quoted 19 lines

2017-11-09 18:33 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 18 lines · Greentime Hu
Quoted 6 lines

2017-11-08 18:16 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 5 lines · Greentime Hu
Quoted 3 lines
(quoted diff) +2 -0
+config GENERIC_CALIBRATE_DELAY
+       def_bool y
Quoted 6 lines
Quoted 2 lines

It's better to avoid the delay loop completely and skip the calibration, if your hardware allows.

Thanks.
Do you mean that this config should be def_bool n? why? Almost all arch enable it.

It depends on what your hardware can do. If you have a way to see how much time has passed that is guaranteed to be reliable on all machines, then use that instead.

Quoted 5 lines
Quoted 2 lines

On a lot of architectures, it's not possible, so they have to fall back to using the delay loop.

I get it. I will discuss it with our HW colleagues. We may get these informations in some registers.

Quoted 8 lines

Hi, Arnd:

I think I can't set it to default n because it will be called in start_kernel.

start_kernel() -> calibrate_delay()

If I don't enable this config, it will link error because it didn't build init/calibrate.c

You will have to provide an architecture-specific implementation of this function, please ahve a look at what others are doing, e.g. tile, openrisc or
h8300.

Arnd

#85 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

2017-11-17 20:50 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 33 lines · Greentime Hu
Quoted 32 lines

2017-11-10 16:26 GMT+08:00 Greentime Hu <[email protected]>:

Quoted 19 lines

2017-11-09 18:33 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 18 lines · Greentime Hu
Quoted 6 lines

2017-11-08 18:16 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 5 lines · Greentime Hu
Quoted 3 lines
(quoted diff) +2 -0
+config GENERIC_CALIBRATE_DELAY
+       def_bool y
Quoted 6 lines
Quoted 2 lines

It's better to avoid the delay loop completely and skip the calibration, if your hardware allows.

Thanks.
Do you mean that this config should be def_bool n? why? Almost all arch enable it.

It depends on what your hardware can do. If you have a way to see how much time has passed that is guaranteed to be reliable on all machines, then use that instead.

Quoted 5 lines
Quoted 2 lines

On a lot of architectures, it's not possible, so they have to fall back to using the delay loop.

I get it. I will discuss it with our HW colleagues. We may get these informations in some registers.

Hi, Arnd:

I think I can't set it to default n because it will be called in start_kernel.

start_kernel() -> calibrate_delay()

Quoted 7 lines
Quoted 2 lines

If I don't enable this config, it will link error because it didn't build init/calibrate.c

You will have to provide an architecture-specific implementation of this function, please ahve a look at what others are doing, e.g. tile, openrisc or
h8300.

Thanks. I got you.

#86 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

In reply to Arnd Bergmann
Quoted 25 lines · Arnd Bergmann
Quoted 24 lines · Greentime Hu
arch/nds32/Kconfig new file +21 -0
@@ -0,0 +1,107 @@
+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+
+config NDS32
+        def_bool y
+       select ARCH_HAS_RAW_COPY_USER
+       select ARCH_WANT_FRAME_POINTERS if FTRACE
+       select ARCH_WANT_IPC_PARSE_VERSION
+       select CLKSRC_MMIO
+       select CLONE_BACKWARDS
+       select TIMER_OF
+       select FRAME_POINTER
+       select GENERIC_ATOMIC64
+       select GENERIC_CPU_DEVICES
+       select GENERIC_CLOCKEVENTS
+       select GENERIC_IOMAP
+       select GENERIC_IRQ_CHIP
+       select GENERIC_IRQ_PROBE
+       select GENERIC_IRQ_SHOW
Quoted 8 lines

arch/nds32/Kconfig line 26

Quoted 5 lines
arch/nds32/Kconfig new file +5 -0
+       select GENERIC_STRNCPY_FROM_USER
+       select GENERIC_STRNLEN_USER
+       select GENERIC_TIME_VSYSCALL
+       select HAVE_ARCH_TRACEHOOK
+       select HAVE_GENERIC_IOMAP

You normally don't want HAVE_GENERIC_IOMAP, at least unless the CPU has special instructions to trigger PCI I/O port access.

GENERIC_IOMAP or HAVE_GENERIC_IOMAP?

The latter doesn't even exist, except in Documentation/kbuild/kconfig-language.txt, so it cannot be selected.

Given the checks for __NDS32_EB__, NDS32 can be either big or little endian, so you should have (excatly one of) CPU_BIG_ENDIAN or CPU_LITTLE_ENDIAN set.

Gr{oetje,eeting}s,

Geert

#87 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

2017-11-13 18:45 GMT+08:00 Geert Uytterhoeven <[email protected]>:

Quoted 35 lines · Arnd Bergmann
Quoted 25 lines · Greentime Hu
Quoted 24 lines
arch/nds32/Kconfig new file +21 -0
@@ -0,0 +1,107 @@
+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+
+config NDS32
+        def_bool y
+       select ARCH_HAS_RAW_COPY_USER
+       select ARCH_WANT_FRAME_POINTERS if FTRACE
+       select ARCH_WANT_IPC_PARSE_VERSION
+       select CLKSRC_MMIO
+       select CLONE_BACKWARDS
+       select TIMER_OF
+       select FRAME_POINTER
+       select GENERIC_ATOMIC64
+       select GENERIC_CPU_DEVICES
+       select GENERIC_CLOCKEVENTS
+       select GENERIC_IOMAP
+       select GENERIC_IRQ_CHIP
+       select GENERIC_IRQ_PROBE
+       select GENERIC_IRQ_SHOW
Quoted 8 lines

arch/nds32/Kconfig line 26

Quoted 5 lines
arch/nds32/Kconfig new file +5 -0
+       select GENERIC_STRNCPY_FROM_USER
+       select GENERIC_STRNLEN_USER
+       select GENERIC_TIME_VSYSCALL
+       select HAVE_ARCH_TRACEHOOK
+       select HAVE_GENERIC_IOMAP

You normally don't want HAVE_GENERIC_IOMAP, at least unless the CPU has special instructions to trigger PCI I/O port access.

Quoted 4 lines

GENERIC_IOMAP or HAVE_GENERIC_IOMAP?

The latter doesn't even exist, except in Documentation/kbuild/kconfig-language.txt, so it cannot be selected.

Thanks.
I will remove HAVE_GENERIC_IOMAP in the next version patch.

Quoted 2 lines

Given the checks for __NDS32_EB__, NDS32 can be either big or little endian, so you should have (excatly one of) CPU_BIG_ENDIAN or CPU_LITTLE_ENDIAN set.

Thanks.
I will check if we need this config or not and update in the next version patch.

maintainer
#88 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

Quoted 6 lines · Greentime Hu

2017-11-13 18:45 GMT+08:00 Geert Uytterhoeven <[email protected]>:

Quoted 2 lines

Given the checks for __NDS32_EB__, NDS32 can be either big or little endian, so you should have (excatly one of) CPU_BIG_ENDIAN or CPU_LITTLE_ENDIAN set.

Thanks.
I will check if we need this config or not and update in the next version patch.

I think we have one architecture in the kernel that determines endianess from the way that the toolchain is built. What all the others do it to have a Kconfig option, at least CONFIG_CPU_BIG_ENDIAN that is used to pass -mbig-endian or -mlittle-endian to the compiler. You should do it that way so you can use any toolchain with any kernel configuration.

Arnd

#89 lore raw

Re: [PATCH 26/31] nds32: Build infrastructure

2017-11-16 18:25 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 5 lines · Greentime Hu
Quoted 4 lines

2017-11-13 18:45 GMT+08:00 Geert Uytterhoeven <[email protected]>:

Quoted 2 lines

Given the checks for __NDS32_EB__, NDS32 can be either big or little endian, so you should have (excatly one of) CPU_BIG_ENDIAN or CPU_LITTLE_ENDIAN set.

Quoted 8 lines
Quoted 2 lines

Thanks.
I will check if we need this config or not and update in the next version patch.

I think we have one architecture in the kernel that determines endianess from the way that the toolchain is built. What all the others do it to have a Kconfig option, at least CONFIG_CPU_BIG_ENDIAN that is used to pass -mbig-endian or -mlittle-endian to the compiler. You should do it that way so you can use any toolchain with any kernel configuration.

Thanks
I will add these 2 configs in the next version patch. Pass -EL or -EB to compiler based on different configs.

#90 lore raw

PATCH 27/31 dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 .../interrupt-controller/andestech,ativic32.txt    |   27 ++++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +27 -0
new file mode 100644
index 0000000..6bac908
@@ -0,0 +1,27 @@
+* Andestech Internal Vector Interrupt Controller
+
+The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
+suitable for a simpler SoC platform not requiring a more sophisticated and
+bigger External Vector Interrupt Controller.
+
+
+Main node required properties:
+
+- compatible : should at least contain  "andestech,ativic32".
+- interrupt-parent: Empty for the interrupt controller itself
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells: The number of cells to define the interrupts. Should be 2.
+	The first cell is the IRQ number
+	The second cell is used to specify mode:
+		1 = low-to-high edge triggered
+		2 = high-to-low edge triggered
+		4 = active high level-sensitive
+		8 = active low level-sensitive
+		Default for internal sources should be set to 4 (active high).
+
+Examples:
+	intc: interrupt-controller {
+		compatible = "andestech,ativic32";
+		#interrupt-cells = <2>;
+		interrupt-controller;
+	};
Signature · 1 line
1.7.9.5
#91 lore raw

Re: [PATCH 27/31] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller

+DT list

Quoted 1 line · Greentime Hu

From: Greentime Hu <[email protected]>

Commit msg needed.

Quoted 14 lines
---
 .../interrupt-controller/andestech,ativic32.txt    |   27 ++++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +1 -0
new file mode 100644
index 0000000..6bac908
@@ -0,0 +1,27 @@
+* Andestech Internal Vector Interrupt Controller

Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt line 11

Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +10 -0
+
+The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
+suitable for a simpler SoC platform not requiring a more sophisticated and
+bigger External Vector Interrupt Controller.
+
+
+Main node required properties:
+
+- compatible : should at least contain  "andestech,ativic32".
+- interrupt-parent: Empty for the interrupt controller itself

Drop this.

Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt line 19

Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +8 -0
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells: The number of cells to define the interrupts. Should be 2.
+       The first cell is the IRQ number
+       The second cell is used to specify mode:
+               1 = low-to-high edge triggered
+               2 = high-to-low edge triggered
+               4 = active high level-sensitive
+               8 = active low level-sensitive

Just state 2 cells and refer to interrupt-controller/interrupts.txt.

Quoted 11 lines
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +8 -1
+               Default for internal sources should be set to 4 (active high).
+
+Examples:
+       intc: interrupt-controller {
+               compatible = "andestech,ativic32";
+               #interrupt-cells = <2>;
+               interrupt-controller;
+       };
--

1.7.9.5

#92 lore raw

Re: [PATCH 27/31] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller

2017-11-08 21:25 GMT+08:00 Rob Herring <[email protected]>:

Quoted 6 lines

+DT list

Quoted 1 line · Greentime Hu

From: Greentime Hu <[email protected]>

Commit msg needed.

Thanks.
I will add commit msg in the next version patch.

Quoted 18 lines
Quoted 18 lines
---
 .../interrupt-controller/andestech,ativic32.txt    |   27 ++++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +5 -0
new file mode 100644
index 0000000..6bac908
@@ -0,0 +1,27 @@
+* Andestech Internal Vector Interrupt Controller
+
+The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
+suitable for a simpler SoC platform not requiring a more sophisticated and
+bigger External Vector Interrupt Controller.
Quoted 8 lines

Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt line 11

Quoted 6 lines
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +6 -0
+
+
+Main node required properties:
+
+- compatible : should at least contain  "andestech,ativic32".
+- interrupt-parent: Empty for the interrupt controller itself

Drop this.

Thanks.
I will fix it in the next version patch.

Quoted 10 lines

Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt line 19

Quoted 8 lines
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +8 -0
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells: The number of cells to define the interrupts. Should be 2.
+       The first cell is the IRQ number
+       The second cell is used to specify mode:
+               1 = low-to-high edge triggered
+               2 = high-to-low edge triggered
+               4 = active high level-sensitive
+               8 = active low level-sensitive

Just state 2 cells and refer to interrupt-controller/interrupts.txt.

Thanks.
I will fix it in the next version patch.

Quoted 11 lines
Quoted 11 lines
Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file +8 -1
+               Default for internal sources should be set to 4 (active high).
+
+Examples:
+       intc: interrupt-controller {
+               compatible = "andestech,ativic32";
+               #interrupt-cells = <2>;
+               interrupt-controller;
+       };
--

1.7.9.5

#93 lore raw

PATCH 28/31 irqchip: Andestech Internal Vector Interrupt Controller driver

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 drivers/irqchip/Makefile       |    1 +
 drivers/irqchip/irq-ativic32.c |  149 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 150 insertions(+)
 create mode 100644 drivers/irqchip/irq-ativic32.c
drivers/irqchip/Makefile +1 -0
index b842dfd..201ca9f 100644
@@ -80,3 +80,4 @@ obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o irq-aspeed-i2c-ic.o
 obj-$(CONFIG_STM32_EXTI) 		+= irq-stm32-exti.o
 obj-$(CONFIG_QCOM_IRQ_COMBINER)		+= qcom-irq-combiner.o
 obj-$(CONFIG_IRQ_UNIPHIER_AIDET)	+= irq-uniphier-aidet.o
+obj-$(CONFIG_NDS32)			+= irq-ativic32.o
drivers/irqchip/irq-ativic32.c new file +149 -0

149 lines not on this page · raw message

Signature · 1 line
1.7.9.5
#94 lore raw

Re: [PATCH 28/31] irqchip: Andestech Internal Vector Interrupt Controller driver

Quoted 2 lines · Greentime Hu

From: Greentime Hu <[email protected]>

Please add a commit message, indicating what this does, and potentially a pointer to some documentation (if publicly available).

Quoted 66 lines
---
 drivers/irqchip/Makefile       |    1 +
 drivers/irqchip/irq-ativic32.c |  149 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 150 insertions(+)
 create mode 100644 drivers/irqchip/irq-ativic32.c
drivers/irqchip/Makefile +1 -0
index b842dfd..201ca9f 100644
@@ -80,3 +80,4 @@ obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o irq-aspeed-i2c-ic.o
 obj-$(CONFIG_STM32_EXTI) 		+= irq-stm32-exti.o
 obj-$(CONFIG_QCOM_IRQ_COMBINER)		+= qcom-irq-combiner.o
 obj-$(CONFIG_IRQ_UNIPHIER_AIDET)	+= irq-uniphier-aidet.o
+obj-$(CONFIG_NDS32)			+= irq-ativic32.o
drivers/irqchip/irq-ativic32.c new file +43 -0
new file mode 100644
index 0000000..d3dae59
@@ -0,0 +1,149 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/interrupt.h>
+#include <linux/irqdomain.h>
+#include <linux/irqchip.h>
+#include <nds32_intrinsic.h>
+
+static void ativic32_ack_irq(struct irq_data *data)
+{
+	__nds32__mtsr_dsb(1 << data->hwirq, NDS32_SR_INT_PEND2);
+}
+
+static void ativic32_mask_irq(struct irq_data *data)
+{
+	unsigned long int_mask2 = __nds32__mfsr(NDS32_SR_INT_MASK2);
+	__nds32__mtsr_dsb(int_mask2 & (~(1 << data->hwirq)), NDS32_SR_INT_MASK2);
+}
+
+static void ativic32_mask_ack_irq(struct irq_data *data)
+{
+	unsigned long int_mask2 = __nds32__mfsr(NDS32_SR_INT_MASK2);
+	__nds32__mtsr_dsb(int_mask2 & (~(1 << data->hwirq)), NDS32_SR_INT_MASK2);
+	__nds32__mtsr_dsb((1 << data->hwirq), NDS32_SR_INT_PEND2);
+
+}

drivers/irqchip/irq-ativic32.c line 53

Quoted 10 lines
drivers/irqchip/irq-ativic32.c new file +10 -0
+
+static void ativic32_unmask_irq(struct irq_data *data)
+{
+	unsigned long int_mask2 = __nds32__mfsr(NDS32_SR_INT_MASK2);
+	__nds32__mtsr_dsb(int_mask2 | (1 << data->hwirq), NDS32_SR_INT_MASK2);
+}
+
+static int ativic32_set_type(struct irq_data *data, unsigned int flow_type)
+{
+	printk(KERN_WARNING "interrupt type is not configurable\n");

If it is not configurable, what is the point of having each interrupt carry a trigger type in DT?

Quoted 5 lines
drivers/irqchip/irq-ativic32.c new file +5 -0
+	return 0;
+}
+
+static struct irq_chip ativic32_chip = {
+	.name = "ativic32",

drivers/irqchip/irq-ativic32.c line 68

Quoted 10 lines
drivers/irqchip/irq-ativic32.c new file +10 -0
+	.irq_ack = ativic32_ack_irq,
+	.irq_mask = ativic32_mask_irq,
+	.irq_mask_ack = ativic32_mask_ack_irq,
+	.irq_unmask = ativic32_unmask_irq,
+	.irq_set_type = ativic32_set_type,
+};
+
+static unsigned int __initdata nivic_map[6] = { 6, 2, 10, 16, 24, 32 };
+
+struct irq_domain *root_domain;

Why isn't this static? Is there anything accessing it from outside of this driver?

Quoted 7 lines
drivers/irqchip/irq-ativic32.c new file +7 -0
+static int ativic32_irq_domain_map(struct irq_domain *id, unsigned int virq,
+				  irq_hw_number_t hw)
+{
+
+	unsigned long int_trigger_type;
+	int_trigger_type = __nds32__mfsr(NDS32_SR_INT_TRIGGER);
+	if (int_trigger_type & (1 << hw))

drivers/irqchip/irq-ativic32.c line 85

Quoted 10 lines
drivers/irqchip/irq-ativic32.c new file +10 -0
+		irq_set_chip_and_handler(virq, &ativic32_chip, handle_edge_irq);
+	else
+		irq_set_chip_and_handler(virq, &ativic32_chip, handle_level_irq);
+
+	return 0;
+}
+
+static struct irq_domain_ops ativic32_ops = {
+	.map = ativic32_irq_domain_map,
+	.xlate = irq_domain_xlate_onecell

Huh... Your DT binding insist on two cells, and yet...

Quoted 11 lines
drivers/irqchip/irq-ativic32.c new file +11 -0
+};
+
+static int get_intr_src(void)
+{
+	return ((__nds32__mfsr(NDS32_SR_ITYPE)&ITYPE_mskVECTOR) >> ITYPE_offVECTOR)
+		- NDS32_VECTOR_offINTERRUPT;
+}
+
+asmlinkage void asm_do_IRQ(struct pt_regs *regs)
+{
+	struct pt_regs *old_regs = set_irq_regs(regs);

drivers/irqchip/irq-ativic32.c line 106

Quoted 10 lines
drivers/irqchip/irq-ativic32.c new file +10 -0
+	int virq;
+	int irq = get_intr_src();
+
+	/*
+	 * Some hardware gives randomly wrong interrupts.  Rather
+	 * than crashing, do something sensible.
+	 */
+	if (unlikely(irq >= NR_IRQS)) {
+		pr_emerg( "IRQ exceeds NR_IRQS\n");
+		BUG();

Given the above comment, I find this hilarious!

drivers/irqchip/irq-ativic32.c line 113

Quoted 7 lines
drivers/irqchip/irq-ativic32.c new file +7 -0
+	}
+
+	irq_enter();
+	virq = irq_find_mapping(root_domain, irq);
+	generic_handle_irq(virq);
+	irq_exit();
+	set_irq_regs(old_regs);

Why can't you use handle_domain_irq() directly instead of what looks like a copy of it (this is where the comment comes from...)?

Quoted 10 lines
drivers/irqchip/irq-ativic32.c new file +10 -0
+
+}
+
+int __init ativic32_init_irq(struct device_node *node, struct device_node *parent)
+{
+	unsigned long int_vec_base, nivic, i;
+
+	if (WARN(parent, "non-root ativic32 are not supported"))
+		return -EINVAL;
+

drivers/irqchip/irq-ativic32.c line 133

Quoted 10 lines
drivers/irqchip/irq-ativic32.c new file +10 -0
+	int_vec_base = __nds32__mfsr(NDS32_SR_IVB);
+
+	if (((int_vec_base & IVB_mskIVIC_VER) >> IVB_offIVIC_VER) == 0) {
+		panic("Unable to use NOINTC option to boot on this cpu\n");
+	}
+
+	nivic = (int_vec_base & IVB_mskNIVIC) >> IVB_offNIVIC;
+	if (nivic >= (sizeof nivic_map / sizeof nivic_map[0])) {
+		panic
+		    ("The number of input for IVIC Controller is not supported on this cpu\n");

Irk. Please leave this on a single line... Or better yet, get rid of it (see below).

drivers/irqchip/irq-ativic32.c line 135

Quoted 2 lines
drivers/irqchip/irq-ativic32.c new file +2 -0
+	}
+	nivic = nivic_map[nivic];

If you have multiple configurations, I'd rather they live in DT, specially if the IP is easily configurable.

drivers/irqchip/irq-ativic32.c line 144

Quoted 9 lines
drivers/irqchip/irq-ativic32.c new file +9 -0
+
+	root_domain = irq_domain_add_linear(node, nivic,
+			&ativic32_ops, NULL);
+
+	if (!root_domain)
+		panic("%s: unable to create IRQ domain\n", node->full_name);
+
+	for(i = 0; i < nivic; i++)
+		irq_create_mapping(root_domain, i);

You shouldn't need this, as the core DT code will populate the interrupt on demand.

drivers/irqchip/irq-ativic32.c line 149

Quoted 6 lines
drivers/irqchip/irq-ativic32.c new file +5 -0
+
+	return 0;
+
+}
+IRQCHIP_DECLARE(ativic32, "andestech,ativic32", ativic32_init_irq);

Thanks,

	M.
Signature · 1 line
Jazz is not dead. It just smells funny...
#95 lore raw

Re: [PATCH 28/31] irqchip: Andestech Internal Vector Interrupt Controller driver

2017-11-08 22:24 GMT+08:00 Marc Zyngier <[email protected]>:

Quoted 7 lines · Greentime Hu
Quoted 2 lines

From: Greentime Hu <[email protected]>

Please add a commit message, indicating what this does, and potentially a pointer to some documentation (if publicly available).

Thans.
I will add proper commit messages in the next version patch.

Quoted 71 lines
Quoted 71 lines
---
 drivers/irqchip/Makefile       |    1 +
 drivers/irqchip/irq-ativic32.c |  149 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 150 insertions(+)
 create mode 100644 drivers/irqchip/irq-ativic32.c
drivers/irqchip/Makefile +1 -0
index b842dfd..201ca9f 100644
@@ -80,3 +80,4 @@ obj-$(CONFIG_ARCH_ASPEED)           += irq-aspeed-vic.o irq-aspeed-i2c-ic.o
 obj-$(CONFIG_STM32_EXTI)             += irq-stm32-exti.o
 obj-$(CONFIG_QCOM_IRQ_COMBINER)              += qcom-irq-combiner.o
 obj-$(CONFIG_IRQ_UNIPHIER_AIDET)     += irq-uniphier-aidet.o
+obj-$(CONFIG_NDS32)                  += irq-ativic32.o
drivers/irqchip/irq-ativic32.c new file +48 -0
new file mode 100644
index 0000000..d3dae59
@@ -0,0 +1,149 @@
+/*
+ * Copyright (C) 2005-2017 Andes Technology Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/interrupt.h>
+#include <linux/irqdomain.h>
+#include <linux/irqchip.h>
+#include <nds32_intrinsic.h>
+
+static void ativic32_ack_irq(struct irq_data *data)
+{
+     __nds32__mtsr_dsb(1 << data->hwirq, NDS32_SR_INT_PEND2);
+}
+
+static void ativic32_mask_irq(struct irq_data *data)
+{
+     unsigned long int_mask2 = __nds32__mfsr(NDS32_SR_INT_MASK2);
+     __nds32__mtsr_dsb(int_mask2 & (~(1 << data->hwirq)), NDS32_SR_INT_MASK2);
+}
+
+static void ativic32_mask_ack_irq(struct irq_data *data)
+{
+     unsigned long int_mask2 = __nds32__mfsr(NDS32_SR_INT_MASK2);
+     __nds32__mtsr_dsb(int_mask2 & (~(1 << data->hwirq)), NDS32_SR_INT_MASK2);
+     __nds32__mtsr_dsb((1 << data->hwirq), NDS32_SR_INT_PEND2);
+
+}
+
+static void ativic32_unmask_irq(struct irq_data *data)
+{
+     unsigned long int_mask2 = __nds32__mfsr(NDS32_SR_INT_MASK2);
+     __nds32__mtsr_dsb(int_mask2 | (1 << data->hwirq), NDS32_SR_INT_MASK2);
Quoted 8 lines

drivers/irqchip/irq-ativic32.c line 53

Quoted 5 lines
drivers/irqchip/irq-ativic32.c new file +5 -0
+}
+
+static int ativic32_set_type(struct irq_data *data, unsigned int flow_type)
+{
+     printk(KERN_WARNING "interrupt type is not configurable\n");

If it is not configurable, what is the point of having each interrupt carry a trigger type in DT?

Make sense.
We should remove this function and DT trigger type description.

Quoted 10 lines
Quoted 10 lines
drivers/irqchip/irq-ativic32.c new file +10 -0
+     return 0;
+}
+
+static struct irq_chip ativic32_chip = {
+     .name = "ativic32",
+     .irq_ack = ativic32_ack_irq,
+     .irq_mask = ativic32_mask_irq,
+     .irq_mask_ack = ativic32_mask_ack_irq,
+     .irq_unmask = ativic32_unmask_irq,
+     .irq_set_type = ativic32_set_type,
Quoted 8 lines

drivers/irqchip/irq-ativic32.c line 68

Quoted 5 lines
drivers/irqchip/irq-ativic32.c new file +5 -0
+};
+
+static unsigned int __initdata nivic_map[6] = { 6, 2, 10, 16, 24, 32 };
+
+struct irq_domain *root_domain;

Why isn't this static? Is there anything accessing it from outside of this driver?

Thanks.
I will check if it is not used outside and add static in the next version patch.

Quoted 11 lines
Quoted 11 lines
drivers/irqchip/irq-ativic32.c new file +11 -0
+static int ativic32_irq_domain_map(struct irq_domain *id, unsigned int virq,
+                               irq_hw_number_t hw)
+{
+
+     unsigned long int_trigger_type;
+     int_trigger_type = __nds32__mfsr(NDS32_SR_INT_TRIGGER);
+     if (int_trigger_type & (1 << hw))
+             irq_set_chip_and_handler(virq, &ativic32_chip, handle_edge_irq);
+     else
+             irq_set_chip_and_handler(virq, &ativic32_chip, handle_level_irq);
+
Quoted 8 lines

drivers/irqchip/irq-ativic32.c line 85

Quoted 6 lines
drivers/irqchip/irq-ativic32.c new file +6 -0
+     return 0;
+}
+
+static struct irq_domain_ops ativic32_ops = {
+     .map = ativic32_irq_domain_map,
+     .xlate = irq_domain_xlate_onecell

Huh... Your DT binding insist on two cells, and yet...

Thanks.
It is inconsistent. We will fix it in the next version patch.

Quoted 15 lines
Quoted 15 lines
drivers/irqchip/irq-ativic32.c new file +15 -0
+};
+
+static int get_intr_src(void)
+{
+     return ((__nds32__mfsr(NDS32_SR_ITYPE)&ITYPE_mskVECTOR) >> ITYPE_offVECTOR)
+             - NDS32_VECTOR_offINTERRUPT;
+}
+
+asmlinkage void asm_do_IRQ(struct pt_regs *regs)
+{
+     struct pt_regs *old_regs = set_irq_regs(regs);
+     int virq;
+     int irq = get_intr_src();
+
+     /*
Quoted 8 lines

drivers/irqchip/irq-ativic32.c line 106

Quoted 6 lines
drivers/irqchip/irq-ativic32.c new file +6 -0
+      * Some hardware gives randomly wrong interrupts.  Rather
+      * than crashing, do something sensible.
+      */
+     if (unlikely(irq >= NR_IRQS)) {
+             pr_emerg( "IRQ exceeds NR_IRQS\n");
+             BUG();

Given the above comment, I find this hilarious!

Thanks.
We will write more proper comments.

Quoted 10 lines

drivers/irqchip/irq-ativic32.c line 113

Quoted 7 lines
drivers/irqchip/irq-ativic32.c new file +7 -0
+     }
+
+     irq_enter();
+     virq = irq_find_mapping(root_domain, irq);
+     generic_handle_irq(virq);
+     irq_exit();
+     set_irq_regs(old_regs);

Why can't you use handle_domain_irq() directly instead of what looks like a copy of it (this is where the comment comes from...)?

Thanks.
We will try to use handle_domain_irq() in the next version patch.

Quoted 15 lines
Quoted 15 lines
drivers/irqchip/irq-ativic32.c new file +15 -0
+
+}
+
+int __init ativic32_init_irq(struct device_node *node, struct device_node *parent)
+{
+     unsigned long int_vec_base, nivic, i;
+
+     if (WARN(parent, "non-root ativic32 are not supported"))
+             return -EINVAL;
+
+     int_vec_base = __nds32__mfsr(NDS32_SR_IVB);
+
+     if (((int_vec_base & IVB_mskIVIC_VER) >> IVB_offIVIC_VER) == 0) {
+             panic("Unable to use NOINTC option to boot on this cpu\n");
+     }
Quoted 8 lines

drivers/irqchip/irq-ativic32.c line 133

Quoted 5 lines
drivers/irqchip/irq-ativic32.c new file +5 -0
+
+     nivic = (int_vec_base & IVB_mskNIVIC) >> IVB_offNIVIC;
+     if (nivic >= (sizeof nivic_map / sizeof nivic_map[0])) {
+             panic
+                 ("The number of input for IVIC Controller is not supported on this cpu\n");

Irk. Please leave this on a single line... Or better yet, get rid of it (see below).

Thanks.
We will fix it in the next version patch.

Quoted 5 lines

drivers/irqchip/irq-ativic32.c line 135

Quoted 2 lines
drivers/irqchip/irq-ativic32.c new file +2 -0
+     }
+     nivic = nivic_map[nivic];

If you have multiple configurations, I'd rather they live in DT, specially if the IP is easily configurable.

Thanks.
But this is read from HW register. IMHO it will be more readable if we read this
config from HW and do the relative actions.

Quoted 4 lines
Quoted 4 lines
drivers/irqchip/irq-ativic32.c new file +4 -0
+
+     root_domain = irq_domain_add_linear(node, nivic,
+                     &ativic32_ops, NULL);
+
Quoted 8 lines

drivers/irqchip/irq-ativic32.c line 144

Quoted 5 lines
drivers/irqchip/irq-ativic32.c new file +5 -0
+     if (!root_domain)
+             panic("%s: unable to create IRQ domain\n", node->full_name);
+
+     for(i = 0; i < nivic; i++)
+             irq_create_mapping(root_domain, i);

You shouldn't need this, as the core DT code will populate the interrupt on demand.

Thanks.
We will fix it in the next version patch.

Quoted 12 lines

drivers/irqchip/irq-ativic32.c line 149

Quoted 6 lines
drivers/irqchip/irq-ativic32.c new file +5 -0
+
+     return 0;
+
+}
+IRQCHIP_DECLARE(ativic32, "andestech,ativic32", ativic32_init_irq);

Thanks,

        M.

--
Jazz is not dead. It just smells funny...

#96 lore raw

PATCH 29/31 MAINTAINERS: Add nds32

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 MAINTAINERS |    9 +++++++++
 1 file changed, 9 insertions(+)
MAINTAINERS +9 -0
index 2f4e462..bce1181 100644
@@ -857,6 +857,15 @@ X:	drivers/iio/*/adjd*
 F:	drivers/staging/iio/*/ad*
 F:	drivers/staging/iio/trigger/iio-trig-bfin-timer.c
 
+ANDES ARCHITECTURE
+M:	Greentime Hu <[email protected]>
+M:	Vincent Chen <[email protected]>
+T:	git https://github.com/andestech/linux.git
+S:	Supported
+F:	arch/nds32
+K:	nds32
+N:	nds32
+
 ANDROID CONFIG FRAGMENTS
 M:	Rob Herring <[email protected]>
 S:	Supported
Signature · 1 line
1.7.9.5
#97 lore raw

Re: [PATCH 29/31] MAINTAINERS: Add nds32

Quoted 12 lines · Greentime Hu

From: Greentime Hu <[email protected]>

---
 MAINTAINERS |    9 +++++++++
 1 file changed, 9 insertions(+)
MAINTAINERS +0 -0
index 2f4e462..bce1181 100644

MAINTAINERS X: drivers/iio/*/adjd* · line 865

Quoted 9 lines
MAINTAINERS +6 -0
@@ -857,6 +857,15 @@ X: drivers/iio/*/adjd*
 F:     drivers/staging/iio/*/ad*
 F:     drivers/staging/iio/trigger/iio-trig-bfin-timer.c
 
+ANDES ARCHITECTURE
+M:     Greentime Hu <[email protected]>
+M:     Vincent Chen <[email protected]>
+T:     git https://github.com/andestech/linux.git
+S:     Supported
+F:     arch/nds32

DT binding files?

Quoted 9 lines
MAINTAINERS +3 -1
+K:     nds32
+N:     nds32
+
 ANDROID CONFIG FRAGMENTS
 M:     Rob Herring <[email protected]>
 S:     Supported
--

1.7.9.5

#98 lore raw

Re: [PATCH 29/31] MAINTAINERS: Add nds32

2017-11-08 21:31 GMT+08:00 Rob Herring <[email protected]>:

Quoted 16 lines · Greentime Hu
Quoted 15 lines

From: Greentime Hu <[email protected]>

---
 MAINTAINERS |    9 +++++++++
 1 file changed, 9 insertions(+)
MAINTAINERS +0 -0
index 2f4e462..bce1181 100644
@@ -857,6 +857,15 @@ X: drivers/iio/*/adjd*
 F:     drivers/staging/iio/*/ad*
 F:     drivers/staging/iio/trigger/iio-trig-bfin-timer.c
 
Quoted 8 lines

MAINTAINERS X: drivers/iio/*/adjd* · line 865

Quoted 6 lines
MAINTAINERS +6 -0
+ANDES ARCHITECTURE
+M:     Greentime Hu <[email protected]>
+M:     Vincent Chen <[email protected]>
+T:     git https://github.com/andestech/linux.git
+S:     Supported
+F:     arch/nds32

DT binding files?

Thanks.
I should add

F:    Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
F:    Documentation/devicetree/bindings/nds32/cpus.txt

I will fix it in the next version patch.

Quoted 10 lines
Quoted 10 lines
MAINTAINERS +3 -1
+K:     nds32
+N:     nds32
+
 ANDROID CONFIG FRAGMENTS
 M:     Rob Herring <[email protected]>
 S:     Supported
--

1.7.9.5

maintainer
#99 lore raw

Re: [PATCH 29/31] MAINTAINERS: Add nds32

Quoted 26 lines · Greentime Hu

2017-11-08 21:31 GMT+08:00 Rob Herring <[email protected]>:

Quoted 16 lines · Greentime Hu
Quoted 15 lines

From: Greentime Hu <[email protected]>

---
 MAINTAINERS |    9 +++++++++
 1 file changed, 9 insertions(+)
MAINTAINERS +0 -0
index 2f4e462..bce1181 100644
@@ -857,6 +857,15 @@ X: drivers/iio/*/adjd*
 F:     drivers/staging/iio/*/ad*
 F:     drivers/staging/iio/trigger/iio-trig-bfin-timer.c
 
Quoted 8 lines

MAINTAINERS X: drivers/iio/*/adjd* · line 865

Quoted 6 lines
MAINTAINERS +6 -0
+ANDES ARCHITECTURE
+M:     Greentime Hu <[email protected]>
+M:     Vincent Chen <[email protected]>
+T:     git https://github.com/andestech/linux.git
+S:     Supported
+F:     arch/nds32

DT binding files?

Quoted 6 lines

Thanks.
I should add

F:    Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
F:    Documentation/devicetree/bindings/nds32/cpus.txt

I will fix it in the next version patch.

Better make the second one the directory, in case you add more files there later.

I would also add a "K: nds32" line to catch all files that have this in their names.

Arnd

#100 lore raw

Re: [PATCH 29/31] MAINTAINERS: Add nds32

Quoted 32 lines · Arnd Bergmann
Quoted 31 lines · Greentime Hu

2017-11-08 21:31 GMT+08:00 Rob Herring <[email protected]>:

Quoted 16 lines · Greentime Hu
Quoted 15 lines

From: Greentime Hu <[email protected]>

---
 MAINTAINERS |    9 +++++++++
 1 file changed, 9 insertions(+)
MAINTAINERS +0 -0
index 2f4e462..bce1181 100644
@@ -857,6 +857,15 @@ X: drivers/iio/*/adjd*
 F:     drivers/staging/iio/*/ad*
 F:     drivers/staging/iio/trigger/iio-trig-bfin-timer.c
 
Quoted 8 lines

MAINTAINERS X: drivers/iio/*/adjd* · line 865

Quoted 6 lines
MAINTAINERS +6 -0
+ANDES ARCHITECTURE
+M:     Greentime Hu <[email protected]>
+M:     Vincent Chen <[email protected]>
+T:     git https://github.com/andestech/linux.git
+S:     Supported
+F:     arch/nds32

DT binding files?

Thanks.
I should add

F:    Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
F:    Documentation/devicetree/bindings/nds32/cpus.txt
Quoted 7 lines
Quoted 1 line

I will fix it in the next version patch.

Better make the second one the directory, in case you add more files there later.

I would also add a "K: nds32" line to catch all files that have this in their names.

That's probably not what would be desired

K: looks for keywords inside all file contents
N: looks for filenames matching a regex pattern

See the header in MAINTAINERS for more details

#101 lore raw

Re: [PATCH 29/31] MAINTAINERS: Add nds32

2017-11-14 23:39 GMT+08:00 Joe Perches <[email protected]>:

Quoted 33 lines · Arnd Bergmann
Quoted 32 lines · Greentime Hu
Quoted 31 lines

2017-11-08 21:31 GMT+08:00 Rob Herring <[email protected]>:

Quoted 16 lines · Greentime Hu
Quoted 15 lines

From: Greentime Hu <[email protected]>

---
 MAINTAINERS |    9 +++++++++
 1 file changed, 9 insertions(+)
MAINTAINERS +0 -0
index 2f4e462..bce1181 100644
@@ -857,6 +857,15 @@ X: drivers/iio/*/adjd*
 F:     drivers/staging/iio/*/ad*
 F:     drivers/staging/iio/trigger/iio-trig-bfin-timer.c
 
Quoted 8 lines

MAINTAINERS X: drivers/iio/*/adjd* · line 865

Quoted 6 lines
MAINTAINERS +6 -0
+ANDES ARCHITECTURE
+M:     Greentime Hu <[email protected]>
+M:     Vincent Chen <[email protected]>
+T:     git https://github.com/andestech/linux.git
+S:     Supported
+F:     arch/nds32

DT binding files?

Thanks.
I should add

F:    Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
F:    Documentation/devicetree/bindings/nds32/cpus.txt
Quoted 5 lines
Quoted 5 lines
Quoted 1 line

I will fix it in the next version patch.

Better make the second one the directory, in case you add more files there later.

Thanks. I will add the second one directory.

Quoted 10 lines
Quoted 2 lines

I would also add a "K: nds32" line to catch all files that have this in their names.

That's probably not what would be desired

K: looks for keywords inside all file contents
N: looks for filenames matching a regex pattern

See the header in MAINTAINERS for more details

Thanks.
I will add K and N both.

#102 lore raw

PATCH 30/31 dt-bindings: nds32 CPU Bindings

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 Documentation/devicetree/bindings/nds32/cpus.txt |   33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt
Documentation/devicetree/bindings/nds32/cpus.txt new file +33 -0
new file mode 100644
index 0000000..97394cb
@@ -0,0 +1,33 @@
+* Andestech Processor Binding
+
+This binding specifies what properties must be available in the device tree
+representation of a Andestech Processor Core, which is the root node in the
+tree.
+
+Required properties:
+
+	- compatible:
+		Usage: required
+		Value type: <string>
+		Definition: should be one of:
+			"andestech,n13"
+			"andestech,n15"
+			"andestech,d15"
+			"andestech,n10"
+			"andestech,d10"
+
+    - device_type
+		Usage: required
+		Value type: <string>
+		Definition: must be "cpu"
+
+* Examples
+
+/ {
+	cpus {
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "andestech,n13", "andestech,n15";
+		};
+	};
+};
Signature · 1 line
1.7.9.5
#103 lore raw

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

Please Cc the DT list on bindings.

Quoted 1 line · Greentime Hu

From: Greentime Hu <[email protected]>

Commit message needed.

Quoted 22 lines
---
 Documentation/devicetree/bindings/nds32/cpus.txt |   33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt
Documentation/devicetree/bindings/nds32/cpus.txt new file +7 -0
new file mode 100644
index 0000000..97394cb
@@ -0,0 +1,33 @@
+* Andestech Processor Binding
+
+This binding specifies what properties must be available in the device tree
+representation of a Andestech Processor Core, which is the root node in the
+tree.
+
+Required properties:

Documentation/devicetree/bindings/nds32/cpus.txt line 17

Quoted 10 lines
Documentation/devicetree/bindings/nds32/cpus.txt new file +10 -0
+
+       - compatible:
+               Usage: required
+               Value type: <string>
+               Definition: should be one of:
+                       "andestech,n13"
+                       "andestech,n15"
+                       "andestech,d15"
+                       "andestech,n10"
+                       "andestech,d10"

SMP supported for any of these?

Documentation/devicetree/bindings/nds32/cpus.txt line 28

Quoted 11 lines
Documentation/devicetree/bindings/nds32/cpus.txt new file +11 -0
+
+    - device_type
+               Usage: required
+               Value type: <string>
+               Definition: must be "cpu"
+
+* Examples
+
+/ {
+       cpus {
+               cpu@0 {

Needs a reg property or drop the unit address.

Documentation/devicetree/bindings/nds32/cpus.txt line 30

Quoted 2 lines
Documentation/devicetree/bindings/nds32/cpus.txt new file +2 -0
+                       device_type = "cpu";
+                       compatible = "andestech,n13", "andestech,n15";

n13 is a superset of n15?

Quoted 6 lines
Documentation/devicetree/bindings/nds32/cpus.txt new file +3 -1
+               };
+       };
+};
--

1.7.9.5

#104 lore raw

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

2017-11-08 21:18 GMT+08:00 Rob Herring <[email protected]>:

Quoted 1 line

Please Cc the DT list on bindings.

Sorry. I am not sure what you mean.
Do you mean add [email protected] to cc list?

Quoted 4 lines · Greentime Hu
Quoted 1 line

From: Greentime Hu <[email protected]>

Commit message needed.

Thanks. I will add more commit messages in the next version patch.

Quoted 26 lines
Quoted 26 lines
---
 Documentation/devicetree/bindings/nds32/cpus.txt |   33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt
Documentation/devicetree/bindings/nds32/cpus.txt new file +11 -0
new file mode 100644
index 0000000..97394cb
@@ -0,0 +1,33 @@
+* Andestech Processor Binding
+
+This binding specifies what properties must be available in the device tree
+representation of a Andestech Processor Core, which is the root node in the
+tree.
+
+Required properties:
+
+       - compatible:
+               Usage: required
+               Value type: <string>
Quoted 8 lines

Documentation/devicetree/bindings/nds32/cpus.txt line 17

Quoted 6 lines
Documentation/devicetree/bindings/nds32/cpus.txt new file +6 -0
+               Definition: should be one of:
+                       "andestech,n13"
+                       "andestech,n15"
+                       "andestech,d15"
+                       "andestech,n10"
+                       "andestech,d10"

SMP supported for any of these?

We don't support SMP now.

Quoted 5 lines
Quoted 5 lines
Documentation/devicetree/bindings/nds32/cpus.txt new file +5 -0
+
+    - device_type
+               Usage: required
+               Value type: <string>
+               Definition: must be "cpu"
Quoted 8 lines

Documentation/devicetree/bindings/nds32/cpus.txt line 28

Quoted 6 lines
Documentation/devicetree/bindings/nds32/cpus.txt new file +6 -0
+
+* Examples
+
+/ {
+       cpus {
+               cpu@0 {

Needs a reg property or drop the unit address.

Thanks.
I will fix it in the next version patch.

Quoted 4 lines

Documentation/devicetree/bindings/nds32/cpus.txt line 30

Quoted 2 lines
Documentation/devicetree/bindings/nds32/cpus.txt new file +2 -0
+                       device_type = "cpu";
+                       compatible = "andestech,n13", "andestech,n15";

n13 is a superset of n15?

No, they are independent ones.

maintainer
#105 lore raw

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

Quoted 5 lines · Greentime Hu

2017-11-08 21:18 GMT+08:00 Rob Herring <[email protected]>:

Quoted 1 line

Please Cc the DT list on bindings.

Sorry. I am not sure what you mean.
Do you mean add [email protected] to cc list?

Yes. Use get_maintainers.pl as a guide.

Quoted 10 lines
Quoted 8 lines · Greentime Hu

Documentation/devicetree/bindings/nds32/cpus.txt line 30

Quoted 5 lines

From: Greentime Hu <greentime-MUIXKm3Oiri1Z/[email protected]>

Documentation/devicetree/bindings/nds32/cpus.txt new file +2 -0
+                       device_type = "cpu";
+                       compatible = "andestech,n13", "andestech,n15";

n13 is a superset of n15?

No, they are independent ones.

Then having both is not valid. The strings should be in order of best match to worst match where worst match is typically either older implementations of IP blocks or generic'ish strings such as "ns16550" for a UART.

Rob
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To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html

#106 lore raw

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

2017-11-09 21:57 GMT+08:00 Rob Herring <[email protected]>:

Quoted 8 lines · Greentime Hu
Quoted 5 lines

2017-11-08 21:18 GMT+08:00 Rob Herring <[email protected]>:

Quoted 1 line

Please Cc the DT list on bindings.

Sorry. I am not sure what you mean.
Do you mean add [email protected] to cc list?

Yes. Use get_maintainers.pl as a guide.

Roger that! Thanks!

Quoted 7 lines
Quoted 7 lines
Quoted 7 lines · Greentime Hu
Quoted 5 lines

From: Greentime Hu <[email protected]>

Documentation/devicetree/bindings/nds32/cpus.txt new file +2 -0
+                       device_type = "cpu";
+                       compatible = "andestech,n13", "andestech,n15";
Quoted 8 lines
Quoted 3 lines
Quoted 1 line

n13 is a superset of n15?

No, they are independent ones.

Then having both is not valid. The strings should be in order of best match to worst match where worst match is typically either older implementations of IP blocks or generic'ish strings such as "ns16550" for a UART.

Thanks.
I would like to explain it more clearly.
They are independent ones in implementations.
They are implemented based on the same nds32 ISA and architecture spec with different configurations
like cache size, page size, cache type(VIPT/PIPT), pipeline stages... Most of them are compatible.
They use the same toolchain to build vmlinux which can run on different nds32 cores.

maintainer
#107 lore raw

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

Quoted 28 lines · Greentime Hu

2017-11-09 21:57 GMT+08:00 Rob Herring <[email protected]>:

Quoted 8 lines · Greentime Hu
Quoted 5 lines

2017-11-08 21:18 GMT+08:00 Rob Herring <[email protected]>:

Quoted 1 line

Please Cc the DT list on bindings.

Sorry. I am not sure what you mean.
Do you mean add [email protected] to cc list?

Yes. Use get_maintainers.pl as a guide.

Roger that! Thanks!

Quoted 7 lines
Quoted 7 lines
Quoted 7 lines · Greentime Hu
Quoted 5 lines

From: Greentime Hu <[email protected]>

Documentation/devicetree/bindings/nds32/cpus.txt new file +2 -0
+                       device_type = "cpu";
+                       compatible = "andestech,n13", "andestech,n15";
Quoted 8 lines
Quoted 3 lines
Quoted 1 line

n13 is a superset of n15?

No, they are independent ones.

Then having both is not valid. The strings should be in order of best match to worst match where worst match is typically either older implementations of IP blocks or generic'ish strings such as "ns16550" for a UART.

Quoted 9 lines

Thanks.
I would like to explain it more clearly.
They are independent ones in implementations.
They are implemented based on the same nds32 ISA and architecture spec with different configurations
like cache size, page size, cache type(VIPT/PIPT), pipeline stages... Most of them are compatible.
They use the same toolchain to build vmlinux which can run on different nds32 cores.

Du you have a name for the ISA spec that distinguishes it from other nds32 versions that are incompatible? If you do, this could be written like

compatible = "andestech,n13", "andestech,nds32v3.0";

to signify that a an 'n13' core implements the 'v3.0' ISA (will it whatever you call the ISA in reality).

Arnd

#108 lore raw

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

Quoted 15 lines
Quoted 5 lines
Quoted 4 lines

Then having both is not valid. The strings should be in order of best match to worst match where worst match is typically either older implementations of IP blocks or generic'ish strings such as "ns16550" for a UART.

Quoted 9 lines

Thanks.
I would like to explain it more clearly.
They are independent ones in implementations.
They are implemented based on the same nds32 ISA and architecture spec with different configurations
like cache size, page size, cache type(VIPT/PIPT), pipeline stages... Most of them are compatible.
They use the same toolchain to build vmlinux which can run on different nds32 cores.

Quoted 8 lines

Du you have a name for the ISA spec that distinguishes it from other nds32 versions that are incompatible? If you do, this could be written like

compatible = "andestech,n13", "andestech,nds32v3.0";

to signify that a an 'n13' core implements the 'v3.0' ISA (will it whatever you call the ISA in reality).

Thanks. I got you.
I will use a proper name(maybe 'nds32v3') of ISA in this compatible string in the next version patch.
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#109 lore raw

PATCH 31/31 net: faraday add nds32 support.

In reply to Greentime Hu

From: Greentime Hu <[email protected]>

---
 drivers/net/ethernet/faraday/Kconfig |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/net/ethernet/faraday/Kconfig +3 -3
index 040c7f1..0ae6e9a 100644
@@ -5,7 +5,7 @@
 config NET_VENDOR_FARADAY
 	bool "Faraday devices"
 	default y
-	depends on ARM
+	depends on ARM || NDS32
 	---help---
 	  If you have a network (Ethernet) card belonging to this class, say Y.
 
@@ -18,7 +18,7 @@ if NET_VENDOR_FARADAY
 
 config FTMAC100
 	tristate "Faraday FTMAC100 10/100 Ethernet support"
-	depends on ARM
+	depends on ARM || NDS32
 	select MII
 	---help---
 	  This driver supports the FTMAC100 10/100 Ethernet controller
@@ -27,7 +27,7 @@ config FTMAC100
 
 config FTGMAC100
 	tristate "Faraday FTGMAC100 Gigabit Ethernet support"
-	depends on ARM
+	depends on ARM || NDS32
 	select PHYLIB
 	---help---
 	  This driver supports the FTGMAC100 Gigabit Ethernet controller
Signature · 1 line
1.7.9.5
#111 lore raw

2017-11-08 16:32 GMT+08:00 David Howells <[email protected]>:

Quoted 6 lines
Quoted 2 lines · Greentime Hu

The build script and toolchain repositories are able to be found here:
https://github.com/andestech/build_script.git

Is arch support in upstream binutils and gcc?

Yes, it is but only supporting elf-toolchain now. We will do the upstream for Linux-toolchain in the next step.

maintainer
#112 lore raw
Quoted 10 lines · Greentime Hu

2017-11-08 16:32 GMT+08:00 David Howells <[email protected]>:

Quoted 6 lines
Quoted 2 lines · Greentime Hu

The build script and toolchain repositories are able to be found here:
https://github.com/andestech/build_script.git

Is arch support in upstream binutils and gcc?

Yes, it is but only supporting elf-toolchain now. We will do the upstream for Linux-toolchain in the next step.

Is the Linux toolchain only required for building user space, or do you also need it
for building kernels? It's often possible to build kernels with a bare toolchain, and
that helps a lot for automated testing.

Arnd

#113 lore raw

2017-11-08 18:18 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 9 lines · Greentime Hu
Quoted 8 lines

2017-11-08 16:32 GMT+08:00 David Howells <[email protected]>:

Quoted 6 lines
Quoted 2 lines · Greentime Hu

The build script and toolchain repositories are able to be found here:
https://github.com/andestech/build_script.git

Is arch support in upstream binutils and gcc?

Quoted 8 lines
Quoted 2 lines

Yes, it is but only supporting elf-toolchain now. We will do the upstream for Linux-toolchain in the next step.

Is the Linux toolchain only required for building user space, or do you also need it
for building kernels? It's often possible to build kernels with a bare toolchain, and
that helps a lot for automated testing.

Yes, nds32 kernel is able to be built with elf-toolchain too.

maintainer
#114 lore raw
In reply to Greentime Hu
Quoted 11 lines · Greentime Hu

This patchset adds core architecture support to Linux for Andestech's N13, N15, D15, N10, D10 processor cores.

Based on the 16/32-bit AndeStar RISC-like architecture, we designed the configurable AndesCore series of embedded processor families. AndesCores range from highly performance-efficient small-footprint cores for microcontrollers and deeply-embedded applications to 1GHz+ cores running Linux, covering general-purpose N-series cores for a wide range of computing need, DSP-capable D-series cores for digital signal control, instruction-extensible E-series cores for application-specific acceleration, and secure S-series cores for best protection of the most valuable.

I looked at the entire patch series now and commented on anything I noticed that could be improved, overall this looks very nice, great work!

Most of my comments are about tiny details that are easy to address.

I see two areas that need to be looked at carefully, and that may take a few more rounds to get right:

- In the user space ABI, you have a couple of things that differ from the normal asm-generic definitions, i.e. s few syscall entry points and some types in asm/posix-types.h. I guess you did that to remain compatible with an older glibc port, but IMHO this compatibility should be broken in favor of having the standard ABI before the port gets merged.

- For the boot interface, you need to clearly define what can be expected and what cannot. This involves the presence of the l2cc, the physical memory address, the built-in dtb, and probably a few more things I missed. For long-term maintainability, you probably want to ensure that you can build a kernel that runs on as much diverse hardware as possible.

Arnd

#115 lore raw

2017-11-08 18:26 GMT+08:00 Arnd Bergmann <[email protected]>:

Quoted 27 lines · Greentime Hu
Quoted 11 lines

This patchset adds core architecture support to Linux for Andestech's N13, N15, D15, N10, D10 processor cores.

Based on the 16/32-bit AndeStar RISC-like architecture, we designed the configurable AndesCore series of embedded processor families. AndesCores range from highly performance-efficient small-footprint cores for microcontrollers and deeply-embedded applications to 1GHz+ cores running Linux, covering general-purpose N-series cores for a wide range of computing need, DSP-capable D-series cores for digital signal control, instruction-extensible E-series cores for application-specific acceleration, and secure S-series cores for best protection of the most valuable.

I looked at the entire patch series now and commented on anything I noticed that could be improved, overall this looks very nice, great work!

Most of my comments are about tiny details that are easy to address.

I see two areas that need to be looked at carefully, and that may take a few more rounds to get right:

- In the user space ABI, you have a couple of things that differ from the normal asm-generic definitions, i.e. s few syscall entry points and some types in asm/posix-types.h. I guess you did that to remain compatible with an older glibc port, but IMHO this compatibility should be broken in favor of having the standard ABI before the port gets merged.

Quoted 6 lines

- For the boot interface, you need to clearly define what can be expected and what cannot. This involves the presence of the l2cc, the physical memory address, the built-in dtb, and probably a few more things I missed. For long-term maintainability, you probably want to ensure that you can build a kernel that runs on as much diverse hardware as possible.

Many thanks to all your feedbacks. We will prepare the V2 patch to fix them ASAP. :)