dt-bindings: add Marvell PMU documentation

Add the required DT binding documentation for the Marvell PMU driver.

Acked-by Rob Herring <[email protected]>

Signed-off-by Russell King <[email protected]>

---
Who takes these patches? This never got merged when the PMU driver itself was merged.

Quoted 7 lines · On Sunday 06 December 2015 23:52:21 Russell King wrote:

Add the required DT binding documentation for the Marvell PMU driver.

Acked-by Rob Herring <[email protected]>

Signed-off-by Russell King <[email protected]>

---
Who takes these patches? This never got merged when the PMU driver itself was merged.

I'd say it should go along with the dts changes for mvebu, and we'll merge it through arm-soc.

Quoted 9 lines · Arnd Bergmann

Quoted 7 lines · On Sunday 06 December 2015 23:52:21 Russell King wrote:

Add the required DT binding documentation for the Marvell PMU driver.

Acked-by Rob Herring <[email protected]>

Signed-off-by Russell King <[email protected]>

---
Who takes these patches? This never got merged when the PMU driver itself was merged.

Quoted 2 lines

I'd say it should go along with the dts changes for mvebu, and we'll merge it through arm-soc.

Well, it didn't, the dts changes are already in as well. Someone now needs to pick it up independently.

I wonder how many more of the undocumented bindings are actually caused by people not realising that the binding docs patches have been ignored. (Yes, I've found cases in the past where bindings are undocumented, and no, I don't keep a list and I don't remember which they were.)

Signature · 2 lines

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Add the required DT binding documentation for the Marvell PMU driver.

Acked-by Rob Herring <[email protected]>

Signed-off-by Russell King <[email protected]>

---
Who takes these patches? This never got merged when the PMU driver itself was merged.

 Documentation/devicetree/bindings/soc/dove/pmu.txt | 56 ++++++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/dove/pmu.txt

Documentation/devicetree/bindings/soc/dove/pmu.txt new file +56 -0

new file mode 100644
index 000000000000..edd40b796b74
@@ -0,0 +1,56 @@
+Device Tree bindings for Marvell PMU
+
+Required properties:
+ - compatible: value should be "marvell,dove-pmu".
+    May also include "simple-bus" if there are child devices, in which
+    case the ranges node is required.
+ - reg: two base addresses and sizes of the PM controller and PMU.
+ - interrupts: single interrupt number for the PMU interrupt
+ - interrupt-controller: must be specified as the PMU itself is an
+    interrupt controller.
+ - #interrupt-cells: must be 1.
+ - #reset-cells: must be 1.
+ - domains: sub-node containing domain descriptions
+
+Optional properties:
+ - ranges: defines the address mapping for child devices, as per the
+   standard property of this name.  Required when compatible includes
+   "simple-bus".
+
+Power domain descriptions are listed as child nodes of the "domains"
+sub-node.  Each domain has the following properties:
+
+Required properties:
+ - #power-domain-cells: must be 0.
+
+Optional properties:
+ - marvell,pmu_pwr_mask: specifies the mask value for PMU power register
+ - marvell,pmu_iso_mask: specifies the mask value for PMU isolation register
+ - resets: points to the reset manager (PMU node) and reset index.
+
+Example:
+
+	pmu: power-management at d0000 {
+		compatible = "marvell,dove-pmu";
+		reg = <0xd0000 0x8000>, <0xd8000 0x8000>;
+		interrupts = <33>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		#reset-cells = <1>;
+
+		domains {
+			vpu_domain: vpu-domain {
+				#power-domain-cells = <0>;
+				marvell,pmu_pwr_mask = <0x00000008>;
+				marvell,pmu_iso_mask = <0x00000001>;
+				resets = <&pmu 16>;
+			};
+
+			gpu_domain: gpu-domain {
+				#power-domain-cells = <0>;
+				marvell,pmu_pwr_mask = <0x00000004>;
+				marvell,pmu_iso_mask = <0x00000002>;
+				resets = <&pmu 18>;
+			};
+		};
+	};

Signature · 1 line

2.1.0