MIPS: CI20: Add efuse driver for Ingenic JZ4780 and attach to DM9000 for stable MAC addresses

PATCH Applied H. Nikolaus Schaller 5 participants 17 messages Feb 28, 2020 – Apr 20, 2020

Subsystems (5)

Device tree bindings MIPS Memory controller drivers NVMEM framework +1 more subsystems

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H. Nikolaus Schaller

author

2020-02-28 16:01 UTC #0 lore raw

v8 cover MIPS: CI20: Add efuse driver for Ingenic JZ4780 and attach to DM9000 for stable MAC addresses

* fix a compiler warning/error (reported by Paul Cercueil <[email protected]>)
* remove clock-names from properties (suggested by Paul Cercueil <[email protected]>)

PATCH V7 2020-02-28 14:58:30:
* use devm_add_action_or_reset to unprepare clock in case of error (suggested by Paul Cercueil <[email protected]>)
* use already existing constants to check for overflow of rd_adj and rd_strobe
* remove clock-names from bindings example and DTS (suggested by Paul Cercueil <[email protected]>)
* addition for nemc driver to handle this correctly (contributed by Paul Cercueil <[email protected]>)
* make efuse a child node of nemc to avoid problems with overlapping
reg address ranges (suggested by Paul Cercueil <[email protected]>)

PATCH V6 2020-02-26 12:16:07:
* add dependency on CONFIG_OF and select REGMAP_MMIO (suggested by Paul Cercueil <[email protected]>)
* add clk_prepare_enable() (suggested by Paul Cercueil <[email protected]>)
* inline jz4780_efuse_read_32bytes() since it is only used once
* remove read optimization for full block (suggested by Paul Cercueil <[email protected]>)
* simplify calculations for rd_adj and rd_strobe (suggested by Paul Cercueil <[email protected]>)
* do calculations for rd_adj and rd_strobe in local variables
* fix overflow check (did allow for 5 bit values although register is 4 bit wide)
* fixes for yaml (sugested by Andreas Kemnade <[email protected]>)

PATCH V5 2020-02-22 11:25:35:
* no longer RFC but PATCH
* add yaml bindings (by Andreas Kemnade <[email protected]>)
* fixes to yaml (suggested by Rob Herring <[email protected]>)

RFC V4 2020-02-17 17:55:35:
* removed read_only for nvmem config because there is no write method
* Kconfig: replaced depends MACH_JZ4780 with MACH_INGENIC
* run through checkpatch and fixed issues
* made use of devm_nvram_register() and get rid of jz4780_efuse_remove() (suggested by Srinivas Kandagatla <[email protected]>)
* squashed previous patch 1/9 and 2/9 into single (regmap based) driver

RFC V3 2020-02-16 20:20:59:

This series is based on and a follow up for

https://lore.kernel.org/patchwork/cover/868157/

("[v2,0/2] Add efuse driver for Ingenic JZ4780 SoC")

Original authors were
PrasannaKumar Muralidharan <[email protected]> Mathieu Malaterre <[email protected]>

and there are additions / code improvements by
H. Nikolaus Schaller <[email protected]>
Paul Cercueil <[email protected]>

This setup works, if the dm9000 driver is compiled as a module.

Therefore it is all RFC level. It is also not completely checkpatched.

H. Nikolaus Schaller (1):
MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find the
default MAC address

Paul Cercueil (1):
memory: jz4780_nemc: Only request IO memory the driver will use

PrasannaKumar Muralidharan (5):
nvmem: add driver for JZ4780 efuse
Bindings: nvmem: add bindings for JZ4780 efuse
Documentation: ABI: nvmem: add documentation for JZ4780 efuse ABI
nvmem: MAINTAINERS: add maintainer for JZ4780 efuse driver
MIPS: DTS: JZ4780: define node for JZ4780 efuse

 .../ABI/testing/sysfs-driver-jz4780-efuse     |  16 ++
 .../bindings/nvmem/ingenic,jz4780-efuse.yaml  |  45 ++++
 MAINTAINERS                                   |   5 +
 arch/mips/boot/dts/ingenic/ci20.dts           |   3 +
 arch/mips/boot/dts/ingenic/jz4780.dtsi        |  19 +-
 drivers/memory/jz4780-nemc.c                  |  15 +-
 drivers/nvmem/Kconfig                         |  12 +
 drivers/nvmem/Makefile                        |   2 +
 drivers/nvmem/jz4780-efuse.c                  | 239 ++++++++++++++++++
 9 files changed, 353 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-jz4780-efuse
 create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
 create mode 100644 drivers/nvmem/jz4780-efuse.c

Signature · 1 line

2.23.0

H. Nikolaus Schaller

author

2020-02-28 16:01 UTC #1 lore raw

PATCH v8 1/7 memory: jz4780_nemc: Only request IO memory the driver will use

From: Paul Cercueil <[email protected]>

The driver only uses the registers up to offset 0x54. Since the EFUSE registers are in the middle of the NEMC registers, we only request the registers we will use for now - that way the EFUSE driver can probe too.

Tested-by H. Nikolaus Schaller <[email protected]>

Signed-off-by Paul Cercueil <[email protected]>

---
 drivers/memory/jz4780-nemc.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

drivers/memory/jz4780-nemc.c +14 -1

index b232ed279fc3..647267ea8c63 100644
@@ -8,6 +8,7 @@
 
 #include <linux/clk.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/math64.h>
 #include <linux/of.h>
 #include <linux/of_address.h>

@@ -288,7 +289,19 @@ static int jz4780_nemc_probe(struct platform_device *pdev)
 	nemc->dev = dev;
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	nemc->base = devm_ioremap_resource(dev, res);
+
+	/*
+	 * The driver only uses the registers up to offset 0x54. Since the EFUSE
+	 * registers are in the middle of the NEMC registers, we only request
+	 * the registers we will use for now - that way the EFUSE driver can
+	 * probe too.
+	 */
+	if (!devm_request_mem_region(dev, res->start, 0x54, dev_name(dev))) {
+		dev_err(dev, "unable to request I/O memory region\n");
+		return -EBUSY;
+	}
+
+	nemc->base = devm_ioremap(dev, res->start, resource_size(res));
 	if (IS_ERR(nemc->base)) {
 		dev_err(dev, "failed to get I/O memory\n");
 		return PTR_ERR(nemc->base);

Signature · 1 line

2.23.0

Paul Cercueil

maintainer

2020-04-16 12:12 UTC #2 lore raw

Re: [PATCH v8 1/7] memory: jz4780_nemc: Only request IO memory the driver will use

Greg:

Can you take this patch? Since there is no maintainer for drivers/memory/. It still applies fine on top of 5.7-rc1.

Cheers,
-Paul

Quoted 53 lines · H. Nikolaus Schaller

From: Paul Cercueil <[email protected]>

Tested-by H. Nikolaus Schaller <[email protected]>

Signed-off-by Paul Cercueil <[email protected]>

---
 drivers/memory/jz4780-nemc.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

drivers/memory/jz4780-nemc.c +4 -1

index b232ed279fc3..647267ea8c63 100644
@@ -8,6 +8,7 @@
 
 #include <linux/clk.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/math64.h>
 #include <linux/of.h>
 #include <linux/of_address.h>

@@ -288,7 +289,19 @@ static int jz4780_nemc_probe(struct 
 platform_device *pdev)
 	nemc->dev = dev;
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	nemc->base = devm_ioremap_resource(dev, res);
+
+	/*
+	 * The driver only uses the registers up to offset 0x54. Since the

EFUSE

drivers/memory/jz4780-nemc.c +1 -0

+	 * registers are in the middle of the NEMC registers, we only

request

drivers/memory/jz4780-nemc.c +4 -0

+	 * the registers we will use for now - that way the EFUSE driver can
+	 * probe too.
+	 */
+	if (!devm_request_mem_region(dev, res->start, 0x54, dev_name(dev)))

{

drivers/memory/jz4780-nemc.c +5 -1

+		dev_err(dev, "unable to request I/O memory region\n");
+		return -EBUSY;
+	}
+
+	nemc->base = devm_ioremap(dev, res->start, resource_size(res));
 	if (IS_ERR(nemc->base)) {
 		dev_err(dev, "failed to get I/O memory\n");
 		return PTR_ERR(nemc->base);
--

2.23.0

H. Nikolaus Schaller

author

2020-02-28 16:01 UTC #3 lore raw

PATCH v8 2/7 nvmem: add driver for JZ4780 efuse

In reply to H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>

This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory and nvmem cells.

To fetch for example the MAC address:

dd if=/sys/devices/platform/134100d0.efuse/jz4780-efuse0/nvmem bs=1 skip=34 count=6 status=none | xxd

Tested-by Mathieu Malaterre <[email protected]>

Signed-off-by PrasannaKumar Muralidharan <[email protected]>

Signed-off-by Mathieu Malaterre <[email protected]>

Signed-off-by H. Nikolaus Schaller <[email protected]>

Signed-off-by Paul Cercueil <[email protected]>

---
 drivers/nvmem/Kconfig        |  12 ++
 drivers/nvmem/Makefile       |   2 +
 drivers/nvmem/jz4780-efuse.c | 239 +++++++++++++++++++++++++++++++++++
 3 files changed, 253 insertions(+)
 create mode 100644 drivers/nvmem/jz4780-efuse.c

drivers/nvmem/Kconfig +12 -0

index 35efab1ba8d9..d7b7f6d688e7 100644
@@ -55,6 +55,18 @@ config NVMEM_IMX_OCOTP_SCU
 	  This is a driver for the SCU On-Chip OTP Controller (OCOTP)
 	  available on i.MX8 SoCs.
 
+config JZ4780_EFUSE
+	tristate "JZ4780 EFUSE Memory Support"
+	depends on MACH_INGENIC || COMPILE_TEST
+	depends on HAS_IOMEM
+	depends on OF
+	select REGMAP_MMIO
+	help
+	  Say Y here to include support for JZ4780 efuse memory found on
+	  all JZ4780 SoC based devices.
+	  To compile this driver as a module, choose M here: the module
+	  will be called nvmem_jz4780_efuse.
+
 config NVMEM_LPC18XX_EEPROM
 	tristate "NXP LPC18XX EEPROM Memory Support"
 	depends on ARCH_LPC18XX || COMPILE_TEST

drivers/nvmem/Makefile +2 -0

index 6b466cd1427b..65a268d17807 100644
@@ -18,6 +18,8 @@ obj-$(CONFIG_NVMEM_IMX_OCOTP)	+= nvmem-imx-ocotp.o
 nvmem-imx-ocotp-y		:= imx-ocotp.o
 obj-$(CONFIG_NVMEM_IMX_OCOTP_SCU)	+= nvmem-imx-ocotp-scu.o
 nvmem-imx-ocotp-scu-y		:= imx-ocotp-scu.o
+obj-$(CONFIG_JZ4780_EFUSE)		+= nvmem_jz4780_efuse.o
+nvmem_jz4780_efuse-y		:= jz4780-efuse.o
 obj-$(CONFIG_NVMEM_LPC18XX_EEPROM)	+= nvmem_lpc18xx_eeprom.o
 nvmem_lpc18xx_eeprom-y	:= lpc18xx_eeprom.o
 obj-$(CONFIG_NVMEM_LPC18XX_OTP)	+= nvmem_lpc18xx_otp.o

drivers/nvmem/jz4780-efuse.c new file +239 -0

239 lines not on this page · raw message

Signature · 1 line

2.23.0

Srinivas Kandagatla

2020-03-05 17:53 UTC #4 lore raw

Re: [PATCH v8 2/7] nvmem: add driver for JZ4780 efuse

Quoted 14 lines · H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>
This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory and nvmem cells.
To fetch for example the MAC address:
dd if=/sys/devices/platform/134100d0.efuse/jz4780-efuse0/nvmem bs=1 skip=34 count=6 status=none | xxd
Tested-by Mathieu Malaterre <[email protected]>
Signed-off-by PrasannaKumar Muralidharan <[email protected]>
Signed-off-by Mathieu Malaterre <[email protected]>
Signed-off-by H. Nikolaus Schaller <[email protected]>
Signed-off-by Paul Cercueil <[email protected]>

Quoted 4 lines

---
  drivers/nvmem/Kconfig        |  12 ++
  drivers/nvmem/Makefile       |   2 +
  drivers/nvmem/jz4780-efuse.c | 239 +++++++++++++++++++++++++++++++++++

Applied thanks,
--srini

H. Nikolaus Schaller

author

2020-02-28 16:01 UTC #5 lore raw

PATCH v8 3/7 Bindings: nvmem: add bindings for JZ4780 efuse

In reply to H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>

This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory.

Tested-by Mathieu Malaterre <[email protected]>

Signed-off-by PrasannaKumar Muralidharan <[email protected]>

Signed-off-by Mathieu Malaterre <[email protected]>

Signed-off-by H. Nikolaus Schaller <[email protected]>

[converted to yaml]

Signed-off-by Andreas Kemnade <[email protected]>

---
 .../bindings/nvmem/ingenic,jz4780-efuse.yaml  | 45 +++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml

Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml new file +45 -0

new file mode 100644
index 000000000000..1485d3fbabfd
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/ingenic,jz4780-efuse.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ingenic JZ EFUSE driver bindings
+
+maintainers:
+  - PrasannaKumar Muralidharan <[email protected]>
+
+allOf:
+  - $ref: "nvmem.yaml#"
+
+properties:
+  compatible:
+    enum:
+      - ingenic,jz4780-efuse
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    # Handle for the ahb for the efuse.
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/jz4780-cgu.h>
+
+    efuse@134100d0 {
+        compatible = "ingenic,jz4780-efuse";
+        reg = <0x134100d0 0x2c>;
+
+        clocks = <&cgu JZ4780_CLK_AHB2>;
+    };
+
+...

Signature · 1 line

2.23.0

Rob Herring

maintainer Reviewed-by on v8 3/7

2020-03-02 23:41 UTC #6 lore raw

Re: [PATCH v8 3/7] Bindings: nvmem: add bindings for JZ4780 efuse

Quoted 11 lines · H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>
This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory.
Tested-by Mathieu Malaterre <[email protected]>
Signed-off-by PrasannaKumar Muralidharan <[email protected]>
Signed-off-by Mathieu Malaterre <[email protected]>
Signed-off-by H. Nikolaus Schaller <[email protected]>
[converted to yaml]
Signed-off-by Andreas Kemnade <[email protected]>

Quoted 5 lines

---
 .../bindings/nvmem/ingenic,jz4780-efuse.yaml  | 45 +++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml

Reviewed-by Rob Herring <[email protected]>

Srinivas Kandagatla

2020-03-05 17:53 UTC #7 lore raw

Re: [PATCH v8 3/7] Bindings: nvmem: add bindings for JZ4780 efuse

In reply to H. Nikolaus Schaller

Quoted 11 lines · H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>
This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory.
Tested-by Mathieu Malaterre <[email protected]>
Signed-off-by PrasannaKumar Muralidharan <[email protected]>
Signed-off-by Mathieu Malaterre <[email protected]>
Signed-off-by H. Nikolaus Schaller <[email protected]>
[converted to yaml]
Signed-off-by Andreas Kemnade <[email protected]>

Quoted 4 lines

---
  .../bindings/nvmem/ingenic,jz4780-efuse.yaml  | 45 +++++++++++++++++++
  1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml

Applied thanks,
--srini

H. Nikolaus Schaller

author

2020-02-28 16:01 UTC #8 lore raw

PATCH v8 4/7 Documentation: ABI: nvmem: add documentation for JZ4780 efuse ABI

In reply to H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>

This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory.

Tested-by Mathieu Malaterre <[email protected]>

Signed-off-by PrasannaKumar Muralidharan <[email protected]>

Signed-off-by Mathieu Malaterre <[email protected]>

---
 .../ABI/testing/sysfs-driver-jz4780-efuse        | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-jz4780-efuse

Documentation/ABI/testing/sysfs-driver-jz4780-efuse new file +16 -0

new file mode 100644
index 000000000000..bb6f5d6ceea0
@@ -0,0 +1,16 @@
+What:		/sys/devices/*/<our-device>/nvmem
+Date:		December 2017
+Contact:	PrasannaKumar Muralidharan <[email protected]>
+Description:	read-only access to the efuse on the Ingenic JZ4780 SoC
+		The SoC has a one time programmable 8K efuse that is
+		split into segments. The driver supports read only.
+		The segments are
+		0x000   64 bit Random Number
+		0x008  128 bit Ingenic Chip ID
+		0x018  128 bit Customer ID
+		0x028 3520 bit Reserved
+		0x1E0    8 bit Protect Segment
+		0x1E1 2296 bit HDMI Key
+		0x300 2048 bit Security boot key
+Users:		any user space application which wants to read the Chip
+		and Customer ID

Signature · 1 line

2.23.0

Srinivas Kandagatla

2020-03-05 17:55 UTC #9 lore raw

Re: [PATCH v8 4/7] Documentation: ABI: nvmem: add documentation for JZ4780 efuse ABI

Quoted 11 lines · H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>
This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory.
Tested-by Mathieu Malaterre <[email protected]>
Signed-off-by PrasannaKumar Muralidharan <[email protected]>
Signed-off-by Mathieu Malaterre <[email protected]>
---
  .../ABI/testing/sysfs-driver-jz4780-efuse        | 16 ++++++++++++++++
  1 file changed, 16 insertions(+)

Applied thanks,
--srini

H. Nikolaus Schaller

author

2020-02-28 16:01 UTC #10 lore raw

PATCH v8 5/7 nvmem: MAINTAINERS: add maintainer for JZ4780 efuse driver

In reply to H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>

This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory.

Tested-by Mathieu Malaterre <[email protected]>

Signed-off-by PrasannaKumar Muralidharan <[email protected]>

Signed-off-by Mathieu Malaterre <[email protected]>

---
 MAINTAINERS | 5 +++++
 1 file changed, 5 insertions(+)

MAINTAINERS +5 -0

index fcd79fc38928..fcb8d89c2b2e 100644
@@ -8271,6 +8271,11 @@ M:	Zubair Lutfullah Kakakhel <[email protected]>
 S:	Maintained
 F:	drivers/dma/dma-jz4780.c
 
+INGENIC JZ4780 EFUSE Driver
+M:	PrasannaKumar Muralidharan <[email protected]>
+S:	Maintained
+F:	drivers/nvmem/jz4780-efuse.c
+
 INGENIC JZ4780 NAND DRIVER
 M:	Harvey Hunt <[email protected]>
 L:	[email protected]

Signature · 1 line

2.23.0

H. Nikolaus Schaller

author

2020-02-28 16:01 UTC #11 lore raw

PATCH v8 6/7 MIPS: DTS: JZ4780: define node for JZ4780 efuse

In reply to H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>

This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory and the ethernet mac address for the davicom dm9000 chip on the CI20 board.

It also changes the nemc ranges definition to give the driver access to the efuse registers, which are in the middle of the nemc reg range.

Tested-by Mathieu Malaterre <[email protected]>

Signed-off-by PrasannaKumar Muralidharan <[email protected]>

Signed-off-by Mathieu Malaterre <[email protected]>

Signed-off-by H. Nikolaus Schaller <[email protected]>

---
 arch/mips/boot/dts/ingenic/jz4780.dtsi | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

arch/mips/boot/dts/ingenic/jz4780.dtsi +17 -2

index f928329b034b..79f90a5b0415 100644
@@ -357,11 +357,12 @@
 	};
 
 	nemc: nemc@13410000 {
-		compatible = "ingenic,jz4780-nemc";
+		compatible = "ingenic,jz4780-nemc", "simple-mfd";
 		reg = <0x13410000 0x10000>;
 		#address-cells = <2>;
 		#size-cells = <1>;
-		ranges = <1 0 0x1b000000 0x1000000
+		ranges = <0 0 0x13410000 0x10000
+			  1 0 0x1b000000 0x1000000
 			  2 0 0x1a000000 0x1000000
 			  3 0 0x19000000 0x1000000
 			  4 0 0x18000000 0x1000000

@@ -371,6 +372,20 @@
 		clocks = <&cgu JZ4780_CLK_NEMC>;
 
 		status = "disabled";
+
+		efuse: efuse@d0 {
+			reg = <0 0xd0 0x30>;
+			compatible = "ingenic,jz4780-efuse";
+
+			clocks = <&cgu JZ4780_CLK_AHB2>;
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			eth0_addr: eth-mac-addr@0x22 {
+				reg = <0x22 0x6>;
+			};
+		};
 	};
 
 	dma: dma@13420000 {

Signature · 1 line

2.23.0

Thomas Bogendoerfer

maintainer Applied

2020-04-20 07:27 UTC #12 lore raw

Re: [PATCH v8 6/7] MIPS: DTS: JZ4780: define node for JZ4780 efuse

Quoted 10 lines · H. Nikolaus Schaller

From: PrasannaKumar Muralidharan <[email protected]>
This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory and the ethernet mac address for the davicom dm9000 chip on the CI20 board.
It also changes the nemc ranges definition to give the driver access to the efuse registers, which are in the middle of the nemc reg range.

Quoted 7 lines

Tested-by Mathieu Malaterre <[email protected]>
Signed-off-by PrasannaKumar Muralidharan <[email protected]>
Signed-off-by Mathieu Malaterre <[email protected]>
Signed-off-by H. Nikolaus Schaller <[email protected]>
---
 arch/mips/boot/dts/ingenic/jz4780.dtsi | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

applied to mips-next.

Thomas.

Signature · 2 lines

Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

H. Nikolaus Schaller

author

2020-02-28 16:01 UTC #13 lore raw

PATCH v8 7/7 MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find the default MAC address

In reply to H. Nikolaus Schaller

There is a unique MAC address programmed into the eFuses of the JZ4780 chip in the CI20 factory. By using this for initializing the DM9000 Ethernet controller, every CI20 board has an individual - but stable - MAC address and DHCP can assign stable IP addresses.

Signed-off-by H. Nikolaus Schaller <[email protected]>

---
 arch/mips/boot/dts/ingenic/ci20.dts | 3 +++
 1 file changed, 3 insertions(+)

arch/mips/boot/dts/ingenic/ci20.dts +3 -0

index 37b93166bf22..6dc1f9eeff00 100644
@@ -355,6 +355,9 @@
 
 		interrupt-parent = <&gpe>;
 		interrupts = <19 4>;
+
+		nvmem-cells = <&eth0_addr>;
+		nvmem-cell-names = "mac-address";
 	};
 };

Signature · 1 line

2.23.0

Thomas Bogendoerfer

maintainer Applied

2020-04-20 07:27 UTC #14 lore raw

Re: [PATCH v8 7/7] MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find the default MAC address

Quoted 10 lines · H. Nikolaus Schaller

There is a unique MAC address programmed into the eFuses of the JZ4780 chip in the CI20 factory. By using this for initializing the DM9000 Ethernet controller, every CI20 board has an individual - but stable - MAC address and DHCP can assign stable IP addresses.
Signed-off-by H. Nikolaus Schaller <[email protected]>
---
 arch/mips/boot/dts/ingenic/ci20.dts | 3 +++
 1 file changed, 3 insertions(+)

applied to mips-next.

Thomas.

Signature · 2 lines

Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

Paul Cercueil

maintainer Reviewed-by on the v8 series

2020-02-28 16:26 UTC #15 lore raw

In reply to H. Nikolaus Schaller

Hi Nikolaus,

For the whole series:

Reviewed-by Paul Cercueil <[email protected]>

Cheers,
-Paul

Quoted 93 lines · H. Nikolaus Schaller

* fix a compiler warning/error (reported by Paul Cercueil <[email protected]>)
* remove clock-names from properties (suggested by Paul Cercueil <[email protected]>)
PATCH V7 2020-02-28 14:58:30:
* use devm_add_action_or_reset to unprepare clock in case of error (suggested by Paul Cercueil <[email protected]>)
* use already existing constants to check for overflow of rd_adj and rd_strobe
* remove clock-names from bindings example and DTS (suggested by Paul Cercueil <[email protected]>)
* addition for nemc driver to handle this correctly (contributed by Paul Cercueil <[email protected]>)
* make efuse a child node of nemc to avoid problems with overlapping
reg address ranges (suggested by Paul Cercueil
<[email protected]>)
PATCH V6 2020-02-26 12:16:07:
* add dependency on CONFIG_OF and select REGMAP_MMIO (suggested by Paul Cercueil <[email protected]>)
* add clk_prepare_enable() (suggested by Paul Cercueil <[email protected]>)
* inline jz4780_efuse_read_32bytes() since it is only used once
* remove read optimization for full block (suggested by Paul Cercueil <[email protected]>)
* simplify calculations for rd_adj and rd_strobe (suggested by Paul Cercueil <[email protected]>)
* do calculations for rd_adj and rd_strobe in local variables
* fix overflow check (did allow for 5 bit values although register is 4 bit wide)
* fixes for yaml (sugested by Andreas Kemnade <[email protected]>)
PATCH V5 2020-02-22 11:25:35:
* no longer RFC but PATCH
* add yaml bindings (by Andreas Kemnade <[email protected]>)
* fixes to yaml (suggested by Rob Herring <[email protected]>)
RFC V4 2020-02-17 17:55:35:
* removed read_only for nvmem config because there is no write method
* Kconfig: replaced depends MACH_JZ4780 with MACH_INGENIC
* run through checkpatch and fixed issues
* made use of devm_nvram_register() and get rid of jz4780_efuse_remove() (suggested by Srinivas Kandagatla <[email protected]>)
* squashed previous patch 1/9 and 2/9 into single (regmap based) driver
RFC V3 2020-02-16 20:20:59:
This series is based on and a follow up for
https://lore.kernel.org/patchwork/cover/868157/
("[v2,0/2] Add efuse driver for Ingenic JZ4780 SoC")
Original authors were
PrasannaKumar Muralidharan <[email protected]> Mathieu Malaterre <[email protected]>
and there are additions / code improvements by
H. Nikolaus Schaller <[email protected]>
Paul Cercueil <[email protected]>
This setup works, if the dm9000 driver is compiled as a module.
Therefore it is all RFC level. It is also not completely checkpatched.
H. Nikolaus Schaller (1):
MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find
the
default MAC address
Paul Cercueil (1):
memory: jz4780_nemc: Only request IO memory the driver will use
PrasannaKumar Muralidharan (5):
nvmem: add driver for JZ4780 efuse
Bindings: nvmem: add bindings for JZ4780 efuse
Documentation: ABI: nvmem: add documentation for JZ4780 efuse ABI
nvmem: MAINTAINERS: add maintainer for JZ4780 efuse driver
MIPS: DTS: JZ4780: define node for JZ4780 efuse
 .../ABI/testing/sysfs-driver-jz4780-efuse     |  16 ++
 .../bindings/nvmem/ingenic,jz4780-efuse.yaml  |  45 ++++
 MAINTAINERS                                   |   5 +
 arch/mips/boot/dts/ingenic/ci20.dts           |   3 +
 arch/mips/boot/dts/ingenic/jz4780.dtsi        |  19 +-
 drivers/memory/jz4780-nemc.c                  |  15 +-
 drivers/nvmem/Kconfig                         |  12 +
 drivers/nvmem/Makefile                        |   2 +
 drivers/nvmem/jz4780-efuse.c                  | 239 
++++++++++++++++++
 9 files changed, 353 insertions(+), 3 deletions(-)
 create mode 100644 
Documentation/ABI/testing/sysfs-driver-jz4780-efuse
 create mode 100644 
Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
 create mode 100644 drivers/nvmem/jz4780-efuse.c
--
2.23.0

Srinivas Kandagatla

2020-03-05 18:03 UTC #16 lore raw

In reply to H. Nikolaus Schaller

Quoted 81 lines · H. Nikolaus Schaller

* fix a compiler warning/error (reported by Paul Cercueil <[email protected]>)
* remove clock-names from properties (suggested by Paul Cercueil <[email protected]>)
PATCH V7 2020-02-28 14:58:30:
* use devm_add_action_or_reset to unprepare clock in case of error (suggested by Paul Cercueil <[email protected]>)
* use already existing constants to check for overflow of rd_adj and rd_strobe
* remove clock-names from bindings example and DTS (suggested by Paul Cercueil <[email protected]>)
* addition for nemc driver to handle this correctly (contributed by Paul Cercueil <[email protected]>)
* make efuse a child node of nemc to avoid problems with overlapping
reg address ranges (suggested by Paul Cercueil <[email protected]>)
PATCH V6 2020-02-26 12:16:07:
* add dependency on CONFIG_OF and select REGMAP_MMIO (suggested by Paul Cercueil <[email protected]>)
* add clk_prepare_enable() (suggested by Paul Cercueil <[email protected]>)
* inline jz4780_efuse_read_32bytes() since it is only used once
* remove read optimization for full block (suggested by Paul Cercueil <[email protected]>)
* simplify calculations for rd_adj and rd_strobe (suggested by Paul Cercueil <[email protected]>)
* do calculations for rd_adj and rd_strobe in local variables
* fix overflow check (did allow for 5 bit values although register is 4 bit wide)
* fixes for yaml (sugested by Andreas Kemnade <[email protected]>)
PATCH V5 2020-02-22 11:25:35:
* no longer RFC but PATCH
* add yaml bindings (by Andreas Kemnade <[email protected]>)
* fixes to yaml (suggested by Rob Herring <[email protected]>)
RFC V4 2020-02-17 17:55:35:
* removed read_only for nvmem config because there is no write method
* Kconfig: replaced depends MACH_JZ4780 with MACH_INGENIC
* run through checkpatch and fixed issues
* made use of devm_nvram_register() and get rid of jz4780_efuse_remove() (suggested by Srinivas Kandagatla <[email protected]>)
* squashed previous patch 1/9 and 2/9 into single (regmap based) driver
RFC V3 2020-02-16 20:20:59:
This series is based on and a follow up for
https://lore.kernel.org/patchwork/cover/868157/
("[v2,0/2] Add efuse driver for Ingenic JZ4780 SoC")
Original authors were
PrasannaKumar Muralidharan <[email protected]> Mathieu Malaterre <[email protected]>
and there are additions / code improvements by
H. Nikolaus Schaller <[email protected]>
Paul Cercueil <[email protected]>
This setup works, if the dm9000 driver is compiled as a module.
Therefore it is all RFC level. It is also not completely checkpatched.
H. Nikolaus Schaller (1):
MIPS: DTS: CI20: make DM9000 Ethernet controller use NVMEM to find the
default MAC address
Paul Cercueil (1):
memory: jz4780_nemc: Only request IO memory the driver will use
PrasannaKumar Muralidharan (5):
nvmem: add driver for JZ4780 efuse
Bindings: nvmem: add bindings for JZ4780 efuse
Documentation: ABI: nvmem: add documentation for JZ4780 efuse ABI
nvmem: MAINTAINERS: add maintainer for JZ4780 efuse driver
MIPS: DTS: JZ4780: define node for JZ4780 efuse
  .../ABI/testing/sysfs-driver-jz4780-efuse     |  16 ++
  .../bindings/nvmem/ingenic,jz4780-efuse.yaml  |  45 ++++
  MAINTAINERS                                   |   5 +
  arch/mips/boot/dts/ingenic/ci20.dts           |   3 +
  arch/mips/boot/dts/ingenic/jz4780.dtsi        |  19 +-
  drivers/memory/jz4780-nemc.c                  |  15 +-
  drivers/nvmem/Kconfig                         |  12 +
  drivers/nvmem/Makefile                        |   2 +
  drivers/nvmem/jz4780-efuse.c                  | 239 ++++++++++++++++++
  9 files changed, 353 insertions(+), 3 deletions(-)

Quoted 4 lines

create mode 100644 Documentation/ABI/testing/sysfs-driver-jz4780-efuse create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml create mode 100644 drivers/nvmem/jz4780-efuse.c

I have applied Patch 2/7, 3/7, 4/7 with are nvmem subsystem related, other patches have to go via respective maintainer tree.

--srini