Migrate the PCIe-IDIO-24 and WS16C48 GPIO drivers to the regmap API

Changes in v6:
- Wrap lines to 80 characters rather than 100 for set_type_config()
- Remove regmap_config max_register lines as superfluous
- Enable use_raw_spinlock to prevent deadlocks when running -rt kernels
- Check regmap_update_bit() ret value before goto exit_unlock
- Rename exit_early label to the more descriptive exit_unlock
- Add sparse annotations for lock acquire/release in ws16c48_handle_pre_irq() and ws16c48_handle_post_irq()
- Explicitly add 0 to WS16C48_ENAB in ws16c48_irq_init_hw() for sake of symmetry to match the other WS16C48_ENAB operations
Changes in v5:
- Refactor for map parameter removal from handle_mask_sync()
- Cleanups and line wrappings to 100 characters rather than 80
- Adjust to change mutex/spinlock_t type locks to raw_spin_lock_t type
- Remove pex8311_intcsr table configurations as superfluous
- Adjust to set pex8311_intcsr_regmap_config reg_base to PLX_PEX8311_PCI_LCS_INTCSR
- Rename PAGE_FIELD_PAGE_* defines to POL_PAGE, ENAB_PAGE, and INT_ID_PAGE
Changes in v4:
- Allocate idio24gpio before using it in idio_24_probe()
Changes in v3:
- Drop map from set_type_config() parameter list; regmap can be passed by irq_drv_data instead
- Adjust idio_24_set_type_config() for parameter list
- Add mutex to prevent clobbering the COS_ENABLE register when masking IRQ and setting their type configuration
Changes in v2:
- Simplify PCIe-IDIO-24 register offset defines to remove superfluous arithmetic
- Check for NULL pointer after chip->irq_drv_data allocation
- Set gpio_regmap drvdata and use gpio_regmap_get_drvdata() to get the regmap in idio_24_reg_map_xlate()

The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver.

A patch to pass irq_drv_data as a parameter for struct regmap_irq_chip set_type_config() is included. This is needed by the idio_24_set_type_config() and ws16c48_set_type_config() callbacks in order to update the type configuration on their respective devices.

This patchset depends on the "Drop map from handle_mask_sync() parameters" patchset [0].

[0] https://lore.kernel.org/all/[email protected]/

William Breathitt Gray (3):
regmap: Pass irq_drv_data as a parameter for set_type_config()
gpio: pcie-idio-24: Migrate to the regmap API
gpio: ws16c48: Migrate to the regmap API

 drivers/base/regmap/regmap-irq.c |   8 +-
 drivers/gpio/Kconfig             |   6 +
 drivers/gpio/gpio-pcie-idio-24.c | 677 +++++++++++--------------------
 drivers/gpio/gpio-ws16c48.c      | 552 +++++++++----------------
 include/linux/regmap.h           |   6 +-
 5 files changed, 447 insertions(+), 802 deletions(-)

base-commit: 7b59bdbc3965ca8add53e084af394c13a2be22a8
prerequisite-patch-id: cd19046150b7cff1be4ac7152198777aa960a3df
prerequisite-patch-id: bd3e3830d9ce4f3876a77483364d7190b7fdffa7

2.39.2

Allow the struct regmap_irq_chip set_type_config() callback to access irq_drv_data by passing it as a parameter.

---
Changes in v6:
- Wrap lines to 80 characters rather than 100
Changes in v5:
- Wrap lines to 100 characters rather than 80
Changes in v4: none
Changes in v3:
- Drop map from set_type_config() parameter list; regmap can be passed by irq_drv_data instead
Changes in v2: none

 drivers/base/regmap/regmap-irq.c | 8 +++++---
 include/linux/regmap.h           | 6 ++++--
 2 files changed, 9 insertions(+), 5 deletions(-)

index ff6b585b9049..362926d155a4 100644
@@ -328,8 +328,8 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
 	}
 
 	if (d->chip->set_type_config) {
-		ret = d->chip->set_type_config(d->config_buf, type,
-					       irq_data, reg);
+		ret = d->chip->set_type_config(d->config_buf, type, irq_data,
+					       reg, d->chip->irq_drv_data);
 		if (ret)
 			return ret;
 	}

@@ -653,13 +653,15 @@ EXPORT_SYMBOL_GPL(regmap_irq_get_irq_reg_linear);
  * @type: The requested IRQ type.
  * @irq_data: The IRQ being configured.
  * @idx: Index of the irq's config registers within each array `buf[i]`
+ * @irq_drv_data: Driver specific IRQ data
  *
  * This is a &struct regmap_irq_chip->set_type_config callback suitable for
  * chips with one config register. Register values are updated according to
  * the &struct regmap_irq_type data associated with an IRQ.
  */
 int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
-				      const struct regmap_irq *irq_data, int idx)
+				      const struct regmap_irq *irq_data,
+				      int idx, void *irq_drv_data)
 {
 	const struct regmap_irq_type *t = &irq_data->type;
 

index 8d9d601da782..18311c12c44a 100644
@@ -1651,7 +1651,8 @@ struct regmap_irq_chip {
 	int (*set_type_virt)(unsigned int **buf, unsigned int type,
 			     unsigned long hwirq, int reg);
 	int (*set_type_config)(unsigned int **buf, unsigned int type,
-			       const struct regmap_irq *irq_data, int idx);
+			       const struct regmap_irq *irq_data, int idx,
+			       void *irq_drv_data);
 	unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data,
 				    unsigned int base, int index);
 	void *irq_drv_data;

@@ -1660,7 +1661,8 @@ struct regmap_irq_chip {
 unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data,
 					   unsigned int base, int index);
 int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
-				      const struct regmap_irq *irq_data, int idx);
+				      const struct regmap_irq *irq_data,
+				      int idx, void *irq_drv_data);
 
 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
 			int irq_base, const struct regmap_irq_chip *chip,

2.39.2

The following changes since commit e8d018dd0257f744ca50a729e3d042cf2ec9da65:

Linux 6.3-rc3 (2023-03-19 13:27:55 -0700)

are available in the Git repository at:

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git tags/regmap-set-type-irq-drv-data

for you to fetch changes up to 7697c64b9e4908196f0ae68aa6d423dd40607973:

regmap: Pass irq_drv_data as a parameter for set_type_config() (2023-04-05 17:19:24 +0100)

----------------------------------------------------------------
regmap: Pass irq_drv_data as a parameter for set_type_config()

Allow callbacks to access irq_drv_data.

----------------------------------------------------------------
William Breathitt Gray (1):
regmap: Pass irq_drv_data as a parameter for set_type_config()

 drivers/base/regmap/regmap-irq.c | 8 +++++---
 include/linux/regmap.h           | 6 ++++--
 2 files changed, 9 insertions(+), 5 deletions(-)

Pulled Mark's tag and applied the two remaining patches, thanks!

Bart

Bart, the two remaining patches still depend on the handle_mask_sync change descripted in the cover patch [0].

Mark, are you able to Ack those patches or alternatively provide an immutable branch with them? We need the handle_mask_sync change as well for the idio-16 migration patchset [1].

William Breathitt Gray

[0] https://lore.kernel.org/all/[email protected]/
[1] https://lore.kernel.org/all/[email protected]/

I don't have those patches, I presume I was expecting some change. Please resend.

Ok, I'll back them out.

Bart

The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver.

For the PCIe-IDIO-24 series of devices, the following BARs are available:

    BAR[0]: memory mapped PEX8311
    BAR[1]: I/O mapped PEX8311
    BAR[2]: I/O mapped card registers

There are 24 FET Output lines, 24 Isolated Input lines, and 8 TTL/CMOS lines (which may be configured for either output or input). The GPIO lines are exposed by the following card registers:

    Base +0x0-0x2 (Read/Write): FET Outputs
    Base +0xB (Read/Write): TTL/CMOS
    Base +0x4-0x6 (Read): Isolated Inputs
    Base +0x7 (Read): TTL/CMOS

In order for the device to support interrupts, the PLX PEX8311 internal PCI wire interrupt and local interrupt input must first be enabled.

The following card registers for Change-Of-State may be used:

    Base +0x8-0xA (Read): COS Status Inputs
    Base +0x8-0xA (Write): COS Clear Inputs
    Base +0xB (Read): COS Status TTL/CMOS
    Base +0xB (Write): COS Clear TTL/CMOS
    Base +0xE (Read/Write): COS Enable

The COS Enable register is used to enable/disable interrupts and configure the interrupt levels; each bit maps to a group of eight inputs as described below:

Bit 0: IRQ EN Rising Edge IN0-7
Bit 1: IRQ EN Rising Edge IN8-15
Bit 2: IRQ EN Rising Edge IN16-23
Bit 3: IRQ EN Rising Edge TTL0-7
Bit 4: IRQ EN Falling Edge IN0-7
Bit 5: IRQ EN Falling Edge IN8-15
Bit 6: IRQ EN Falling Edge IN16-23
Bit 7: IRQ EN Falling Edge TTL0-7

An interrupt is asserted when a change-of-state matching the interrupt level configuration respective for a particular group of eight inputs with enabled COS is detected.

The COS Status registers may be read to determine which inputs have changed; if interrupts were enabled, an IRQ will be generated for the set bits in these registers. Writing the value read from the COS Status register back to the respective COS Clear register will clear just those interrupts.

---
Changes in v6:
- Remove regmap_config max_register lines as superfluous
- Enable use_raw_spinlock to prevent deadlocks when running -rt kernels
- Rename exit_early label to the more descriptive exit_unlock
- Check regmap_update_bit() ret value before goto exit_unlock
Changes in v5:
- Refactor for map parameter removal from handle_mask_sync()
- Cleanups and line wrappings to 100 characters rather than 80
- Adjust to change mutex lock to raw_spin_lock_t
- Remove pex8311_intcsr table configurations as superfluous
- Adjust to set pex8311_intcsr_regmap_config reg_base to PLX_PEX8311_PCI_LCS_INTCSR
Changes in v4:
- Allocate idio24gpio before using it in idio_24_probe()
Changes in v3:
- Adjust idio_24_set_type_config() for parameter list
- Add mutex to prevent clobbering the COS_ENABLE register when masking IRQ and setting their type configuration
Changes in v2:
- Simplify PCIe-IDIO-24 register offset defines to remove superfluous arithmetic
- Check for NULL pointer after chip->irq_drv_data allocation
- Set gpio_regmap drvdata and use gpio_regmap_get_drvdata() to get the regmap in idio_24_reg_map_xlate()

 drivers/gpio/Kconfig             |   3 +
 drivers/gpio/gpio-pcie-idio-24.c | 677 +++++++++++--------------------
 2 files changed, 250 insertions(+), 430 deletions(-)

index 68f58b0ba79f..79359f663b3d 100644
@@ -1587,7 +1587,10 @@ config GPIO_PCI_IDIO_16
 
 config GPIO_PCIE_IDIO_24
 	tristate "ACCES PCIe-IDIO-24 GPIO support"
+	select REGMAP_IRQ
+	select REGMAP_MMIO
 	select GPIOLIB_IRQCHIP
+	select GPIO_REGMAP
 	help
 	  Enables GPIO support for the ACCES PCIe-IDIO-24 family (PCIe-IDIO-24,
 	  PCIe-IDI-24, PCIe-IDO-24, PCIe-IDIO-12). An interrupt is generated

2.39.2

The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver.

The WinSystems WS16C48 provides the following registers:

    Offset 0x0-0x5: Port 0-5 I/O
    Offset 0x6: Int_Pending
    Offset 0x7: Page/Lock
    Offset 0x8-0xA (Page 1): Pol_0-Pol_2
    Offset 0x8-0xA (Page 2): Enab_0-Enab_2
    Offset 0x8-0xA (Page 3): Int_ID0-Int_ID2

Port 0-5 I/O provides access to 48 lines of digital I/O across six registers, each bit position corresponding to the respective line. Writing a 1 to a respective bit position causes that output pin to sink current, while writing a 0 to the same bit position causes that output pin to go to a high-impedance state and allows it to be used an input. Reads on a port report the inverted state (0 = high, 1 = low) of an I/O pin when used in input mode. Interrupts are supported on Port 0-2.

Int_Pending is a read-only register that reports the combined state of the INT_ID0 through INT_ID2 registers; an interrupt pending is indicated when any of the low three bits are set.

The Page/Lock register provides the following bits:

    Bit 0-5: Port 0-5 I/O Lock
    Bit 6-7: Page 0-3 Selection

For Bits 0-5, writing a 1 to a respective bit position locks the output state of the corresponding I/O port. Writing the page number to Bits 6-7 selects that respective register page for use.

Pol_0-Pol_2 are accessible when Page 1 is selected. Writing a 1 to a respective bit position selects the rising edge detection interrupts for that input line, while writing a 0 to the same bit position selects the falling edge detection interrupts.

Enab_0-Enab_2 are accessible when Page 2 is selected. Writing a 1 to a respective bit position enables interrupts for that input line, while writing a 0 to that same bit position clears and disables interrupts for that input line.

Int_ID0-Int_ID2 are accessible when Page 3 is selected. A respective bit when read as a 1 indicates that an edge of the polarity set in the corresponding polarity register was detected for the corresponding input line. Writing any value to this register clears all pending interrupts for the register.

---
Changes in v6:
- Remove regmap_config max_register line as superfluous
- Enable use_raw_spinlock to prevent deadlocks when running -rt kernels
- Rename exit_early label to the more descriptive exit_unlock
- Add sparse annotations for lock acquire/release in ws16c48_handle_pre_irq() and ws16c48_handle_post_irq()
- Explicitly add 0 to WS16C48_ENAB in ws16c48_irq_init_hw() for sake of symmetry to match the other WS16C48_ENAB operations
Changes in v5:
- Refactor for map parameter removal from handle_mask_sync()
- Cleanups and lines to 100 characters rather than 80
- Rename PAGE_FIELD_PAGE_* defines to POL_PAGE, ENAB_PAGE, and INT_ID_PAGE
- Adjust to change spinlock_t lock to raw_spin_lock
Changes in v4: none

 drivers/gpio/Kconfig        |   3 +
 drivers/gpio/gpio-ws16c48.c | 552 ++++++++++++------------------------
 2 files changed, 188 insertions(+), 367 deletions(-)

index 79359f663b3d..2f6098034753 100644
@@ -983,7 +983,10 @@ config GPIO_WINBOND
 config GPIO_WS16C48
 	tristate "WinSystems WS16C48 GPIO support"
 	select ISA_BUS_API
+	select REGMAP_IRQ
+	select REGMAP_MMIO
 	select GPIOLIB_IRQCHIP
+	select GPIO_REGMAP
 	help
 	  Enables GPIO support for the WinSystems WS16C48. The base port
 	  addresses for the devices may be configured via the base module

2.39.2

Looks good to me now.

It might be that regmap locks are unnecessary, but as far as I understood dropping them would require more intrusion into the regmap APIs along with GPIO regmap implementation.

With Best Regards,
Andy Shevchenko

Applied to

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git for-next

Thanks!

[1/3] regmap: Pass irq_drv_data as a parameter for set_type_config()

      commit: 7697c64b9e4908196f0ae68aa6d423dd40607973

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks,
Mark

Excellent and persevere work,

Yours,
Linus Walleij