Skip to contentSkip to conversation

Add add SPI-NAND Flash controller driver for EN7581

PATCH Superseded Lorenzo Bianconi 3 participants 8 messages Apr 26, 2024 – Apr 27, 2024

Subsystems (4)

v4 of 6 Superseded Latest is v6 →

lore
Share & tools
lore

Lorenzo Bianconi

author maintainer
#0 lore raw

v4 cover Add add SPI-NAND Flash controller driver for EN7581

Introduce support for SPI-NAND driver of the Airoha NAND Flash Interface found on Airoha ARM EN7581 SoCs.

Changes since v3:
- rely on devm_kzalloc() to allocate airoha_snand_dev buffers
- rely on dev_err_probe()
- cosmetic rework
Changes since v2:
- Fix compilation warnings
- Remove interrupt entry in dts since it is not connected so far Changes since v1:
- Introduce spi clock dependency

Lorenzo Bianconi (3):
dt-bindings: spi: airoha: Add YAML schema for SNFI controller
arm64: dts: airoha: add EN7581 spi-nand node
spi: airoha: add SPI-NAND Flash controller driver

 .../bindings/spi/airoha,en7581-snand.yaml     |   65 +
 MAINTAINERS                                   |    9 +
 arch/arm64/boot/dts/airoha/en7581.dtsi        |   19 +
 drivers/spi/Kconfig                           |   10 +
 drivers/spi/Makefile                          |    1 +
 drivers/spi/spi-airoha-snfi.c                 | 1140 +++++++++++++++++
 6 files changed, 1244 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
 create mode 100644 drivers/spi/spi-airoha-snfi.c
Signature · 1 line
2.44.0
author maintainer
#1 lore raw

PATCH v4 1/3 dt-bindings: spi: airoha: Add YAML schema for SNFI controller

Introduce Airoha EN7581 SPI NAND controller binding

---
 .../bindings/spi/airoha,en7581-snand.yaml     | 65 +++++++++++++++++++
 1 file changed, 65 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml new file +65 -0
new file mode 100644
index 000000000000..b820c5613dcc
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/airoha,en7581-snand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SPI-NAND flash controller for Airoha ARM SoCs
+
+maintainers:
+  - Lorenzo Bianconi <[email protected]>
+
+allOf:
+  - $ref: spi-controller.yaml#
+
+properties:
+  compatible:
+    const: airoha,en7581-snand
+
+  reg:
+    items:
+      - description: spi base address
+      - description: nfi2spi base address
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: spi
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/en7523-clk.h>
+
+    soc {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      spi@1fa10000 {
+        compatible = "airoha,en7581-snand";
+        reg = <0x0 0x1fa10000 0x0 0x140>,
+              <0x0 0x1fa11000 0x0 0x160>;
+
+        clocks = <&scuclk EN7523_CLK_SPI>;
+        clock-names = "spi";
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        flash@0 {
+          compatible = "spi-nand";
+          reg = <0>;
+          spi-tx-bus-width = <1>;
+          spi-rx-bus-width = <2>;
+        };
+      };
+    };
Signature · 1 line
2.44.0
author maintainer
#2 lore raw

PATCH v4 2/3 arm64: dts: airoha: add EN7581 spi-nand node

In reply to Lorenzo Bianconi

Introduce the Airoha EN7581 spi-nand node in Airoha EN7581 dtsi

---
 arch/arm64/boot/dts/airoha/en7581.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
arch/arm64/boot/dts/airoha/en7581.dtsi +19 -0
index 5c4bfe3e1e5a..98c2a86086e1 100644
@@ -159,5 +159,24 @@ scuclk: clock-controller@1fa20000 {
 			      <0x0 0x1fbe3400 0x0 0xfc>;
 			#clock-cells = <1>;
 		};
+
+		snfi: spi@1fa10000 {
+			compatible = "airoha,en7581-snand";
+			reg = <0x0 0x1fa10000 0x0 0x140>,
+			      <0x0 0x1fa11000 0x0 0x160>;
+
+			clocks = <&scuclk EN7523_CLK_SPI>;
+			clock-names = "spi";
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+			spi_nand: nand@0 {
+				compatible = "spi-nand";
+				reg = <0>;
+				spi-max-frequency = <50000000>;
+				spi-tx-bus-width = <1>;
+				spi-rx-bus-width = <2>;
+			};
+		};
 	};
 };
Signature · 1 line
2.44.0
author maintainer
#3 lore raw

PATCH v4 3/3 spi: airoha: add SPI-NAND Flash controller driver

In reply to Lorenzo Bianconi

Introduce support for SPI-NAND driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs.

---
 MAINTAINERS                   |    9 +
 drivers/spi/Kconfig           |   10 +
 drivers/spi/Makefile          |    1 +
 drivers/spi/spi-airoha-snfi.c | 1140 +++++++++++++++++++++++++++++++++
 4 files changed, 1160 insertions(+)
 create mode 100644 drivers/spi/spi-airoha-snfi.c
MAINTAINERS +9 -0
index aa3b947fb080..ce9fac46f741 100644
@@ -653,6 +653,15 @@ S:	Supported
 F:	fs/aio.c
 F:	include/linux/*aio*.h
 
+AIROHA SPI SNFI DRIVER
+M:	Lorenzo Bianconi <[email protected]>
+M:	Ray Liu <[email protected]>
+L:	[email protected] (moderated for non-subscribers)
+L:	[email protected]
+S:	Maintained
+F:	Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
+F:	drivers/spi/spi-airoha.c
+
 AIRSPY MEDIA DRIVER
 L:	[email protected]
 S:	Orphan
drivers/spi/Kconfig +10 -0
index bc7021da2fe9..6fa91775f334 100644
@@ -57,6 +57,16 @@ config SPI_MEM
 
 comment "SPI Master Controller Drivers"
 
+config SPI_AIROHA_SNFI
+	tristate "Airoha SPI NAND Flash Interface"
+	depends on ARCH_AIROHA || COMPILE_TEST
+	depends on SPI_MASTER
+	select REGMAP_MMIO
+	help
+	  This enables support for SPI-NAND mode on the Airoha NAND
+	  Flash Interface found on Airoha ARM SoCs. This controller
+	  is implemented as a SPI-MEM controller.
+
 config SPI_ALTERA
 	tristate "Altera SPI Controller platform driver"
 	select SPI_ALTERA_CORE
drivers/spi/Makefile +1 -0
index 4ff8d725ba5e..e694254dec04 100644
@@ -14,6 +14,7 @@ obj-$(CONFIG_SPI_SPIDEV)		+= spidev.o
 obj-$(CONFIG_SPI_LOOPBACK_TEST)		+= spi-loopback-test.o
 
 # SPI master controller drivers (bus)
+obj-$(CONFIG_SPI_AIROHA_SNFI)		+= spi-airoha-snfi.o
 obj-$(CONFIG_SPI_ALTERA)		+= spi-altera-platform.o
 obj-$(CONFIG_SPI_ALTERA_CORE)		+= spi-altera-core.o
 obj-$(CONFIG_SPI_ALTERA_DFL)		+= spi-altera-dfl.o
drivers/spi/spi-airoha-snfi.c new file +1140 -0

1,140 lines not on this page · raw message

Signature · 1 line
2.44.0
#4 lore raw

Re: [PATCH v4 3/3] spi: airoha: add SPI-NAND Flash controller driver

Quoted 3 lines · Lorenzo Bianconi

Introduce support for SPI-NAND driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs.

...

Quoted 1 line

+#include <asm-generic/unaligned.h>

No driver should include asm-generic, basically 99.9% of the kernel code must not do that. I.o.w. asm-generic is very special.

drivers/spi/spi-airoha-snfi.c line 10

Quoted 2 lines
drivers/spi/spi-airoha-snfi.c new file +2 -0
+#include <linux/bitfield.h>
+#include <linux/clk.h>

+ delay.h

drivers/spi/spi-airoha-snfi.c line 12

Quoted 2 lines
drivers/spi/spi-airoha-snfi.c new file +2 -0
+#include <linux/device.h>
+#include <linux/dma-mapping.h>

+ errno.h

Quoted 1 line

+#include <linux/types.h>

Can you make it ordered (I noticed this after a while)?

+ limits.h

Quoted 1 line

+#include <linux/math.h>

+ minmax.h

drivers/spi/spi-airoha-snfi.c line 21

Quoted 7 lines
drivers/spi/spi-airoha-snfi.c new file +7 -0
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/sizes.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi-mem.h>

+ types.h

Also note, we usually place headers from more generic to less, hence linux/* followed by asm/* and not vice versa.

...

Quoted 9 lines
drivers/spi/spi-airoha-snfi.c new file +9 -0
+struct airoha_snand_dev {
+       size_t buf_len;
+
+       u8 *txrx_buf;
+       dma_addr_t dma_addr;
+
+       u64 cur_page_num;
+       bool data_need_update;
+};

...

Quoted 1 line

+ /* quad io / quad out */

io --> in ?

...

Quoted 1 line

+ /* dual io / dual out */

Ditto.

...

Quoted 8 lines
drivers/spi/spi-airoha-snfi.c new file +8 -0
+       case SPI_MEM_DATA_OUT:
+               /* check dummy cycle first */
+               if (op->dummy.nbytes)
+                       return false;
+
+               /* program load quad out */
+               if (op->addr.buswidth == 1 && op->data.buswidth == 4)
+                       return true;

drivers/spi/spi-airoha-snfi.c line 585

Quoted 10 lines
drivers/spi/spi-airoha-snfi.c new file +9 -0
+
+               /* standard spi */
+               if (op->addr.buswidth == 1 && op->data.buswidth == 1)
+                       return true;
 
+       default:
+               break;
+       }
+
+       return false;

Why not return false directly from the default case?

...

Quoted 1 line

+ op->data.nbytes = min_t(size_t, op->data.nbytes, 160 - len);

You probably wanted clamp(). It's discouraged to use min_t() for unsigned types.

...

drivers/spi/spi-airoha-snfi.c line 756

Quoted 3 lines
drivers/spi/spi-airoha-snfi.c new file +3 -0
+       err = regmap_read_poll_timeout(as_ctrl->regmap_nfi, REG_SPI_NFI_INTR,
+                                      val, (val & SPI_NFI_AHB_DONE), 0,
+                                      USEC_PER_SEC);

Perhaps
1 * USEC_PER_SEC
?

Easy to read plain numbers like this to get the idea "this is 1 SEC timeout". Also editors highlight plain integers with a different colour.

...

drivers/spi/spi-airoha-snfi.c line 933

Quoted 7 lines
drivers/spi/spi-airoha-snfi.c new file +6 -0
+       /* addr part */
+       cmd = opcode == SPI_NAND_OP_GET_FEATURE ? 0x11 : 0x8;
+       put_unaligned_be64(op->addr.val, data);
 
+       for (i = 0; i < op->addr.nbytes; i++) {
+               err = airoha_snand_write_data(as_ctrl, cmd,
+                                             &data[8 - op->addr.nbytes + i],

Now you can update a for loop to make this prettier, right?

drivers/spi/spi-airoha-snfi.c line 937

Quoted 4 lines
drivers/spi/spi-airoha-snfi.c new file +4 -0
+                                             sizeof(data[0]));
+               if (err)
+                       return err;
+       }
       for (i = 8 - op->addr.nbytes; i < 8; i++) {
               err = airoha_snand_write_data(as_ctrl, cmd, &data[i],
                                             sizeof(data[0]));
               ...
       }

Note, 8 can be replaced by sizeof() / ARRAY_SIZE() but I'm not insisting.

...

drivers/spi/spi-airoha-snfi.c line 1011

Quoted 2 lines
drivers/spi/spi-airoha-snfi.c new file +2 -0
+       devm_kfree(as_ctrl->dev, as_dev->txrx_buf);
+       devm_kfree(as_ctrl->dev, as_dev);

Why?! Using devm_*free() explicitly hints about either misunderstanding of devm concept, or object's lifetime.

...

Quoted 1 line

+ spi_set_ctldata(spi, NULL);

Seems there is no consensus on NULLifying this (when, if even needed), but it's fine.

...

Quoted 1 line

+ base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);

How is 'res' being used exactly?

Quoted 2 lines
(quoted diff) +2 -0
+       if (IS_ERR(base))
+               return PTR_ERR(base);

...

Quoted 1 line

+ base = devm_platform_get_and_ioremap_resource(pdev, 1, &res);

Ditto.

Quoted 2 lines
(quoted diff) +2 -0
+       if (IS_ERR(base))
+               return PTR_ERR(base);

...

Quoted 1 line

+ ctrl->dev.of_node = dev->of_node;

Use device_set_node() instead.
You might need dev_fwnode() from property.h.

Signature · 2 lines
With Best Regards,
Andy Shevchenko
author maintainer
#5 lore raw

Re: [PATCH v4 3/3] spi: airoha: add SPI-NAND Flash controller driver

Quoted 5 lines · Lorenzo Bianconi
Quoted 3 lines

Introduce support for SPI-NAND driver of the Airoha NAND Flash Interface found on Airoha ARM SoCs.

Quoted 7 lines

...

Quoted 1 line

+#include <asm-generic/unaligned.h>

No driver should include asm-generic, basically 99.9% of the kernel code must not do that. I.o.w. asm-generic is very special.

ack we can use <asm/unaligned.h> instead

Quoted 30 lines

drivers/spi/spi-airoha-snfi.c line 10

Quoted 2 lines
drivers/spi/spi-airoha-snfi.c new file +2 -0
+#include <linux/bitfield.h>
+#include <linux/clk.h>

+ delay.h

drivers/spi/spi-airoha-snfi.c line 12

Quoted 2 lines
drivers/spi/spi-airoha-snfi.c new file +2 -0
+#include <linux/device.h>
+#include <linux/dma-mapping.h>

+ errno.h

Quoted 1 line

+#include <linux/types.h>

Can you make it ordered (I noticed this after a while)?

+ limits.h

Quoted 1 line

+#include <linux/math.h>

+ minmax.h

drivers/spi/spi-airoha-snfi.c line 21

Quoted 7 lines
drivers/spi/spi-airoha-snfi.c new file +7 -0
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/sizes.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi-mem.h>

+ types.h

Quoted 2 lines

Also note, we usually place headers from more generic to less, hence linux/* followed by asm/* and not vice versa.

ack, I will fix it.

Quoted 15 lines

...

Quoted 9 lines
drivers/spi/spi-airoha-snfi.c new file +9 -0
+struct airoha_snand_dev {
+       size_t buf_len;
+
+       u8 *txrx_buf;
+       dma_addr_t dma_addr;
+
+       u64 cur_page_num;
+       bool data_need_update;
+};

...

Quoted 3 lines
Quoted 1 line

+ /* quad io / quad out */

io --> in ?

ack, I will fix it.

Quoted 22 lines

...

Quoted 1 line

+ /* dual io / dual out */

Ditto.

...

Quoted 12 lines
drivers/spi/spi-airoha-snfi.c new file +12 -0
+       case SPI_MEM_DATA_OUT:
+               /* check dummy cycle first */
+               if (op->dummy.nbytes)
+                       return false;
+
+               /* program load quad out */
+               if (op->addr.buswidth == 1 && op->data.buswidth == 4)
+                       return true;
+
+               /* standard spi */
+               if (op->addr.buswidth == 1 && op->data.buswidth == 1)
+                       return true;
Quoted 7 lines

drivers/spi/spi-airoha-snfi.c line 543

Quoted 5 lines
drivers/spi/spi-airoha-snfi.c new file +5 -0
+       default:
+               break;
+       }
+
+       return false;

Why not return false directly from the default case?

it is because we still need the 'return false' at the end of routine for the other cases due to SPI_MEM_DATA_IN and SPI_MEM_DATA_OUT.

Quoted 6 lines

...

Quoted 1 line

+ op->data.nbytes = min_t(size_t, op->data.nbytes, 160 - len);

You probably wanted clamp(). It's discouraged to use min_t() for unsigned types.

do you mean doing something like:

op->data.nbytes = clamp(op->data.nbytes, op->data.nbytes, 160 - len);

maybe an 'if' condition is more readable, what do you think?

Quoted 32 lines

...

drivers/spi/spi-airoha-snfi.c line 756

Quoted 3 lines
drivers/spi/spi-airoha-snfi.c new file +3 -0
+       err = regmap_read_poll_timeout(as_ctrl->regmap_nfi, REG_SPI_NFI_INTR,
+                                      val, (val & SPI_NFI_AHB_DONE), 0,
+                                      USEC_PER_SEC);

Perhaps
1 * USEC_PER_SEC
?

Easy to read plain numbers like this to get the idea "this is 1 SEC timeout". Also editors highlight plain integers with a different colour.

...

drivers/spi/spi-airoha-snfi.c line 933

Quoted 7 lines
drivers/spi/spi-airoha-snfi.c new file +6 -0
+       /* addr part */
+       cmd = opcode == SPI_NAND_OP_GET_FEATURE ? 0x11 : 0x8;
+       put_unaligned_be64(op->addr.val, data);
 
+       for (i = 0; i < op->addr.nbytes; i++) {
+               err = airoha_snand_write_data(as_ctrl, cmd,
+                                             &data[8 - op->addr.nbytes + i],

Now you can update a for loop to make this prettier, right?

drivers/spi/spi-airoha-snfi.c line 937

Quoted 4 lines
drivers/spi/spi-airoha-snfi.c new file +4 -0
+                                             sizeof(data[0]));
+               if (err)
+                       return err;
+       }
Quoted 7 lines
       for (i = 8 - op->addr.nbytes; i < 8; i++) {
               err = airoha_snand_write_data(as_ctrl, cmd, &data[i],
                                             sizeof(data[0]));
               ...
       }

Note, 8 can be replaced by sizeof() / ARRAY_SIZE() but I'm not insisting.

ack, I agree. I will fix it.

Quoted 8 lines

...

drivers/spi/spi-airoha-snfi.c line 1011

Quoted 2 lines
drivers/spi/spi-airoha-snfi.c new file +2 -0
+       devm_kfree(as_ctrl->dev, as_dev->txrx_buf);
+       devm_kfree(as_ctrl->dev, as_dev);

Why?! Using devm_*free() explicitly hints about either misunderstanding of devm concept, or object's lifetime.

ack, I agree, we can get rid of them.

Quoted 5 lines

...

Quoted 1 line

+ spi_set_ctldata(spi, NULL);

Quoted 8 lines

Seems there is no consensus on NULLifying this (when, if even needed), but it's fine.

...

Quoted 1 line

+ base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);

How is 'res' being used exactly?

right, we can pass NULL here to devm_platform_get_and_ioremap_resource()

Quoted 14 lines
Quoted 3 lines
(quoted diff) +2 -0
+       if (IS_ERR(base))
+               return PTR_ERR(base);

...

Quoted 1 line

+ base = devm_platform_get_and_ioremap_resource(pdev, 1, &res);

Ditto.

Review

Quoted 2 lines
(quoted diff) +2 -0
+       if (IS_ERR(base))
+               return PTR_ERR(base);
Quoted 6 lines

...

Quoted 1 line

+ ctrl->dev.of_node = dev->of_node;

Use device_set_node() instead.
You might need dev_fwnode() from property.h.

ack, I will fix it.

Regards,
Lorenzo

Quoted 4 lines
Signature · 3 lines
-- 
With Best Regards,
Andy Shevchenko
#6 lore raw

Re: [PATCH v4 3/3] spi: airoha: add SPI-NAND Flash controller driver

Quoted 1 line · Lorenzo Bianconi
Quoted 1 line · Lorenzo Bianconi

...

Quoted 10 lines
Quoted 7 lines

drivers/spi/spi-airoha-snfi.c line 543

Quoted 5 lines
drivers/spi/spi-airoha-snfi.c new file +5 -0
+       default:
+               break;
+       }
+
+       return false;

Why not return false directly from the default case?

it is because we still need the 'return false' at the end of routine for the other cases due to SPI_MEM_DATA_IN and SPI_MEM_DATA_OUT.

Hmm... Can it be refactored? I think it would still be possible to slightly reduce the amount of LoCs.

...

Quoted 9 lines
Quoted 3 lines
Quoted 1 line

+ op->data.nbytes = min_t(size_t, op->data.nbytes, 160 - len);

You probably wanted clamp(). It's discouraged to use min_t() for unsigned types.

do you mean doing something like:

op->data.nbytes = clamp(op->data.nbytes, op->data.nbytes, 160 - len);

maybe an 'if' condition is more readable, what do you think?

Yes, since we have only one branch of change.

...

Quoted 5 lines
Quoted 3 lines
Quoted 1 line

+ base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);

How is 'res' being used exactly?

right, we can pass NULL here to devm_platform_get_and_ioremap_resource()

No, just use another call that doesn't require this parameter at all.

...

Quoted 3 lines
Quoted 3 lines
Quoted 1 line

+ base = devm_platform_get_and_ioremap_resource(pdev, 1, &res);

Ditto.

Signature · 2 lines
With Best Regards,
Andy Shevchenko
#7 lore raw

Re: [PATCH v4 3/3] spi: airoha: add SPI-NAND Flash controller driver

In reply to Lorenzo Bianconi
kernel test robot noticed the following build warnings:

Hi Lorenzo,

kernel test robot noticed the following build warnings:

[auto build test WARNING on next-20240424]
[cannot apply to broonie-spi/for-next robh/for-next linus/master v6.9-rc5 v6.9-rc4 v6.9-rc3 v6.9-rc5] [If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Lorenzo-Bianconi/dt-bindings-spi-airoha-Add-YAML-schema-for-SNFI-controller/20240426-164345
base:   next-20240424
patch link:    https://lore.kernel.org/r/2047e9c8372b51dc263178a12e194b8826f1abe7.1714119615.git.lorenzo%40kernel.org
patch subject: [PATCH v4 3/3] spi: airoha: add SPI-NAND Flash controller driver
config: hexagon-allyesconfig (https://download.01.org/0day-ci/archive/20240428/[email protected]/config)
compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project 5ef5eb66fb428aaf61fb51b709f065c069c11242)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240428/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/

All warnings (new ones prefixed by >>):

In file included from drivers/spi/spi-airoha-snfi.c:12:
In file included from include/linux/dma-mapping.h:11:
In file included from include/linux/scatterlist.h:8:
In file included from include/linux/mm.h:2254:
include/linux/vmstat.h:514:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]

     514 |         return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
         |                               ~~~~~~~~~~~ ^ ~~~
   In file included from drivers/spi/spi-airoha-snfi.c:12:
   In file included from include/linux/dma-mapping.h:11:
   In file included from include/linux/scatterlist.h:9:
   In file included from arch/hexagon/include/asm/io.h:328:
   include/asm-generic/io.h:548:31: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     548 |         val = __raw_readb(PCI_IOBASE + addr);
         |                           ~~~~~~~~~~ ^
   include/asm-generic/io.h:561:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     561 |         val = __le16_to_cpu((__le16 __force)__raw_readw(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/little_endian.h:37:51: note: expanded from macro '__le16_to_cpu'
      37 | #define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
         |                                                   ^
   In file included from drivers/spi/spi-airoha-snfi.c:12:
   In file included from include/linux/dma-mapping.h:11:
   In file included from include/linux/scatterlist.h:9:
   In file included from arch/hexagon/include/asm/io.h:328:
   include/asm-generic/io.h:574:61: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     574 |         val = __le32_to_cpu((__le32 __force)__raw_readl(PCI_IOBASE + addr));
         |                                                         ~~~~~~~~~~ ^
   include/uapi/linux/byteorder/little_endian.h:35:51: note: expanded from macro '__le32_to_cpu'
      35 | #define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
         |                                                   ^
   In file included from drivers/spi/spi-airoha-snfi.c:12:
   In file included from include/linux/dma-mapping.h:11:
   In file included from include/linux/scatterlist.h:9:
   In file included from arch/hexagon/include/asm/io.h:328:
   include/asm-generic/io.h:585:33: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     585 |         __raw_writeb(value, PCI_IOBASE + addr);
         |                             ~~~~~~~~~~ ^
   include/asm-generic/io.h:595:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     595 |         __raw_writew((u16 __force)cpu_to_le16(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
   include/asm-generic/io.h:605:59: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
     605 |         __raw_writel((u32 __force)cpu_to_le32(value), PCI_IOBASE + addr);
         |                                                       ~~~~~~~~~~ ^
>> drivers/spi/spi-airoha-snfi.c:581:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
     581 |         default:
         |         ^
   drivers/spi/spi-airoha-snfi.c:581:2: note: insert 'break;' to avoid fall-through
     581 |         default:
         |         ^
         |         break; 

8 warnings generated.

vim +581 drivers/spi/spi-airoha-snfi.c

539
540 static bool airoha_snand_is_page_ops(const struct spi_mem_op *op)
541 {
542 if (op->addr.nbytes != 2)
543 return false;
544
545 if (op->addr.buswidth != 1 && op->addr.buswidth != 2 &&
546 op->addr.buswidth != 4)
547 return false;
548
549 switch (op->data.dir) {
550 case SPI_MEM_DATA_IN:
551 /* check dummy cycle first */
552 if (op->dummy.nbytes * BITS_PER_BYTE / op->dummy.buswidth > 0xf)
553 return false;
554
555 /* quad io / quad out */
556 if ((op->addr.buswidth == 4 || op->addr.buswidth == 1) &&
557 op->data.buswidth == 4)
558 return true;
559
560 /* dual io / dual out */
561 if ((op->addr.buswidth == 2 || op->addr.buswidth == 1) &&
562 op->data.buswidth == 2)
563 return true;
564
565 /* standard spi */
566 if (op->addr.buswidth == 1 && op->data.buswidth == 1)
567 return true;
568 break;
569 case SPI_MEM_DATA_OUT:
570 /* check dummy cycle first */
571 if (op->dummy.nbytes)
572 return false;
573
574 /* program load quad out */
575 if (op->addr.buswidth == 1 && op->data.buswidth == 4)
576 return true;
577
578 /* standard spi */
579 if (op->addr.buswidth == 1 && op->data.buswidth == 1)
580 return true;

 > 581		default:

582 break;
583 }
584
585 return false;
586 }
587

Signature · 2 lines
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki